]>
Commit | Line | Data |
---|---|---|
dbee90b7 | 1 | #include <asm/asm-offsets.h> |
7b1c0d26 | 2 | #include <asm/thread_info.h> |
485172b3 | 3 | |
bef9ae3d RB |
4 | #define PAGE_SIZE _PAGE_SIZE |
5 | ||
485172b3 DD |
6 | /* |
7 | * Put .bss..swapper_pg_dir as the first thing in .bss. This will | |
8 | * ensure that it has .bss alignment (64K). | |
9 | */ | |
10 | #define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir) | |
11 | ||
1da177e4 LT |
12 | #include <asm-generic/vmlinux.lds.h> |
13 | ||
41c594ab | 14 | #undef mips |
1da177e4 LT |
15 | #define mips mips |
16 | OUTPUT_ARCH(mips) | |
17 | ENTRY(kernel_entry) | |
603bb99c RB |
18 | PHDRS { |
19 | text PT_LOAD FLAGS(7); /* RWX */ | |
20 | note PT_NOTE FLAGS(4); /* R__ */ | |
21 | } | |
51b563fc | 22 | |
d71789b6 ML |
23 | #ifdef CONFIG_32BIT |
24 | #ifdef CONFIG_CPU_LITTLE_ENDIAN | |
70342287 | 25 | jiffies = jiffies_64; |
d71789b6 | 26 | #else |
70342287 | 27 | jiffies = jiffies_64 + 4; |
d71789b6 ML |
28 | #endif |
29 | #else | |
70342287 | 30 | jiffies = jiffies_64; |
d71789b6 | 31 | #endif |
0f5c9064 | 32 | |
1da177e4 LT |
33 | SECTIONS |
34 | { | |
35 | #ifdef CONFIG_BOOT_ELF64 | |
0f5c9064 SR |
36 | /* Read-only sections, merged into text segment: */ |
37 | /* . = 0xc000000000000000; */ | |
1da177e4 | 38 | |
0f5c9064 SR |
39 | /* This is the value for an Origin kernel, taken from an IRIX kernel. */ |
40 | /* . = 0xc00000000001c000; */ | |
1da177e4 | 41 | |
0f5c9064 SR |
42 | /* Set the vaddr for the text segment to a value |
43 | * >= 0xa800 0000 0001 9000 if no symmon is going to configured | |
44 | * >= 0xa800 0000 0030 0000 otherwise | |
45 | */ | |
1da177e4 | 46 | |
0f5c9064 SR |
47 | /* . = 0xa800000000300000; */ |
48 | . = 0xffffffff80300000; | |
1da177e4 | 49 | #endif |
51b563fc | 50 | . = VMLINUX_LOAD_ADDRESS; |
0f5c9064 SR |
51 | /* read-only */ |
52 | _text = .; /* Text and read-only data */ | |
53 | .text : { | |
54 | TEXT_TEXT | |
55 | SCHED_TEXT | |
56 | LOCK_TEXT | |
f70fd1b5 | 57 | KPROBES_TEXT |
8f99a162 | 58 | IRQENTRY_TEXT |
6b3766a2 | 59 | *(.text.*) |
0f5c9064 SR |
60 | *(.fixup) |
61 | *(.gnu.warning) | |
603bb99c | 62 | } :text = 0 |
0f5c9064 SR |
63 | _etext = .; /* End of text section */ |
64 | ||
6eb10bc9 | 65 | EXCEPTION_TABLE(16) |
0f5c9064 SR |
66 | |
67 | /* Exception table for data bus errors */ | |
68 | __dbe_table : { | |
69 | __start___dbe_table = .; | |
70 | *(__dbe_table) | |
71 | __stop___dbe_table = .; | |
72 | } | |
603bb99c RB |
73 | |
74 | NOTES :text :note | |
75 | .dummy : { *(.dummy) } :text | |
76 | ||
a2d063ac | 77 | _sdata = .; /* Start of data section */ |
0f5c9064 SR |
78 | RODATA |
79 | ||
80 | /* writeable */ | |
81 | .data : { /* Data */ | |
16be2435 | 82 | . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */ |
0f5c9064 | 83 | |
7b1c0d26 | 84 | INIT_TASK_DATA(THREAD_SIZE) |
6eb10bc9 NE |
85 | NOSAVE_DATA |
86 | CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT) | |
f8bec75a | 87 | READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT) |
16be2435 FBH |
88 | DATA_DATA |
89 | CONSTRUCTORS | |
0f5c9064 SR |
90 | } |
91 | _gp = . + 0x8000; | |
92 | .lit8 : { | |
93 | *(.lit8) | |
94 | } | |
95 | .lit4 : { | |
96 | *(.lit4) | |
97 | } | |
98 | /* We want the small data sections together, so single-instruction offsets | |
99 | can access them all, and initialized data all before uninitialized, so | |
100 | we can shorten the on-disk segment size. */ | |
101 | .sdata : { | |
102 | *(.sdata) | |
103 | } | |
0f5c9064 SR |
104 | _edata = .; /* End of data section */ |
105 | ||
106 | /* will be freed after init */ | |
a0b54e25 | 107 | . = ALIGN(PAGE_SIZE); /* Init code and data */ |
0f5c9064 | 108 | __init_begin = .; |
6eb10bc9 NE |
109 | INIT_TEXT_SECTION(PAGE_SIZE) |
110 | INIT_DATA_SECTION(16) | |
0f5c9064 | 111 | |
487d70d0 GJ |
112 | . = ALIGN(4); |
113 | .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) { | |
114 | __mips_machines_start = .; | |
115 | *(.mips.machines.init) | |
116 | __mips_machines_end = .; | |
117 | } | |
118 | ||
0f5c9064 SR |
119 | /* .exit.text is discarded at runtime, not link time, to deal with |
120 | * references from .rodata | |
121 | */ | |
122 | .exit.text : { | |
01ba2bdc | 123 | EXIT_TEXT |
0f5c9064 SR |
124 | } |
125 | .exit.data : { | |
01ba2bdc | 126 | EXIT_DATA |
0f5c9064 | 127 | } |
6eb10bc9 | 128 | |
0415b00d | 129 | PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT) |
485172b3 DD |
130 | /* |
131 | * Align to 64K in attempt to eliminate holes before the | |
132 | * .bss..swapper_pg_dir section at the start of .bss. This | |
133 | * also satisfies PAGE_SIZE alignment as the largest page size | |
134 | * allowed is 64K. | |
135 | */ | |
136 | . = ALIGN(0x10000); | |
0f5c9064 SR |
137 | __init_end = .; |
138 | /* freed after init ends here */ | |
139 | ||
485172b3 DD |
140 | /* |
141 | * Force .bss to 64K alignment so that .bss..swapper_pg_dir | |
70342287 | 142 | * gets that alignment. .sbss should be empty, so there will be |
485172b3 DD |
143 | * no holes after __init_end. */ |
144 | BSS_SECTION(0, 0x10000, 0) | |
0f5c9064 SR |
145 | |
146 | _end = . ; | |
147 | ||
0f5c9064 SR |
148 | /* These mark the ABI of the kernel for debuggers. */ |
149 | .mdebug.abi32 : { | |
150 | KEEP(*(.mdebug.abi32)) | |
151 | } | |
152 | .mdebug.abi64 : { | |
153 | KEEP(*(.mdebug.abi64)) | |
154 | } | |
155 | ||
156 | /* This is the MIPS specific mdebug section. */ | |
157 | .mdebug : { | |
158 | *(.mdebug) | |
159 | } | |
160 | ||
161 | STABS_DEBUG | |
162 | DWARF_DEBUG | |
163 | ||
164 | /* These must appear regardless of . */ | |
165 | .gptab.sdata : { | |
166 | *(.gptab.data) | |
167 | *(.gptab.sdata) | |
168 | } | |
169 | .gptab.sbss : { | |
170 | *(.gptab.bss) | |
171 | *(.gptab.sbss) | |
172 | } | |
023bf6f1 TH |
173 | |
174 | /* Sections to be discarded */ | |
175 | DISCARDS | |
176 | /DISCARD/ : { | |
177 | /* ABI crap starts here */ | |
178 | *(.MIPS.options) | |
179 | *(.options) | |
180 | *(.pdr) | |
181 | *(.reginfo) | |
182 | } | |
1da177e4 | 183 | } |