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Merge tag 'tty-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty
[linux.git] / arch / arm / mach-davinci / board-da850-evm.c
CommitLineData
0fbc5592
SR		 1/*
2 * TI DA850/OMAP-L138 EVM board
3 *
4 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * Derived from: arch/arm/mach-davinci/board-da830-evm.c
7 * Original Copyrights follow:
8 *
9 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
10 * the terms of the GNU General Public License version 2. This program
11 * is licensed "as is" without any warranty of any kind, whether express
12 * or implied.
13 */
0fbc5592 14#include <linux/console.h>
6809084a
MP		 15#include <linux/delay.h>
16#include <linux/gpio.h>
17#include <linux/gpio_keys.h>
18#include <linux/init.h>
19#include <linux/kernel.h>
0fbc5592 20#include <linux/i2c.h>
25f73ed5 21#include <linux/platform_data/at24.h>
5877457a 22#include <linux/platform_data/pca953x.h>
75929f5e 23#include <linux/input.h>
6809084a 24#include <linux/input/tps6507x-ts.h>
0bc20bba 25#include <linux/mfd/tps6507x.h>
38beb929
SR		 26#include <linux/mtd/mtd.h>
27#include <linux/mtd/nand.h>
28#include <linux/mtd/partitions.h>
7c5ec609 29#include <linux/mtd/physmap.h>
6809084a 30#include <linux/platform_device.h>
b856671e 31#include <linux/platform_data/gpio-davinci.h>
6809084a
MP		 32#include <linux/platform_data/mtd-davinci.h>
33#include <linux/platform_data/mtd-davinci-aemif.h>
34#include <linux/platform_data/spi-davinci.h>
ae41d17a 35#include <linux/platform_data/uio_pruss.h>
a9eb1f67 36#include <linux/regulator/machine.h>
8b24599e 37#include <linux/regulator/tps6507x.h>
9e9bc235 38#include <linux/regulator/fixed.h>
fdce5568
SN		 39#include <linux/spi/spi.h>
40#include <linux/spi/flash.h>
ab3f5c1f 41#include <linux/wl12xx.h>
0fbc5592 42
b856671e 43#include <mach/common.h>
0fbc5592
SR		 44#include <mach/cp_intc.h>
45#include <mach/da8xx.h>
7761ef67 46#include <mach/mux.h>
6a2461a4 47#include <mach/sram.h>
6809084a
MP		 48
49#include <asm/mach-types.h>
50#include <asm/mach/arch.h>
51#include <asm/system_info.h>
0fbc5592 52
1e046d17 53#include <media/tvp514x.h>
2bd4e58c 54#include <media/adv7343.h>
1e046d17 55
f6f97588 56#define DA850_EVM_PHY_ID "davinci_mdio-0:00"
7761ef67 57#define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
5cbdf276 58#define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15)
5cbdf276 59
700691f2
SR		 60#define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0)
61#define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1)
62
ab3f5c1f
IY		 63#define DA850_WLAN_EN GPIO_TO_PIN(6, 9)
64#define DA850_WLAN_IRQ GPIO_TO_PIN(6, 10)
65
2206771c
C		 66#define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
67
fdce5568
SN		 68static struct mtd_partition da850evm_spiflash_part[] = {
69 [0] = {
70 .name = "UBL",
71 .offset = 0,
72 .size = SZ_64K,
73 .mask_flags = MTD_WRITEABLE,
74 },
75 [1] = {
76 .name = "U-Boot",
77 .offset = MTDPART_OFS_APPEND,
78 .size = SZ_512K,
79 .mask_flags = MTD_WRITEABLE,
80 },
81 [2] = {
82 .name = "U-Boot-Env",
83 .offset = MTDPART_OFS_APPEND,
84 .size = SZ_64K,
85 .mask_flags = MTD_WRITEABLE,
86 },
87 [3] = {
88 .name = "Kernel",
89 .offset = MTDPART_OFS_APPEND,
90 .size = SZ_2M + SZ_512K,
91 .mask_flags = 0,
92 },
93 [4] = {
94 .name = "Filesystem",
95 .offset = MTDPART_OFS_APPEND,
96 .size = SZ_4M,
97 .mask_flags = 0,
98 },
99 [5] = {
100 .name = "MAC-Address",
101 .offset = SZ_8M - SZ_64K,
102 .size = SZ_64K,
103 .mask_flags = MTD_WRITEABLE,
104 },
105};
106
107static struct flash_platform_data da850evm_spiflash_data = {
108 .name = "m25p80",
109 .parts = da850evm_spiflash_part,
110 .nr_parts = ARRAY_SIZE(da850evm_spiflash_part),
111 .type = "m25p64",
112};
113
114static struct davinci_spi_config da850evm_spiflash_cfg = {
115 .io_type = SPI_IO_TYPE_DMA,
116 .c2tdelay = 8,
117 .t2cdelay = 8,
118};
119
120static struct spi_board_info da850evm_spi_info[] = {
121 {
122 .modalias = "m25p80",
123 .platform_data = &da850evm_spiflash_data,
124 .controller_data = &da850evm_spiflash_cfg,
125 .mode = SPI_MODE_0,
126 .max_speed_hz = 30000000,
127 .bus_num = 1,
128 .chip_select = 0,
129 },
130};
131
810198bc
RS		 132#ifdef CONFIG_MTD
133static void da850_evm_m25p80_notify_add(struct mtd_info *mtd)
134{
135 char *mac_addr = davinci_soc_info.emac_pdata->mac_addr;
136 size_t retlen;
137
138 if (!strcmp(mtd->name, "MAC-Address")) {
329ad399 139 mtd_read(mtd, 0, ETH_ALEN, &retlen, mac_addr);
810198bc
RS		 140 if (retlen == ETH_ALEN)
141 pr_info("Read MAC addr from SPI Flash: %pM\n",
142 mac_addr);
143 }
144}
145
146static struct mtd_notifier da850evm_spi_notifier = {
147 .add = da850_evm_m25p80_notify_add,
148};
149
150static void da850_evm_setup_mac_addr(void)
151{
152 register_mtd_user(&da850evm_spi_notifier);
153}
154#else
155static void da850_evm_setup_mac_addr(void) { }
156#endif
157
7c5ec609
SR		 158static struct mtd_partition da850_evm_norflash_partition[] = {
159 {
e2abd5a2 160 .name = "bootloaders + env",
7c5ec609 161 .offset = 0,
e2abd5a2
SR		 162 .size = SZ_512K,
163 .mask_flags = MTD_WRITEABLE,
164 },
165 {
166 .name = "kernel",
167 .offset = MTDPART_OFS_APPEND,
168 .size = SZ_2M,
169 .mask_flags = 0,
170 },
171 {
172 .name = "filesystem",
173 .offset = MTDPART_OFS_APPEND,
7c5ec609
SR		 174 .size = MTDPART_SIZ_FULL,
175 .mask_flags = 0,
176 },
177};
178
179static struct physmap_flash_data da850_evm_norflash_data = {
180 .width = 2,
181 .parts = da850_evm_norflash_partition,
182 .nr_parts = ARRAY_SIZE(da850_evm_norflash_partition),
183};
184
185static struct resource da850_evm_norflash_resource[] = {
186 {
187 .start = DA8XX_AEMIF_CS2_BASE,
188 .end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1,
189 .flags = IORESOURCE_MEM,
190 },
191};
192
193static struct platform_device da850_evm_norflash_device = {
194 .name = "physmap-flash",
195 .id = 0,
196 .dev = {
197 .platform_data = &da850_evm_norflash_data,
198 },
199 .num_resources = 1,
200 .resource = da850_evm_norflash_resource,
201};
202
63534443
SN		 203static struct davinci_pm_config da850_pm_pdata = {
204 .sleepcount = 128,
205};
206
207static struct platform_device da850_pm_device = {
208 .name = "pm-davinci",
209 .dev = {
210 .platform_data = &da850_pm_pdata,
211 },
212 .id = -1,
213};
214
38beb929
SR		 215/* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
216 * (128K blocks). It may be used instead of the (default) SPI flash
217 * to boot, using TI's tools to install the secondary boot loader
218 * (UBL) and U-Boot.
219 */
db549d22 220static struct mtd_partition da850_evm_nandflash_partition[] = {
38beb929
SR		 221 {
222 .name = "u-boot env",
223 .offset = 0,
224 .size = SZ_128K,
225 .mask_flags = MTD_WRITEABLE,
226 },
227 {
228 .name = "UBL",
229 .offset = MTDPART_OFS_APPEND,
230 .size = SZ_128K,
231 .mask_flags = MTD_WRITEABLE,
232 },
233 {
234 .name = "u-boot",
235 .offset = MTDPART_OFS_APPEND,
236 .size = 4 * SZ_128K,
237 .mask_flags = MTD_WRITEABLE,
238 },
239 {
240 .name = "kernel",
241 .offset = 0x200000,
242 .size = SZ_2M,
243 .mask_flags = 0,
244 },
245 {
246 .name = "filesystem",
247 .offset = MTDPART_OFS_APPEND,
248 .size = MTDPART_SIZ_FULL,
249 .mask_flags = 0,
250 },
251};
252
18a8505c
SN		 253static struct davinci_aemif_timing da850_evm_nandflash_timing = {
254 .wsetup = 24,
255 .wstrobe = 21,
256 .whold = 14,
257 .rsetup = 19,
258 .rstrobe = 50,
259 .rhold = 0,
260 .ta = 20,
261};
262
38beb929
SR		 263static struct davinci_nand_pdata da850_evm_nandflash_data = {
264 .parts = da850_evm_nandflash_partition,
265 .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
266 .ecc_mode = NAND_ECC_HW,
fc42e335 267 .ecc_bits = 4,
bb9ebd4e 268 .bbt_options = NAND_BBT_USE_FLASH,
18a8505c 269 .timing = &da850_evm_nandflash_timing,
38beb929
SR		 270};
271
272static struct resource da850_evm_nandflash_resource[] = {
273 {
274 .start = DA8XX_AEMIF_CS3_BASE,
275 .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
276 .flags = IORESOURCE_MEM,
277 },
278 {
279 .start = DA8XX_AEMIF_CTL_BASE,
280 .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
281 .flags = IORESOURCE_MEM,
282 },
283};
284
285static struct platform_device da850_evm_nandflash_device = {
286 .name = "davinci_nand",
287 .id = 1,
288 .dev = {
289 .platform_data = &da850_evm_nandflash_data,
290 },
291 .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource),
292 .resource = da850_evm_nandflash_resource,
293};
294
59858b71 295static struct platform_device *da850_evm_devices[] = {
039c5ee3
SR		 296 &da850_evm_nandflash_device,
297 &da850_evm_norflash_device,
298};
299
300#define DA8XX_AEMIF_CE2CFG_OFFSET 0x10
301#define DA8XX_AEMIF_ASIZE_16BIT 0x1
302
303static void __init da850_evm_init_nor(void)
304{
305 void __iomem *aemif_addr;
306
307 aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);
308
309 /* Configure data bus width of CS2 to 16 bit */
310 writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) |
311 DA8XX_AEMIF_ASIZE_16BIT,
312 aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);
313
314 iounmap(aemif_addr);
315}
316
f48ecc2f
SS		 317static const short da850_evm_nand_pins[] = {
318 DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3,
319 DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7,
320 DA850_EMA_A_1, DA850_EMA_A_2, DA850_NEMA_CS_3, DA850_NEMA_CS_4,
321 DA850_NEMA_WE, DA850_NEMA_OE,
322 -1
323};
324
325static const short da850_evm_nor_pins[] = {
326 DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2,
327 DA850_NEMA_WE, DA850_NEMA_OE, DA850_EMA_D_0, DA850_EMA_D_1,
328 DA850_EMA_D_2, DA850_EMA_D_3, DA850_EMA_D_4, DA850_EMA_D_5,
329 DA850_EMA_D_6, DA850_EMA_D_7, DA850_EMA_D_8, DA850_EMA_D_9,
330 DA850_EMA_D_10, DA850_EMA_D_11, DA850_EMA_D_12, DA850_EMA_D_13,
331 DA850_EMA_D_14, DA850_EMA_D_15, DA850_EMA_A_0, DA850_EMA_A_1,
332 DA850_EMA_A_2, DA850_EMA_A_3, DA850_EMA_A_4, DA850_EMA_A_5,
333 DA850_EMA_A_6, DA850_EMA_A_7, DA850_EMA_A_8, DA850_EMA_A_9,
334 DA850_EMA_A_10, DA850_EMA_A_11, DA850_EMA_A_12, DA850_EMA_A_13,
335 DA850_EMA_A_14, DA850_EMA_A_15, DA850_EMA_A_16, DA850_EMA_A_17,
336 DA850_EMA_A_18, DA850_EMA_A_19, DA850_EMA_A_20, DA850_EMA_A_21,
337 DA850_EMA_A_22, DA850_EMA_A_23,
338 -1
339};
340
a0a56db9 341#define HAS_MMC IS_ENABLED(CONFIG_MMC_DAVINCI)
039c5ee3 342
f48ecc2f 343static inline void da850_evm_setup_nor_nand(void)
039c5ee3
SR		 344{
345 int ret = 0;
346
b688c2fb 347 if (!HAS_MMC) {
f48ecc2f 348 ret = davinci_cfg_reg_list(da850_evm_nand_pins);
039c5ee3 349 if (ret)
6c7c23cc
RT		 350 pr_warn("%s: NAND mux setup failed: %d\n",
351 __func__, ret);
039c5ee3 352
f48ecc2f 353 ret = davinci_cfg_reg_list(da850_evm_nor_pins);
039c5ee3 354 if (ret)
6c7c23cc
RT		 355 pr_warn("%s: NOR mux setup failed: %d\n",
356 __func__, ret);
039c5ee3
SR		 357
358 da850_evm_init_nor();
359
360 platform_add_devices(da850_evm_devices,
361 ARRAY_SIZE(da850_evm_devices));
67f5185c
IK		 362
363 if (davinci_aemif_setup(&da850_evm_nandflash_device))
364 pr_warn("%s: Cannot configure AEMIF.\n", __func__);
039c5ee3
SR		 365 }
366}
75e2ea64 367
bae10587
SN		 368#ifdef CONFIG_DA850_UI_RMII
369static inline void da850_evm_setup_emac_rmii(int rmii_sel)
370{
371 struct davinci_soc_info *soc_info = &davinci_soc_info;
372
373 soc_info->emac_pdata->rmii_en = 1;
47e7cb14 374 gpio_set_value_cansleep(rmii_sel, 0);
bae10587
SN		 375}
376#else
377static inline void da850_evm_setup_emac_rmii(int rmii_sel) { }
378#endif
379
75929f5e
BG		 380
381#define DA850_KEYS_DEBOUNCE_MS 10
382/*
383 * At 200ms polling interval it is possible to miss an
384 * event by tapping very lightly on the push button but most
385 * pushes do result in an event; longer intervals require the
386 * user to hold the button whereas shorter intervals require
387 * more CPU time for polling.
388 */
389#define DA850_GPIO_KEYS_POLL_MS 200
390
391enum da850_evm_ui_exp_pins {
392 DA850_EVM_UI_EXP_SEL_C = 5,
393 DA850_EVM_UI_EXP_SEL_B,
394 DA850_EVM_UI_EXP_SEL_A,
395 DA850_EVM_UI_EXP_PB8,
396 DA850_EVM_UI_EXP_PB7,
397 DA850_EVM_UI_EXP_PB6,
398 DA850_EVM_UI_EXP_PB5,
399 DA850_EVM_UI_EXP_PB4,
400 DA850_EVM_UI_EXP_PB3,
401 DA850_EVM_UI_EXP_PB2,
402 DA850_EVM_UI_EXP_PB1,
403};
404
58b6c5a1 405static const char * const da850_evm_ui_exp[] = {
75929f5e
BG		 406 [DA850_EVM_UI_EXP_SEL_C] = "sel_c",
407 [DA850_EVM_UI_EXP_SEL_B] = "sel_b",
408 [DA850_EVM_UI_EXP_SEL_A] = "sel_a",
409 [DA850_EVM_UI_EXP_PB8] = "pb8",
410 [DA850_EVM_UI_EXP_PB7] = "pb7",
411 [DA850_EVM_UI_EXP_PB6] = "pb6",
412 [DA850_EVM_UI_EXP_PB5] = "pb5",
413 [DA850_EVM_UI_EXP_PB4] = "pb4",
414 [DA850_EVM_UI_EXP_PB3] = "pb3",
415 [DA850_EVM_UI_EXP_PB2] = "pb2",
416 [DA850_EVM_UI_EXP_PB1] = "pb1",
417};
418
419#define DA850_N_UI_PB 8
420
421static struct gpio_keys_button da850_evm_ui_keys[] = {
422 [0 ... DA850_N_UI_PB - 1] = {
423 .type = EV_KEY,
424 .active_low = 1,
425 .wakeup = 0,
426 .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
427 .code = -1, /* assigned at runtime */
428 .gpio = -1, /* assigned at runtime */
429 .desc = NULL, /* assigned at runtime */
430 },
431};
432
433static struct gpio_keys_platform_data da850_evm_ui_keys_pdata = {
434 .buttons = da850_evm_ui_keys,
435 .nbuttons = ARRAY_SIZE(da850_evm_ui_keys),
436 .poll_interval = DA850_GPIO_KEYS_POLL_MS,
437};
438
439static struct platform_device da850_evm_ui_keys_device = {
440 .name = "gpio-keys-polled",
441 .id = 0,
442 .dev = {
443 .platform_data = &da850_evm_ui_keys_pdata
444 },
445};
446
447static void da850_evm_ui_keys_init(unsigned gpio)
448{
449 int i;
450 struct gpio_keys_button *button;
451
452 for (i = 0; i < DA850_N_UI_PB; i++) {
453 button = &da850_evm_ui_keys[i];
454 button->code = KEY_F8 - i;
14f6aeb4 455 button->desc = da850_evm_ui_exp[DA850_EVM_UI_EXP_PB8 + i];
75929f5e
BG		 456 button->gpio = gpio + DA850_EVM_UI_EXP_PB8 + i;
457 }
458}
459
1e046d17
MH		 460#ifdef CONFIG_DA850_UI_SD_VIDEO_PORT
461static inline void da850_evm_setup_video_port(int video_sel)
462{
463 gpio_set_value_cansleep(video_sel, 0);
464}
465#else
466static inline void da850_evm_setup_video_port(int video_sel) { }
467#endif
468
75e2ea64
C		 469static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
470 unsigned ngpio, void *c)
471{
472 int sel_a, sel_b, sel_c, ret;
473
53c2897d
BG		 474 sel_a = gpio + DA850_EVM_UI_EXP_SEL_A;
475 sel_b = gpio + DA850_EVM_UI_EXP_SEL_B;
476 sel_c = gpio + DA850_EVM_UI_EXP_SEL_C;
75e2ea64 477
53c2897d 478 ret = gpio_request(sel_a, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_A]);
75e2ea64 479 if (ret) {
6c7c23cc 480 pr_warn("Cannot open UI expander pin %d\n", sel_a);
75e2ea64
C		 481 goto exp_setup_sela_fail;
482 }
483
53c2897d 484 ret = gpio_request(sel_b, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_B]);
75e2ea64 485 if (ret) {
6c7c23cc 486 pr_warn("Cannot open UI expander pin %d\n", sel_b);
75e2ea64
C		 487 goto exp_setup_selb_fail;
488 }
489
53c2897d 490 ret = gpio_request(sel_c, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_C]);
75e2ea64 491 if (ret) {
6c7c23cc 492 pr_warn("Cannot open UI expander pin %d\n", sel_c);
75e2ea64
C		 493 goto exp_setup_selc_fail;
494 }
495
496 /* deselect all functionalities */
497 gpio_direction_output(sel_a, 1);
498 gpio_direction_output(sel_b, 1);
499 gpio_direction_output(sel_c, 1);
500
75929f5e
BG		 501 da850_evm_ui_keys_init(gpio);
502 ret = platform_device_register(&da850_evm_ui_keys_device);
503 if (ret) {
6c7c23cc 504 pr_warn("Could not register UI GPIO expander push-buttons");
75929f5e
BG		 505 goto exp_setup_keys_fail;
506 }
507
75e2ea64
C		 508 pr_info("DA850/OMAP-L138 EVM UI card detected\n");
509
510 da850_evm_setup_nor_nand();
511
bae10587 512 da850_evm_setup_emac_rmii(sel_a);
2206771c 513
1e046d17
MH		 514 da850_evm_setup_video_port(sel_c);
515
75e2ea64
C		 516 return 0;
517
75929f5e
BG		 518exp_setup_keys_fail:
519 gpio_free(sel_c);
75e2ea64
C		 520exp_setup_selc_fail:
521 gpio_free(sel_b);
522exp_setup_selb_fail:
523 gpio_free(sel_a);
524exp_setup_sela_fail:
525 return ret;
526}
527
528static int da850_evm_ui_expander_teardown(struct i2c_client *client,
529 unsigned gpio, unsigned ngpio, void *c)
530{
75929f5e
BG		 531 platform_device_unregister(&da850_evm_ui_keys_device);
532
75e2ea64 533 /* deselect all functionalities */
53c2897d
BG		 534 gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_C, 1);
535 gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_B, 1);
536 gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_A, 1);
75e2ea64 537
53c2897d
BG		 538 gpio_free(gpio + DA850_EVM_UI_EXP_SEL_C);
539 gpio_free(gpio + DA850_EVM_UI_EXP_SEL_B);
540 gpio_free(gpio + DA850_EVM_UI_EXP_SEL_A);
75e2ea64
C		 541
542 return 0;
543}
544
70b30939
BG		 545/* assign the baseboard expander's GPIOs after the UI board's */
546#define DA850_UI_EXPANDER_N_GPIOS ARRAY_SIZE(da850_evm_ui_exp)
547#define DA850_BB_EXPANDER_GPIO_BASE (DAVINCI_N_GPIO + DA850_UI_EXPANDER_N_GPIOS)
548
549enum da850_evm_bb_exp_pins {
550 DA850_EVM_BB_EXP_DEEP_SLEEP_EN = 0,
551 DA850_EVM_BB_EXP_SW_RST,
552 DA850_EVM_BB_EXP_TP_23,
553 DA850_EVM_BB_EXP_TP_22,
554 DA850_EVM_BB_EXP_TP_21,
555 DA850_EVM_BB_EXP_USER_PB1,
556 DA850_EVM_BB_EXP_USER_LED2,
557 DA850_EVM_BB_EXP_USER_LED1,
558 DA850_EVM_BB_EXP_USER_SW1,
559 DA850_EVM_BB_EXP_USER_SW2,
560 DA850_EVM_BB_EXP_USER_SW3,
561 DA850_EVM_BB_EXP_USER_SW4,
562 DA850_EVM_BB_EXP_USER_SW5,
563 DA850_EVM_BB_EXP_USER_SW6,
564 DA850_EVM_BB_EXP_USER_SW7,
565 DA850_EVM_BB_EXP_USER_SW8
566};
567
58b6c5a1 568static const char * const da850_evm_bb_exp[] = {
70b30939
BG		 569 [DA850_EVM_BB_EXP_DEEP_SLEEP_EN] = "deep_sleep_en",
570 [DA850_EVM_BB_EXP_SW_RST] = "sw_rst",
571 [DA850_EVM_BB_EXP_TP_23] = "tp_23",
572 [DA850_EVM_BB_EXP_TP_22] = "tp_22",
573 [DA850_EVM_BB_EXP_TP_21] = "tp_21",
574 [DA850_EVM_BB_EXP_USER_PB1] = "user_pb1",
575 [DA850_EVM_BB_EXP_USER_LED2] = "user_led2",
576 [DA850_EVM_BB_EXP_USER_LED1] = "user_led1",
577 [DA850_EVM_BB_EXP_USER_SW1] = "user_sw1",
578 [DA850_EVM_BB_EXP_USER_SW2] = "user_sw2",
579 [DA850_EVM_BB_EXP_USER_SW3] = "user_sw3",
580 [DA850_EVM_BB_EXP_USER_SW4] = "user_sw4",
581 [DA850_EVM_BB_EXP_USER_SW5] = "user_sw5",
582 [DA850_EVM_BB_EXP_USER_SW6] = "user_sw6",
583 [DA850_EVM_BB_EXP_USER_SW7] = "user_sw7",
584 [DA850_EVM_BB_EXP_USER_SW8] = "user_sw8",
585};
586
587#define DA850_N_BB_USER_SW 8
588
589static struct gpio_keys_button da850_evm_bb_keys[] = {
590 [0] = {
591 .type = EV_KEY,
592 .active_low = 1,
593 .wakeup = 0,
594 .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
595 .code = KEY_PROG1,
596 .desc = NULL, /* assigned at runtime */
597 .gpio = -1, /* assigned at runtime */
598 },
599 [1 ... DA850_N_BB_USER_SW] = {
600 .type = EV_SW,
601 .active_low = 1,
602 .wakeup = 0,
603 .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
604 .code = -1, /* assigned at runtime */
605 .desc = NULL, /* assigned at runtime */
606 .gpio = -1, /* assigned at runtime */
607 },
608};
609
610static struct gpio_keys_platform_data da850_evm_bb_keys_pdata = {
611 .buttons = da850_evm_bb_keys,
612 .nbuttons = ARRAY_SIZE(da850_evm_bb_keys),
613 .poll_interval = DA850_GPIO_KEYS_POLL_MS,
614};
615
616static struct platform_device da850_evm_bb_keys_device = {
617 .name = "gpio-keys-polled",
618 .id = 1,
619 .dev = {
620 .platform_data = &da850_evm_bb_keys_pdata
621 },
622};
623
624static void da850_evm_bb_keys_init(unsigned gpio)
625{
626 int i;
627 struct gpio_keys_button *button;
628
629 button = &da850_evm_bb_keys[0];
14f6aeb4 630 button->desc = da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_PB1];
70b30939
BG		 631 button->gpio = gpio + DA850_EVM_BB_EXP_USER_PB1;
632
633 for (i = 0; i < DA850_N_BB_USER_SW; i++) {
634 button = &da850_evm_bb_keys[i + 1];
635 button->code = SW_LID + i;
14f6aeb4 636 button->desc = da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_SW1 + i];
70b30939
BG		 637 button->gpio = gpio + DA850_EVM_BB_EXP_USER_SW1 + i;
638 }
639}
640
641#define DA850_N_BB_USER_LED 2
642
643static struct gpio_led da850_evm_bb_leds[] = {
644 [0 ... DA850_N_BB_USER_LED - 1] = {
645 .active_low = 1,
646 .gpio = -1, /* assigned at runtime */
647 .name = NULL, /* assigned at runtime */
648 },
649};
650
651static struct gpio_led_platform_data da850_evm_bb_leds_pdata = {
652 .leds = da850_evm_bb_leds,
653 .num_leds = ARRAY_SIZE(da850_evm_bb_leds),
654};
655
656static struct platform_device da850_evm_bb_leds_device = {
657 .name = "leds-gpio",
658 .id = -1,
659 .dev = {
660 .platform_data = &da850_evm_bb_leds_pdata
661 }
662};
663
664static void da850_evm_bb_leds_init(unsigned gpio)
665{
666 int i;
667 struct gpio_led *led;
668
669 for (i = 0; i < DA850_N_BB_USER_LED; i++) {
670 led = &da850_evm_bb_leds[i];
671
672 led->gpio = gpio + DA850_EVM_BB_EXP_USER_LED2 + i;
673 led->name =
674 da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_LED2 + i];
675 }
676}
677
678static int da850_evm_bb_expander_setup(struct i2c_client *client,
679 unsigned gpio, unsigned ngpio,
680 void *c)
681{
682 int ret;
683
684 /*
685 * Register the switches and pushbutton on the baseboard as a gpio-keys
686 * device.
687 */
688 da850_evm_bb_keys_init(gpio);
689 ret = platform_device_register(&da850_evm_bb_keys_device);
690 if (ret) {
6c7c23cc 691 pr_warn("Could not register baseboard GPIO expander keys");
70b30939
BG		 692 goto io_exp_setup_sw_fail;
693 }
694
695 da850_evm_bb_leds_init(gpio);
696 ret = platform_device_register(&da850_evm_bb_leds_device);
697 if (ret) {
6c7c23cc 698 pr_warn("Could not register baseboard GPIO expander LEDs");
70b30939
BG		 699 goto io_exp_setup_leds_fail;
700 }
701
702 return 0;
703
704io_exp_setup_leds_fail:
705 platform_device_unregister(&da850_evm_bb_keys_device);
706io_exp_setup_sw_fail:
707 return ret;
708}
709
710static int da850_evm_bb_expander_teardown(struct i2c_client *client,
711 unsigned gpio, unsigned ngpio, void *c)
712{
713 platform_device_unregister(&da850_evm_bb_leds_device);
714 platform_device_unregister(&da850_evm_bb_keys_device);
715
716 return 0;
717}
718
75e2ea64
C		 719static struct pca953x_platform_data da850_evm_ui_expander_info = {
720 .gpio_base = DAVINCI_N_GPIO,
721 .setup = da850_evm_ui_expander_setup,
722 .teardown = da850_evm_ui_expander_teardown,
75929f5e 723 .names = da850_evm_ui_exp,
75e2ea64
C		 724};
725
70b30939
BG		 726static struct pca953x_platform_data da850_evm_bb_expander_info = {
727 .gpio_base = DA850_BB_EXPANDER_GPIO_BASE,
728 .setup = da850_evm_bb_expander_setup,
729 .teardown = da850_evm_bb_expander_teardown,
730 .names = da850_evm_bb_exp,
731};
732
1a7ff8ff
C		 733static struct i2c_board_info __initdata da850_evm_i2c_devices[] = {
734 {
735 I2C_BOARD_INFO("tlv320aic3x", 0x18),
75e2ea64
C		 736 },
737 {
738 I2C_BOARD_INFO("tca6416", 0x20),
739 .platform_data = &da850_evm_ui_expander_info,
740 },
70b30939
BG		 741 {
742 I2C_BOARD_INFO("tca6416", 0x21),
743 .platform_data = &da850_evm_bb_expander_info,
744 },
1a7ff8ff
C		 745};
746
0fbc5592
SR		 747static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
748 .bus_freq = 100, /* kHz */
749 .bus_delay = 0, /* usec */
750};
751
491214e1
C		 752/* davinci da850 evm audio machine driver */
753static u8 da850_iis_serializer_direction[] = {
754 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
755 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
756 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE,
757 RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
758};
759
760static struct snd_platform_data da850_evm_snd_data = {
88abfd5b
MP		 761 .tx_dma_offset = 0x2000,
762 .rx_dma_offset = 0x2000,
763 .op_mode = DAVINCI_MCASP_IIS_MODE,
764 .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
765 .tdm_slots = 2,
766 .serial_dir = da850_iis_serializer_direction,
767 .asp_chan_q = EVENTQ_0,
768 .ram_chan_q = EVENTQ_1,
769 .version = MCASP_VERSION_2,
770 .txnumevt = 1,
771 .rxnumevt = 1,
772 .sram_size_playback = SZ_8K,
773 .sram_size_capture = SZ_8K,
491214e1
C		 774};
775
c840fc74
MW		 776static const short da850_evm_mcasp_pins[] __initconst = {
777 DA850_AHCLKX, DA850_ACLKX, DA850_AFSX,
778 DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE,
779 DA850_AXR_11, DA850_AXR_12,
780 -1
781};
782
700691f2
SR		 783static int da850_evm_mmc_get_ro(int index)
784{
785 return gpio_get_value(DA850_MMCSD_WP_PIN);
786}
787
788static int da850_evm_mmc_get_cd(int index)
789{
790 return !gpio_get_value(DA850_MMCSD_CD_PIN);
791}
792
793static struct davinci_mmc_config da850_mmc_config = {
794 .get_ro = da850_evm_mmc_get_ro,
795 .get_cd = da850_evm_mmc_get_cd,
796 .wires = 4,
0046d0bf
C		 797 .max_freq = 50000000,
798 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
700691f2
SR		 799};
800
5a0d80ea
MW		 801static const short da850_evm_mmcsd0_pins[] __initconst = {
802 DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2,
803 DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD,
804 DA850_GPIO4_0, DA850_GPIO4_1,
805 -1
806};
807
d52f235f
C		 808static void da850_panel_power_ctrl(int val)
809{
810 /* lcd backlight */
811 gpio_set_value(DA850_LCD_BL_PIN, val);
812
813 /* lcd power */
814 gpio_set_value(DA850_LCD_PWR_PIN, val);
815}
816
5cbdf276
SR		 817static int da850_lcd_hw_init(void)
818{
819 int status;
820
821 status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n");
822 if (status < 0)
823 return status;
824
825 status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n");
826 if (status < 0) {
827 gpio_free(DA850_LCD_BL_PIN);
828 return status;
829 }
830
831 gpio_direction_output(DA850_LCD_BL_PIN, 0);
832 gpio_direction_output(DA850_LCD_PWR_PIN, 0);
833
d52f235f
C		 834 /* Switch off panel power and backlight */
835 da850_panel_power_ctrl(0);
5cbdf276 836
d52f235f
C		 837 /* Switch on panel power and backlight */
838 da850_panel_power_ctrl(1);
5cbdf276
SR		 839
840 return 0;
841}
491214e1 842
9e9bc235
PU		 843/* Fixed regulator support */
844static struct regulator_consumer_supply fixed_supplies[] = {
845 /* Baseboard 3.3V: 5V -> TPS73701DCQ -> 3.3V */
846 REGULATOR_SUPPLY("AVDD", "1-0018"),
847 REGULATOR_SUPPLY("DRVDD", "1-0018"),
848
849 /* Baseboard 1.8V: 5V -> TPS73701DCQ -> 1.8V */
850 REGULATOR_SUPPLY("DVDD", "1-0018"),
851};
852
a9eb1f67
SN		 853/* TPS65070 voltage regulator support */
854
855/* 3.3V */
db549d22 856static struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
a9eb1f67
SN		 857 {
858 .supply = "usb0_vdda33",
859 },
860 {
861 .supply = "usb1_vdda33",
862 },
863};
864
865/* 3.3V or 1.8V */
db549d22 866static struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
a9eb1f67
SN		 867 {
868 .supply = "dvdd3318_a",
869 },
870 {
871 .supply = "dvdd3318_b",
872 },
873 {
874 .supply = "dvdd3318_c",
875 },
9e9bc235 876 REGULATOR_SUPPLY("IOVDD", "1-0018"),
a9eb1f67
SN		 877};
878
879/* 1.2V */
db549d22 880static struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
a9eb1f67
SN		 881 {
882 .supply = "cvdd",
883 },
884};
885
886/* 1.8V LDO */
db549d22 887static struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
a9eb1f67
SN		 888 {
889 .supply = "sata_vddr",
890 },
891 {
892 .supply = "usb0_vdda18",
893 },
894 {
895 .supply = "usb1_vdda18",
896 },
897 {
898 .supply = "ddr_dvdd18",
899 },
900};
901
902/* 1.2V LDO */
db549d22 903static struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
a9eb1f67
SN		 904 {
905 .supply = "sata_vdd",
906 },
907 {
908 .supply = "pll0_vdda",
909 },
910 {
911 .supply = "pll1_vdda",
912 },
913 {
914 .supply = "usbs_cvdd",
915 },
916 {
917 .supply = "vddarnwa1",
918 },
919};
920
8b24599e
SN		 921/* We take advantage of the fact that both defdcdc{2,3} are tied high */
922static struct tps6507x_reg_platform_data tps6507x_platform_data = {
923 .defdcdc_default = true,
924};
925
db549d22 926static struct regulator_init_data tps65070_regulator_data[] = {
a9eb1f67
SN		 927 /* dcdc1 */
928 {
929 .constraints = {
930 .min_uV = 3150000,
931 .max_uV = 3450000,
932 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
933 REGULATOR_CHANGE_STATUS),
934 .boot_on = 1,
935 },
936 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers),
937 .consumer_supplies = tps65070_dcdc1_consumers,
938 },
939
940 /* dcdc2 */
941 {
942 .constraints = {
943 .min_uV = 1710000,
944 .max_uV = 3450000,
945 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
946 REGULATOR_CHANGE_STATUS),
947 .boot_on = 1,
79436f87 948 .always_on = 1,
a9eb1f67
SN		 949 },
950 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
951 .consumer_supplies = tps65070_dcdc2_consumers,
8b24599e 952 .driver_data = &tps6507x_platform_data,
a9eb1f67
SN		 953 },
954
955 /* dcdc3 */
956 {
957 .constraints = {
958 .min_uV = 950000,
28bd2c34 959 .max_uV = 1350000,
a9eb1f67
SN		 960 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
961 REGULATOR_CHANGE_STATUS),
962 .boot_on = 1,
963 },
964 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
965 .consumer_supplies = tps65070_dcdc3_consumers,
8b24599e 966 .driver_data = &tps6507x_platform_data,
a9eb1f67
SN		 967 },
968
969 /* ldo1 */
970 {
971 .constraints = {
972 .min_uV = 1710000,
973 .max_uV = 1890000,
974 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
975 REGULATOR_CHANGE_STATUS),
976 .boot_on = 1,
977 },
978 .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers),
979 .consumer_supplies = tps65070_ldo1_consumers,
980 },
981
982 /* ldo2 */
983 {
984 .constraints = {
985 .min_uV = 1140000,
986 .max_uV = 1320000,
987 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
988 REGULATOR_CHANGE_STATUS),
989 .boot_on = 1,
990 },
991 .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers),
992 .consumer_supplies = tps65070_ldo2_consumers,
993 },
994};
995
da1e3680
TF		 996static struct touchscreen_init_data tps6507x_touchscreen_data = {
997 .poll_period = 30, /* ms between touch samples */
998 .min_pressure = 0x30, /* minimum pressure to trigger touch */
da1e3680
TF		 999 .vendor = 0, /* /sys/class/input/input?/id/vendor */
1000 .product = 65070, /* /sys/class/input/input?/id/product */
1001 .version = 0x100, /* /sys/class/input/input?/id/version */
1002};
1003
0bc20bba
TF		 1004static struct tps6507x_board tps_board = {
1005 .tps6507x_pmic_init_data = &tps65070_regulator_data[0],
da1e3680 1006 .tps6507x_ts_init_data = &tps6507x_touchscreen_data,
0bc20bba
TF		 1007};
1008
3506f277 1009static struct i2c_board_info __initdata da850_evm_tps65070_info[] = {
a9eb1f67
SN		 1010 {
1011 I2C_BOARD_INFO("tps6507x", 0x48),
0bc20bba 1012 .platform_data = &tps_board,
a9eb1f67
SN		 1013 },
1014};
1015
1016static int __init pmic_tps65070_init(void)
1017{
3506f277
BG		 1018 return i2c_register_board_info(1, da850_evm_tps65070_info,
1019 ARRAY_SIZE(da850_evm_tps65070_info));
a9eb1f67
SN		 1020}
1021
7761ef67
SR		 1022static const short da850_evm_lcdc_pins[] = {
1023 DA850_GPIO2_8, DA850_GPIO2_15,
1024 -1
1025};
1026
85b8307f
SS		 1027static const short da850_evm_mii_pins[] = {
1028 DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
1029 DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
1030 DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
1031 DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
1032 DA850_MDIO_D,
1033 -1
1034};
1035
1036static const short da850_evm_rmii_pins[] = {
1037 DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN,
1038 DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1,
1039 DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK,
1040 DA850_MDIO_D,
1041 -1
1042};
1043
bae10587 1044static int __init da850_evm_config_emac(void)
2206771c
C		 1045{
1046 void __iomem *cfg_chip3_base;
1047 int ret;
1048 u32 val;
bae10587
SN		 1049 struct davinci_soc_info *soc_info = &davinci_soc_info;
1050 u8 rmii_en = soc_info->emac_pdata->rmii_en;
1051
1052 if (!machine_is_davinci_da850_evm())
1053 return 0;
2206771c 1054
d2de0582 1055 cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
2206771c 1056
2206771c 1057 val = __raw_readl(cfg_chip3_base);
17fadd9a
SN		 1058
1059 if (rmii_en) {
2206771c 1060 val |= BIT(8);
85b8307f 1061 ret = davinci_cfg_reg_list(da850_evm_rmii_pins);
17fadd9a
SN		 1062 pr_info("EMAC: RMII PHY configured, MII PHY will not be"
1063 " functional\n");
1064 } else {
2206771c 1065 val &= ~BIT(8);
85b8307f 1066 ret = davinci_cfg_reg_list(da850_evm_mii_pins);
17fadd9a
SN		 1067 pr_info("EMAC: MII PHY configured, RMII PHY will not be"
1068 " functional\n");
1069 }
1070
2206771c 1071 if (ret)
6c7c23cc
RT		 1072 pr_warn("%s: CPGMAC/RMII mux setup failed: %d\n",
1073 __func__, ret);
2206771c 1074
17fadd9a
SN		 1075 /* configure the CFGCHIP3 register for RMII or MII */
1076 __raw_writel(val, cfg_chip3_base);
1077
2206771c
C		 1078 ret = davinci_cfg_reg(DA850_GPIO2_6);
1079 if (ret)
6c7c23cc 1080 pr_warn("%s:GPIO(2,6) mux setup failed\n", __func__);
2206771c
C		 1081
1082 ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
1083 if (ret) {
6c7c23cc 1084 pr_warn("Cannot open GPIO %d\n", DA850_MII_MDIO_CLKEN_PIN);
2206771c
C		 1085 return ret;
1086 }
1087
17fadd9a
SN		 1088 /* Enable/Disable MII MDIO clock */
1089 gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en);
2206771c 1090
782f2d78 1091 soc_info->emac_pdata->phy_id = DA850_EVM_PHY_ID;
bae10587
SN		 1092
1093 ret = da8xx_register_emac();
1094 if (ret)
6c7c23cc 1095 pr_warn("%s: EMAC registration failed: %d\n", __func__, ret);
bae10587 1096
2206771c
C		 1097 return 0;
1098}
bae10587 1099device_initcall(da850_evm_config_emac);
2206771c 1100
a941c503
RS		 1101/*
1102 * The following EDMA channels/slots are not being used by drivers (for
1103 * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM, hence
1104 * they are being reserved for codecs on the DSP side.
1105 */
1106static const s16 da850_dma0_rsv_chans[][2] = {
1107 /* (offset, number) */
1108 { 8, 6},
1109 {24, 4},
1110 {30, 2},
1111 {-1, -1}
1112};
1113
1114static const s16 da850_dma0_rsv_slots[][2] = {
1115 /* (offset, number) */
1116 { 8, 6},
1117 {24, 4},
1118 {30, 50},
1119 {-1, -1}
1120};
1121
1122static const s16 da850_dma1_rsv_chans[][2] = {
1123 /* (offset, number) */
1124 { 0, 28},
1125 {30, 2},
1126 {-1, -1}
1127};
1128
1129static const s16 da850_dma1_rsv_slots[][2] = {
1130 /* (offset, number) */
1131 { 0, 28},
1132 {30, 90},
1133 {-1, -1}
1134};
1135
1136static struct edma_rsv_info da850_edma_cc0_rsv = {
1137 .rsv_chans = da850_dma0_rsv_chans,
1138 .rsv_slots = da850_dma0_rsv_slots,
1139};
1140
1141static struct edma_rsv_info da850_edma_cc1_rsv = {
1142 .rsv_chans = da850_dma1_rsv_chans,
1143 .rsv_slots = da850_dma1_rsv_slots,
1144};
1145
1146static struct edma_rsv_info *da850_edma_rsv[2] = {
1147 &da850_edma_cc0_rsv,
1148 &da850_edma_cc1_rsv,
1149};
1150
28bd2c34
SN		 1151#ifdef CONFIG_CPU_FREQ
1152static __init int da850_evm_init_cpufreq(void)
1153{
1154 switch (system_rev & 0xF) {
1155 case 3:
1156 da850_max_speed = 456000;
1157 break;
1158 case 2:
1159 da850_max_speed = 408000;
1160 break;
1161 case 1:
1162 da850_max_speed = 372000;
1163 break;
1164 }
1165
1166 return da850_register_cpufreq("pll0_sysclk3");
1167}
1168#else
1169static __init int da850_evm_init_cpufreq(void) { return 0; }
1170#endif
1171
1e046d17
MH		 1172#if defined(CONFIG_DA850_UI_SD_VIDEO_PORT)
1173
1174#define TVP5147_CH0 "tvp514x-0"
1175#define TVP5147_CH1 "tvp514x-1"
1176
1177/* VPIF capture configuration */
1178static struct tvp514x_platform_data tvp5146_pdata = {
1179 .clk_polarity = 0,
1180 .hs_polarity = 1,
1181 .vs_polarity = 1,
1182};
1183
1184#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
1185
1186static const struct vpif_input da850_ch0_inputs[] = {
1187 {
1188 .input = {
1189 .index = 0,
1190 .name = "Composite",
1191 .type = V4L2_INPUT_TYPE_CAMERA,
7aaad131 1192 .capabilities = V4L2_IN_CAP_STD,
1e046d17
MH		 1193 .std = TVP514X_STD_ALL,
1194 },
7aaad131
HV		 1195 .input_route = INPUT_CVBS_VI2B,
1196 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
1e046d17
MH		 1197 .subdev_name = TVP5147_CH0,
1198 },
1199};
1200
1201static const struct vpif_input da850_ch1_inputs[] = {
1202 {
1203 .input = {
1204 .index = 0,
1205 .name = "S-Video",
1206 .type = V4L2_INPUT_TYPE_CAMERA,
7aaad131 1207 .capabilities = V4L2_IN_CAP_STD,
1e046d17
MH		 1208 .std = TVP514X_STD_ALL,
1209 },
7aaad131
HV		 1210 .input_route = INPUT_SVIDEO_VI2C_VI1C,
1211 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
1e046d17
MH		 1212 .subdev_name = TVP5147_CH1,
1213 },
1214};
1215
1216static struct vpif_subdev_info da850_vpif_capture_sdev_info[] = {
1217 {
1218 .name = TVP5147_CH0,
1219 .board_info = {
1220 I2C_BOARD_INFO("tvp5146", 0x5d),
1221 .platform_data = &tvp5146_pdata,
1222 },
1e046d17
MH		 1223 },
1224 {
1225 .name = TVP5147_CH1,
1226 .board_info = {
1227 I2C_BOARD_INFO("tvp5146", 0x5c),
1228 .platform_data = &tvp5146_pdata,
1229 },
1e046d17
MH		 1230 },
1231};
1232
1233static struct vpif_capture_config da850_vpif_capture_config = {
1234 .subdev_info = da850_vpif_capture_sdev_info,
1235 .subdev_count = ARRAY_SIZE(da850_vpif_capture_sdev_info),
1236 .chan_config[0] = {
1237 .inputs = da850_ch0_inputs,
1238 .input_count = ARRAY_SIZE(da850_ch0_inputs),
0d4f35f3
HV		 1239 .vpif_if = {
1240 .if_type = VPIF_IF_BT656,
1241 .hd_pol = 1,
1242 .vd_pol = 1,
1243 .fid_pol = 0,
1244 },
1e046d17
MH		 1245 },
1246 .chan_config[1] = {
1247 .inputs = da850_ch1_inputs,
1248 .input_count = ARRAY_SIZE(da850_ch1_inputs),
0d4f35f3
HV		 1249 .vpif_if = {
1250 .if_type = VPIF_IF_BT656,
1251 .hd_pol = 1,
1252 .vd_pol = 1,
1253 .fid_pol = 0,
1254 },
1e046d17
MH		 1255 },
1256 .card_name = "DA850/OMAP-L138 Video Capture",
1257};
1258
1259/* VPIF display configuration */
3e85a44a
LP		 1260
1261static struct adv7343_platform_data adv7343_pdata = {
1262 .mode_config = {
5e95814f 1263 .dac = { 1, 1, 1 },
3e85a44a
LP		 1264 },
1265 .sd_config = {
5e95814f 1266 .sd_dac_out = { 1 },
3e85a44a
LP		 1267 },
1268};
1269
1e046d17
MH		 1270static struct vpif_subdev_info da850_vpif_subdev[] = {
1271 {
1272 .name = "adv7343",
1273 .board_info = {
1274 I2C_BOARD_INFO("adv7343", 0x2a),
3e85a44a 1275 .platform_data = &adv7343_pdata,
1e046d17
MH		 1276 },
1277 },
1278};
1279
2bd4e58c
LP		 1280static const struct vpif_output da850_ch0_outputs[] = {
1281 {
1282 .output = {
1283 .index = 0,
1284 .name = "Composite",
1285 .type = V4L2_OUTPUT_TYPE_ANALOG,
1286 .capabilities = V4L2_OUT_CAP_STD,
1287 .std = V4L2_STD_ALL,
1288 },
1289 .subdev_name = "adv7343",
1290 .output_route = ADV7343_COMPOSITE_ID,
1291 },
1292 {
1293 .output = {
1294 .index = 1,
1295 .name = "S-Video",
1296 .type = V4L2_OUTPUT_TYPE_ANALOG,
1297 .capabilities = V4L2_OUT_CAP_STD,
1298 .std = V4L2_STD_ALL,
1299 },
1300 .subdev_name = "adv7343",
1301 .output_route = ADV7343_SVIDEO_ID,
1302 },
1e046d17
MH		 1303};
1304
1305static struct vpif_display_config da850_vpif_display_config = {
1306 .subdevinfo = da850_vpif_subdev,
1307 .subdev_count = ARRAY_SIZE(da850_vpif_subdev),
2bd4e58c
LP		 1308 .chan_config[0] = {
1309 .outputs = da850_ch0_outputs,
1310 .output_count = ARRAY_SIZE(da850_ch0_outputs),
1311 },
1e046d17
MH		 1312 .card_name = "DA850/OMAP-L138 Video Display",
1313};
1314
1315static __init void da850_vpif_init(void)
1316{
1317 int ret;
1318
1319 ret = da850_register_vpif();
1320 if (ret)
1321 pr_warn("da850_evm_init: VPIF setup failed: %d\n", ret);
1322
1323 ret = davinci_cfg_reg_list(da850_vpif_capture_pins);
1324 if (ret)
1325 pr_warn("da850_evm_init: VPIF capture mux setup failed: %d\n",
1326 ret);
1327
1328 ret = da850_register_vpif_capture(&da850_vpif_capture_config);
1329 if (ret)
1330 pr_warn("da850_evm_init: VPIF capture setup failed: %d\n", ret);
1331
1332 ret = davinci_cfg_reg_list(da850_vpif_display_pins);
1333 if (ret)
1334 pr_warn("da850_evm_init: VPIF display mux setup failed: %d\n",
1335 ret);
1336
1337 ret = da850_register_vpif_display(&da850_vpif_display_config);
1338 if (ret)
1339 pr_warn("da850_evm_init: VPIF display setup failed: %d\n", ret);
1340}
1341
1342#else
1343static __init void da850_vpif_init(void) {}
1344#endif
1345
ab3f5c1f
IY		 1346#ifdef CONFIG_DA850_WL12XX
1347
1348static void wl12xx_set_power(int index, bool power_on)
1349{
1350 static bool power_state;
1351
1352 pr_debug("Powering %s wl12xx", power_on ? "on" : "off");
1353
1354 if (power_on == power_state)
1355 return;
1356 power_state = power_on;
1357
1358 if (power_on) {
1359 /* Power up sequence required for wl127x devices */
1360 gpio_set_value(DA850_WLAN_EN, 1);
1361 usleep_range(15000, 15000);
1362 gpio_set_value(DA850_WLAN_EN, 0);
1363 usleep_range(1000, 1000);
1364 gpio_set_value(DA850_WLAN_EN, 1);
1365 msleep(70);
1366 } else {
1367 gpio_set_value(DA850_WLAN_EN, 0);
1368 }
1369}
1370
1371static struct davinci_mmc_config da850_wl12xx_mmc_config = {
1372 .set_power = wl12xx_set_power,
1373 .wires = 4,
1374 .max_freq = 25000000,
1375 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_NONREMOVABLE |
1376 MMC_CAP_POWER_OFF_CARD,
ab3f5c1f
IY		 1377};
1378
1379static const short da850_wl12xx_pins[] __initconst = {
1380 DA850_MMCSD1_DAT_0, DA850_MMCSD1_DAT_1, DA850_MMCSD1_DAT_2,
1381 DA850_MMCSD1_DAT_3, DA850_MMCSD1_CLK, DA850_MMCSD1_CMD,
1382 DA850_GPIO6_9, DA850_GPIO6_10,
1383 -1
1384};
1385
1386static struct wl12xx_platform_data da850_wl12xx_wlan_data __initdata = {
1387 .irq = -1,
1388 .board_ref_clock = WL12XX_REFCLOCK_38,
1389 .platform_quirks = WL12XX_PLATFORM_QUIRK_EDGE_IRQ,
1390};
1391
1392static __init int da850_wl12xx_init(void)
1393{
1394 int ret;
1395
1396 ret = davinci_cfg_reg_list(da850_wl12xx_pins);
1397 if (ret) {
1398 pr_err("wl12xx/mmc mux setup failed: %d\n", ret);
1399 goto exit;
1400 }
1401
1402 ret = da850_register_mmcsd1(&da850_wl12xx_mmc_config);
1403 if (ret) {
1404 pr_err("wl12xx/mmc registration failed: %d\n", ret);
1405 goto exit;
1406 }
1407
1408 ret = gpio_request_one(DA850_WLAN_EN, GPIOF_OUT_INIT_LOW, "wl12xx_en");
1409 if (ret) {
1410 pr_err("Could not request wl12xx enable gpio: %d\n", ret);
1411 goto exit;
1412 }
1413
1414 ret = gpio_request_one(DA850_WLAN_IRQ, GPIOF_IN, "wl12xx_irq");
1415 if (ret) {
1416 pr_err("Could not request wl12xx irq gpio: %d\n", ret);
1417 goto free_wlan_en;
1418 }
1419
1420 da850_wl12xx_wlan_data.irq = gpio_to_irq(DA850_WLAN_IRQ);
1421
1422 ret = wl12xx_set_platform_data(&da850_wl12xx_wlan_data);
1423 if (ret) {
1424 pr_err("Could not set wl12xx data: %d\n", ret);
1425 goto free_wlan_irq;
1426 }
1427
1428 return 0;
1429
1430free_wlan_irq:
1431 gpio_free(DA850_WLAN_IRQ);
1432
1433free_wlan_en:
1434 gpio_free(DA850_WLAN_EN);
1435
1436exit:
1437 return ret;
1438}
1439
1440#else /* CONFIG_DA850_WL12XX */
1441
1442static __init int da850_wl12xx_init(void)
1443{
1444 return 0;
1445}
1446
1447#endif /* CONFIG_DA850_WL12XX */
1448
8bb2c481
SN		 1449#define DA850EVM_SATA_REFCLKPN_RATE (100 * 1000 * 1000)
1450
0fbc5592
SR		 1451static __init void da850_evm_init(void)
1452{
1453 int ret;
1454
b856671e
PA		 1455 ret = da850_register_gpio();
1456 if (ret)
1457 pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
1458
9e9bc235
PU		 1459 regulator_register_fixed(0, fixed_supplies, ARRAY_SIZE(fixed_supplies));
1460
a9eb1f67
SN		 1461 ret = pmic_tps65070_init();
1462 if (ret)
6c7c23cc 1463 pr_warn("%s: TPS65070 PMIC init failed: %d\n", __func__, ret);
a9eb1f67 1464
a941c503 1465 ret = da850_register_edma(da850_edma_rsv);
0fbc5592 1466 if (ret)
6c7c23cc 1467 pr_warn("%s: EDMA registration failed: %d\n", __func__, ret);
0fbc5592 1468
3821d10a 1469 ret = davinci_cfg_reg_list(da850_i2c0_pins);
0fbc5592 1470 if (ret)
6c7c23cc 1471 pr_warn("%s: I2C0 mux setup failed: %d\n", __func__, ret);
0fbc5592
SR		 1472
1473 ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata);
1474 if (ret)
6c7c23cc 1475 pr_warn("%s: I2C0 registration failed: %d\n", __func__, ret);
0fbc5592 1476
5a4b1315 1477
0fbc5592
SR		 1478 ret = da8xx_register_watchdog();
1479 if (ret)
6c7c23cc
RT		 1480 pr_warn("%s: watchdog registration failed: %d\n",
1481 __func__, ret);
0fbc5592 1482
820c4fe3 1483 if (HAS_MMC) {
5a0d80ea 1484 ret = davinci_cfg_reg_list(da850_evm_mmcsd0_pins);
820c4fe3 1485 if (ret)
6c7c23cc
RT		 1486 pr_warn("%s: MMCSD0 mux setup failed: %d\n",
1487 __func__, ret);
820c4fe3
SR		 1488
1489 ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n");
1490 if (ret)
6c7c23cc
RT		 1491 pr_warn("%s: can not open GPIO %d\n",
1492 __func__, DA850_MMCSD_CD_PIN);
820c4fe3
SR		 1493 gpio_direction_input(DA850_MMCSD_CD_PIN);
1494
1495 ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n");
1496 if (ret)
6c7c23cc
RT		 1497 pr_warn("%s: can not open GPIO %d\n",
1498 __func__, DA850_MMCSD_WP_PIN);
820c4fe3
SR		 1499 gpio_direction_input(DA850_MMCSD_WP_PIN);
1500
1501 ret = da8xx_register_mmcsd0(&da850_mmc_config);
1502 if (ret)
6c7c23cc
RT		 1503 pr_warn("%s: MMCSD0 registration failed: %d\n",
1504 __func__, ret);
ab3f5c1f
IY		 1505
1506 ret = da850_wl12xx_init();
1507 if (ret)
6c7c23cc
RT		 1508 pr_warn("%s: WL12xx initialization failed: %d\n",
1509 __func__, ret);
820c4fe3 1510 }
700691f2 1511
fcf7157b 1512 davinci_serial_init(da8xx_serial_device);
0fbc5592 1513
1a7ff8ff
C		 1514 i2c_register_board_info(1, da850_evm_i2c_devices,
1515 ARRAY_SIZE(da850_evm_i2c_devices));
1516
0fbc5592
SR		 1517 /*
1518 * shut down uart 0 and 1; they are not used on the board and
1519 * accessing them causes endless "too much work in irq53" messages
1520 * with arago fs
1521 */
1522 __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
1523 __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
491214e1 1524
c840fc74 1525 ret = davinci_cfg_reg_list(da850_evm_mcasp_pins);
491214e1 1526 if (ret)
6c7c23cc 1527 pr_warn("%s: McASP mux setup failed: %d\n", __func__, ret);
491214e1 1528
88abfd5b 1529 da850_evm_snd_data.sram_pool = sram_get_gen_pool();
b8864aa4 1530 da8xx_register_mcasp(0, &da850_evm_snd_data);
5cbdf276 1531
3821d10a 1532 ret = davinci_cfg_reg_list(da850_lcdcntl_pins);
5cbdf276 1533 if (ret)
6c7c23cc 1534 pr_warn("%s: LCDC mux setup failed: %d\n", __func__, ret);
5cbdf276 1535
ae41d17a
MP		 1536 ret = da8xx_register_uio_pruss();
1537 if (ret)
1538 pr_warn("da850_evm_init: pruss initialization failed: %d\n",
1539 ret);
1540
7761ef67 1541 /* Handle board specific muxing for LCD here */
3821d10a 1542 ret = davinci_cfg_reg_list(da850_evm_lcdc_pins);
7761ef67 1543 if (ret)
6c7c23cc
RT		 1544 pr_warn("%s: EVM specific LCD mux setup failed: %d\n",
1545 __func__, ret);
7761ef67 1546
5cbdf276
SR		 1547 ret = da850_lcd_hw_init();
1548 if (ret)
6c7c23cc 1549 pr_warn("%s: LCD initialization failed: %d\n", __func__, ret);
5cbdf276 1550
d52f235f 1551 sharp_lk043t1dg01_pdata.panel_power_ctrl = da850_panel_power_ctrl,
b9e6342b 1552 ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata);
5cbdf276 1553 if (ret)
6c7c23cc 1554 pr_warn("%s: LCDC registration failed: %d\n", __func__, ret);
c51df70b
MG		 1555
1556 ret = da8xx_register_rtc();
1557 if (ret)
6c7c23cc 1558 pr_warn("%s: RTC setup failed: %d\n", __func__, ret);
09dc2d45 1559
28bd2c34 1560 ret = da850_evm_init_cpufreq();
09dc2d45 1561 if (ret)
6c7c23cc 1562 pr_warn("%s: cpufreq registration failed: %d\n", __func__, ret);
5aeb15aa
SN		 1563
1564 ret = da8xx_register_cpuidle();
1565 if (ret)
6c7c23cc 1566 pr_warn("%s: cpuidle registration failed: %d\n", __func__, ret);
63534443
SN		 1567
1568 ret = da850_register_pm(&da850_pm_device);
1569 if (ret)
6c7c23cc 1570 pr_warn("%s: suspend registration failed: %d\n", __func__, ret);
fdce5568 1571
1e046d17
MH		 1572 da850_vpif_init();
1573
0273612c
VD		 1574 ret = spi_register_board_info(da850evm_spi_info,
1575 ARRAY_SIZE(da850evm_spi_info));
1576 if (ret)
1577 pr_warn("%s: spi info registration failed: %d\n", __func__,
1578 ret);
1579
1580 ret = da8xx_register_spi_bus(1, ARRAY_SIZE(da850evm_spi_info));
fdce5568 1581 if (ret)
6c7c23cc 1582 pr_warn("%s: SPI 1 registration failed: %d\n", __func__, ret);
8bb2c481
SN		 1583
1584 ret = da850_register_sata(DA850EVM_SATA_REFCLKPN_RATE);
1585 if (ret)
6c7c23cc 1586 pr_warn("%s: SATA registration failed: %d\n", __func__, ret);
810198bc
RS		 1587
1588 da850_evm_setup_mac_addr();
54288134
RT		 1589
1590 ret = da8xx_register_rproc();
1591 if (ret)
1592 pr_warn("%s: dsp/rproc registration failed: %d\n",
1593 __func__, ret);
0fbc5592
SR		 1594}
1595
1596#ifdef CONFIG_SERIAL_8250_CONSOLE
1597static int __init da850_evm_console_init(void)
1598{
1aa5f2a9
MW		 1599 if (!machine_is_davinci_da850_evm())
1600 return 0;
1601
0fbc5592
SR		 1602 return add_preferred_console("ttyS", 2, "115200");
1603}
1604console_initcall(da850_evm_console_init);
1605#endif
1606
0fbc5592
SR		 1607static void __init da850_evm_map_io(void)
1608{
1609 da850_init();
1610}
1611
48ea89ea 1612MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")
e7e56014 1613 .atag_offset = 0x100,
0fbc5592 1614 .map_io = da850_evm_map_io,
bd808947 1615 .init_irq = cp_intc_init,
6bb27d73 1616 .init_time = davinci_timer_init,
0fbc5592 1617 .init_machine = da850_evm_init,
3aa3e840 1618 .init_late = davinci_init_late,
f68deabf 1619 .dma_zone_size = SZ_128M,
c6121ddd 1620 .restart = da8xx_restart,
54288134 1621 .reserve = da8xx_rproc_reserve_cma,
0fbc5592 1622MACHINE_END
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