[linux.git] / lib / atomic64_test.c

/*
 * Testsuite for atomic64_t functions
 *
 * Copyright © 2010  Luca Barbieri
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/init.h>
#include <linux/bug.h>
#include <linux/kernel.h>
#include <linux/atomic.h>

#ifdef CONFIG_X86
#include <asm/cpufeature.h>	/* for boot_cpu_has below */
#endif

#define TEST(bit, op, c_op, val)				\
do {								\
	atomic##bit##_set(&v, v0);				\
	r = v0;							\
	atomic##bit##_##op(val, &v);				\
	r c_op val;						\
	WARN(atomic##bit##_read(&v) != r, "%Lx != %Lx\n",	\
		(unsigned long long)atomic##bit##_read(&v),	\
		(unsigned long long)r);				\
} while (0)

/*
 * Test for a atomic operation family,
 * @test should be a macro accepting parameters (bit, op, ...)
 */

#define FAMILY_TEST(test, bit, op, args...)	\
do {						\
	test(bit, op, ##args);		\
	test(bit, op##_acquire, ##args);	\
	test(bit, op##_release, ##args);	\
	test(bit, op##_relaxed, ##args);	\
} while (0)

#define TEST_RETURN(bit, op, c_op, val)				\
do {								\
	atomic##bit##_set(&v, v0);				\
	r = v0;							\
	r c_op val;						\
	BUG_ON(atomic##bit##_##op(val, &v) != r);		\
	BUG_ON(atomic##bit##_read(&v) != r);			\
} while (0)

#define TEST_FETCH(bit, op, c_op, val)				\
do {								\
	atomic##bit##_set(&v, v0);				\
	r = v0;							\
	r c_op val;						\
	BUG_ON(atomic##bit##_##op(val, &v) != v0);		\
	BUG_ON(atomic##bit##_read(&v) != r);			\
} while (0)

#define RETURN_FAMILY_TEST(bit, op, c_op, val)			\
do {								\
	FAMILY_TEST(TEST_RETURN, bit, op, c_op, val);		\
} while (0)

#define FETCH_FAMILY_TEST(bit, op, c_op, val)			\
do {								\
	FAMILY_TEST(TEST_FETCH, bit, op, c_op, val);		\
} while (0)

#define TEST_ARGS(bit, op, init, ret, expect, args...)		\
do {								\
	atomic##bit##_set(&v, init);				\
	BUG_ON(atomic##bit##_##op(&v, ##args) != ret);		\
	BUG_ON(atomic##bit##_read(&v) != expect);		\
} while (0)

#define XCHG_FAMILY_TEST(bit, init, new)				\
do {									\
	FAMILY_TEST(TEST_ARGS, bit, xchg, init, init, new, new);	\
} while (0)

#define CMPXCHG_FAMILY_TEST(bit, init, new, wrong)			\
do {									\
	FAMILY_TEST(TEST_ARGS, bit, cmpxchg, 				\
			init, init, new, init, new);			\
	FAMILY_TEST(TEST_ARGS, bit, cmpxchg,				\
			init, init, init, wrong, new);			\
} while (0)

#define INC_RETURN_FAMILY_TEST(bit, i)			\
do {							\
	FAMILY_TEST(TEST_ARGS, bit, inc_return,		\
			i, (i) + one, (i) + one);	\
} while (0)

#define DEC_RETURN_FAMILY_TEST(bit, i)			\
do {							\
	FAMILY_TEST(TEST_ARGS, bit, dec_return,		\
			i, (i) - one, (i) - one);	\
} while (0)

static __init void test_atomic(void)
{
	int v0 = 0xaaa31337;
	int v1 = 0xdeadbeef;
	int onestwos = 0x11112222;
	int one = 1;

	atomic_t v;
	int r;

	TEST(, add, +=, onestwos);
	TEST(, add, +=, -one);
	TEST(, sub, -=, onestwos);
	TEST(, sub, -=, -one);
	TEST(, or, |=, v1);
	TEST(, and, &=, v1);
	TEST(, xor, ^=, v1);
	TEST(, andnot, &= ~, v1);

	RETURN_FAMILY_TEST(, add_return, +=, onestwos);
	RETURN_FAMILY_TEST(, add_return, +=, -one);
	RETURN_FAMILY_TEST(, sub_return, -=, onestwos);
	RETURN_FAMILY_TEST(, sub_return, -=, -one);

	FETCH_FAMILY_TEST(, fetch_add, +=, onestwos);
	FETCH_FAMILY_TEST(, fetch_add, +=, -one);
	FETCH_FAMILY_TEST(, fetch_sub, -=, onestwos);
	FETCH_FAMILY_TEST(, fetch_sub, -=, -one);

	FETCH_FAMILY_TEST(, fetch_or,  |=, v1);
	FETCH_FAMILY_TEST(, fetch_and, &=, v1);
	FETCH_FAMILY_TEST(, fetch_andnot, &= ~, v1);
	FETCH_FAMILY_TEST(, fetch_xor, ^=, v1);

	INC_RETURN_FAMILY_TEST(, v0);
	DEC_RETURN_FAMILY_TEST(, v0);

	XCHG_FAMILY_TEST(, v0, v1);
	CMPXCHG_FAMILY_TEST(, v0, v1, onestwos);

}

#define INIT(c) do { atomic64_set(&v, c); r = c; } while (0)
static __init void test_atomic64(void)
{
	long long v0 = 0xaaa31337c001d00dLL;
	long long v1 = 0xdeadbeefdeafcafeLL;
	long long v2 = 0xfaceabadf00df001LL;
	long long onestwos = 0x1111111122222222LL;
	long long one = 1LL;

	atomic64_t v = ATOMIC64_INIT(v0);
	long long r = v0;
	BUG_ON(v.counter != r);

	atomic64_set(&v, v1);
	r = v1;
	BUG_ON(v.counter != r);
	BUG_ON(atomic64_read(&v) != r);

	TEST(64, add, +=, onestwos);
	TEST(64, add, +=, -one);
	TEST(64, sub, -=, onestwos);
	TEST(64, sub, -=, -one);
	TEST(64, or, |=, v1);
	TEST(64, and, &=, v1);
	TEST(64, xor, ^=, v1);
	TEST(64, andnot, &= ~, v1);

	RETURN_FAMILY_TEST(64, add_return, +=, onestwos);
	RETURN_FAMILY_TEST(64, add_return, +=, -one);
	RETURN_FAMILY_TEST(64, sub_return, -=, onestwos);
	RETURN_FAMILY_TEST(64, sub_return, -=, -one);

	FETCH_FAMILY_TEST(64, fetch_add, +=, onestwos);
	FETCH_FAMILY_TEST(64, fetch_add, +=, -one);
	FETCH_FAMILY_TEST(64, fetch_sub, -=, onestwos);
	FETCH_FAMILY_TEST(64, fetch_sub, -=, -one);

	FETCH_FAMILY_TEST(64, fetch_or,  |=, v1);
	FETCH_FAMILY_TEST(64, fetch_and, &=, v1);
	FETCH_FAMILY_TEST(64, fetch_andnot, &= ~, v1);
	FETCH_FAMILY_TEST(64, fetch_xor, ^=, v1);

	INIT(v0);
	atomic64_inc(&v);
	r += one;
	BUG_ON(v.counter != r);

	INIT(v0);
	atomic64_dec(&v);
	r -= one;
	BUG_ON(v.counter != r);

	INC_RETURN_FAMILY_TEST(64, v0);
	DEC_RETURN_FAMILY_TEST(64, v0);

	XCHG_FAMILY_TEST(64, v0, v1);
	CMPXCHG_FAMILY_TEST(64, v0, v1, v2);

	INIT(v0);
	BUG_ON(atomic64_add_unless(&v, one, v0));
	BUG_ON(v.counter != r);

	INIT(v0);
	BUG_ON(!atomic64_add_unless(&v, one, v1));
	r += one;
	BUG_ON(v.counter != r);

	INIT(onestwos);
	BUG_ON(atomic64_dec_if_positive(&v) != (onestwos - 1));
	r -= one;
	BUG_ON(v.counter != r);

	INIT(0);
	BUG_ON(atomic64_dec_if_positive(&v) != -one);
	BUG_ON(v.counter != r);

	INIT(-one);
	BUG_ON(atomic64_dec_if_positive(&v) != (-one - one));
	BUG_ON(v.counter != r);

	INIT(onestwos);
	BUG_ON(!atomic64_inc_not_zero(&v));
	r += one;
	BUG_ON(v.counter != r);

	INIT(0);
	BUG_ON(atomic64_inc_not_zero(&v));
	BUG_ON(v.counter != r);

	INIT(-one);
	BUG_ON(!atomic64_inc_not_zero(&v));
	r += one;
	BUG_ON(v.counter != r);
}

static __init int test_atomics(void)
{
	test_atomic();
	test_atomic64();

#ifdef CONFIG_X86
	pr_info("passed for %s platform %s CX8 and %s SSE\n",
#ifdef CONFIG_X86_64
		"x86-64",
#elif defined(CONFIG_X86_CMPXCHG64)
		"i586+",
#else
		"i386+",
#endif
	       boot_cpu_has(X86_FEATURE_CX8) ? "with" : "without",
	       boot_cpu_has(X86_FEATURE_XMM) ? "with" : "without");
#else
	pr_info("passed\n");
#endif

	return 0;
}

core_initcall(test_atomics);
Commit	Line	Data
86a89380 LB	1	/*
	2	* Testsuite for atomic64_t functions
	3	*
	4	* Copyright © 2010 Luca Barbieri
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*/
b3b16d28 FF	11
	12	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
	13
86a89380	14	#include <linux/init.h>
50af5ead	15	#include <linux/bug.h>
0dbdd1bf	16	#include <linux/kernel.h>
60063497	17	#include <linux/atomic.h>
86a89380	18
153a4334	19	#ifdef CONFIG_X86
cd4d09ec	20	#include <asm/cpufeature.h> /* for boot_cpu_has below */
153a4334 AK	21	#endif
153a4334 AK	22
41b9e9fc PZ	23	#define TEST(bit, op, c_op, val) \
	24	do { \
	25	atomic##bit##_set(&v, v0); \
	26	r = v0; \
	27	atomic##bit##_##op(val, &v); \
	28	r c_op val; \
	29	WARN(atomic##bit##_read(&v) != r, "%Lx != %Lx\n", \
	30	(unsigned long long)atomic##bit##_read(&v), \
	31	(unsigned long long)r); \
	32	} while (0)
	33
978e5a36 BF	34	/*
	35	* Test for a atomic operation family,
	36	* @test should be a macro accepting parameters (bit, op, ...)
	37	*/
	38
	39	#define FAMILY_TEST(test, bit, op, args...) \
	40	do { \
	41	test(bit, op, ##args); \
	42	test(bit, op##_acquire, ##args); \
	43	test(bit, op##_release, ##args); \
	44	test(bit, op##_relaxed, ##args); \
	45	} while (0)
	46
	47	#define TEST_RETURN(bit, op, c_op, val) \
	48	do { \
	49	atomic##bit##_set(&v, v0); \
	50	r = v0; \
	51	r c_op val; \
	52	BUG_ON(atomic##bit##_##op(val, &v) != r); \
	53	BUG_ON(atomic##bit##_read(&v) != r); \
	54	} while (0)
	55
28aa2bda PZ	56	#define TEST_FETCH(bit, op, c_op, val) \
	57	do { \
	58	atomic##bit##_set(&v, v0); \
	59	r = v0; \
	60	r c_op val; \
	61	BUG_ON(atomic##bit##_##op(val, &v) != v0); \
	62	BUG_ON(atomic##bit##_read(&v) != r); \
	63	} while (0)
	64
978e5a36 BF	65	#define RETURN_FAMILY_TEST(bit, op, c_op, val) \
	66	do { \
	67	FAMILY_TEST(TEST_RETURN, bit, op, c_op, val); \
	68	} while (0)
	69
28aa2bda PZ	70	#define FETCH_FAMILY_TEST(bit, op, c_op, val) \
	71	do { \
	72	FAMILY_TEST(TEST_FETCH, bit, op, c_op, val); \
	73	} while (0)
	74
978e5a36 BF	75	#define TEST_ARGS(bit, op, init, ret, expect, args...) \
	76	do { \
	77	atomic##bit##_set(&v, init); \
	78	BUG_ON(atomic##bit##_##op(&v, ##args) != ret); \
	79	BUG_ON(atomic##bit##_read(&v) != expect); \
	80	} while (0)
	81
	82	#define XCHG_FAMILY_TEST(bit, init, new) \
	83	do { \
	84	FAMILY_TEST(TEST_ARGS, bit, xchg, init, init, new, new); \
	85	} while (0)
	86
	87	#define CMPXCHG_FAMILY_TEST(bit, init, new, wrong) \
	88	do { \
	89	FAMILY_TEST(TEST_ARGS, bit, cmpxchg, \
	90	init, init, new, init, new); \
	91	FAMILY_TEST(TEST_ARGS, bit, cmpxchg, \
	92	init, init, init, wrong, new); \
	93	} while (0)
	94
	95	#define INC_RETURN_FAMILY_TEST(bit, i) \
	96	do { \
	97	FAMILY_TEST(TEST_ARGS, bit, inc_return, \
	98	i, (i) + one, (i) + one); \
	99	} while (0)
	100
	101	#define DEC_RETURN_FAMILY_TEST(bit, i) \
	102	do { \
	103	FAMILY_TEST(TEST_ARGS, bit, dec_return, \
	104	i, (i) - one, (i) - one); \
	105	} while (0)
	106
41b9e9fc PZ	107	static __init void test_atomic(void)
	108	{
	109	int v0 = 0xaaa31337;
	110	int v1 = 0xdeadbeef;
	111	int onestwos = 0x11112222;
	112	int one = 1;
	113
	114	atomic_t v;
	115	int r;
	116
	117	TEST(, add, +=, onestwos);
	118	TEST(, add, +=, -one);
	119	TEST(, sub, -=, onestwos);
	120	TEST(, sub, -=, -one);
	121	TEST(, or, \|=, v1);
	122	TEST(, and, &=, v1);
	123	TEST(, xor, ^=, v1);
	124	TEST(, andnot, &= ~, v1);
978e5a36 BF	125
	126	RETURN_FAMILY_TEST(, add_return, +=, onestwos);
	127	RETURN_FAMILY_TEST(, add_return, +=, -one);
	128	RETURN_FAMILY_TEST(, sub_return, -=, onestwos);
	129	RETURN_FAMILY_TEST(, sub_return, -=, -one);
	130
28aa2bda PZ	131	FETCH_FAMILY_TEST(, fetch_add, +=, onestwos);
	132	FETCH_FAMILY_TEST(, fetch_add, +=, -one);
	133	FETCH_FAMILY_TEST(, fetch_sub, -=, onestwos);
	134	FETCH_FAMILY_TEST(, fetch_sub, -=, -one);
	135
	136	FETCH_FAMILY_TEST(, fetch_or, \|=, v1);
	137	FETCH_FAMILY_TEST(, fetch_and, &=, v1);
	138	FETCH_FAMILY_TEST(, fetch_andnot, &= ~, v1);
	139	FETCH_FAMILY_TEST(, fetch_xor, ^=, v1);
	140
978e5a36 BF	141	INC_RETURN_FAMILY_TEST(, v0);
	142	DEC_RETURN_FAMILY_TEST(, v0);
	143
	144	XCHG_FAMILY_TEST(, v0, v1);
	145	CMPXCHG_FAMILY_TEST(, v0, v1, onestwos);
	146
41b9e9fc PZ	147	}
41b9e9fc PZ	148
86a89380	149	#define INIT(c) do { atomic64_set(&v, c); r = c; } while (0)
41b9e9fc	150	static __init void test_atomic64(void)
86a89380 LB	151	{
	152	long long v0 = 0xaaa31337c001d00dLL;
	153	long long v1 = 0xdeadbeefdeafcafeLL;
	154	long long v2 = 0xfaceabadf00df001LL;
	155	long long onestwos = 0x1111111122222222LL;
	156	long long one = 1LL;
	157
	158	atomic64_t v = ATOMIC64_INIT(v0);
	159	long long r = v0;
	160	BUG_ON(v.counter != r);
	161
	162	atomic64_set(&v, v1);
	163	r = v1;
	164	BUG_ON(v.counter != r);
	165	BUG_ON(atomic64_read(&v) != r);
	166
41b9e9fc PZ	167	TEST(64, add, +=, onestwos);
	168	TEST(64, add, +=, -one);
	169	TEST(64, sub, -=, onestwos);
	170	TEST(64, sub, -=, -one);
	171	TEST(64, or, \|=, v1);
	172	TEST(64, and, &=, v1);
	173	TEST(64, xor, ^=, v1);
	174	TEST(64, andnot, &= ~, v1);
86a89380	175
978e5a36 BF	176	RETURN_FAMILY_TEST(64, add_return, +=, onestwos);
	177	RETURN_FAMILY_TEST(64, add_return, +=, -one);
	178	RETURN_FAMILY_TEST(64, sub_return, -=, onestwos);
	179	RETURN_FAMILY_TEST(64, sub_return, -=, -one);
86a89380	180
28aa2bda PZ	181	FETCH_FAMILY_TEST(64, fetch_add, +=, onestwos);
	182	FETCH_FAMILY_TEST(64, fetch_add, +=, -one);
	183	FETCH_FAMILY_TEST(64, fetch_sub, -=, onestwos);
	184	FETCH_FAMILY_TEST(64, fetch_sub, -=, -one);
	185
	186	FETCH_FAMILY_TEST(64, fetch_or, \|=, v1);
	187	FETCH_FAMILY_TEST(64, fetch_and, &=, v1);
	188	FETCH_FAMILY_TEST(64, fetch_andnot, &= ~, v1);
	189	FETCH_FAMILY_TEST(64, fetch_xor, ^=, v1);
	190
86a89380 LB	191	INIT(v0);
	192	atomic64_inc(&v);
	193	r += one;
	194	BUG_ON(v.counter != r);
	195
86a89380 LB	196	INIT(v0);
	197	atomic64_dec(&v);
	198	r -= one;
	199	BUG_ON(v.counter != r);
	200
978e5a36 BF	201	INC_RETURN_FAMILY_TEST(64, v0);
978e5a36 BF	202	DEC_RETURN_FAMILY_TEST(64, v0);
86a89380	203
978e5a36 BF	204	XCHG_FAMILY_TEST(64, v0, v1);
978e5a36 BF	205	CMPXCHG_FAMILY_TEST(64, v0, v1, v2);
86a89380 LB	206
86a89380 LB	207	INIT(v0);
9efbcd59	208	BUG_ON(atomic64_add_unless(&v, one, v0));
86a89380 LB	209	BUG_ON(v.counter != r);
	210
	211	INIT(v0);
9efbcd59	212	BUG_ON(!atomic64_add_unless(&v, one, v1));
86a89380 LB	213	r += one;
	214	BUG_ON(v.counter != r);
	215
	216	INIT(onestwos);
	217	BUG_ON(atomic64_dec_if_positive(&v) != (onestwos - 1));
	218	r -= one;
	219	BUG_ON(v.counter != r);
	220
	221	INIT(0);
	222	BUG_ON(atomic64_dec_if_positive(&v) != -one);
	223	BUG_ON(v.counter != r);
	224
	225	INIT(-one);
	226	BUG_ON(atomic64_dec_if_positive(&v) != (-one - one));
	227	BUG_ON(v.counter != r);
	228
	229	INIT(onestwos);
25a304f2	230	BUG_ON(!atomic64_inc_not_zero(&v));
86a89380 LB	231	r += one;
	232	BUG_ON(v.counter != r);
	233
	234	INIT(0);
25a304f2	235	BUG_ON(atomic64_inc_not_zero(&v));
86a89380 LB	236	BUG_ON(v.counter != r);
	237
	238	INIT(-one);
25a304f2	239	BUG_ON(!atomic64_inc_not_zero(&v));
86a89380 LB	240	r += one;
86a89380 LB	241	BUG_ON(v.counter != r);
41b9e9fc PZ	242	}
	243
	244	static __init int test_atomics(void)
	245	{
	246	test_atomic();
	247	test_atomic64();
86a89380 LB	248
86a89380 LB	249	#ifdef CONFIG_X86
b3b16d28	250	pr_info("passed for %s platform %s CX8 and %s SSE\n",
a5c9161f	251	#ifdef CONFIG_X86_64
b3b16d28	252	"x86-64",
a5c9161f	253	#elif defined(CONFIG_X86_CMPXCHG64)
b3b16d28	254	"i586+",
86a89380	255	#else
b3b16d28	256	"i386+",
86a89380	257	#endif
a5c9161f PA	258	boot_cpu_has(X86_FEATURE_CX8) ? "with" : "without",
a5c9161f PA	259	boot_cpu_has(X86_FEATURE_XMM) ? "with" : "without");
86a89380	260	#else
b3b16d28	261	pr_info("passed\n");
86a89380 LB	262	#endif
	263
	264	return 0;
	265	}
	266
41b9e9fc	267	core_initcall(test_atomics);