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abf12d71 RV |
1 | /* |
2 | * Copyright (C) ST-Ericsson SA 2010 | |
3 | * | |
4 | * Author: Rabin Vincent <[email protected]> for ST-Ericsson | |
5 | * License terms: GNU General Public License (GPL) version 2 | |
6 | */ | |
7 | ||
8 | #include <linux/kernel.h> | |
9 | #include <linux/init.h> | |
10 | #include <linux/io.h> | |
18a99278 | 11 | #include <linux/module.h> |
cd1dc431 AB |
12 | #include <linux/random.h> |
13 | #include <linux/slab.h> | |
18a99278 AB |
14 | #include <linux/of.h> |
15 | #include <linux/of_address.h> | |
cd1dc431 | 16 | #include <linux/sys_soc.h> |
abf12d71 RV |
17 | |
18 | #include <asm/cputype.h> | |
19 | #include <asm/tlbflush.h> | |
20 | #include <asm/cacheflush.h> | |
21 | #include <asm/mach/map.h> | |
22 | ||
cd1dc431 AB |
23 | /** |
24 | * struct dbx500_asic_id - fields of the ASIC ID | |
25 | * @process: the manufacturing process, 0x40 is 40 nm 0x00 is "standard" | |
26 | * @partnumber: hithereto 0x8500 for DB8500 | |
27 | * @revision: version code in the series | |
28 | */ | |
29 | struct dbx500_asic_id { | |
30 | u16 partnumber; | |
31 | u8 revision; | |
32 | u8 process; | |
33 | }; | |
34 | ||
35 | static struct dbx500_asic_id dbx500_id; | |
abf12d71 | 36 | |
080e0435 | 37 | static unsigned int __init ux500_read_asicid(phys_addr_t addr) |
abf12d71 | 38 | { |
f15601d6 AB |
39 | void __iomem *virt = ioremap(addr, 4); |
40 | unsigned int asicid; | |
abf12d71 | 41 | |
f15601d6 AB |
42 | if (!virt) |
43 | return 0; | |
abf12d71 | 44 | |
f15601d6 AB |
45 | asicid = readl(virt); |
46 | iounmap(virt); | |
abf12d71 | 47 | |
f15601d6 | 48 | return asicid; |
abf12d71 RV |
49 | } |
50 | ||
51 | static void ux500_print_soc_info(unsigned int asicid) | |
52 | { | |
cd1dc431 | 53 | unsigned int rev = dbx500_id.revision; |
abf12d71 | 54 | |
cd1dc431 | 55 | pr_info("DB%4x ", dbx500_id.partnumber); |
abf12d71 RV |
56 | |
57 | if (rev == 0x01) | |
58 | pr_cont("Early Drop"); | |
59 | else if (rev >= 0xA0) | |
60 | pr_cont("v%d.%d" , (rev >> 4) - 0xA + 1, rev & 0xf); | |
61 | else | |
62 | pr_cont("Unknown"); | |
63 | ||
64 | pr_cont(" [%#010x]\n", asicid); | |
65 | } | |
66 | ||
67 | static unsigned int partnumber(unsigned int asicid) | |
68 | { | |
69 | return (asicid >> 8) & 0xffff; | |
70 | } | |
71 | ||
72 | /* | |
73 | * SOC MIDR ASICID ADDRESS ASICID VALUE | |
74 | * DB8500ed 0x410fc090 0x9001FFF4 0x00850001 | |
75 | * DB8500v1 0x411fc091 0x9001FFF4 0x008500A0 | |
76 | * DB8500v1.1 0x411fc091 0x9001FFF4 0x008500A1 | |
77 | * DB8500v2 0x412fc091 0x9001DBF4 0x008500B0 | |
41c34ae4 | 78 | * DB8520v2.2 0x412fc091 0x9001DBF4 0x008500B2 |
abf12d71 | 79 | * DB5500v1 0x412fc091 0x9001FFF4 0x005500A0 |
bc71c096 | 80 | * DB9540 0x413fc090 0xFFFFDBF4 0x009540xx |
abf12d71 RV |
81 | */ |
82 | ||
f15601d6 | 83 | static void __init ux500_setup_id(void) |
abf12d71 RV |
84 | { |
85 | unsigned int cpuid = read_cpuid_id(); | |
86 | unsigned int asicid = 0; | |
87 | phys_addr_t addr = 0; | |
88 | ||
89 | switch (cpuid) { | |
90 | case 0x410fc090: /* DB8500ed */ | |
91 | case 0x411fc091: /* DB8500v1 */ | |
92 | addr = 0x9001FFF4; | |
93 | break; | |
94 | ||
41c34ae4 | 95 | case 0x412fc091: /* DB8520 / DB8500v2 / DB5500v1 */ |
abf12d71 | 96 | asicid = ux500_read_asicid(0x9001DBF4); |
41c34ae4 RV |
97 | if (partnumber(asicid) == 0x8500 || |
98 | partnumber(asicid) == 0x8520) | |
abf12d71 RV |
99 | /* DB8500v2 */ |
100 | break; | |
101 | ||
102 | /* DB5500v1 */ | |
103 | addr = 0x9001FFF4; | |
104 | break; | |
bc71c096 LW |
105 | |
106 | case 0x413fc090: /* DB9540 */ | |
107 | addr = 0xFFFFDBF4; | |
108 | break; | |
abf12d71 RV |
109 | } |
110 | ||
111 | if (addr) | |
112 | asicid = ux500_read_asicid(addr); | |
113 | ||
114 | if (!asicid) { | |
115 | pr_err("Unable to identify SoC\n"); | |
cd1dc431 | 116 | BUG(); |
abf12d71 RV |
117 | } |
118 | ||
119 | dbx500_id.process = asicid >> 24; | |
120 | dbx500_id.partnumber = partnumber(asicid); | |
121 | dbx500_id.revision = asicid & 0xff; | |
122 | ||
123 | ux500_print_soc_info(asicid); | |
124 | } | |
cd1dc431 AB |
125 | |
126 | static const char * __init ux500_get_machine(void) | |
127 | { | |
128 | return kasprintf(GFP_KERNEL, "DB%4x", dbx500_id.partnumber); | |
129 | } | |
130 | ||
131 | static const char * __init ux500_get_family(void) | |
132 | { | |
133 | return kasprintf(GFP_KERNEL, "ux500"); | |
134 | } | |
135 | ||
136 | static const char * __init ux500_get_revision(void) | |
137 | { | |
138 | unsigned int rev = dbx500_id.revision; | |
139 | ||
140 | if (rev == 0x01) | |
141 | return kasprintf(GFP_KERNEL, "%s", "ED"); | |
142 | else if (rev >= 0xA0) | |
143 | return kasprintf(GFP_KERNEL, "%d.%d", | |
144 | (rev >> 4) - 0xA + 1, rev & 0xf); | |
145 | ||
146 | return kasprintf(GFP_KERNEL, "%s", "Unknown"); | |
147 | } | |
148 | ||
149 | static ssize_t ux500_get_process(struct device *dev, | |
150 | struct device_attribute *attr, | |
151 | char *buf) | |
152 | { | |
153 | if (dbx500_id.process == 0x00) | |
154 | return sprintf(buf, "Standard\n"); | |
155 | ||
156 | return sprintf(buf, "%02xnm\n", dbx500_id.process); | |
157 | } | |
158 | ||
18a99278 | 159 | static const char *db8500_read_soc_id(struct device_node *backupram) |
cd1dc431 | 160 | { |
18a99278 | 161 | void __iomem *base; |
cd1dc431 AB |
162 | void __iomem *uid; |
163 | const char *retstr; | |
164 | ||
18a99278 AB |
165 | base = of_iomap(backupram, 0); |
166 | if (!base) | |
cd1dc431 | 167 | return NULL; |
18a99278 AB |
168 | uid = base + 0x1fc0; |
169 | ||
cd1dc431 AB |
170 | /* Throw these device-specific numbers into the entropy pool */ |
171 | add_device_randomness(uid, 0x14); | |
172 | retstr = kasprintf(GFP_KERNEL, "%08x%08x%08x%08x%08x", | |
173 | readl((u32 *)uid+0), | |
174 | readl((u32 *)uid+1), readl((u32 *)uid+2), | |
175 | readl((u32 *)uid+3), readl((u32 *)uid+4)); | |
18a99278 | 176 | iounmap(base); |
cd1dc431 AB |
177 | return retstr; |
178 | } | |
179 | ||
18a99278 AB |
180 | static void __init soc_info_populate(struct soc_device_attribute *soc_dev_attr, |
181 | struct device_node *backupram) | |
cd1dc431 | 182 | { |
18a99278 | 183 | soc_dev_attr->soc_id = db8500_read_soc_id(backupram); |
cd1dc431 AB |
184 | soc_dev_attr->machine = ux500_get_machine(); |
185 | soc_dev_attr->family = ux500_get_family(); | |
186 | soc_dev_attr->revision = ux500_get_revision(); | |
187 | } | |
188 | ||
189 | static const struct device_attribute ux500_soc_attr = | |
190 | __ATTR(process, S_IRUGO, ux500_get_process, NULL); | |
191 | ||
18a99278 | 192 | static int __init ux500_soc_device_init(void) |
cd1dc431 AB |
193 | { |
194 | struct device *parent; | |
195 | struct soc_device *soc_dev; | |
196 | struct soc_device_attribute *soc_dev_attr; | |
18a99278 AB |
197 | struct device_node *backupram; |
198 | ||
199 | backupram = of_find_compatible_node(NULL, NULL, "ste,dbx500-backupram"); | |
200 | if (!backupram) | |
201 | return 0; | |
cd1dc431 | 202 | |
f15601d6 AB |
203 | ux500_setup_id(); |
204 | ||
cd1dc431 AB |
205 | soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); |
206 | if (!soc_dev_attr) | |
18a99278 | 207 | return -ENOMEM; |
cd1dc431 | 208 | |
18a99278 | 209 | soc_info_populate(soc_dev_attr, backupram); |
cd1dc431 AB |
210 | |
211 | soc_dev = soc_device_register(soc_dev_attr); | |
212 | if (IS_ERR(soc_dev)) { | |
213 | kfree(soc_dev_attr); | |
18a99278 | 214 | return PTR_ERR(soc_dev); |
cd1dc431 AB |
215 | } |
216 | ||
217 | parent = soc_device_to_device(soc_dev); | |
218 | device_create_file(parent, &ux500_soc_attr); | |
219 | ||
18a99278 | 220 | return 0; |
cd1dc431 | 221 | } |
18a99278 | 222 | subsys_initcall(ux500_soc_device_init); |