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53631b54 CM |
1 | /* |
2 | * FP/SIMD context switching and fault handling | |
3 | * | |
4 | * Copyright (C) 2012 ARM Ltd. | |
5 | * Author: Catalin Marinas <[email protected]> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
fb1ab1ab | 20 | #include <linux/cpu_pm.h> |
53631b54 CM |
21 | #include <linux/kernel.h> |
22 | #include <linux/init.h> | |
23 | #include <linux/sched.h> | |
24 | #include <linux/signal.h> | |
4cfb3613 | 25 | #include <linux/hardirq.h> |
53631b54 CM |
26 | |
27 | #include <asm/fpsimd.h> | |
28 | #include <asm/cputype.h> | |
29 | ||
30 | #define FPEXC_IOF (1 << 0) | |
31 | #define FPEXC_DZF (1 << 1) | |
32 | #define FPEXC_OFF (1 << 2) | |
33 | #define FPEXC_UFF (1 << 3) | |
34 | #define FPEXC_IXF (1 << 4) | |
35 | #define FPEXC_IDF (1 << 7) | |
36 | ||
005f78cd AB |
37 | /* |
38 | * In order to reduce the number of times the FPSIMD state is needlessly saved | |
39 | * and restored, we need to keep track of two things: | |
40 | * (a) for each task, we need to remember which CPU was the last one to have | |
41 | * the task's FPSIMD state loaded into its FPSIMD registers; | |
42 | * (b) for each CPU, we need to remember which task's userland FPSIMD state has | |
43 | * been loaded into its FPSIMD registers most recently, or whether it has | |
44 | * been used to perform kernel mode NEON in the meantime. | |
45 | * | |
46 | * For (a), we add a 'cpu' field to struct fpsimd_state, which gets updated to | |
47 | * the id of the current CPU everytime the state is loaded onto a CPU. For (b), | |
48 | * we add the per-cpu variable 'fpsimd_last_state' (below), which contains the | |
49 | * address of the userland FPSIMD state of the task that was loaded onto the CPU | |
50 | * the most recently, or NULL if kernel mode NEON has been performed after that. | |
51 | * | |
52 | * With this in place, we no longer have to restore the next FPSIMD state right | |
53 | * when switching between tasks. Instead, we can defer this check to userland | |
54 | * resume, at which time we verify whether the CPU's fpsimd_last_state and the | |
55 | * task's fpsimd_state.cpu are still mutually in sync. If this is the case, we | |
56 | * can omit the FPSIMD restore. | |
57 | * | |
58 | * As an optimization, we use the thread_info flag TIF_FOREIGN_FPSTATE to | |
59 | * indicate whether or not the userland FPSIMD state of the current task is | |
60 | * present in the registers. The flag is set unless the FPSIMD registers of this | |
61 | * CPU currently contain the most recent userland FPSIMD state of the current | |
62 | * task. | |
63 | * | |
64 | * For a certain task, the sequence may look something like this: | |
65 | * - the task gets scheduled in; if both the task's fpsimd_state.cpu field | |
66 | * contains the id of the current CPU, and the CPU's fpsimd_last_state per-cpu | |
67 | * variable points to the task's fpsimd_state, the TIF_FOREIGN_FPSTATE flag is | |
68 | * cleared, otherwise it is set; | |
69 | * | |
70 | * - the task returns to userland; if TIF_FOREIGN_FPSTATE is set, the task's | |
71 | * userland FPSIMD state is copied from memory to the registers, the task's | |
72 | * fpsimd_state.cpu field is set to the id of the current CPU, the current | |
73 | * CPU's fpsimd_last_state pointer is set to this task's fpsimd_state and the | |
74 | * TIF_FOREIGN_FPSTATE flag is cleared; | |
75 | * | |
76 | * - the task executes an ordinary syscall; upon return to userland, the | |
77 | * TIF_FOREIGN_FPSTATE flag will still be cleared, so no FPSIMD state is | |
78 | * restored; | |
79 | * | |
80 | * - the task executes a syscall which executes some NEON instructions; this is | |
81 | * preceded by a call to kernel_neon_begin(), which copies the task's FPSIMD | |
82 | * register contents to memory, clears the fpsimd_last_state per-cpu variable | |
83 | * and sets the TIF_FOREIGN_FPSTATE flag; | |
84 | * | |
85 | * - the task gets preempted after kernel_neon_end() is called; as we have not | |
86 | * returned from the 2nd syscall yet, TIF_FOREIGN_FPSTATE is still set so | |
87 | * whatever is in the FPSIMD registers is not saved to memory, but discarded. | |
88 | */ | |
89 | static DEFINE_PER_CPU(struct fpsimd_state *, fpsimd_last_state); | |
90 | ||
53631b54 CM |
91 | /* |
92 | * Trapped FP/ASIMD access. | |
93 | */ | |
94 | void do_fpsimd_acc(unsigned int esr, struct pt_regs *regs) | |
95 | { | |
96 | /* TODO: implement lazy context saving/restoring */ | |
97 | WARN_ON(1); | |
98 | } | |
99 | ||
100 | /* | |
101 | * Raise a SIGFPE for the current process. | |
102 | */ | |
103 | void do_fpsimd_exc(unsigned int esr, struct pt_regs *regs) | |
104 | { | |
105 | siginfo_t info; | |
106 | unsigned int si_code = 0; | |
107 | ||
108 | if (esr & FPEXC_IOF) | |
109 | si_code = FPE_FLTINV; | |
110 | else if (esr & FPEXC_DZF) | |
111 | si_code = FPE_FLTDIV; | |
112 | else if (esr & FPEXC_OFF) | |
113 | si_code = FPE_FLTOVF; | |
114 | else if (esr & FPEXC_UFF) | |
115 | si_code = FPE_FLTUND; | |
116 | else if (esr & FPEXC_IXF) | |
117 | si_code = FPE_FLTRES; | |
118 | ||
119 | memset(&info, 0, sizeof(info)); | |
120 | info.si_signo = SIGFPE; | |
121 | info.si_code = si_code; | |
122 | info.si_addr = (void __user *)instruction_pointer(regs); | |
123 | ||
124 | send_sig_info(SIGFPE, &info, current); | |
125 | } | |
126 | ||
127 | void fpsimd_thread_switch(struct task_struct *next) | |
128 | { | |
005f78cd AB |
129 | /* |
130 | * Save the current FPSIMD state to memory, but only if whatever is in | |
131 | * the registers is in fact the most recent userland FPSIMD state of | |
132 | * 'current'. | |
133 | */ | |
134 | if (current->mm && !test_thread_flag(TIF_FOREIGN_FPSTATE)) | |
53631b54 | 135 | fpsimd_save_state(¤t->thread.fpsimd_state); |
005f78cd AB |
136 | |
137 | if (next->mm) { | |
138 | /* | |
139 | * If we are switching to a task whose most recent userland | |
140 | * FPSIMD state is already in the registers of *this* cpu, | |
141 | * we can skip loading the state from memory. Otherwise, set | |
142 | * the TIF_FOREIGN_FPSTATE flag so the state will be loaded | |
143 | * upon the next return to userland. | |
144 | */ | |
145 | struct fpsimd_state *st = &next->thread.fpsimd_state; | |
146 | ||
147 | if (__this_cpu_read(fpsimd_last_state) == st | |
148 | && st->cpu == smp_processor_id()) | |
149 | clear_ti_thread_flag(task_thread_info(next), | |
150 | TIF_FOREIGN_FPSTATE); | |
151 | else | |
152 | set_ti_thread_flag(task_thread_info(next), | |
153 | TIF_FOREIGN_FPSTATE); | |
154 | } | |
53631b54 CM |
155 | } |
156 | ||
157 | void fpsimd_flush_thread(void) | |
158 | { | |
159 | memset(¤t->thread.fpsimd_state, 0, sizeof(struct fpsimd_state)); | |
005f78cd | 160 | set_thread_flag(TIF_FOREIGN_FPSTATE); |
53631b54 CM |
161 | } |
162 | ||
c51f9269 | 163 | /* |
005f78cd AB |
164 | * Save the userland FPSIMD state of 'current' to memory, but only if the state |
165 | * currently held in the registers does in fact belong to 'current' | |
c51f9269 AB |
166 | */ |
167 | void fpsimd_preserve_current_state(void) | |
168 | { | |
169 | preempt_disable(); | |
005f78cd AB |
170 | if (!test_thread_flag(TIF_FOREIGN_FPSTATE)) |
171 | fpsimd_save_state(¤t->thread.fpsimd_state); | |
c51f9269 AB |
172 | preempt_enable(); |
173 | } | |
174 | ||
175 | /* | |
005f78cd AB |
176 | * Load the userland FPSIMD state of 'current' from memory, but only if the |
177 | * FPSIMD state already held in the registers is /not/ the most recent FPSIMD | |
178 | * state of 'current' | |
179 | */ | |
180 | void fpsimd_restore_current_state(void) | |
181 | { | |
182 | preempt_disable(); | |
183 | if (test_and_clear_thread_flag(TIF_FOREIGN_FPSTATE)) { | |
184 | struct fpsimd_state *st = ¤t->thread.fpsimd_state; | |
185 | ||
186 | fpsimd_load_state(st); | |
187 | this_cpu_write(fpsimd_last_state, st); | |
188 | st->cpu = smp_processor_id(); | |
189 | } | |
190 | preempt_enable(); | |
191 | } | |
192 | ||
193 | /* | |
194 | * Load an updated userland FPSIMD state for 'current' from memory and set the | |
195 | * flag that indicates that the FPSIMD register contents are the most recent | |
196 | * FPSIMD state of 'current' | |
c51f9269 AB |
197 | */ |
198 | void fpsimd_update_current_state(struct fpsimd_state *state) | |
199 | { | |
200 | preempt_disable(); | |
201 | fpsimd_load_state(state); | |
005f78cd AB |
202 | if (test_and_clear_thread_flag(TIF_FOREIGN_FPSTATE)) { |
203 | struct fpsimd_state *st = ¤t->thread.fpsimd_state; | |
204 | ||
205 | this_cpu_write(fpsimd_last_state, st); | |
206 | st->cpu = smp_processor_id(); | |
207 | } | |
c51f9269 AB |
208 | preempt_enable(); |
209 | } | |
210 | ||
005f78cd AB |
211 | /* |
212 | * Invalidate live CPU copies of task t's FPSIMD state | |
213 | */ | |
214 | void fpsimd_flush_task_state(struct task_struct *t) | |
215 | { | |
216 | t->thread.fpsimd_state.cpu = NR_CPUS; | |
217 | } | |
218 | ||
4cfb3613 AB |
219 | #ifdef CONFIG_KERNEL_MODE_NEON |
220 | ||
190f1ca8 AB |
221 | static DEFINE_PER_CPU(struct fpsimd_partial_state, hardirq_fpsimdstate); |
222 | static DEFINE_PER_CPU(struct fpsimd_partial_state, softirq_fpsimdstate); | |
223 | ||
4cfb3613 AB |
224 | /* |
225 | * Kernel-side NEON support functions | |
226 | */ | |
190f1ca8 | 227 | void kernel_neon_begin_partial(u32 num_regs) |
4cfb3613 | 228 | { |
190f1ca8 AB |
229 | if (in_interrupt()) { |
230 | struct fpsimd_partial_state *s = this_cpu_ptr( | |
231 | in_irq() ? &hardirq_fpsimdstate : &softirq_fpsimdstate); | |
4cfb3613 | 232 | |
190f1ca8 AB |
233 | BUG_ON(num_regs > 32); |
234 | fpsimd_save_partial_state(s, roundup(num_regs, 2)); | |
235 | } else { | |
236 | /* | |
237 | * Save the userland FPSIMD state if we have one and if we | |
238 | * haven't done so already. Clear fpsimd_last_state to indicate | |
239 | * that there is no longer userland FPSIMD state in the | |
240 | * registers. | |
241 | */ | |
242 | preempt_disable(); | |
243 | if (current->mm && | |
244 | !test_and_set_thread_flag(TIF_FOREIGN_FPSTATE)) | |
245 | fpsimd_save_state(¤t->thread.fpsimd_state); | |
246 | this_cpu_write(fpsimd_last_state, NULL); | |
247 | } | |
4cfb3613 | 248 | } |
190f1ca8 | 249 | EXPORT_SYMBOL(kernel_neon_begin_partial); |
4cfb3613 AB |
250 | |
251 | void kernel_neon_end(void) | |
252 | { | |
190f1ca8 AB |
253 | if (in_interrupt()) { |
254 | struct fpsimd_partial_state *s = this_cpu_ptr( | |
255 | in_irq() ? &hardirq_fpsimdstate : &softirq_fpsimdstate); | |
256 | fpsimd_load_partial_state(s); | |
257 | } else { | |
258 | preempt_enable(); | |
259 | } | |
4cfb3613 AB |
260 | } |
261 | EXPORT_SYMBOL(kernel_neon_end); | |
262 | ||
263 | #endif /* CONFIG_KERNEL_MODE_NEON */ | |
264 | ||
fb1ab1ab LP |
265 | #ifdef CONFIG_CPU_PM |
266 | static int fpsimd_cpu_pm_notifier(struct notifier_block *self, | |
267 | unsigned long cmd, void *v) | |
268 | { | |
269 | switch (cmd) { | |
270 | case CPU_PM_ENTER: | |
005f78cd | 271 | if (current->mm && !test_thread_flag(TIF_FOREIGN_FPSTATE)) |
fb1ab1ab LP |
272 | fpsimd_save_state(¤t->thread.fpsimd_state); |
273 | break; | |
274 | case CPU_PM_EXIT: | |
275 | if (current->mm) | |
005f78cd | 276 | set_thread_flag(TIF_FOREIGN_FPSTATE); |
fb1ab1ab LP |
277 | break; |
278 | case CPU_PM_ENTER_FAILED: | |
279 | default: | |
280 | return NOTIFY_DONE; | |
281 | } | |
282 | return NOTIFY_OK; | |
283 | } | |
284 | ||
285 | static struct notifier_block fpsimd_cpu_pm_notifier_block = { | |
286 | .notifier_call = fpsimd_cpu_pm_notifier, | |
287 | }; | |
288 | ||
289 | static void fpsimd_pm_init(void) | |
290 | { | |
291 | cpu_pm_register_notifier(&fpsimd_cpu_pm_notifier_block); | |
292 | } | |
293 | ||
294 | #else | |
295 | static inline void fpsimd_pm_init(void) { } | |
296 | #endif /* CONFIG_CPU_PM */ | |
297 | ||
53631b54 CM |
298 | /* |
299 | * FP/SIMD support code initialisation. | |
300 | */ | |
301 | static int __init fpsimd_init(void) | |
302 | { | |
303 | u64 pfr = read_cpuid(ID_AA64PFR0_EL1); | |
304 | ||
305 | if (pfr & (0xf << 16)) { | |
306 | pr_notice("Floating-point is not implemented\n"); | |
307 | return 0; | |
308 | } | |
309 | elf_hwcap |= HWCAP_FP; | |
310 | ||
311 | if (pfr & (0xf << 20)) | |
312 | pr_notice("Advanced SIMD is not implemented\n"); | |
313 | else | |
314 | elf_hwcap |= HWCAP_ASIMD; | |
315 | ||
fb1ab1ab LP |
316 | fpsimd_pm_init(); |
317 | ||
53631b54 CM |
318 | return 0; |
319 | } | |
320 | late_initcall(fpsimd_init); |