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cf75d8d2 MR |
1 | /* |
2 | * linux/arch/arm/mach-pxa/cm-x300.c | |
3 | * | |
4 | * Support for the CompuLab CM-X300 modules | |
5 | * | |
14fd9e00 | 6 | * Copyright (C) 2008,2009 CompuLab Ltd. |
cf75d8d2 MR |
7 | * |
8 | * Mike Rapoport <[email protected]> | |
14fd9e00 | 9 | * Igor Grinberg <[email protected]> |
cf75d8d2 MR |
10 | * |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License version 2 as | |
13 | * published by the Free Software Foundation. | |
14 | */ | |
15 | ||
16 | #include <linux/module.h> | |
17 | #include <linux/kernel.h> | |
18 | #include <linux/interrupt.h> | |
19 | #include <linux/init.h> | |
b3d01da6 | 20 | #include <linux/delay.h> |
cf75d8d2 | 21 | #include <linux/platform_device.h> |
1b43d8ed | 22 | #include <linux/clk.h> |
cf75d8d2 MR |
23 | |
24 | #include <linux/gpio.h> | |
25 | #include <linux/dm9000.h> | |
26 | #include <linux/leds.h> | |
1858ced3 | 27 | #include <linux/rtc-v3020.h> |
db205463 | 28 | #include <linux/pwm_backlight.h> |
cf75d8d2 MR |
29 | |
30 | #include <linux/i2c.h> | |
31 | #include <linux/i2c/pca953x.h> | |
32 | ||
9c017ca1 | 33 | #include <linux/mfd/da903x.h> |
d176d64b | 34 | #include <linux/regulator/machine.h> |
03ba7e07 IG |
35 | #include <linux/power_supply.h> |
36 | #include <linux/apm-emulation.h> | |
9c017ca1 | 37 | |
83e560ee IG |
38 | #include <linux/spi/spi.h> |
39 | #include <linux/spi/spi_gpio.h> | |
40 | #include <linux/spi/tdo24m.h> | |
41 | ||
cf75d8d2 MR |
42 | #include <asm/mach-types.h> |
43 | #include <asm/mach/arch.h> | |
b5a5c474 | 44 | #include <asm/setup.h> |
cf75d8d2 | 45 | |
51c62982 | 46 | #include <mach/pxa300.h> |
edaa64c9 | 47 | #include <mach/pxa27x-udc.h> |
cf75d8d2 MR |
48 | #include <mach/pxafb.h> |
49 | #include <mach/mmc.h> | |
50 | #include <mach/ohci.h> | |
f0a83701 | 51 | #include <plat/i2c.h> |
82b95ecb | 52 | #include <plat/pxa3xx_nand.h> |
74e74def | 53 | #include <mach/audio.h> |
1b43d8ed | 54 | #include <mach/pxa3xx-u2d.h> |
cf75d8d2 MR |
55 | |
56 | #include <asm/mach/map.h> | |
57 | ||
58 | #include "generic.h" | |
db205463 | 59 | #include "devices.h" |
cf75d8d2 MR |
60 | |
61 | #define CM_X300_ETH_PHYS 0x08000010 | |
62 | ||
0bff2fc3 MR |
63 | #define GPIO82_MMC_IRQ (82) |
64 | #define GPIO85_MMC_WP (85) | |
cf75d8d2 | 65 | |
0bff2fc3 | 66 | #define CM_X300_MMC_IRQ IRQ_GPIO(GPIO82_MMC_IRQ) |
cf75d8d2 | 67 | |
1858ced3 MR |
68 | #define GPIO95_RTC_CS (95) |
69 | #define GPIO96_RTC_WR (96) | |
70 | #define GPIO97_RTC_RD (97) | |
71 | #define GPIO98_RTC_IO (98) | |
72 | ||
1b43d8ed IG |
73 | #define GPIO_ULPI_PHY_RST (127) |
74 | ||
def8252d | 75 | static mfp_cfg_t cm_x3xx_mfp_cfg[] __initdata = { |
cf75d8d2 MR |
76 | /* LCD */ |
77 | GPIO54_LCD_LDD_0, | |
78 | GPIO55_LCD_LDD_1, | |
79 | GPIO56_LCD_LDD_2, | |
80 | GPIO57_LCD_LDD_3, | |
81 | GPIO58_LCD_LDD_4, | |
82 | GPIO59_LCD_LDD_5, | |
83 | GPIO60_LCD_LDD_6, | |
84 | GPIO61_LCD_LDD_7, | |
85 | GPIO62_LCD_LDD_8, | |
86 | GPIO63_LCD_LDD_9, | |
87 | GPIO64_LCD_LDD_10, | |
88 | GPIO65_LCD_LDD_11, | |
89 | GPIO66_LCD_LDD_12, | |
90 | GPIO67_LCD_LDD_13, | |
91 | GPIO68_LCD_LDD_14, | |
92 | GPIO69_LCD_LDD_15, | |
93 | GPIO72_LCD_FCLK, | |
94 | GPIO73_LCD_LCLK, | |
95 | GPIO74_LCD_PCLK, | |
96 | GPIO75_LCD_BIAS, | |
97 | ||
98 | /* BTUART */ | |
99 | GPIO111_UART2_RTS, | |
100 | GPIO112_UART2_RXD | MFP_LPM_EDGE_FALL, | |
101 | GPIO113_UART2_TXD, | |
102 | GPIO114_UART2_CTS | MFP_LPM_EDGE_BOTH, | |
103 | ||
104 | /* STUART */ | |
105 | GPIO109_UART3_TXD, | |
106 | GPIO110_UART3_RXD | MFP_LPM_EDGE_FALL, | |
107 | ||
108 | /* AC97 */ | |
109 | GPIO23_AC97_nACRESET, | |
110 | GPIO24_AC97_SYSCLK, | |
111 | GPIO29_AC97_BITCLK, | |
112 | GPIO25_AC97_SDATA_IN_0, | |
113 | GPIO27_AC97_SDATA_OUT, | |
114 | GPIO28_AC97_SYNC, | |
115 | ||
116 | /* Keypad */ | |
117 | GPIO115_KP_MKIN_0 | MFP_LPM_EDGE_BOTH, | |
118 | GPIO116_KP_MKIN_1 | MFP_LPM_EDGE_BOTH, | |
119 | GPIO117_KP_MKIN_2 | MFP_LPM_EDGE_BOTH, | |
120 | GPIO118_KP_MKIN_3 | MFP_LPM_EDGE_BOTH, | |
121 | GPIO119_KP_MKIN_4 | MFP_LPM_EDGE_BOTH, | |
122 | GPIO120_KP_MKIN_5 | MFP_LPM_EDGE_BOTH, | |
123 | GPIO2_2_KP_MKIN_6 | MFP_LPM_EDGE_BOTH, | |
124 | GPIO3_2_KP_MKIN_7 | MFP_LPM_EDGE_BOTH, | |
125 | GPIO121_KP_MKOUT_0, | |
126 | GPIO122_KP_MKOUT_1, | |
127 | GPIO123_KP_MKOUT_2, | |
128 | GPIO124_KP_MKOUT_3, | |
129 | GPIO125_KP_MKOUT_4, | |
130 | GPIO4_2_KP_MKOUT_5, | |
131 | ||
132 | /* MMC1 */ | |
133 | GPIO3_MMC1_DAT0, | |
134 | GPIO4_MMC1_DAT1 | MFP_LPM_EDGE_BOTH, | |
135 | GPIO5_MMC1_DAT2, | |
136 | GPIO6_MMC1_DAT3, | |
137 | GPIO7_MMC1_CLK, | |
138 | GPIO8_MMC1_CMD, /* CMD0 for slot 0 */ | |
139 | ||
140 | /* MMC2 */ | |
141 | GPIO9_MMC2_DAT0, | |
142 | GPIO10_MMC2_DAT1 | MFP_LPM_EDGE_BOTH, | |
143 | GPIO11_MMC2_DAT2, | |
144 | GPIO12_MMC2_DAT3, | |
145 | GPIO13_MMC2_CLK, | |
146 | GPIO14_MMC2_CMD, | |
147 | ||
148 | /* FFUART */ | |
149 | GPIO30_UART1_RXD | MFP_LPM_EDGE_FALL, | |
150 | GPIO31_UART1_TXD, | |
151 | GPIO32_UART1_CTS, | |
152 | GPIO37_UART1_RTS, | |
153 | GPIO33_UART1_DCD, | |
154 | GPIO34_UART1_DSR | MFP_LPM_EDGE_FALL, | |
155 | GPIO35_UART1_RI, | |
156 | GPIO36_UART1_DTR, | |
157 | ||
158 | /* GPIOs */ | |
cf75d8d2 MR |
159 | GPIO82_GPIO | MFP_PULL_HIGH, /* MMC CD */ |
160 | GPIO85_GPIO, /* MMC WP */ | |
161 | GPIO99_GPIO, /* Ethernet IRQ */ | |
6f584cfa | 162 | |
1858ced3 MR |
163 | /* RTC GPIOs */ |
164 | GPIO95_GPIO, /* RTC CS */ | |
165 | GPIO96_GPIO, /* RTC WR */ | |
166 | GPIO97_GPIO, /* RTC RD */ | |
167 | GPIO98_GPIO, /* RTC IO */ | |
168 | ||
6f584cfa EM |
169 | /* Standard I2C */ |
170 | GPIO21_I2C_SCL, | |
171 | GPIO22_I2C_SDA, | |
db205463 IG |
172 | |
173 | /* PWM Backlight */ | |
174 | GPIO19_PWM2_OUT, | |
cf75d8d2 MR |
175 | }; |
176 | ||
def8252d | 177 | static mfp_cfg_t cm_x3xx_rev_lt130_mfp_cfg[] __initdata = { |
55052ea2 IG |
178 | /* GPIOs */ |
179 | GPIO79_GPIO, /* LED */ | |
180 | GPIO77_GPIO, /* WiFi reset */ | |
181 | GPIO78_GPIO, /* BT reset */ | |
182 | }; | |
183 | ||
def8252d | 184 | static mfp_cfg_t cm_x3xx_rev_ge130_mfp_cfg[] __initdata = { |
55052ea2 IG |
185 | /* GPIOs */ |
186 | GPIO76_GPIO, /* LED */ | |
187 | GPIO71_GPIO, /* WiFi reset */ | |
188 | GPIO70_GPIO, /* BT reset */ | |
189 | }; | |
190 | ||
def8252d IG |
191 | static mfp_cfg_t cm_x310_mfp_cfg[] __initdata = { |
192 | /* USB PORT 2 */ | |
193 | ULPI_STP, | |
194 | ULPI_NXT, | |
195 | ULPI_DIR, | |
196 | GPIO30_ULPI_DATA_OUT_0, | |
197 | GPIO31_ULPI_DATA_OUT_1, | |
198 | GPIO32_ULPI_DATA_OUT_2, | |
199 | GPIO33_ULPI_DATA_OUT_3, | |
200 | GPIO34_ULPI_DATA_OUT_4, | |
201 | GPIO35_ULPI_DATA_OUT_5, | |
202 | GPIO36_ULPI_DATA_OUT_6, | |
203 | GPIO37_ULPI_DATA_OUT_7, | |
204 | GPIO38_ULPI_CLK, | |
205 | /* external PHY reset pin */ | |
206 | GPIO127_GPIO, | |
207 | ||
208 | /* USB PORT 3 */ | |
209 | GPIO77_USB_P3_1, | |
210 | GPIO78_USB_P3_2, | |
211 | GPIO79_USB_P3_3, | |
212 | GPIO80_USB_P3_4, | |
213 | GPIO81_USB_P3_5, | |
214 | GPIO82_USB_P3_6, | |
215 | GPIO0_2_USBH_PEN, | |
216 | }; | |
217 | ||
cf75d8d2 MR |
218 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) |
219 | static struct resource dm9000_resources[] = { | |
220 | [0] = { | |
221 | .start = CM_X300_ETH_PHYS, | |
222 | .end = CM_X300_ETH_PHYS + 0x3, | |
223 | .flags = IORESOURCE_MEM, | |
224 | }, | |
225 | [1] = { | |
226 | .start = CM_X300_ETH_PHYS + 0x4, | |
227 | .end = CM_X300_ETH_PHYS + 0x4 + 500, | |
228 | .flags = IORESOURCE_MEM, | |
229 | }, | |
230 | [2] = { | |
231 | .start = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO99)), | |
232 | .end = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO99)), | |
233 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | |
234 | } | |
235 | }; | |
236 | ||
237 | static struct dm9000_plat_data cm_x300_dm9000_platdata = { | |
bff22c9b | 238 | .flags = DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM, |
cf75d8d2 MR |
239 | }; |
240 | ||
241 | static struct platform_device dm9000_device = { | |
242 | .name = "dm9000", | |
243 | .id = 0, | |
244 | .num_resources = ARRAY_SIZE(dm9000_resources), | |
245 | .resource = dm9000_resources, | |
246 | .dev = { | |
247 | .platform_data = &cm_x300_dm9000_platdata, | |
248 | } | |
249 | ||
250 | }; | |
251 | ||
252 | static void __init cm_x300_init_dm9000(void) | |
253 | { | |
254 | platform_device_register(&dm9000_device); | |
255 | } | |
256 | #else | |
257 | static inline void cm_x300_init_dm9000(void) {} | |
258 | #endif | |
259 | ||
83e560ee | 260 | /* LCD */ |
cf75d8d2 MR |
261 | #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) |
262 | static struct pxafb_mode_info cm_x300_lcd_modes[] = { | |
263 | [0] = { | |
83e560ee | 264 | .pixclock = 38250, |
cf75d8d2 MR |
265 | .bpp = 16, |
266 | .xres = 480, | |
267 | .yres = 640, | |
268 | .hsync_len = 8, | |
269 | .vsync_len = 2, | |
270 | .left_margin = 8, | |
83e560ee | 271 | .upper_margin = 2, |
cf75d8d2 MR |
272 | .right_margin = 24, |
273 | .lower_margin = 4, | |
274 | .cmap_greyscale = 0, | |
275 | }, | |
276 | [1] = { | |
277 | .pixclock = 153800, | |
278 | .bpp = 16, | |
279 | .xres = 240, | |
280 | .yres = 320, | |
281 | .hsync_len = 8, | |
282 | .vsync_len = 2, | |
283 | .left_margin = 8, | |
284 | .upper_margin = 2, | |
285 | .right_margin = 88, | |
286 | .lower_margin = 2, | |
287 | .cmap_greyscale = 0, | |
288 | }, | |
289 | }; | |
290 | ||
291 | static struct pxafb_mach_info cm_x300_lcd = { | |
292 | .modes = cm_x300_lcd_modes, | |
83e560ee | 293 | .num_modes = ARRAY_SIZE(cm_x300_lcd_modes), |
cf75d8d2 MR |
294 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, |
295 | }; | |
296 | ||
297 | static void __init cm_x300_init_lcd(void) | |
298 | { | |
299 | set_pxa_fb_info(&cm_x300_lcd); | |
300 | } | |
301 | #else | |
302 | static inline void cm_x300_init_lcd(void) {} | |
303 | #endif | |
304 | ||
db205463 IG |
305 | #if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM_MODULE) |
306 | static struct platform_pwm_backlight_data cm_x300_backlight_data = { | |
307 | .pwm_id = 2, | |
308 | .max_brightness = 100, | |
309 | .dft_brightness = 100, | |
310 | .pwm_period_ns = 10000, | |
311 | }; | |
312 | ||
313 | static struct platform_device cm_x300_backlight_device = { | |
314 | .name = "pwm-backlight", | |
315 | .dev = { | |
316 | .parent = &pxa27x_device_pwm0.dev, | |
317 | .platform_data = &cm_x300_backlight_data, | |
318 | }, | |
319 | }; | |
320 | ||
321 | static void cm_x300_init_bl(void) | |
322 | { | |
323 | platform_device_register(&cm_x300_backlight_device); | |
324 | } | |
325 | #else | |
326 | static inline void cm_x300_init_bl(void) {} | |
327 | #endif | |
328 | ||
83e560ee IG |
329 | #if defined(CONFIG_SPI_GPIO) || defined(CONFIG_SPI_GPIO_MODULE) |
330 | #define GPIO_LCD_BASE (144) | |
331 | #define GPIO_LCD_DIN (GPIO_LCD_BASE + 8) /* aux_gpio3_0 */ | |
332 | #define GPIO_LCD_DOUT (GPIO_LCD_BASE + 9) /* aux_gpio3_1 */ | |
333 | #define GPIO_LCD_SCL (GPIO_LCD_BASE + 10) /* aux_gpio3_2 */ | |
334 | #define GPIO_LCD_CS (GPIO_LCD_BASE + 11) /* aux_gpio3_3 */ | |
335 | #define LCD_SPI_BUS_NUM (1) | |
336 | ||
337 | static struct spi_gpio_platform_data cm_x300_spi_gpio_pdata = { | |
338 | .sck = GPIO_LCD_SCL, | |
339 | .mosi = GPIO_LCD_DIN, | |
340 | .miso = GPIO_LCD_DOUT, | |
341 | .num_chipselect = 1, | |
342 | }; | |
343 | ||
344 | static struct platform_device cm_x300_spi_gpio = { | |
345 | .name = "spi_gpio", | |
346 | .id = LCD_SPI_BUS_NUM, | |
347 | .dev = { | |
348 | .platform_data = &cm_x300_spi_gpio_pdata, | |
349 | }, | |
350 | }; | |
351 | ||
352 | static struct tdo24m_platform_data cm_x300_tdo24m_pdata = { | |
353 | .model = TDO35S, | |
354 | }; | |
355 | ||
356 | static struct spi_board_info cm_x300_spi_devices[] __initdata = { | |
357 | { | |
358 | .modalias = "tdo24m", | |
359 | .max_speed_hz = 1000000, | |
360 | .bus_num = LCD_SPI_BUS_NUM, | |
361 | .chip_select = 0, | |
362 | .controller_data = (void *) GPIO_LCD_CS, | |
363 | .platform_data = &cm_x300_tdo24m_pdata, | |
364 | }, | |
365 | }; | |
366 | ||
367 | static void __init cm_x300_init_spi(void) | |
368 | { | |
369 | spi_register_board_info(cm_x300_spi_devices, | |
370 | ARRAY_SIZE(cm_x300_spi_devices)); | |
371 | platform_device_register(&cm_x300_spi_gpio); | |
372 | } | |
373 | #else | |
374 | static inline void cm_x300_init_spi(void) {} | |
375 | #endif | |
376 | ||
74e74def IG |
377 | #if defined(CONFIG_SND_PXA2XX_LIB_AC97) |
378 | static void __init cm_x300_init_ac97(void) | |
379 | { | |
380 | pxa_set_ac97_info(NULL); | |
381 | } | |
382 | #else | |
383 | static inline void cm_x300_init_ac97(void) {} | |
384 | #endif | |
385 | ||
cf75d8d2 MR |
386 | #if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE) |
387 | static struct mtd_partition cm_x300_nand_partitions[] = { | |
388 | [0] = { | |
389 | .name = "OBM", | |
390 | .offset = 0, | |
391 | .size = SZ_256K, | |
392 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
393 | }, | |
394 | [1] = { | |
395 | .name = "U-Boot", | |
396 | .offset = MTDPART_OFS_APPEND, | |
397 | .size = SZ_256K, | |
398 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
399 | }, | |
400 | [2] = { | |
401 | .name = "Environment", | |
402 | .offset = MTDPART_OFS_APPEND, | |
403 | .size = SZ_256K, | |
404 | }, | |
405 | [3] = { | |
406 | .name = "reserved", | |
407 | .offset = MTDPART_OFS_APPEND, | |
408 | .size = SZ_256K + SZ_1M, | |
409 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
410 | }, | |
411 | [4] = { | |
412 | .name = "kernel", | |
413 | .offset = MTDPART_OFS_APPEND, | |
414 | .size = SZ_4M, | |
415 | }, | |
416 | [5] = { | |
417 | .name = "fs", | |
418 | .offset = MTDPART_OFS_APPEND, | |
419 | .size = MTDPART_SIZ_FULL, | |
420 | }, | |
421 | }; | |
422 | ||
423 | static struct pxa3xx_nand_platform_data cm_x300_nand_info = { | |
424 | .enable_arbiter = 1, | |
b3992b66 | 425 | .keep_config = 1, |
cf75d8d2 MR |
426 | .parts = cm_x300_nand_partitions, |
427 | .nr_parts = ARRAY_SIZE(cm_x300_nand_partitions), | |
428 | }; | |
429 | ||
430 | static void __init cm_x300_init_nand(void) | |
431 | { | |
432 | pxa3xx_set_nand_info(&cm_x300_nand_info); | |
433 | } | |
434 | #else | |
435 | static inline void cm_x300_init_nand(void) {} | |
436 | #endif | |
437 | ||
438 | #if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE) | |
0bff2fc3 | 439 | static struct pxamci_platform_data cm_x300_mci_platform_data = { |
f97cab28 | 440 | .detect_delay_ms = 200, |
0bff2fc3 MR |
441 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, |
442 | .gpio_card_detect = GPIO82_MMC_IRQ, | |
443 | .gpio_card_ro = GPIO85_MMC_WP, | |
444 | .gpio_power = -1, | |
445 | }; | |
446 | ||
447 | /* The second MMC slot of CM-X300 is hardwired to Libertas card and has | |
cf75d8d2 | 448 | no detection/ro pins */ |
0bff2fc3 MR |
449 | static int cm_x300_mci2_init(struct device *dev, |
450 | irq_handler_t cm_x300_detect_int, | |
451 | void *data) | |
cf75d8d2 MR |
452 | { |
453 | return 0; | |
454 | } | |
455 | ||
0bff2fc3 | 456 | static void cm_x300_mci2_exit(struct device *dev, void *data) |
cf75d8d2 MR |
457 | { |
458 | } | |
459 | ||
0bff2fc3 | 460 | static struct pxamci_platform_data cm_x300_mci2_platform_data = { |
f97cab28 | 461 | .detect_delay_ms = 200, |
7a648256 | 462 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, |
0bff2fc3 MR |
463 | .init = cm_x300_mci2_init, |
464 | .exit = cm_x300_mci2_exit, | |
7a648256 RJ |
465 | .gpio_card_detect = -1, |
466 | .gpio_card_ro = -1, | |
467 | .gpio_power = -1, | |
cf75d8d2 MR |
468 | }; |
469 | ||
cf75d8d2 MR |
470 | static void __init cm_x300_init_mmc(void) |
471 | { | |
472 | pxa_set_mci_info(&cm_x300_mci_platform_data); | |
473 | pxa3xx_set_mci2_info(&cm_x300_mci2_platform_data); | |
474 | } | |
475 | #else | |
476 | static inline void cm_x300_init_mmc(void) {} | |
477 | #endif | |
478 | ||
1b43d8ed IG |
479 | #if defined(CONFIG_PXA310_ULPI) |
480 | static struct clk *pout_clk; | |
481 | ||
482 | static int cm_x300_ulpi_phy_reset(void) | |
483 | { | |
484 | int err; | |
485 | ||
486 | /* reset the PHY */ | |
487 | err = gpio_request(GPIO_ULPI_PHY_RST, "ulpi reset"); | |
488 | if (err) { | |
489 | pr_err("%s: failed to request ULPI reset GPIO: %d\n", | |
490 | __func__, err); | |
491 | return err; | |
492 | } | |
493 | ||
494 | gpio_direction_output(GPIO_ULPI_PHY_RST, 0); | |
495 | msleep(10); | |
496 | gpio_set_value(GPIO_ULPI_PHY_RST, 1); | |
497 | msleep(10); | |
498 | ||
499 | gpio_free(GPIO_ULPI_PHY_RST); | |
500 | ||
501 | return 0; | |
502 | } | |
503 | ||
504 | static inline int cm_x300_u2d_init(struct device *dev) | |
505 | { | |
506 | int err = 0; | |
507 | ||
508 | if (cpu_is_pxa310()) { | |
509 | /* CLK_POUT is connected to the ULPI PHY */ | |
510 | pout_clk = clk_get(NULL, "CLK_POUT"); | |
511 | if (IS_ERR(pout_clk)) { | |
512 | err = PTR_ERR(pout_clk); | |
513 | pr_err("%s: failed to get CLK_POUT: %d\n", | |
514 | __func__, err); | |
515 | return err; | |
516 | } | |
517 | clk_enable(pout_clk); | |
518 | ||
519 | err = cm_x300_ulpi_phy_reset(); | |
520 | if (err) { | |
521 | clk_disable(pout_clk); | |
522 | clk_put(pout_clk); | |
523 | } | |
524 | } | |
525 | ||
526 | return err; | |
527 | } | |
528 | ||
529 | static void cm_x300_u2d_exit(struct device *dev) | |
530 | { | |
531 | if (cpu_is_pxa310()) { | |
532 | clk_disable(pout_clk); | |
533 | clk_put(pout_clk); | |
534 | } | |
535 | } | |
536 | ||
537 | static struct pxa3xx_u2d_platform_data cm_x300_u2d_platform_data = { | |
538 | .ulpi_mode = ULPI_SER_6PIN, | |
539 | .init = cm_x300_u2d_init, | |
540 | .exit = cm_x300_u2d_exit, | |
541 | }; | |
542 | ||
543 | static void cm_x300_init_u2d(void) | |
544 | { | |
545 | pxa3xx_set_u2d_info(&cm_x300_u2d_platform_data); | |
546 | } | |
547 | #else | |
548 | static inline void cm_x300_init_u2d(void) {} | |
549 | #endif | |
550 | ||
cf75d8d2 | 551 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) |
edaa64c9 IG |
552 | static int cm_x300_ohci_init(struct device *dev) |
553 | { | |
554 | if (cpu_is_pxa300()) | |
555 | UP2OCR = UP2OCR_HXS | |
556 | | UP2OCR_HXOE | UP2OCR_DMPDE | UP2OCR_DPPDE; | |
557 | ||
558 | return 0; | |
559 | } | |
560 | ||
cf75d8d2 MR |
561 | static struct pxaohci_platform_data cm_x300_ohci_platform_data = { |
562 | .port_mode = PMM_PERPORT_MODE, | |
edaa64c9 IG |
563 | .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW, |
564 | .init = cm_x300_ohci_init, | |
cf75d8d2 | 565 | }; |
097b5334 | 566 | |
cf75d8d2 MR |
567 | static void __init cm_x300_init_ohci(void) |
568 | { | |
569 | pxa_set_ohci_info(&cm_x300_ohci_platform_data); | |
570 | } | |
571 | #else | |
572 | static inline void cm_x300_init_ohci(void) {} | |
573 | #endif | |
574 | ||
575 | #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) | |
576 | static struct gpio_led cm_x300_leds[] = { | |
577 | [0] = { | |
578 | .name = "cm-x300:green", | |
579 | .default_trigger = "heartbeat", | |
cf75d8d2 MR |
580 | .active_low = 1, |
581 | }, | |
582 | }; | |
583 | ||
584 | static struct gpio_led_platform_data cm_x300_gpio_led_pdata = { | |
585 | .num_leds = ARRAY_SIZE(cm_x300_leds), | |
586 | .leds = cm_x300_leds, | |
587 | }; | |
588 | ||
589 | static struct platform_device cm_x300_led_device = { | |
590 | .name = "leds-gpio", | |
591 | .id = -1, | |
592 | .dev = { | |
593 | .platform_data = &cm_x300_gpio_led_pdata, | |
594 | }, | |
595 | }; | |
596 | ||
597 | static void __init cm_x300_init_leds(void) | |
598 | { | |
55052ea2 IG |
599 | if (system_rev < 130) |
600 | cm_x300_leds[0].gpio = 79; | |
601 | else | |
602 | cm_x300_leds[0].gpio = 76; | |
603 | ||
cf75d8d2 MR |
604 | platform_device_register(&cm_x300_led_device); |
605 | } | |
606 | #else | |
607 | static inline void cm_x300_init_leds(void) {} | |
608 | #endif | |
609 | ||
610 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | |
611 | /* PCA9555 */ | |
612 | static struct pca953x_platform_data cm_x300_gpio_ext_pdata_0 = { | |
613 | .gpio_base = 128, | |
614 | }; | |
615 | ||
616 | static struct pca953x_platform_data cm_x300_gpio_ext_pdata_1 = { | |
617 | .gpio_base = 144, | |
618 | }; | |
619 | ||
620 | static struct i2c_board_info cm_x300_gpio_ext_info[] = { | |
621 | [0] = { | |
622 | I2C_BOARD_INFO("pca9555", 0x24), | |
623 | .platform_data = &cm_x300_gpio_ext_pdata_0, | |
624 | }, | |
625 | [1] = { | |
626 | I2C_BOARD_INFO("pca9555", 0x25), | |
627 | .platform_data = &cm_x300_gpio_ext_pdata_1, | |
628 | }, | |
629 | }; | |
630 | ||
631 | static void __init cm_x300_init_i2c(void) | |
632 | { | |
633 | pxa_set_i2c_info(NULL); | |
634 | i2c_register_board_info(0, cm_x300_gpio_ext_info, | |
635 | ARRAY_SIZE(cm_x300_gpio_ext_info)); | |
636 | } | |
637 | #else | |
638 | static inline void cm_x300_init_i2c(void) {} | |
639 | #endif | |
640 | ||
1858ced3 MR |
641 | #if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE) |
642 | struct v3020_platform_data cm_x300_v3020_pdata = { | |
643 | .use_gpio = 1, | |
644 | .gpio_cs = GPIO95_RTC_CS, | |
645 | .gpio_wr = GPIO96_RTC_WR, | |
646 | .gpio_rd = GPIO97_RTC_RD, | |
647 | .gpio_io = GPIO98_RTC_IO, | |
648 | }; | |
649 | ||
650 | static struct platform_device cm_x300_rtc_device = { | |
651 | .name = "v3020", | |
652 | .id = -1, | |
653 | .dev = { | |
654 | .platform_data = &cm_x300_v3020_pdata, | |
655 | } | |
656 | }; | |
657 | ||
658 | static void __init cm_x300_init_rtc(void) | |
659 | { | |
660 | platform_device_register(&cm_x300_rtc_device); | |
661 | } | |
662 | #else | |
663 | static inline void cm_x300_init_rtc(void) {} | |
664 | #endif | |
665 | ||
03ba7e07 IG |
666 | /* Battery */ |
667 | struct power_supply_info cm_x300_psy_info = { | |
668 | .name = "battery", | |
669 | .technology = POWER_SUPPLY_TECHNOLOGY_LIPO, | |
670 | .voltage_max_design = 4200000, | |
671 | .voltage_min_design = 3000000, | |
672 | .use_for_apm = 1, | |
673 | }; | |
674 | ||
675 | static void cm_x300_battery_low(void) | |
676 | { | |
677 | #if defined(CONFIG_APM_EMULATION) | |
678 | apm_queue_event(APM_LOW_BATTERY); | |
679 | #endif | |
680 | } | |
681 | ||
682 | static void cm_x300_battery_critical(void) | |
683 | { | |
684 | #if defined(CONFIG_APM_EMULATION) | |
685 | apm_queue_event(APM_CRITICAL_SUSPEND); | |
686 | #endif | |
687 | } | |
688 | ||
689 | struct da9030_battery_info cm_x300_battery_info = { | |
690 | .battery_info = &cm_x300_psy_info, | |
691 | ||
692 | .charge_milliamp = 1000, | |
693 | .charge_millivolt = 4200, | |
694 | ||
695 | .vbat_low = 3600, | |
696 | .vbat_crit = 3400, | |
697 | .vbat_charge_start = 4100, | |
698 | .vbat_charge_stop = 4200, | |
699 | .vbat_charge_restart = 4000, | |
700 | ||
701 | .vcharge_min = 3200, | |
702 | .vcharge_max = 5500, | |
703 | ||
704 | .tbat_low = 197, | |
705 | .tbat_high = 78, | |
706 | .tbat_restart = 100, | |
707 | ||
708 | .batmon_interval = 0, | |
709 | ||
710 | .battery_low = cm_x300_battery_low, | |
711 | .battery_critical = cm_x300_battery_critical, | |
712 | }; | |
713 | ||
d176d64b IG |
714 | static struct regulator_consumer_supply buck2_consumers[] = { |
715 | { | |
716 | .dev = NULL, | |
717 | .supply = "vcc_core", | |
718 | }, | |
719 | }; | |
720 | ||
721 | static struct regulator_init_data buck2_data = { | |
722 | .constraints = { | |
723 | .min_uV = 1375000, | |
724 | .max_uV = 1375000, | |
725 | .state_mem = { | |
726 | .enabled = 0, | |
727 | }, | |
728 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, | |
729 | .apply_uV = 1, | |
730 | }, | |
731 | .num_consumer_supplies = ARRAY_SIZE(buck2_consumers), | |
732 | .consumer_supplies = buck2_consumers, | |
733 | }; | |
734 | ||
9c017ca1 IG |
735 | /* DA9030 */ |
736 | struct da903x_subdev_info cm_x300_da9030_subdevs[] = { | |
03ba7e07 IG |
737 | { |
738 | .name = "da903x-battery", | |
739 | .id = DA9030_ID_BAT, | |
740 | .platform_data = &cm_x300_battery_info, | |
741 | }, | |
d176d64b IG |
742 | { |
743 | .name = "da903x-regulator", | |
744 | .id = DA9030_ID_BUCK2, | |
745 | .platform_data = &buck2_data, | |
746 | }, | |
9c017ca1 IG |
747 | }; |
748 | ||
749 | static struct da903x_platform_data cm_x300_da9030_info = { | |
750 | .num_subdevs = ARRAY_SIZE(cm_x300_da9030_subdevs), | |
751 | .subdevs = cm_x300_da9030_subdevs, | |
752 | }; | |
753 | ||
754 | static struct i2c_board_info cm_x300_pmic_info = { | |
755 | I2C_BOARD_INFO("da9030", 0x49), | |
e4e30970 | 756 | .irq = IRQ_WAKEUP0, |
9c017ca1 IG |
757 | .platform_data = &cm_x300_da9030_info, |
758 | }; | |
759 | ||
760 | static struct i2c_pxa_platform_data cm_x300_pwr_i2c_info = { | |
761 | .use_pio = 1, | |
762 | }; | |
763 | ||
764 | static void __init cm_x300_init_da9030(void) | |
765 | { | |
766 | pxa3xx_set_i2c_power_info(&cm_x300_pwr_i2c_info); | |
767 | i2c_register_board_info(1, &cm_x300_pmic_info, 1); | |
1b84387a | 768 | set_irq_wake(IRQ_WAKEUP0, 1); |
9c017ca1 IG |
769 | } |
770 | ||
b3d01da6 IG |
771 | static void __init cm_x300_init_wi2wi(void) |
772 | { | |
773 | int bt_reset, wlan_en; | |
774 | int err; | |
775 | ||
776 | if (system_rev < 130) { | |
777 | wlan_en = 77; | |
778 | bt_reset = 78; | |
779 | } else { | |
780 | wlan_en = 71; | |
781 | bt_reset = 70; | |
782 | } | |
783 | ||
784 | /* Libertas and CSR reset */ | |
785 | err = gpio_request(wlan_en, "wlan en"); | |
786 | if (err) { | |
787 | pr_err("CM-X300: failed to request wlan en gpio: %d\n", err); | |
788 | } else { | |
789 | gpio_direction_output(wlan_en, 1); | |
790 | gpio_free(wlan_en); | |
791 | } | |
792 | ||
793 | err = gpio_request(bt_reset, "bt reset"); | |
794 | if (err) { | |
795 | pr_err("CM-X300: failed to request bt reset gpio: %d\n", err); | |
796 | } else { | |
797 | gpio_direction_output(bt_reset, 1); | |
798 | udelay(10); | |
799 | gpio_set_value(bt_reset, 0); | |
800 | udelay(10); | |
801 | gpio_set_value(bt_reset, 1); | |
802 | gpio_free(bt_reset); | |
803 | } | |
804 | } | |
805 | ||
806 | /* MFP */ | |
55052ea2 | 807 | static void __init cm_x300_init_mfp(void) |
cf75d8d2 MR |
808 | { |
809 | /* board-processor specific GPIO initialization */ | |
def8252d | 810 | pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x3xx_mfp_cfg)); |
cf75d8d2 | 811 | |
55052ea2 | 812 | if (system_rev < 130) |
def8252d | 813 | pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x3xx_rev_lt130_mfp_cfg)); |
55052ea2 | 814 | else |
def8252d IG |
815 | pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x3xx_rev_ge130_mfp_cfg)); |
816 | ||
817 | if (cpu_is_pxa310()) | |
818 | pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x310_mfp_cfg)); | |
55052ea2 IG |
819 | } |
820 | ||
821 | static void __init cm_x300_init(void) | |
822 | { | |
823 | cm_x300_init_mfp(); | |
824 | ||
cc155c6f RK |
825 | pxa_set_btuart_info(NULL); |
826 | pxa_set_stuart_info(NULL); | |
a6cd7eb3 IG |
827 | if (cpu_is_pxa300()) |
828 | pxa_set_ffuart_info(NULL); | |
cc155c6f | 829 | |
9c017ca1 | 830 | cm_x300_init_da9030(); |
cf75d8d2 MR |
831 | cm_x300_init_dm9000(); |
832 | cm_x300_init_lcd(); | |
1b43d8ed | 833 | cm_x300_init_u2d(); |
cf75d8d2 MR |
834 | cm_x300_init_ohci(); |
835 | cm_x300_init_mmc(); | |
836 | cm_x300_init_nand(); | |
837 | cm_x300_init_leds(); | |
838 | cm_x300_init_i2c(); | |
83e560ee | 839 | cm_x300_init_spi(); |
1858ced3 | 840 | cm_x300_init_rtc(); |
74e74def | 841 | cm_x300_init_ac97(); |
b3d01da6 | 842 | cm_x300_init_wi2wi(); |
db205463 | 843 | cm_x300_init_bl(); |
cf75d8d2 MR |
844 | } |
845 | ||
b5a5c474 MR |
846 | static void __init cm_x300_fixup(struct machine_desc *mdesc, struct tag *tags, |
847 | char **cmdline, struct meminfo *mi) | |
848 | { | |
81880975 IG |
849 | /* Make sure that mi->bank[0].start = PHYS_ADDR */ |
850 | for (; tags->hdr.size; tags = tag_next(tags)) | |
851 | if (tags->hdr.tag == ATAG_MEM && | |
852 | tags->u.mem.start == 0x80000000) { | |
853 | tags->u.mem.start = 0xa0000000; | |
854 | break; | |
855 | } | |
b5a5c474 MR |
856 | } |
857 | ||
cf75d8d2 | 858 | MACHINE_START(CM_X300, "CM-X300 module") |
cf75d8d2 | 859 | .boot_params = 0xa0000100, |
851982c1 | 860 | .map_io = pxa3xx_map_io, |
cf75d8d2 MR |
861 | .init_irq = pxa3xx_init_irq, |
862 | .timer = &pxa_timer, | |
863 | .init_machine = cm_x300_init, | |
b5a5c474 | 864 | .fixup = cm_x300_fixup, |
cf75d8d2 | 865 | MACHINE_END |