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1da177e4 LT |
1 | /* |
2 | * Sun3 SCSI stuff by Erik Verbruggen ([email protected]) | |
3 | * | |
4 | * Sun3 DMA additions by Sam Creasey ([email protected]) | |
5 | * | |
6 | * Adapted from mac_scsinew.h: | |
7 | */ | |
8 | /* | |
9 | * Cumana Generic NCR5380 driver defines | |
10 | * | |
11 | * Copyright 1993, Drew Eckhardt | |
12 | * Visionary Computing | |
13 | * (Unix and Linux consulting and custom programming) | |
14 | * [email protected] | |
15 | * +1 (303) 440-4894 | |
16 | * | |
17 | * ALPHA RELEASE 1. | |
18 | * | |
19 | * For more information, please consult | |
20 | * | |
21 | * NCR 5380 Family | |
22 | * SCSI Protocol Controller | |
23 | * Databook | |
24 | * | |
25 | * NCR Microelectronics | |
26 | * 1635 Aeroplaza Drive | |
27 | * Colorado Springs, CO 80916 | |
28 | * 1+ (719) 578-3400 | |
29 | * 1+ (800) 334-5454 | |
30 | */ | |
31 | ||
32 | /* | |
33 | * $Log: cumana_NCR5380.h,v $ | |
34 | */ | |
35 | ||
36 | #ifndef SUN3_NCR5380_H | |
37 | #define SUN3_NCR5380_H | |
38 | ||
39 | #define SUN3SCSI_PUBLIC_RELEASE 1 | |
40 | ||
41 | /* | |
42 | * Int: level 2 autovector | |
43 | * IO: type 1, base 0x00140000, 5 bits phys space: A<4..0> | |
44 | */ | |
45 | #define IRQ_SUN3_SCSI 2 | |
46 | #define IOBASE_SUN3_SCSI 0x00140000 | |
47 | ||
48 | #define IOBASE_SUN3_VMESCSI 0xff200000 | |
49 | ||
50 | static int sun3scsi_abort (Scsi_Cmnd *); | |
51 | static int sun3scsi_detect (Scsi_Host_Template *); | |
52 | static const char *sun3scsi_info (struct Scsi_Host *); | |
53 | static int sun3scsi_bus_reset(Scsi_Cmnd *); | |
54 | static int sun3scsi_queue_command (Scsi_Cmnd *, void (*done)(Scsi_Cmnd *)); | |
55 | static int sun3scsi_release (struct Scsi_Host *); | |
56 | ||
57 | #ifndef CMD_PER_LUN | |
58 | #define CMD_PER_LUN 2 | |
59 | #endif | |
60 | ||
61 | #ifndef CAN_QUEUE | |
62 | #define CAN_QUEUE 16 | |
63 | #endif | |
64 | ||
65 | #ifndef SG_TABLESIZE | |
66 | #define SG_TABLESIZE SG_NONE | |
67 | #endif | |
68 | ||
69 | #ifndef MAX_TAGS | |
70 | #define MAX_TAGS 32 | |
71 | #endif | |
72 | ||
73 | #ifndef USE_TAGGED_QUEUING | |
74 | #define USE_TAGGED_QUEUING 1 | |
75 | #endif | |
76 | ||
77 | #include <scsi/scsicam.h> | |
78 | ||
79 | #ifdef SUN3_SCSI_VME | |
80 | #define SUN3_SCSI_NAME "Sun3 NCR5380 VME SCSI" | |
81 | #else | |
82 | #define SUN3_SCSI_NAME "Sun3 NCR5380 SCSI" | |
83 | #endif | |
84 | ||
85 | #ifndef HOSTS_C | |
86 | ||
87 | #define NCR5380_implementation_fields \ | |
88 | int port, ctrl | |
89 | ||
90 | #define NCR5380_local_declare() \ | |
91 | struct Scsi_Host *_instance | |
92 | ||
93 | #define NCR5380_setup(instance) \ | |
94 | _instance = instance | |
95 | ||
96 | #define NCR5380_read(reg) sun3scsi_read(reg) | |
97 | #define NCR5380_write(reg, value) sun3scsi_write(reg, value) | |
98 | ||
99 | #define NCR5380_intr sun3scsi_intr | |
100 | #define NCR5380_queue_command sun3scsi_queue_command | |
101 | #define NCR5380_bus_reset sun3scsi_bus_reset | |
102 | #define NCR5380_abort sun3scsi_abort | |
103 | #define NCR5380_proc_info sun3scsi_proc_info | |
104 | #define NCR5380_dma_xfer_len(i, cmd, phase) \ | |
105 | sun3scsi_dma_xfer_len(cmd->SCp.this_residual,cmd,((phase) & SR_IO) ? 0 : 1) | |
106 | ||
107 | #define NCR5380_dma_write_setup(instance, data, count) sun3scsi_dma_setup(data, count, 1) | |
108 | #define NCR5380_dma_read_setup(instance, data, count) sun3scsi_dma_setup(data, count, 0) | |
109 | #define NCR5380_dma_residual sun3scsi_dma_residual | |
110 | ||
111 | #define BOARD_NORMAL 0 | |
112 | #define BOARD_NCR53C400 1 | |
113 | ||
114 | /* additional registers - mainly DMA control regs */ | |
115 | /* these start at regbase + 8 -- directly after the NCR regs */ | |
116 | struct sun3_dma_regs { | |
117 | unsigned short dma_addr_hi; /* vme only */ | |
118 | unsigned short dma_addr_lo; /* vme only */ | |
119 | unsigned short dma_count_hi; /* vme only */ | |
120 | unsigned short dma_count_lo; /* vme only */ | |
121 | unsigned short udc_data; /* udc dma data reg (obio only) */ | |
122 | unsigned short udc_addr; /* uda dma addr reg (obio only) */ | |
123 | unsigned short fifo_data; /* fifo data reg, holds extra byte on | |
124 | odd dma reads */ | |
125 | unsigned short fifo_count; | |
126 | unsigned short csr; /* control/status reg */ | |
127 | unsigned short bpack_hi; /* vme only */ | |
128 | unsigned short bpack_lo; /* vme only */ | |
129 | unsigned short ivect; /* vme only */ | |
130 | unsigned short fifo_count_hi; /* vme only */ | |
131 | }; | |
132 | ||
133 | /* ucd chip specific regs - live in dvma space */ | |
134 | struct sun3_udc_regs { | |
135 | unsigned short rsel; /* select regs to load */ | |
136 | unsigned short addr_hi; /* high word of addr */ | |
137 | unsigned short addr_lo; /* low word */ | |
138 | unsigned short count; /* words to be xfer'd */ | |
139 | unsigned short mode_hi; /* high word of channel mode */ | |
140 | unsigned short mode_lo; /* low word of channel mode */ | |
141 | }; | |
142 | ||
143 | /* addresses of the udc registers */ | |
144 | #define UDC_MODE 0x38 | |
145 | #define UDC_CSR 0x2e /* command/status */ | |
146 | #define UDC_CHN_HI 0x26 /* chain high word */ | |
147 | #define UDC_CHN_LO 0x22 /* chain lo word */ | |
148 | #define UDC_CURA_HI 0x1a /* cur reg A high */ | |
149 | #define UDC_CURA_LO 0x0a /* cur reg A low */ | |
150 | #define UDC_CURB_HI 0x12 /* cur reg B high */ | |
151 | #define UDC_CURB_LO 0x02 /* cur reg B low */ | |
152 | #define UDC_MODE_HI 0x56 /* mode reg high */ | |
153 | #define UDC_MODE_LO 0x52 /* mode reg low */ | |
154 | #define UDC_COUNT 0x32 /* words to xfer */ | |
155 | ||
156 | /* some udc commands */ | |
157 | #define UDC_RESET 0 | |
158 | #define UDC_CHN_START 0xa0 /* start chain */ | |
159 | #define UDC_INT_ENABLE 0x32 /* channel 1 int on */ | |
160 | ||
161 | /* udc mode words */ | |
162 | #define UDC_MODE_HIWORD 0x40 | |
163 | #define UDC_MODE_LSEND 0xc2 | |
164 | #define UDC_MODE_LRECV 0xd2 | |
165 | ||
166 | /* udc reg selections */ | |
167 | #define UDC_RSEL_SEND 0x282 | |
168 | #define UDC_RSEL_RECV 0x182 | |
169 | ||
170 | /* bits in csr reg */ | |
171 | #define CSR_DMA_ACTIVE 0x8000 | |
172 | #define CSR_DMA_CONFLICT 0x4000 | |
173 | #define CSR_DMA_BUSERR 0x2000 | |
174 | ||
175 | #define CSR_FIFO_EMPTY 0x400 /* fifo flushed? */ | |
176 | #define CSR_SDB_INT 0x200 /* sbc interrupt pending */ | |
177 | #define CSR_DMA_INT 0x100 /* dma interrupt pending */ | |
178 | ||
179 | #define CSR_LEFT 0xc0 | |
180 | #define CSR_LEFT_3 0xc0 | |
181 | #define CSR_LEFT_2 0x80 | |
182 | #define CSR_LEFT_1 0x40 | |
183 | #define CSR_PACK_ENABLE 0x20 | |
184 | ||
185 | #define CSR_DMA_ENABLE 0x10 | |
186 | ||
187 | #define CSR_SEND 0x8 /* 1 = send 0 = recv */ | |
188 | #define CSR_FIFO 0x2 /* reset fifo */ | |
189 | #define CSR_INTR 0x4 /* interrupt enable */ | |
190 | #define CSR_SCSI 0x1 | |
191 | ||
192 | #define VME_DATA24 0x3d00 | |
193 | ||
194 | // debugging printk's, taken from atari_scsi.h | |
195 | /* Debugging printk definitions: | |
196 | * | |
197 | * ARB -> arbitration | |
198 | * ASEN -> auto-sense | |
199 | * DMA -> DMA | |
200 | * HSH -> PIO handshake | |
201 | * INF -> information transfer | |
202 | * INI -> initialization | |
203 | * INT -> interrupt | |
204 | * LNK -> linked commands | |
205 | * MAIN -> NCR5380_main() control flow | |
206 | * NDAT -> no data-out phase | |
207 | * NWR -> no write commands | |
208 | * PIO -> PIO transfers | |
209 | * PDMA -> pseudo DMA (unused on Atari) | |
210 | * QU -> queues | |
211 | * RSL -> reselections | |
212 | * SEL -> selections | |
213 | * USL -> usleep cpde (unused on Atari) | |
214 | * LBS -> last byte sent (unused on Atari) | |
215 | * RSS -> restarting of selections | |
216 | * EXT -> extended messages | |
217 | * ABRT -> aborting and resetting | |
218 | * TAG -> queue tag handling | |
219 | * MER -> merging of consec. buffers | |
220 | * | |
221 | */ | |
222 | ||
223 | ||
224 | ||
225 | #if NDEBUG & NDEBUG_ARBITRATION | |
226 | #define ARB_PRINTK(format, args...) \ | |
227 | printk(KERN_DEBUG format , ## args) | |
228 | #else | |
229 | #define ARB_PRINTK(format, args...) | |
230 | #endif | |
231 | #if NDEBUG & NDEBUG_AUTOSENSE | |
232 | #define ASEN_PRINTK(format, args...) \ | |
233 | printk(KERN_DEBUG format , ## args) | |
234 | #else | |
235 | #define ASEN_PRINTK(format, args...) | |
236 | #endif | |
237 | #if NDEBUG & NDEBUG_DMA | |
238 | #define DMA_PRINTK(format, args...) \ | |
239 | printk(KERN_DEBUG format , ## args) | |
240 | #else | |
241 | #define DMA_PRINTK(format, args...) | |
242 | #endif | |
243 | #if NDEBUG & NDEBUG_HANDSHAKE | |
244 | #define HSH_PRINTK(format, args...) \ | |
245 | printk(KERN_DEBUG format , ## args) | |
246 | #else | |
247 | #define HSH_PRINTK(format, args...) | |
248 | #endif | |
249 | #if NDEBUG & NDEBUG_INFORMATION | |
250 | #define INF_PRINTK(format, args...) \ | |
251 | printk(KERN_DEBUG format , ## args) | |
252 | #else | |
253 | #define INF_PRINTK(format, args...) | |
254 | #endif | |
255 | #if NDEBUG & NDEBUG_INIT | |
256 | #define INI_PRINTK(format, args...) \ | |
257 | printk(KERN_DEBUG format , ## args) | |
258 | #else | |
259 | #define INI_PRINTK(format, args...) | |
260 | #endif | |
261 | #if NDEBUG & NDEBUG_INTR | |
262 | #define INT_PRINTK(format, args...) \ | |
263 | printk(KERN_DEBUG format , ## args) | |
264 | #else | |
265 | #define INT_PRINTK(format, args...) | |
266 | #endif | |
267 | #if NDEBUG & NDEBUG_LINKED | |
268 | #define LNK_PRINTK(format, args...) \ | |
269 | printk(KERN_DEBUG format , ## args) | |
270 | #else | |
271 | #define LNK_PRINTK(format, args...) | |
272 | #endif | |
273 | #if NDEBUG & NDEBUG_MAIN | |
274 | #define MAIN_PRINTK(format, args...) \ | |
275 | printk(KERN_DEBUG format , ## args) | |
276 | #else | |
277 | #define MAIN_PRINTK(format, args...) | |
278 | #endif | |
279 | #if NDEBUG & NDEBUG_NO_DATAOUT | |
280 | #define NDAT_PRINTK(format, args...) \ | |
281 | printk(KERN_DEBUG format , ## args) | |
282 | #else | |
283 | #define NDAT_PRINTK(format, args...) | |
284 | #endif | |
285 | #if NDEBUG & NDEBUG_NO_WRITE | |
286 | #define NWR_PRINTK(format, args...) \ | |
287 | printk(KERN_DEBUG format , ## args) | |
288 | #else | |
289 | #define NWR_PRINTK(format, args...) | |
290 | #endif | |
291 | #if NDEBUG & NDEBUG_PIO | |
292 | #define PIO_PRINTK(format, args...) \ | |
293 | printk(KERN_DEBUG format , ## args) | |
294 | #else | |
295 | #define PIO_PRINTK(format, args...) | |
296 | #endif | |
297 | #if NDEBUG & NDEBUG_PSEUDO_DMA | |
298 | #define PDMA_PRINTK(format, args...) \ | |
299 | printk(KERN_DEBUG format , ## args) | |
300 | #else | |
301 | #define PDMA_PRINTK(format, args...) | |
302 | #endif | |
303 | #if NDEBUG & NDEBUG_QUEUES | |
304 | #define QU_PRINTK(format, args...) \ | |
305 | printk(KERN_DEBUG format , ## args) | |
306 | #else | |
307 | #define QU_PRINTK(format, args...) | |
308 | #endif | |
309 | #if NDEBUG & NDEBUG_RESELECTION | |
310 | #define RSL_PRINTK(format, args...) \ | |
311 | printk(KERN_DEBUG format , ## args) | |
312 | #else | |
313 | #define RSL_PRINTK(format, args...) | |
314 | #endif | |
315 | #if NDEBUG & NDEBUG_SELECTION | |
316 | #define SEL_PRINTK(format, args...) \ | |
317 | printk(KERN_DEBUG format , ## args) | |
318 | #else | |
319 | #define SEL_PRINTK(format, args...) | |
320 | #endif | |
321 | #if NDEBUG & NDEBUG_USLEEP | |
322 | #define USL_PRINTK(format, args...) \ | |
323 | printk(KERN_DEBUG format , ## args) | |
324 | #else | |
325 | #define USL_PRINTK(format, args...) | |
326 | #endif | |
327 | #if NDEBUG & NDEBUG_LAST_BYTE_SENT | |
328 | #define LBS_PRINTK(format, args...) \ | |
329 | printk(KERN_DEBUG format , ## args) | |
330 | #else | |
331 | #define LBS_PRINTK(format, args...) | |
332 | #endif | |
333 | #if NDEBUG & NDEBUG_RESTART_SELECT | |
334 | #define RSS_PRINTK(format, args...) \ | |
335 | printk(KERN_DEBUG format , ## args) | |
336 | #else | |
337 | #define RSS_PRINTK(format, args...) | |
338 | #endif | |
339 | #if NDEBUG & NDEBUG_EXTENDED | |
340 | #define EXT_PRINTK(format, args...) \ | |
341 | printk(KERN_DEBUG format , ## args) | |
342 | #else | |
343 | #define EXT_PRINTK(format, args...) | |
344 | #endif | |
345 | #if NDEBUG & NDEBUG_ABORT | |
346 | #define ABRT_PRINTK(format, args...) \ | |
347 | printk(KERN_DEBUG format , ## args) | |
348 | #else | |
349 | #define ABRT_PRINTK(format, args...) | |
350 | #endif | |
351 | #if NDEBUG & NDEBUG_TAGS | |
352 | #define TAG_PRINTK(format, args...) \ | |
353 | printk(KERN_DEBUG format , ## args) | |
354 | #else | |
355 | #define TAG_PRINTK(format, args...) | |
356 | #endif | |
357 | #if NDEBUG & NDEBUG_MERGING | |
358 | #define MER_PRINTK(format, args...) \ | |
359 | printk(KERN_DEBUG format , ## args) | |
360 | #else | |
361 | #define MER_PRINTK(format, args...) | |
362 | #endif | |
363 | ||
364 | /* conditional macros for NCR5380_print_{,phase,status} */ | |
365 | ||
366 | #define NCR_PRINT(mask) \ | |
367 | ((NDEBUG & (mask)) ? NCR5380_print(instance) : (void)0) | |
368 | ||
369 | #define NCR_PRINT_PHASE(mask) \ | |
370 | ((NDEBUG & (mask)) ? NCR5380_print_phase(instance) : (void)0) | |
371 | ||
372 | #define NCR_PRINT_STATUS(mask) \ | |
373 | ((NDEBUG & (mask)) ? NCR5380_print_status(instance) : (void)0) | |
374 | ||
375 | ||
376 | ||
377 | #endif /* ndef HOSTS_C */ | |
378 | #endif /* SUN3_NCR5380_H */ | |
379 |