[linux.git] / include / linux / hpet.h

#ifndef	__HPET__
#define	__HPET__ 1

#include <linux/compiler.h>

#ifdef __KERNEL__

/*
 * Offsets into HPET Registers
 */

struct hpet {
	u64 hpet_cap;		/* capabilities */
	u64 res0;		/* reserved */
	u64 hpet_config;	/* configuration */
	u64 res1;		/* reserved */
	u64 hpet_isr;		/* interrupt status reg */
	u64 res2[25];		/* reserved */
	union {			/* main counter */
		u64 _hpet_mc64;
		u32 _hpet_mc32;
		unsigned long _hpet_mc;
	} _u0;
	u64 res3;		/* reserved */
	struct hpet_timer {
		u64 hpet_config;	/* configuration/cap */
		union {		/* timer compare register */
			u64 _hpet_hc64;
			u32 _hpet_hc32;
			unsigned long _hpet_compare;
		} _u1;
		u64 hpet_fsb[2];	/* FSB route */
	} hpet_timers[1];
};

#define	hpet_mc		_u0._hpet_mc
#define	hpet_compare	_u1._hpet_compare

#define	HPET_MAX_TIMERS	(32)
#define	HPET_MAX_IRQ	(32)

/*
 * HPET general capabilities register
 */

#define	HPET_COUNTER_CLK_PERIOD_MASK	(0xffffffff00000000ULL)
#define	HPET_COUNTER_CLK_PERIOD_SHIFT	(32UL)
#define	HPET_VENDOR_ID_MASK		(0x00000000ffff0000ULL)
#define	HPET_VENDOR_ID_SHIFT		(16ULL)
#define	HPET_LEG_RT_CAP_MASK		(0x8000)
#define	HPET_COUNTER_SIZE_MASK		(0x2000)
#define	HPET_NUM_TIM_CAP_MASK		(0x1f00)
#define	HPET_NUM_TIM_CAP_SHIFT		(8ULL)

/*
 * HPET general configuration register
 */

#define	HPET_LEG_RT_CNF_MASK		(2UL)
#define	HPET_ENABLE_CNF_MASK		(1UL)


/*
 * Timer configuration register
 */

#define	Tn_INT_ROUTE_CAP_MASK		(0xffffffff00000000ULL)
#define	Tn_INT_ROUTE_CAP_SHIFT		(32UL)
#define	Tn_FSB_INT_DELCAP_MASK		(0x8000UL)
#define	Tn_FSB_INT_DELCAP_SHIFT		(15)
#define	Tn_FSB_EN_CNF_MASK		(0x4000UL)
#define	Tn_FSB_EN_CNF_SHIFT		(14)
#define	Tn_INT_ROUTE_CNF_MASK		(0x3e00UL)
#define	Tn_INT_ROUTE_CNF_SHIFT		(9)
#define	Tn_32MODE_CNF_MASK		(0x0100UL)
#define	Tn_VAL_SET_CNF_MASK		(0x0040UL)
#define	Tn_SIZE_CAP_MASK		(0x0020UL)
#define	Tn_PER_INT_CAP_MASK		(0x0010UL)
#define	Tn_TYPE_CNF_MASK		(0x0008UL)
#define	Tn_INT_ENB_CNF_MASK		(0x0004UL)
#define	Tn_INT_TYPE_CNF_MASK		(0x0002UL)

/*
 * Timer FSB Interrupt Route Register
 */

#define	Tn_FSB_INT_ADDR_MASK		(0xffffffff00000000ULL)
#define	Tn_FSB_INT_ADDR_SHIFT		(32UL)
#define	Tn_FSB_INT_VAL_MASK		(0x00000000ffffffffULL)

/*
 * exported interfaces
 */

struct hpet_data {
	unsigned long hd_phys_address;
	void __iomem *hd_address;
	unsigned short hd_nirqs;
	unsigned int hd_state;	/* timer allocated */
	unsigned int hd_irq[HPET_MAX_TIMERS];
};

static inline void hpet_reserve_timer(struct hpet_data *hd, int timer)
{
	hd->hd_state |= (1 << timer);
	return;
}

int hpet_alloc(struct hpet_data *);

#endif /* __KERNEL__ */

struct hpet_info {
	unsigned long hi_ireqfreq;	/* Hz */
	unsigned long hi_flags;	/* information */
	unsigned short hi_hpet;
	unsigned short hi_timer;
};

#define HPET_INFO_PERIODIC	0x0010	/* periodic-capable comparator */

#define	HPET_IE_ON	_IO('h', 0x01)	/* interrupt on */
#define	HPET_IE_OFF	_IO('h', 0x02)	/* interrupt off */
#define	HPET_INFO	_IOR('h', 0x03, struct hpet_info)
#define	HPET_EPI	_IO('h', 0x04)	/* enable periodic */
#define	HPET_DPI	_IO('h', 0x05)	/* disable periodic */
#define	HPET_IRQFREQ	_IOW('h', 0x6, unsigned long)	/* IRQFREQ usec */

#define MAX_HPET_TBS	8		/* maximum hpet timer blocks */

#endif				/* !__HPET__ */
Commit	Line	Data
1da177e4 LT	1	#ifndef __HPET__
	2	#define __HPET__ 1
	3
	4	#include <linux/compiler.h>
	5
878a9f30 RD	6	#ifdef __KERNEL__
878a9f30 RD	7
1da177e4 LT	8	/*
	9	* Offsets into HPET Registers
	10	*/
	11
	12	struct hpet {
	13	u64 hpet_cap; /* capabilities */
	14	u64 res0; /* reserved */
	15	u64 hpet_config; /* configuration */
	16	u64 res1; /* reserved */
	17	u64 hpet_isr; /* interrupt status reg */
	18	u64 res2[25]; /* reserved */
	19	union { /* main counter */
	20	u64 _hpet_mc64;
	21	u32 _hpet_mc32;
	22	unsigned long _hpet_mc;
	23	} _u0;
	24	u64 res3; /* reserved */
	25	struct hpet_timer {
	26	u64 hpet_config; /* configuration/cap */
	27	union { /* timer compare register */
	28	u64 _hpet_hc64;
	29	u32 _hpet_hc32;
	30	unsigned long _hpet_compare;
	31	} _u1;
	32	u64 hpet_fsb[2]; /* FSB route */
	33	} hpet_timers[1];
	34	};
	35
	36	#define hpet_mc _u0._hpet_mc
	37	#define hpet_compare _u1._hpet_compare
	38
	39	#define HPET_MAX_TIMERS (32)
70ef6d59	40	#define HPET_MAX_IRQ (32)
1da177e4 LT	41
	42	/*
	43	* HPET general capabilities register
	44	*/
	45
	46	#define HPET_COUNTER_CLK_PERIOD_MASK (0xffffffff00000000ULL)
	47	#define HPET_COUNTER_CLK_PERIOD_SHIFT (32UL)
	48	#define HPET_VENDOR_ID_MASK (0x00000000ffff0000ULL)
	49	#define HPET_VENDOR_ID_SHIFT (16ULL)
	50	#define HPET_LEG_RT_CAP_MASK (0x8000)
	51	#define HPET_COUNTER_SIZE_MASK (0x2000)
	52	#define HPET_NUM_TIM_CAP_MASK (0x1f00)
	53	#define HPET_NUM_TIM_CAP_SHIFT (8ULL)
	54
	55	/*
	56	* HPET general configuration register
	57	*/
	58
	59	#define HPET_LEG_RT_CNF_MASK (2UL)
	60	#define HPET_ENABLE_CNF_MASK (1UL)
	61
	62
	63	/*
	64	* Timer configuration register
	65	*/
	66
	67	#define Tn_INT_ROUTE_CAP_MASK (0xffffffff00000000ULL)
70ef6d59	68	#define Tn_INT_ROUTE_CAP_SHIFT (32UL)
1da177e4 LT	69	#define Tn_FSB_INT_DELCAP_MASK (0x8000UL)
	70	#define Tn_FSB_INT_DELCAP_SHIFT (15)
	71	#define Tn_FSB_EN_CNF_MASK (0x4000UL)
	72	#define Tn_FSB_EN_CNF_SHIFT (14)
	73	#define Tn_INT_ROUTE_CNF_MASK (0x3e00UL)
	74	#define Tn_INT_ROUTE_CNF_SHIFT (9)
	75	#define Tn_32MODE_CNF_MASK (0x0100UL)
	76	#define Tn_VAL_SET_CNF_MASK (0x0040UL)
	77	#define Tn_SIZE_CAP_MASK (0x0020UL)
	78	#define Tn_PER_INT_CAP_MASK (0x0010UL)
	79	#define Tn_TYPE_CNF_MASK (0x0008UL)
	80	#define Tn_INT_ENB_CNF_MASK (0x0004UL)
	81	#define Tn_INT_TYPE_CNF_MASK (0x0002UL)
	82
	83	/*
	84	* Timer FSB Interrupt Route Register
	85	*/
	86
	87	#define Tn_FSB_INT_ADDR_MASK (0xffffffff00000000ULL)
	88	#define Tn_FSB_INT_ADDR_SHIFT (32UL)
	89	#define Tn_FSB_INT_VAL_MASK (0x00000000ffffffffULL)
	90
1da177e4 LT	91	/*
	92	* exported interfaces
	93	*/
	94
1da177e4 LT	95	struct hpet_data {
	96	unsigned long hd_phys_address;
	97	void __iomem *hd_address;
	98	unsigned short hd_nirqs;
1da177e4 LT	99	unsigned int hd_state; /* timer allocated */
	100	unsigned int hd_irq[HPET_MAX_TIMERS];
	101	};
	102
1da177e4 LT	103	static inline void hpet_reserve_timer(struct hpet_data *hd, int timer)
	104	{
	105	hd->hd_state \|= (1 << timer);
	106	return;
	107	}
	108
	109	int hpet_alloc(struct hpet_data *);
1da177e4	110
878a9f30 RD	111	#endif /* __KERNEL__ */
	112
	113	struct hpet_info {
	114	unsigned long hi_ireqfreq; /* Hz */
	115	unsigned long hi_flags; /* information */
	116	unsigned short hi_hpet;
	117	unsigned short hi_timer;
	118	};
	119
64a76f66	120	#define HPET_INFO_PERIODIC 0x0010 /* periodic-capable comparator */
878a9f30 RD	121
	122	#define HPET_IE_ON _IO('h', 0x01) /* interrupt on */
	123	#define HPET_IE_OFF _IO('h', 0x02) /* interrupt off */
	124	#define HPET_INFO _IOR('h', 0x03, struct hpet_info)
	125	#define HPET_EPI _IO('h', 0x04) /* enable periodic */
	126	#define HPET_DPI _IO('h', 0x05) /* disable periodic */
	127	#define HPET_IRQFREQ _IOW('h', 0x6, unsigned long) /* IRQFREQ usec */
	128
20f3097b SS	129	#define MAX_HPET_TBS 8 /* maximum hpet timer blocks */
20f3097b SS	130
1da177e4	131	#endif /* !__HPET__ */