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1 | /* |
2 | * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms of the GNU General Public License as published by the Free | |
6 | * Software Foundation; either version 2 of the License, or (at your option) | |
7 | * any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License along with | |
15 | * this program; if not, write to the Free Software Foundation, Inc., 59 | |
16 | * Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
17 | * | |
18 | * The full GNU General Public License is included in this distribution in the | |
19 | * file called COPYING. | |
20 | */ | |
21 | #ifndef IOATDMA_IO_H | |
22 | #define IOATDMA_IO_H | |
23 | ||
24 | #include <asm/io.h> | |
25 | ||
26 | /* | |
27 | * device and per-channel MMIO register read and write functions | |
28 | * this is a lot of anoying inline functions, but it's typesafe | |
29 | */ | |
30 | ||
31 | static inline u8 ioatdma_read8(struct ioat_device *device, | |
32 | unsigned int offset) | |
33 | { | |
34 | return readb(device->reg_base + offset); | |
35 | } | |
36 | ||
37 | static inline u16 ioatdma_read16(struct ioat_device *device, | |
38 | unsigned int offset) | |
39 | { | |
40 | return readw(device->reg_base + offset); | |
41 | } | |
42 | ||
43 | static inline u32 ioatdma_read32(struct ioat_device *device, | |
44 | unsigned int offset) | |
45 | { | |
46 | return readl(device->reg_base + offset); | |
47 | } | |
48 | ||
49 | static inline void ioatdma_write8(struct ioat_device *device, | |
50 | unsigned int offset, u8 value) | |
51 | { | |
52 | writeb(value, device->reg_base + offset); | |
53 | } | |
54 | ||
55 | static inline void ioatdma_write16(struct ioat_device *device, | |
56 | unsigned int offset, u16 value) | |
57 | { | |
58 | writew(value, device->reg_base + offset); | |
59 | } | |
60 | ||
61 | static inline void ioatdma_write32(struct ioat_device *device, | |
62 | unsigned int offset, u32 value) | |
63 | { | |
64 | writel(value, device->reg_base + offset); | |
65 | } | |
66 | ||
67 | static inline u8 ioatdma_chan_read8(struct ioat_dma_chan *chan, | |
68 | unsigned int offset) | |
69 | { | |
70 | return readb(chan->reg_base + offset); | |
71 | } | |
72 | ||
73 | static inline u16 ioatdma_chan_read16(struct ioat_dma_chan *chan, | |
74 | unsigned int offset) | |
75 | { | |
76 | return readw(chan->reg_base + offset); | |
77 | } | |
78 | ||
79 | static inline u32 ioatdma_chan_read32(struct ioat_dma_chan *chan, | |
80 | unsigned int offset) | |
81 | { | |
82 | return readl(chan->reg_base + offset); | |
83 | } | |
84 | ||
85 | static inline void ioatdma_chan_write8(struct ioat_dma_chan *chan, | |
86 | unsigned int offset, u8 value) | |
87 | { | |
88 | writeb(value, chan->reg_base + offset); | |
89 | } | |
90 | ||
91 | static inline void ioatdma_chan_write16(struct ioat_dma_chan *chan, | |
92 | unsigned int offset, u16 value) | |
93 | { | |
94 | writew(value, chan->reg_base + offset); | |
95 | } | |
96 | ||
97 | static inline void ioatdma_chan_write32(struct ioat_dma_chan *chan, | |
98 | unsigned int offset, u32 value) | |
99 | { | |
100 | writel(value, chan->reg_base + offset); | |
101 | } | |
102 | ||
103 | #if (BITS_PER_LONG == 64) | |
104 | static inline u64 ioatdma_chan_read64(struct ioat_dma_chan *chan, | |
105 | unsigned int offset) | |
106 | { | |
107 | return readq(chan->reg_base + offset); | |
108 | } | |
109 | ||
110 | static inline void ioatdma_chan_write64(struct ioat_dma_chan *chan, | |
111 | unsigned int offset, u64 value) | |
112 | { | |
113 | writeq(value, chan->reg_base + offset); | |
114 | } | |
115 | #endif | |
116 | ||
117 | #endif /* IOATDMA_IO_H */ | |
118 |