[linux.git] / drivers / bus / ts-nbus.c

/*
 * NBUS driver for TS-4600 based boards
 *
 * Copyright (c) 2016 - Savoir-faire Linux
 * Author: Sebastien Bourdelin <[email protected]>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2. This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 *
 * This driver implements a GPIOs bit-banged bus, called the NBUS by Technologic
 * Systems. It is used to communicate with the peripherals in the FPGA on the
 * TS-4600 SoM.
 */

#include <linux/bitops.h>
#include <linux/gpio/consumer.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/of_platform.h>
#include <linux/platform_device.h>
#include <linux/pwm.h>
#include <linux/ts-nbus.h>

#define TS_NBUS_DIRECTION_IN  0
#define TS_NBUS_DIRECTION_OUT 1
#define TS_NBUS_WRITE_ADR 0
#define TS_NBUS_WRITE_VAL 1

struct ts_nbus {
	struct pwm_device *pwm;
	struct gpio_descs *data;
	struct gpio_desc *csn;
	struct gpio_desc *txrx;
	struct gpio_desc *strobe;
	struct gpio_desc *ale;
	struct gpio_desc *rdy;
	struct mutex lock;
};

/*
 * request all gpios required by the bus.
 */
static int ts_nbus_init_pdata(struct platform_device *pdev, struct ts_nbus
		*ts_nbus)
{
	ts_nbus->data = devm_gpiod_get_array(&pdev->dev, "ts,data",
			GPIOD_OUT_HIGH);
	if (IS_ERR(ts_nbus->data)) {
		dev_err(&pdev->dev, "failed to retrieve ts,data-gpio from dts\n");
		return PTR_ERR(ts_nbus->data);
	}

	ts_nbus->csn = devm_gpiod_get(&pdev->dev, "ts,csn", GPIOD_OUT_HIGH);
	if (IS_ERR(ts_nbus->csn)) {
		dev_err(&pdev->dev, "failed to retrieve ts,csn-gpio from dts\n");
		return PTR_ERR(ts_nbus->csn);
	}

	ts_nbus->txrx = devm_gpiod_get(&pdev->dev, "ts,txrx", GPIOD_OUT_HIGH);
	if (IS_ERR(ts_nbus->txrx)) {
		dev_err(&pdev->dev, "failed to retrieve ts,txrx-gpio from dts\n");
		return PTR_ERR(ts_nbus->txrx);
	}

	ts_nbus->strobe = devm_gpiod_get(&pdev->dev, "ts,strobe", GPIOD_OUT_HIGH);
	if (IS_ERR(ts_nbus->strobe)) {
		dev_err(&pdev->dev, "failed to retrieve ts,strobe-gpio from dts\n");
		return PTR_ERR(ts_nbus->strobe);
	}

	ts_nbus->ale = devm_gpiod_get(&pdev->dev, "ts,ale", GPIOD_OUT_HIGH);
	if (IS_ERR(ts_nbus->ale)) {
		dev_err(&pdev->dev, "failed to retrieve ts,ale-gpio from dts\n");
		return PTR_ERR(ts_nbus->ale);
	}

	ts_nbus->rdy = devm_gpiod_get(&pdev->dev, "ts,rdy", GPIOD_IN);
	if (IS_ERR(ts_nbus->rdy)) {
		dev_err(&pdev->dev, "failed to retrieve ts,rdy-gpio from dts\n");
		return PTR_ERR(ts_nbus->rdy);
	}

	return 0;
}

/*
 * the data gpios are used for reading and writing values, their directions
 * should be adjusted accordingly.
 */
static void ts_nbus_set_direction(struct ts_nbus *ts_nbus, int direction)
{
	int i;

	for (i = 0; i < 8; i++) {
		if (direction == TS_NBUS_DIRECTION_IN)
			gpiod_direction_input(ts_nbus->data->desc[i]);
		else
			/* when used as output the default state of the data
			 * lines are set to high */
			gpiod_direction_output(ts_nbus->data->desc[i], 1);
	}
}

/*
 * reset the bus in its initial state.
 * The data, csn, strobe and ale lines must be zero'ed to let the FPGA knows a
 * new transaction can be process.
 */
static void ts_nbus_reset_bus(struct ts_nbus *ts_nbus)
{
	int i;
	int values[8];

	for (i = 0; i < 8; i++)
		values[i] = 0;

	gpiod_set_array_value_cansleep(8, ts_nbus->data->desc, values);
	gpiod_set_value_cansleep(ts_nbus->csn, 0);
	gpiod_set_value_cansleep(ts_nbus->strobe, 0);
	gpiod_set_value_cansleep(ts_nbus->ale, 0);
}

/*
 * let the FPGA knows it can process.
 */
static void ts_nbus_start_transaction(struct ts_nbus *ts_nbus)
{
	gpiod_set_value_cansleep(ts_nbus->strobe, 1);
}

/*
 * read a byte value from the data gpios.
 * return 0 on success or negative errno on failure.
 */
static int ts_nbus_read_byte(struct ts_nbus *ts_nbus, u8 *val)
{
	struct gpio_descs *gpios = ts_nbus->data;
	int ret, i;

	*val = 0;
	for (i = 0; i < 8; i++) {
		ret = gpiod_get_value_cansleep(gpios->desc[i]);
		if (ret < 0)
			return ret;
		if (ret)
			*val |= BIT(i);
	}

	return 0;
}

/*
 * set the data gpios accordingly to the byte value.
 */
static void ts_nbus_write_byte(struct ts_nbus *ts_nbus, u8 byte)
{
	struct gpio_descs *gpios = ts_nbus->data;
	int i;
	int values[8];

	for (i = 0; i < 8; i++)
		if (byte & BIT(i))
			values[i] = 1;
		else
			values[i] = 0;

	gpiod_set_array_value_cansleep(8, gpios->desc, values);
}

/*
 * reading the bus consists of resetting the bus, then notifying the FPGA to
 * send the data in the data gpios and return the read value.
 * return 0 on success or negative errno on failure.
 */
static int ts_nbus_read_bus(struct ts_nbus *ts_nbus, u8 *val)
{
	ts_nbus_reset_bus(ts_nbus);
	ts_nbus_start_transaction(ts_nbus);

	return ts_nbus_read_byte(ts_nbus, val);
}

/*
 * writing to the bus consists of resetting the bus, then define the type of
 * command (address/value), write the data and notify the FPGA to retrieve the
 * value in the data gpios.
 */
static void ts_nbus_write_bus(struct ts_nbus *ts_nbus, int cmd, u8 val)
{
	ts_nbus_reset_bus(ts_nbus);

	if (cmd == TS_NBUS_WRITE_ADR)
		gpiod_set_value_cansleep(ts_nbus->ale, 1);

	ts_nbus_write_byte(ts_nbus, val);
	ts_nbus_start_transaction(ts_nbus);
}

/*
 * read the value in the FPGA register at the given address.
 * return 0 on success or negative errno on failure.
 */
int ts_nbus_read(struct ts_nbus *ts_nbus, u8 adr, u16 *val)
{
	int ret, i;
	u8 byte;

	/* bus access must be atomic */
	mutex_lock(&ts_nbus->lock);

	/* set the bus in read mode */
	gpiod_set_value_cansleep(ts_nbus->txrx, 0);

	/* write address */
	ts_nbus_write_bus(ts_nbus, TS_NBUS_WRITE_ADR, adr);

	/* set the data gpios direction as input before reading */
	ts_nbus_set_direction(ts_nbus, TS_NBUS_DIRECTION_IN);

	/* reading value MSB first */
	do {
		*val = 0;
		byte = 0;
		for (i = 1; i >= 0; i--) {
			/* read a byte from the bus, leave on error */
			ret = ts_nbus_read_bus(ts_nbus, &byte);
			if (ret < 0)
				goto err;

			/* append the byte read to the final value */
			*val |= byte << (i * 8);
		}
		gpiod_set_value_cansleep(ts_nbus->csn, 1);
		ret = gpiod_get_value_cansleep(ts_nbus->rdy);
	} while (ret);

err:
	/* restore the data gpios direction as output after reading */
	ts_nbus_set_direction(ts_nbus, TS_NBUS_DIRECTION_OUT);

	mutex_unlock(&ts_nbus->lock);

	return ret;
}
EXPORT_SYMBOL_GPL(ts_nbus_read);

/*
 * write the desired value in the FPGA register at the given address.
 */
int ts_nbus_write(struct ts_nbus *ts_nbus, u8 adr, u16 val)
{
	int i;

	/* bus access must be atomic */
	mutex_lock(&ts_nbus->lock);

	/* set the bus in write mode */
	gpiod_set_value_cansleep(ts_nbus->txrx, 1);

	/* write address */
	ts_nbus_write_bus(ts_nbus, TS_NBUS_WRITE_ADR, adr);

	/* writing value MSB first */
	for (i = 1; i >= 0; i--)
		ts_nbus_write_bus(ts_nbus, TS_NBUS_WRITE_VAL, (u8)(val >> (i * 8)));

	/* wait for completion */
	gpiod_set_value_cansleep(ts_nbus->csn, 1);
	while (gpiod_get_value_cansleep(ts_nbus->rdy) != 0) {
		gpiod_set_value_cansleep(ts_nbus->csn, 0);
		gpiod_set_value_cansleep(ts_nbus->csn, 1);
	}

	mutex_unlock(&ts_nbus->lock);

	return 0;
}
EXPORT_SYMBOL_GPL(ts_nbus_write);

static int ts_nbus_probe(struct platform_device *pdev)
{
	struct pwm_device *pwm;
	struct pwm_args pargs;
	struct device *dev = &pdev->dev;
	struct ts_nbus *ts_nbus;
	int ret;

	ts_nbus = devm_kzalloc(dev, sizeof(*ts_nbus), GFP_KERNEL);
	if (!ts_nbus)
		return -ENOMEM;

	mutex_init(&ts_nbus->lock);

	ret = ts_nbus_init_pdata(pdev, ts_nbus);
	if (ret < 0)
		return ret;

	pwm = devm_pwm_get(dev, NULL);
	if (IS_ERR(pwm)) {
		ret = PTR_ERR(pwm);
		if (ret != -EPROBE_DEFER)
			dev_err(dev, "unable to request PWM\n");
		return ret;
	}

	pwm_get_args(pwm, &pargs);
	if (!pargs.period) {
		dev_err(&pdev->dev, "invalid PWM period\n");
		return -EINVAL;
	}

	/*
	 * FIXME: pwm_apply_args() should be removed when switching to
	 * the atomic PWM API.
	 */
	pwm_apply_args(pwm);
	ret = pwm_config(pwm, pargs.period, pargs.period);
	if (ret < 0)
		return ret;

	/*
	 * we can now start the FPGA and populate the peripherals.
	 */
	pwm_enable(pwm);
	ts_nbus->pwm = pwm;

	/*
	 * let the child nodes retrieve this instance of the ts-nbus.
	 */
	dev_set_drvdata(dev, ts_nbus);

	ret = of_platform_populate(dev->of_node, NULL, NULL, dev);
	if (ret < 0)
		return ret;

	dev_info(dev, "initialized\n");

	return 0;
}

static int ts_nbus_remove(struct platform_device *pdev)
{
	struct ts_nbus *ts_nbus = dev_get_drvdata(&pdev->dev);

	/* shutdown the FPGA */
	mutex_lock(&ts_nbus->lock);
	pwm_disable(ts_nbus->pwm);
	mutex_unlock(&ts_nbus->lock);

	return 0;
}

static const struct of_device_id ts_nbus_of_match[] = {
	{ .compatible = "technologic,ts-nbus", },
	{ },
};
MODULE_DEVICE_TABLE(of, ts_nbus_of_match);

static struct platform_driver ts_nbus_driver = {
	.probe		= ts_nbus_probe,
	.remove		= ts_nbus_remove,
	.driver		= {
		.name	= "ts_nbus",
		.of_match_table = ts_nbus_of_match,
	},
};

module_platform_driver(ts_nbus_driver);

MODULE_ALIAS("platform:ts_nbus");
MODULE_AUTHOR("Sebastien Bourdelin <[email protected]>");
MODULE_DESCRIPTION("Technologic Systems NBUS");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
5b143d2a SB	1	/*
	2	* NBUS driver for TS-4600 based boards
	3	*
	4	* Copyright (c) 2016 - Savoir-faire Linux
	5	* Author: Sebastien Bourdelin <[email protected]>
	6	*
	7	* This file is licensed under the terms of the GNU General Public
	8	* License version 2. This program is licensed "as is" without any
	9	* warranty of any kind, whether express or implied.
	10	*
	11	* This driver implements a GPIOs bit-banged bus, called the NBUS by Technologic
	12	* Systems. It is used to communicate with the peripherals in the FPGA on the
	13	* TS-4600 SoM.
	14	*/
	15
	16	#include <linux/bitops.h>
	17	#include <linux/gpio/consumer.h>
	18	#include <linux/kernel.h>
	19	#include <linux/module.h>
	20	#include <linux/mutex.h>
	21	#include <linux/of_platform.h>
	22	#include <linux/platform_device.h>
	23	#include <linux/pwm.h>
	24	#include <linux/ts-nbus.h>
	25
	26	#define TS_NBUS_DIRECTION_IN 0
	27	#define TS_NBUS_DIRECTION_OUT 1
	28	#define TS_NBUS_WRITE_ADR 0
	29	#define TS_NBUS_WRITE_VAL 1
	30
	31	struct ts_nbus {
	32	struct pwm_device *pwm;
	33	struct gpio_descs *data;
	34	struct gpio_desc *csn;
	35	struct gpio_desc *txrx;
	36	struct gpio_desc *strobe;
	37	struct gpio_desc *ale;
	38	struct gpio_desc *rdy;
	39	struct mutex lock;
	40	};
	41
	42	/*
	43	* request all gpios required by the bus.
	44	*/
	45	static int ts_nbus_init_pdata(struct platform_device *pdev, struct ts_nbus
	46	*ts_nbus)
	47	{
	48	ts_nbus->data = devm_gpiod_get_array(&pdev->dev, "ts,data",
	49	GPIOD_OUT_HIGH);
	50	if (IS_ERR(ts_nbus->data)) {
	51	dev_err(&pdev->dev, "failed to retrieve ts,data-gpio from dts\n");
	52	return PTR_ERR(ts_nbus->data);
	53	}
	54
	55	ts_nbus->csn = devm_gpiod_get(&pdev->dev, "ts,csn", GPIOD_OUT_HIGH);
	56	if (IS_ERR(ts_nbus->csn)) {
	57	dev_err(&pdev->dev, "failed to retrieve ts,csn-gpio from dts\n");
	58	return PTR_ERR(ts_nbus->csn);
	59	}
	60
	61	ts_nbus->txrx = devm_gpiod_get(&pdev->dev, "ts,txrx", GPIOD_OUT_HIGH);
	62	if (IS_ERR(ts_nbus->txrx)) {
	63	dev_err(&pdev->dev, "failed to retrieve ts,txrx-gpio from dts\n");
	64	return PTR_ERR(ts_nbus->txrx);
65	}
66
67	ts_nbus->strobe = devm_gpiod_get(&pdev->dev, "ts,strobe", GPIOD_OUT_HIGH);
68	if (IS_ERR(ts_nbus->strobe)) {
69	dev_err(&pdev->dev, "failed to retrieve ts,strobe-gpio from dts\n");
70	return PTR_ERR(ts_nbus->strobe);
71	}
72
73	ts_nbus->ale = devm_gpiod_get(&pdev->dev, "ts,ale", GPIOD_OUT_HIGH);
74	if (IS_ERR(ts_nbus->ale)) {
75	dev_err(&pdev->dev, "failed to retrieve ts,ale-gpio from dts\n");
76	return PTR_ERR(ts_nbus->ale);
77	}
78
79	ts_nbus->rdy = devm_gpiod_get(&pdev->dev, "ts,rdy", GPIOD_IN);
80	if (IS_ERR(ts_nbus->rdy)) {
81	dev_err(&pdev->dev, "failed to retrieve ts,rdy-gpio from dts\n");
82	return PTR_ERR(ts_nbus->rdy);
83	}
84
85	return 0;
86	}
87
88	/*
89	* the data gpios are used for reading and writing values, their directions
90	* should be adjusted accordingly.
91	*/
92	static void ts_nbus_set_direction(struct ts_nbus *ts_nbus, int direction)
93	{
94	int i;
95
96	for (i = 0; i < 8; i++) {
97	if (direction == TS_NBUS_DIRECTION_IN)
98	gpiod_direction_input(ts_nbus->data->desc[i]);
99	else
100	/* when used as output the default state of the data
101	* lines are set to high */
102	gpiod_direction_output(ts_nbus->data->desc[i], 1);
103	}
104	}
105
106	/*
107	* reset the bus in its initial state.
108	* The data, csn, strobe and ale lines must be zero'ed to let the FPGA knows a
109	* new transaction can be process.
110	*/
111	static void ts_nbus_reset_bus(struct ts_nbus *ts_nbus)
112	{
113	int i;
114	int values[8];
115
116	for (i = 0; i < 8; i++)
117	values[i] = 0;
118
119	gpiod_set_array_value_cansleep(8, ts_nbus->data->desc, values);
120	gpiod_set_value_cansleep(ts_nbus->csn, 0);
121	gpiod_set_value_cansleep(ts_nbus->strobe, 0);
122	gpiod_set_value_cansleep(ts_nbus->ale, 0);
123	}
124
125	/*
126	* let the FPGA knows it can process.
127	*/
128	static void ts_nbus_start_transaction(struct ts_nbus *ts_nbus)
129	{
130	gpiod_set_value_cansleep(ts_nbus->strobe, 1);
131	}
132
133	/*
134	* read a byte value from the data gpios.
135	* return 0 on success or negative errno on failure.
136	*/
137	static int ts_nbus_read_byte(struct ts_nbus ts_nbus, u8 val)
138	{
139	struct gpio_descs *gpios = ts_nbus->data;
140	int ret, i;
141
142	*val = 0;
143	for (i = 0; i < 8; i++) {
144	ret = gpiod_get_value_cansleep(gpios->desc[i]);
145	if (ret < 0)
146	return ret;
147	if (ret)
148	*val \|= BIT(i);
149	}
150
151	return 0;
152	}
153
154	/*
155	* set the data gpios accordingly to the byte value.
156	*/
157	static void ts_nbus_write_byte(struct ts_nbus *ts_nbus, u8 byte)
158	{
159	struct gpio_descs *gpios = ts_nbus->data;
160	int i;
161	int values[8];
162
163	for (i = 0; i < 8; i++)
164	if (byte & BIT(i))
165	values[i] = 1;
166	else
167	values[i] = 0;
168
169	gpiod_set_array_value_cansleep(8, gpios->desc, values);
170	}
171
172	/*
173	* reading the bus consists of resetting the bus, then notifying the FPGA to
174	* send the data in the data gpios and return the read value.
175	* return 0 on success or negative errno on failure.
176	*/
177	static int ts_nbus_read_bus(struct ts_nbus ts_nbus, u8 val)
178	{
179	ts_nbus_reset_bus(ts_nbus);
180	ts_nbus_start_transaction(ts_nbus);
181
182	return ts_nbus_read_byte(ts_nbus, val);
183	}
184
185	/*
186	* writing to the bus consists of resetting the bus, then define the type of
187	* command (address/value), write the data and notify the FPGA to retrieve the
188	* value in the data gpios.
189	*/
190	static void ts_nbus_write_bus(struct ts_nbus *ts_nbus, int cmd, u8 val)
191	{
192	ts_nbus_reset_bus(ts_nbus);
193
194	if (cmd == TS_NBUS_WRITE_ADR)
195	gpiod_set_value_cansleep(ts_nbus->ale, 1);
196
197	ts_nbus_write_byte(ts_nbus, val);
198	ts_nbus_start_transaction(ts_nbus);
199	}
200
201	/*
202	* read the value in the FPGA register at the given address.
203	* return 0 on success or negative errno on failure.
204	*/
205	int ts_nbus_read(struct ts_nbus ts_nbus, u8 adr, u16 val)
206	{
207	int ret, i;
208	u8 byte;
209
210	/* bus access must be atomic */
211	mutex_lock(&ts_nbus->lock);
212
213	/* set the bus in read mode */
214	gpiod_set_value_cansleep(ts_nbus->txrx, 0);
215
216	/* write address */
217	ts_nbus_write_bus(ts_nbus, TS_NBUS_WRITE_ADR, adr);
218
219	/* set the data gpios direction as input before reading */
220	ts_nbus_set_direction(ts_nbus, TS_NBUS_DIRECTION_IN);
221
222	/* reading value MSB first */
223	do {
224	*val = 0;
225	byte = 0;
226	for (i = 1; i >= 0; i--) {
227	/* read a byte from the bus, leave on error */
228	ret = ts_nbus_read_bus(ts_nbus, &byte);
229	if (ret < 0)
230	goto err;
231
232	/* append the byte read to the final value */
233	val \|= byte << (i 8);
234	}
235	gpiod_set_value_cansleep(ts_nbus->csn, 1);
236	ret = gpiod_get_value_cansleep(ts_nbus->rdy);
237	} while (ret);
238
239	err:
240	/* restore the data gpios direction as output after reading */
241	ts_nbus_set_direction(ts_nbus, TS_NBUS_DIRECTION_OUT);
242
243	mutex_unlock(&ts_nbus->lock);
244
245	return ret;
246	}
247	EXPORT_SYMBOL_GPL(ts_nbus_read);
248
249	/*
250	* write the desired value in the FPGA register at the given address.
251	*/
252	int ts_nbus_write(struct ts_nbus *ts_nbus, u8 adr, u16 val)
253	{
254	int i;
255
256	/* bus access must be atomic */
257	mutex_lock(&ts_nbus->lock);
258
259	/* set the bus in write mode */
260	gpiod_set_value_cansleep(ts_nbus->txrx, 1);
261
262	/* write address */
263	ts_nbus_write_bus(ts_nbus, TS_NBUS_WRITE_ADR, adr);
264
265	/* writing value MSB first */
266	for (i = 1; i >= 0; i--)
267	ts_nbus_write_bus(ts_nbus, TS_NBUS_WRITE_VAL, (u8)(val >> (i * 8)));
268
269	/* wait for completion */
270	gpiod_set_value_cansleep(ts_nbus->csn, 1);
271	while (gpiod_get_value_cansleep(ts_nbus->rdy) != 0) {
272	gpiod_set_value_cansleep(ts_nbus->csn, 0);
273	gpiod_set_value_cansleep(ts_nbus->csn, 1);
274	}
275
276	mutex_unlock(&ts_nbus->lock);
277
278	return 0;
279	}
280	EXPORT_SYMBOL_GPL(ts_nbus_write);
281
282	static int ts_nbus_probe(struct platform_device *pdev)
283	{
284	struct pwm_device *pwm;
285	struct pwm_args pargs;
286	struct device *dev = &pdev->dev;
287	struct ts_nbus *ts_nbus;
288	int ret;
289
290	ts_nbus = devm_kzalloc(dev, sizeof(*ts_nbus), GFP_KERNEL);
291	if (!ts_nbus)
292	return -ENOMEM;
293
294	mutex_init(&ts_nbus->lock);
295
296	ret = ts_nbus_init_pdata(pdev, ts_nbus);
297	if (ret < 0)
298	return ret;
299
300	pwm = devm_pwm_get(dev, NULL);
301	if (IS_ERR(pwm)) {
302	ret = PTR_ERR(pwm);
303	if (ret != -EPROBE_DEFER)
304	dev_err(dev, "unable to request PWM\n");
305	return ret;
306	}
307
308	pwm_get_args(pwm, &pargs);
309	if (!pargs.period) {
310	dev_err(&pdev->dev, "invalid PWM period\n");
311	return -EINVAL;
312	}
313
314	/*
315	* FIXME: pwm_apply_args() should be removed when switching to
316	* the atomic PWM API.
317	*/
318	pwm_apply_args(pwm);
319	ret = pwm_config(pwm, pargs.period, pargs.period);
320	if (ret < 0)
321	return ret;
322
323	/*
324	* we can now start the FPGA and populate the peripherals.
325	*/
326	pwm_enable(pwm);
327	ts_nbus->pwm = pwm;
328
329	/*
330	* let the child nodes retrieve this instance of the ts-nbus.
331	*/
332	dev_set_drvdata(dev, ts_nbus);
333
334	ret = of_platform_populate(dev->of_node, NULL, NULL, dev);
335	if (ret < 0)
336	return ret;
337
338	dev_info(dev, "initialized\n");
339
340	return 0;
341	}
342
343	static int ts_nbus_remove(struct platform_device *pdev)
344	{
345	struct ts_nbus *ts_nbus = dev_get_drvdata(&pdev->dev);
346
347	/* shutdown the FPGA */
348	mutex_lock(&ts_nbus->lock);
349	pwm_disable(ts_nbus->pwm);
350	mutex_unlock(&ts_nbus->lock);
351
352	return 0;
353	}
354
355	static const struct of_device_id ts_nbus_of_match[] = {
356	{ .compatible = "technologic,ts-nbus", },
357	{ },
358	};
359	MODULE_DEVICE_TABLE(of, ts_nbus_of_match);
360
361	static struct platform_driver ts_nbus_driver = {
362	.probe = ts_nbus_probe,
363	.remove = ts_nbus_remove,
364	.driver = {
365	.name = "ts_nbus",
366	.of_match_table = ts_nbus_of_match,
367	},
368	};
369
370	module_platform_driver(ts_nbus_driver);
371
372	MODULE_ALIAS("platform:ts_nbus");
373	MODULE_AUTHOR("Sebastien Bourdelin <[email protected]>");
374	MODULE_DESCRIPTION("Technologic Systems NBUS");
375	MODULE_LICENSE("GPL v2");