[linux.git] / drivers / mfd / palmas.c

/*
 * TI Palmas MFD Driver
 *
 * Copyright 2011-2012 Texas Instruments Inc.
 *
 * Author: Graeme Gregory <[email protected]>
 *
 *  This program is free software; you can redistribute it and/or modify it
 *  under  the terms of the GNU General  Public License as published by the
 *  Free Software Foundation;  either version 2 of the License, or (at your
 *  option) any later version.
 *
 */

#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/regmap.h>
#include <linux/err.h>
#include <linux/mfd/core.h>
#include <linux/mfd/palmas.h>
#include <linux/of_platform.h>

static const struct regmap_config palmas_regmap_config[PALMAS_NUM_CLIENTS] = {
	{
		.reg_bits = 8,
		.val_bits = 8,
		.max_register = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE,
					PALMAS_PRIMARY_SECONDARY_PAD3),
	},
	{
		.reg_bits = 8,
		.val_bits = 8,
		.max_register = PALMAS_BASE_TO_REG(PALMAS_GPADC_BASE,
					PALMAS_GPADC_SMPS_VSEL_MONITORING),
	},
	{
		.reg_bits = 8,
		.val_bits = 8,
		.max_register = PALMAS_BASE_TO_REG(PALMAS_TRIM_GPADC_BASE,
					PALMAS_GPADC_TRIM16),
	},
};

static const struct regmap_irq palmas_irqs[] = {
	/* INT1 IRQs */
	[PALMAS_CHARG_DET_N_VBUS_OVV_IRQ] = {
		.mask = PALMAS_INT1_STATUS_CHARG_DET_N_VBUS_OVV,
	},
	[PALMAS_PWRON_IRQ] = {
		.mask = PALMAS_INT1_STATUS_PWRON,
	},
	[PALMAS_LONG_PRESS_KEY_IRQ] = {
		.mask = PALMAS_INT1_STATUS_LONG_PRESS_KEY,
	},
	[PALMAS_RPWRON_IRQ] = {
		.mask = PALMAS_INT1_STATUS_RPWRON,
	},
	[PALMAS_PWRDOWN_IRQ] = {
		.mask = PALMAS_INT1_STATUS_PWRDOWN,
	},
	[PALMAS_HOTDIE_IRQ] = {
		.mask = PALMAS_INT1_STATUS_HOTDIE,
	},
	[PALMAS_VSYS_MON_IRQ] = {
		.mask = PALMAS_INT1_STATUS_VSYS_MON,
	},
	[PALMAS_VBAT_MON_IRQ] = {
		.mask = PALMAS_INT1_STATUS_VBAT_MON,
	},
	/* INT2 IRQs*/
	[PALMAS_RTC_ALARM_IRQ] = {
		.mask = PALMAS_INT2_STATUS_RTC_ALARM,
		.reg_offset = 1,
	},
	[PALMAS_RTC_TIMER_IRQ] = {
		.mask = PALMAS_INT2_STATUS_RTC_TIMER,
		.reg_offset = 1,
	},
	[PALMAS_WDT_IRQ] = {
		.mask = PALMAS_INT2_STATUS_WDT,
		.reg_offset = 1,
	},
	[PALMAS_BATREMOVAL_IRQ] = {
		.mask = PALMAS_INT2_STATUS_BATREMOVAL,
		.reg_offset = 1,
	},
	[PALMAS_RESET_IN_IRQ] = {
		.mask = PALMAS_INT2_STATUS_RESET_IN,
		.reg_offset = 1,
	},
	[PALMAS_FBI_BB_IRQ] = {
		.mask = PALMAS_INT2_STATUS_FBI_BB,
		.reg_offset = 1,
	},
	[PALMAS_SHORT_IRQ] = {
		.mask = PALMAS_INT2_STATUS_SHORT,
		.reg_offset = 1,
	},
	[PALMAS_VAC_ACOK_IRQ] = {
		.mask = PALMAS_INT2_STATUS_VAC_ACOK,
		.reg_offset = 1,
	},
	/* INT3 IRQs */
	[PALMAS_GPADC_AUTO_0_IRQ] = {
		.mask = PALMAS_INT3_STATUS_GPADC_AUTO_0,
		.reg_offset = 2,
	},
	[PALMAS_GPADC_AUTO_1_IRQ] = {
		.mask = PALMAS_INT3_STATUS_GPADC_AUTO_1,
		.reg_offset = 2,
	},
	[PALMAS_GPADC_EOC_SW_IRQ] = {
		.mask = PALMAS_INT3_STATUS_GPADC_EOC_SW,
		.reg_offset = 2,
	},
	[PALMAS_GPADC_EOC_RT_IRQ] = {
		.mask = PALMAS_INT3_STATUS_GPADC_EOC_RT,
		.reg_offset = 2,
	},
	[PALMAS_ID_OTG_IRQ] = {
		.mask = PALMAS_INT3_STATUS_ID_OTG,
		.reg_offset = 2,
	},
	[PALMAS_ID_IRQ] = {
		.mask = PALMAS_INT3_STATUS_ID,
		.reg_offset = 2,
	},
	[PALMAS_VBUS_OTG_IRQ] = {
		.mask = PALMAS_INT3_STATUS_VBUS_OTG,
		.reg_offset = 2,
	},
	[PALMAS_VBUS_IRQ] = {
		.mask = PALMAS_INT3_STATUS_VBUS,
		.reg_offset = 2,
	},
	/* INT4 IRQs */
	[PALMAS_GPIO_0_IRQ] = {
		.mask = PALMAS_INT4_STATUS_GPIO_0,
		.reg_offset = 3,
	},
	[PALMAS_GPIO_1_IRQ] = {
		.mask = PALMAS_INT4_STATUS_GPIO_1,
		.reg_offset = 3,
	},
	[PALMAS_GPIO_2_IRQ] = {
		.mask = PALMAS_INT4_STATUS_GPIO_2,
		.reg_offset = 3,
	},
	[PALMAS_GPIO_3_IRQ] = {
		.mask = PALMAS_INT4_STATUS_GPIO_3,
		.reg_offset = 3,
	},
	[PALMAS_GPIO_4_IRQ] = {
		.mask = PALMAS_INT4_STATUS_GPIO_4,
		.reg_offset = 3,
	},
	[PALMAS_GPIO_5_IRQ] = {
		.mask = PALMAS_INT4_STATUS_GPIO_5,
		.reg_offset = 3,
	},
	[PALMAS_GPIO_6_IRQ] = {
		.mask = PALMAS_INT4_STATUS_GPIO_6,
		.reg_offset = 3,
	},
	[PALMAS_GPIO_7_IRQ] = {
		.mask = PALMAS_INT4_STATUS_GPIO_7,
		.reg_offset = 3,
	},
};

static struct regmap_irq_chip palmas_irq_chip = {
	.name = "palmas",
	.irqs = palmas_irqs,
	.num_irqs = ARRAY_SIZE(palmas_irqs),

	.num_regs = 4,
	.irq_reg_stride = 5,
	.status_base = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE,
			PALMAS_INT1_STATUS),
	.mask_base = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE,
			PALMAS_INT1_MASK),
};

static int palmas_set_pdata_irq_flag(struct i2c_client *i2c,
		struct palmas_platform_data *pdata)
{
	struct irq_data *irq_data = irq_get_irq_data(i2c->irq);
	if (!irq_data) {
		dev_err(&i2c->dev, "Invalid IRQ: %d\n", i2c->irq);
		return -EINVAL;
	}

	pdata->irq_flags = irqd_get_trigger_type(irq_data);
	dev_info(&i2c->dev, "Irq flag is 0x%08x\n", pdata->irq_flags);
	return 0;
}

static void palmas_dt_to_pdata(struct i2c_client *i2c,
		struct palmas_platform_data *pdata)
{
	struct device_node *node = i2c->dev.of_node;
	int ret;
	u32 prop;

	ret = of_property_read_u32(node, "ti,mux-pad1", &prop);
	if (!ret) {
		pdata->mux_from_pdata = 1;
		pdata->pad1 = prop;
	}

	ret = of_property_read_u32(node, "ti,mux-pad2", &prop);
	if (!ret) {
		pdata->mux_from_pdata = 1;
		pdata->pad2 = prop;
	}

	/* The default for this register is all masked */
	ret = of_property_read_u32(node, "ti,power-ctrl", &prop);
	if (!ret)
		pdata->power_ctrl = prop;
	else
		pdata->power_ctrl = PALMAS_POWER_CTRL_NSLEEP_MASK |
					PALMAS_POWER_CTRL_ENABLE1_MASK |
					PALMAS_POWER_CTRL_ENABLE2_MASK;
	if (i2c->irq)
		palmas_set_pdata_irq_flag(i2c, pdata);
}

static int palmas_i2c_probe(struct i2c_client *i2c,
			    const struct i2c_device_id *id)
{
	struct palmas *palmas;
	struct palmas_platform_data *pdata;
	struct device_node *node = i2c->dev.of_node;
	int ret = 0, i;
	unsigned int reg, addr;
	int slave;

	pdata = dev_get_platdata(&i2c->dev);

	if (node && !pdata) {
		pdata = devm_kzalloc(&i2c->dev, sizeof(*pdata), GFP_KERNEL);

		if (!pdata)
			return -ENOMEM;

		palmas_dt_to_pdata(i2c, pdata);
	}

	if (!pdata)
		return -EINVAL;

	palmas = devm_kzalloc(&i2c->dev, sizeof(struct palmas), GFP_KERNEL);
	if (palmas == NULL)
		return -ENOMEM;

	i2c_set_clientdata(i2c, palmas);
	palmas->dev = &i2c->dev;
	palmas->id = id->driver_data;
	palmas->irq = i2c->irq;

	for (i = 0; i < PALMAS_NUM_CLIENTS; i++) {
		if (i == 0)
			palmas->i2c_clients[i] = i2c;
		else {
			palmas->i2c_clients[i] =
					i2c_new_dummy(i2c->adapter,
							i2c->addr + i);
			if (!palmas->i2c_clients[i]) {
				dev_err(palmas->dev,
					"can't attach client %d\n", i);
				ret = -ENOMEM;
				goto err;
			}
			palmas->i2c_clients[i]->dev.of_node = of_node_get(node);
		}
		palmas->regmap[i] = devm_regmap_init_i2c(palmas->i2c_clients[i],
				&palmas_regmap_config[i]);
		if (IS_ERR(palmas->regmap[i])) {
			ret = PTR_ERR(palmas->regmap[i]);
			dev_err(palmas->dev,
				"Failed to allocate regmap %d, err: %d\n",
				i, ret);
			goto err;
		}
	}

	/* Change interrupt line output polarity */
	if (pdata->irq_flags & IRQ_TYPE_LEVEL_HIGH)
		reg = PALMAS_POLARITY_CTRL_INT_POLARITY;
	else
		reg = 0;
	ret = palmas_update_bits(palmas, PALMAS_PU_PD_OD_BASE,
			PALMAS_POLARITY_CTRL, PALMAS_POLARITY_CTRL_INT_POLARITY,
			reg);
	if (ret < 0) {
		dev_err(palmas->dev, "POLARITY_CTRL updat failed: %d\n", ret);
		goto err;
	}

	/* Change IRQ into clear on read mode for efficiency */
	slave = PALMAS_BASE_TO_SLAVE(PALMAS_INTERRUPT_BASE);
	addr = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE, PALMAS_INT_CTRL);
	reg = PALMAS_INT_CTRL_INT_CLEAR;

	regmap_write(palmas->regmap[slave], addr, reg);

	ret = regmap_add_irq_chip(palmas->regmap[slave], palmas->irq,
			IRQF_ONESHOT | pdata->irq_flags, 0, &palmas_irq_chip,
			&palmas->irq_data);
	if (ret < 0)
		goto err;

	slave = PALMAS_BASE_TO_SLAVE(PALMAS_PU_PD_OD_BASE);
	addr = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE,
			PALMAS_PRIMARY_SECONDARY_PAD1);

	if (pdata->mux_from_pdata) {
		reg = pdata->pad1;
		ret = regmap_write(palmas->regmap[slave], addr, reg);
		if (ret)
			goto err_irq;
	} else {
		ret = regmap_read(palmas->regmap[slave], addr, &reg);
		if (ret)
			goto err_irq;
	}

	if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_0))
		palmas->gpio_muxed |= PALMAS_GPIO_0_MUXED;
	if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK))
		palmas->gpio_muxed |= PALMAS_GPIO_1_MUXED;
	else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK) ==
			(2 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_SHIFT))
		palmas->led_muxed |= PALMAS_LED1_MUXED;
	else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK) ==
			(3 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_SHIFT))
		palmas->pwm_muxed |= PALMAS_PWM1_MUXED;
	if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK))
		palmas->gpio_muxed |= PALMAS_GPIO_2_MUXED;
	else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK) ==
			(2 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_SHIFT))
		palmas->led_muxed |= PALMAS_LED2_MUXED;
	else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK) ==
			(3 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_SHIFT))
		palmas->pwm_muxed |= PALMAS_PWM2_MUXED;
	if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_3))
		palmas->gpio_muxed |= PALMAS_GPIO_3_MUXED;

	addr = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE,
			PALMAS_PRIMARY_SECONDARY_PAD2);

	if (pdata->mux_from_pdata) {
		reg = pdata->pad2;
		ret = regmap_write(palmas->regmap[slave], addr, reg);
		if (ret)
			goto err_irq;
	} else {
		ret = regmap_read(palmas->regmap[slave], addr, &reg);
		if (ret)
			goto err_irq;
	}

	if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_4))
		palmas->gpio_muxed |= PALMAS_GPIO_4_MUXED;
	if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_5_MASK))
		palmas->gpio_muxed |= PALMAS_GPIO_5_MUXED;
	if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_6))
		palmas->gpio_muxed |= PALMAS_GPIO_6_MUXED;
	if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_7_MASK))
		palmas->gpio_muxed |= PALMAS_GPIO_7_MUXED;

	dev_info(palmas->dev, "Muxing GPIO %x, PWM %x, LED %x\n",
			palmas->gpio_muxed, palmas->pwm_muxed,
			palmas->led_muxed);

	reg = pdata->power_ctrl;

	slave = PALMAS_BASE_TO_SLAVE(PALMAS_PMU_CONTROL_BASE);
	addr = PALMAS_BASE_TO_REG(PALMAS_PMU_CONTROL_BASE, PALMAS_POWER_CTRL);

	ret = regmap_write(palmas->regmap[slave], addr, reg);
	if (ret)
		goto err_irq;

	/*
	 * If we are probing with DT do this the DT way and return here
	 * otherwise continue and add devices using mfd helpers.
	 */
	if (node) {
		ret = of_platform_populate(node, NULL, NULL, &i2c->dev);
		if (ret < 0)
			goto err_irq;
		else
			return ret;
	}

	return ret;

err_irq:
	regmap_del_irq_chip(palmas->irq, palmas->irq_data);
err:
	return ret;
}

static int palmas_i2c_remove(struct i2c_client *i2c)
{
	struct palmas *palmas = i2c_get_clientdata(i2c);

	mfd_remove_devices(palmas->dev);
	regmap_del_irq_chip(palmas->irq, palmas->irq_data);

	return 0;
}

static const struct i2c_device_id palmas_i2c_id[] = {
	{ "palmas", },
	{ "twl6035", },
	{ "twl6037", },
	{ "tps65913", },
	{ /* end */ }
};
MODULE_DEVICE_TABLE(i2c, palmas_i2c_id);

static struct of_device_id of_palmas_match_tbl[] = {
	{ .compatible = "ti,palmas", },
	{ /* end */ }
};

static struct i2c_driver palmas_i2c_driver = {
	.driver = {
		   .name = "palmas",
		   .of_match_table = of_palmas_match_tbl,
		   .owner = THIS_MODULE,
	},
	.probe = palmas_i2c_probe,
	.remove = palmas_i2c_remove,
	.id_table = palmas_i2c_id,
};

static int __init palmas_i2c_init(void)
{
	return i2c_add_driver(&palmas_i2c_driver);
}
/* init early so consumer devices can complete system boot */
subsys_initcall(palmas_i2c_init);

static void __exit palmas_i2c_exit(void)
{
	i2c_del_driver(&palmas_i2c_driver);
}
module_exit(palmas_i2c_exit);

MODULE_AUTHOR("Graeme Gregory <[email protected]>");
MODULE_DESCRIPTION("Palmas chip family multi-function driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
2945fbc2 GG	1	/*
	2	* TI Palmas MFD Driver
	3	*
	4	* Copyright 2011-2012 Texas Instruments Inc.
	5	*
	6	* Author: Graeme Gregory <[email protected]>
	7	*
	8	* This program is free software; you can redistribute it and/or modify it
	9	* under the terms of the GNU General Public License as published by the
	10	* Free Software Foundation; either version 2 of the License, or (at your
	11	* option) any later version.
	12	*
	13	*/
	14
	15	#include <linux/module.h>
	16	#include <linux/moduleparam.h>
	17	#include <linux/init.h>
	18	#include <linux/slab.h>
	19	#include <linux/i2c.h>
	20	#include <linux/interrupt.h>
	21	#include <linux/irq.h>
	22	#include <linux/regmap.h>
	23	#include <linux/err.h>
	24	#include <linux/mfd/core.h>
	25	#include <linux/mfd/palmas.h>
9c14ac33	26	#include <linux/of_platform.h>
2945fbc2	27
2945fbc2 GG	28	static const struct regmap_config palmas_regmap_config[PALMAS_NUM_CLIENTS] = {
	29	{
	30	.reg_bits = 8,
	31	.val_bits = 8,
	32	.max_register = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE,
	33	PALMAS_PRIMARY_SECONDARY_PAD3),
	34	},
	35	{
	36	.reg_bits = 8,
	37	.val_bits = 8,
	38	.max_register = PALMAS_BASE_TO_REG(PALMAS_GPADC_BASE,
	39	PALMAS_GPADC_SMPS_VSEL_MONITORING),
	40	},
	41	{
	42	.reg_bits = 8,
	43	.val_bits = 8,
	44	.max_register = PALMAS_BASE_TO_REG(PALMAS_TRIM_GPADC_BASE,
	45	PALMAS_GPADC_TRIM16),
	46	},
	47	};
	48
	49	static const struct regmap_irq palmas_irqs[] = {
	50	/* INT1 IRQs */
	51	[PALMAS_CHARG_DET_N_VBUS_OVV_IRQ] = {
	52	.mask = PALMAS_INT1_STATUS_CHARG_DET_N_VBUS_OVV,
	53	},
	54	[PALMAS_PWRON_IRQ] = {
	55	.mask = PALMAS_INT1_STATUS_PWRON,
	56	},
	57	[PALMAS_LONG_PRESS_KEY_IRQ] = {
	58	.mask = PALMAS_INT1_STATUS_LONG_PRESS_KEY,
	59	},
	60	[PALMAS_RPWRON_IRQ] = {
	61	.mask = PALMAS_INT1_STATUS_RPWRON,
	62	},
	63	[PALMAS_PWRDOWN_IRQ] = {
	64	.mask = PALMAS_INT1_STATUS_PWRDOWN,
	65	},
	66	[PALMAS_HOTDIE_IRQ] = {
	67	.mask = PALMAS_INT1_STATUS_HOTDIE,
	68	},
	69	[PALMAS_VSYS_MON_IRQ] = {
	70	.mask = PALMAS_INT1_STATUS_VSYS_MON,
	71	},
	72	[PALMAS_VBAT_MON_IRQ] = {
	73	.mask = PALMAS_INT1_STATUS_VBAT_MON,
	74	},
	75	/* INT2 IRQs*/
	76	[PALMAS_RTC_ALARM_IRQ] = {
	77	.mask = PALMAS_INT2_STATUS_RTC_ALARM,
	78	.reg_offset = 1,
	79	},
	80	[PALMAS_RTC_TIMER_IRQ] = {
	81	.mask = PALMAS_INT2_STATUS_RTC_TIMER,
	82	.reg_offset = 1,
	83	},
	84	[PALMAS_WDT_IRQ] = {
	85	.mask = PALMAS_INT2_STATUS_WDT,
	86	.reg_offset = 1,
	87	},
	88	[PALMAS_BATREMOVAL_IRQ] = {
	89	.mask = PALMAS_INT2_STATUS_BATREMOVAL,
	90	.reg_offset = 1,
	91	},
92	[PALMAS_RESET_IN_IRQ] = {
93	.mask = PALMAS_INT2_STATUS_RESET_IN,
94	.reg_offset = 1,
95	},
96	[PALMAS_FBI_BB_IRQ] = {
97	.mask = PALMAS_INT2_STATUS_FBI_BB,
98	.reg_offset = 1,
99	},
100	[PALMAS_SHORT_IRQ] = {
101	.mask = PALMAS_INT2_STATUS_SHORT,
102	.reg_offset = 1,
103	},
104	[PALMAS_VAC_ACOK_IRQ] = {
105	.mask = PALMAS_INT2_STATUS_VAC_ACOK,
106	.reg_offset = 1,
107	},
108	/* INT3 IRQs */
109	[PALMAS_GPADC_AUTO_0_IRQ] = {
110	.mask = PALMAS_INT3_STATUS_GPADC_AUTO_0,
111	.reg_offset = 2,
112	},
113	[PALMAS_GPADC_AUTO_1_IRQ] = {
114	.mask = PALMAS_INT3_STATUS_GPADC_AUTO_1,
115	.reg_offset = 2,
116	},
117	[PALMAS_GPADC_EOC_SW_IRQ] = {
118	.mask = PALMAS_INT3_STATUS_GPADC_EOC_SW,
119	.reg_offset = 2,
120	},
121	[PALMAS_GPADC_EOC_RT_IRQ] = {
122	.mask = PALMAS_INT3_STATUS_GPADC_EOC_RT,
123	.reg_offset = 2,
124	},
125	[PALMAS_ID_OTG_IRQ] = {
126	.mask = PALMAS_INT3_STATUS_ID_OTG,
127	.reg_offset = 2,
128	},
129	[PALMAS_ID_IRQ] = {
130	.mask = PALMAS_INT3_STATUS_ID,
131	.reg_offset = 2,
132	},
133	[PALMAS_VBUS_OTG_IRQ] = {
134	.mask = PALMAS_INT3_STATUS_VBUS_OTG,
135	.reg_offset = 2,
136	},
137	[PALMAS_VBUS_IRQ] = {
138	.mask = PALMAS_INT3_STATUS_VBUS,
139	.reg_offset = 2,
140	},
141	/* INT4 IRQs */
142	[PALMAS_GPIO_0_IRQ] = {
143	.mask = PALMAS_INT4_STATUS_GPIO_0,
144	.reg_offset = 3,
145	},
146	[PALMAS_GPIO_1_IRQ] = {
147	.mask = PALMAS_INT4_STATUS_GPIO_1,
148	.reg_offset = 3,
149	},
150	[PALMAS_GPIO_2_IRQ] = {
151	.mask = PALMAS_INT4_STATUS_GPIO_2,
152	.reg_offset = 3,
153	},
154	[PALMAS_GPIO_3_IRQ] = {
155	.mask = PALMAS_INT4_STATUS_GPIO_3,
156	.reg_offset = 3,
157	},
158	[PALMAS_GPIO_4_IRQ] = {
159	.mask = PALMAS_INT4_STATUS_GPIO_4,
160	.reg_offset = 3,
161	},
162	[PALMAS_GPIO_5_IRQ] = {
163	.mask = PALMAS_INT4_STATUS_GPIO_5,
164	.reg_offset = 3,
165	},
166	[PALMAS_GPIO_6_IRQ] = {
167	.mask = PALMAS_INT4_STATUS_GPIO_6,
168	.reg_offset = 3,
169	},
170	[PALMAS_GPIO_7_IRQ] = {
171	.mask = PALMAS_INT4_STATUS_GPIO_7,
172	.reg_offset = 3,
173	},
174	};
175
176	static struct regmap_irq_chip palmas_irq_chip = {
177	.name = "palmas",
178	.irqs = palmas_irqs,
179	.num_irqs = ARRAY_SIZE(palmas_irqs),
180
181	.num_regs = 4,
182	.irq_reg_stride = 5,
183	.status_base = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE,
184	PALMAS_INT1_STATUS),
185	.mask_base = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE,
186	PALMAS_INT1_MASK),
187	};
188
df545d1c	189	static int palmas_set_pdata_irq_flag(struct i2c_client *i2c,
9c14ac33 GG	190	struct palmas_platform_data *pdata)
9c14ac33 GG	191	{
df545d1c LD	192	struct irq_data *irq_data = irq_get_irq_data(i2c->irq);
	193	if (!irq_data) {
	194	dev_err(&i2c->dev, "Invalid IRQ: %d\n", i2c->irq);
	195	return -EINVAL;
	196	}
	197
	198	pdata->irq_flags = irqd_get_trigger_type(irq_data);
	199	dev_info(&i2c->dev, "Irq flag is 0x%08x\n", pdata->irq_flags);
	200	return 0;
	201	}
	202
	203	static void palmas_dt_to_pdata(struct i2c_client *i2c,
	204	struct palmas_platform_data *pdata)
	205	{
	206	struct device_node *node = i2c->dev.of_node;
9c14ac33 GG	207	int ret;
	208	u32 prop;
	209
2154a2b3	210	ret = of_property_read_u32(node, "ti,mux-pad1", &prop);
9c14ac33 GG	211	if (!ret) {
	212	pdata->mux_from_pdata = 1;
	213	pdata->pad1 = prop;
	214	}
	215
2154a2b3	216	ret = of_property_read_u32(node, "ti,mux-pad2", &prop);
9c14ac33 GG	217	if (!ret) {
	218	pdata->mux_from_pdata = 1;
	219	pdata->pad2 = prop;
	220	}
	221
	222	/* The default for this register is all masked */
2154a2b3	223	ret = of_property_read_u32(node, "ti,power-ctrl", &prop);
9c14ac33 GG	224	if (!ret)
	225	pdata->power_ctrl = prop;
	226	else
	227	pdata->power_ctrl = PALMAS_POWER_CTRL_NSLEEP_MASK \|
	228	PALMAS_POWER_CTRL_ENABLE1_MASK \|
	229	PALMAS_POWER_CTRL_ENABLE2_MASK;
df545d1c LD	230	if (i2c->irq)
df545d1c LD	231	palmas_set_pdata_irq_flag(i2c, pdata);
9c14ac33 GG	232	}
9c14ac33 GG	233
f791be49	234	static int palmas_i2c_probe(struct i2c_client *i2c,
2945fbc2 GG	235	const struct i2c_device_id *id)
	236	{
	237	struct palmas *palmas;
	238	struct palmas_platform_data *pdata;
9c14ac33	239	struct device_node *node = i2c->dev.of_node;
2945fbc2 GG	240	int ret = 0, i;
	241	unsigned int reg, addr;
	242	int slave;
2945fbc2 GG	243
2945fbc2 GG	244	pdata = dev_get_platdata(&i2c->dev);
9c14ac33 GG	245
	246	if (node && !pdata) {
	247	pdata = devm_kzalloc(&i2c->dev, sizeof(*pdata), GFP_KERNEL);
	248
	249	if (!pdata)
	250	return -ENOMEM;
	251
df545d1c	252	palmas_dt_to_pdata(i2c, pdata);
9c14ac33 GG	253	}
9c14ac33 GG	254
2945fbc2 GG	255	if (!pdata)
	256	return -EINVAL;
	257
	258	palmas = devm_kzalloc(&i2c->dev, sizeof(struct palmas), GFP_KERNEL);
	259	if (palmas == NULL)
	260	return -ENOMEM;
	261
	262	i2c_set_clientdata(i2c, palmas);
	263	palmas->dev = &i2c->dev;
	264	palmas->id = id->driver_data;
	265	palmas->irq = i2c->irq;
	266
	267	for (i = 0; i < PALMAS_NUM_CLIENTS; i++) {
	268	if (i == 0)
	269	palmas->i2c_clients[i] = i2c;
	270	else {
	271	palmas->i2c_clients[i] =
	272	i2c_new_dummy(i2c->adapter,
	273	i2c->addr + i);
	274	if (!palmas->i2c_clients[i]) {
	275	dev_err(palmas->dev,
	276	"can't attach client %d\n", i);
	277	ret = -ENOMEM;
	278	goto err;
	279	}
c4fbec3c	280	palmas->i2c_clients[i]->dev.of_node = of_node_get(node);
2945fbc2 GG	281	}
	282	palmas->regmap[i] = devm_regmap_init_i2c(palmas->i2c_clients[i],
	283	&palmas_regmap_config[i]);
	284	if (IS_ERR(palmas->regmap[i])) {
	285	ret = PTR_ERR(palmas->regmap[i]);
	286	dev_err(palmas->dev,
	287	"Failed to allocate regmap %d, err: %d\n",
	288	i, ret);
	289	goto err;
	290	}
	291	}
	292
df545d1c LD	293	/* Change interrupt line output polarity */
	294	if (pdata->irq_flags & IRQ_TYPE_LEVEL_HIGH)
	295	reg = PALMAS_POLARITY_CTRL_INT_POLARITY;
	296	else
	297	reg = 0;
	298	ret = palmas_update_bits(palmas, PALMAS_PU_PD_OD_BASE,
	299	PALMAS_POLARITY_CTRL, PALMAS_POLARITY_CTRL_INT_POLARITY,
	300	reg);
	301	if (ret < 0) {
	302	dev_err(palmas->dev, "POLARITY_CTRL updat failed: %d\n", ret);
	303	goto err;
	304	}
	305
b330f85d GG	306	/* Change IRQ into clear on read mode for efficiency */
	307	slave = PALMAS_BASE_TO_SLAVE(PALMAS_INTERRUPT_BASE);
	308	addr = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE, PALMAS_INT_CTRL);
	309	reg = PALMAS_INT_CTRL_INT_CLEAR;
	310
	311	regmap_write(palmas->regmap[slave], addr, reg);
	312
	313	ret = regmap_add_irq_chip(palmas->regmap[slave], palmas->irq,
df545d1c	314	IRQF_ONESHOT \| pdata->irq_flags, 0, &palmas_irq_chip,
2945fbc2 GG	315	&palmas->irq_data);
	316	if (ret < 0)
	317	goto err;
	318
	319	slave = PALMAS_BASE_TO_SLAVE(PALMAS_PU_PD_OD_BASE);
	320	addr = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE,
	321	PALMAS_PRIMARY_SECONDARY_PAD1);
	322
	323	if (pdata->mux_from_pdata) {
	324	reg = pdata->pad1;
	325	ret = regmap_write(palmas->regmap[slave], addr, reg);
	326	if (ret)
3f78decc	327	goto err_irq;
2945fbc2 GG	328	} else {
	329	ret = regmap_read(palmas->regmap[slave], addr, &reg);
	330	if (ret)
3f78decc	331	goto err_irq;
2945fbc2 GG	332	}
	333
	334	if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_0))
	335	palmas->gpio_muxed \|= PALMAS_GPIO_0_MUXED;
	336	if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK))
	337	palmas->gpio_muxed \|= PALMAS_GPIO_1_MUXED;
	338	else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK) ==
	339	(2 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_SHIFT))
	340	palmas->led_muxed \|= PALMAS_LED1_MUXED;
	341	else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK) ==
	342	(3 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_SHIFT))
	343	palmas->pwm_muxed \|= PALMAS_PWM1_MUXED;
	344	if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK))
	345	palmas->gpio_muxed \|= PALMAS_GPIO_2_MUXED;
	346	else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK) ==
	347	(2 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_SHIFT))
	348	palmas->led_muxed \|= PALMAS_LED2_MUXED;
	349	else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK) ==
	350	(3 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_SHIFT))
	351	palmas->pwm_muxed \|= PALMAS_PWM2_MUXED;
	352	if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_3))
	353	palmas->gpio_muxed \|= PALMAS_GPIO_3_MUXED;
	354
	355	addr = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE,
	356	PALMAS_PRIMARY_SECONDARY_PAD2);
	357
	358	if (pdata->mux_from_pdata) {
	359	reg = pdata->pad2;
	360	ret = regmap_write(palmas->regmap[slave], addr, reg);
	361	if (ret)
3f78decc	362	goto err_irq;
2945fbc2 GG	363	} else {
	364	ret = regmap_read(palmas->regmap[slave], addr, &reg);
	365	if (ret)
3f78decc	366	goto err_irq;
2945fbc2 GG	367	}
	368
	369	if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_4))
	370	palmas->gpio_muxed \|= PALMAS_GPIO_4_MUXED;
	371	if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_5_MASK))
	372	palmas->gpio_muxed \|= PALMAS_GPIO_5_MUXED;
	373	if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_6))
	374	palmas->gpio_muxed \|= PALMAS_GPIO_6_MUXED;
	375	if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_7_MASK))
	376	palmas->gpio_muxed \|= PALMAS_GPIO_7_MUXED;
	377
	378	dev_info(palmas->dev, "Muxing GPIO %x, PWM %x, LED %x\n",
	379	palmas->gpio_muxed, palmas->pwm_muxed,
	380	palmas->led_muxed);
	381
	382	reg = pdata->power_ctrl;
	383
	384	slave = PALMAS_BASE_TO_SLAVE(PALMAS_PMU_CONTROL_BASE);
	385	addr = PALMAS_BASE_TO_REG(PALMAS_PMU_CONTROL_BASE, PALMAS_POWER_CTRL);
	386
	387	ret = regmap_write(palmas->regmap[slave], addr, reg);
	388	if (ret)
3f78decc	389	goto err_irq;
2945fbc2	390
9c14ac33 GG	391	/*
	392	* If we are probing with DT do this the DT way and return here
	393	* otherwise continue and add devices using mfd helpers.
	394	*/
	395	if (node) {
	396	ret = of_platform_populate(node, NULL, NULL, &i2c->dev);
	397	if (ret < 0)
	398	goto err_irq;
	399	else
	400	return ret;
	401	}
	402
2945fbc2 GG	403	return ret;
2945fbc2 GG	404
3f78decc GG	405	err_irq:
	406	regmap_del_irq_chip(palmas->irq, palmas->irq_data);
	407	err:
2945fbc2 GG	408	return ret;
	409	}
	410
	411	static int palmas_i2c_remove(struct i2c_client *i2c)
	412	{
	413	struct palmas *palmas = i2c_get_clientdata(i2c);
	414
	415	mfd_remove_devices(palmas->dev);
	416	regmap_del_irq_chip(palmas->irq, palmas->irq_data);
	417
	418	return 0;
	419	}
	420
	421	static const struct i2c_device_id palmas_i2c_id[] = {
	422	{ "palmas", },
	423	{ "twl6035", },
	424	{ "twl6037", },
	425	{ "tps65913", },
00ba81c1	426	{ /* end */ }
2945fbc2 GG	427	};
	428	MODULE_DEVICE_TABLE(i2c, palmas_i2c_id);
	429
a9e9ce4c	430	static struct of_device_id of_palmas_match_tbl[] = {
2945fbc2 GG	431	{ .compatible = "ti,palmas", },
	432	{ /* end */ }
	433	};
	434
	435	static struct i2c_driver palmas_i2c_driver = {
	436	.driver = {
	437	.name = "palmas",
	438	.of_match_table = of_palmas_match_tbl,
	439	.owner = THIS_MODULE,
	440	},
	441	.probe = palmas_i2c_probe,
	442	.remove = palmas_i2c_remove,
	443	.id_table = palmas_i2c_id,
	444	};
	445
	446	static int __init palmas_i2c_init(void)
	447	{
	448	return i2c_add_driver(&palmas_i2c_driver);
	449	}
	450	/* init early so consumer devices can complete system boot */
	451	subsys_initcall(palmas_i2c_init);
	452
	453	static void __exit palmas_i2c_exit(void)
	454	{
	455	i2c_del_driver(&palmas_i2c_driver);
	456	}
	457	module_exit(palmas_i2c_exit);
	458
	459	MODULE_AUTHOR("Graeme Gregory <[email protected]>");
	460	MODULE_DESCRIPTION("Palmas chip family multi-function driver");
	461	MODULE_LICENSE("GPL");