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Commit | Line | Data |
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d29389de | 1 | /* |
ca632f55 | 2 | * SPI master driver using generic bitbanged GPIO |
d29389de DB |
3 | * |
4 | * Copyright (C) 2006,2008 David Brownell | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
d29389de DB |
15 | */ |
16 | #include <linux/kernel.h> | |
d7614de4 | 17 | #include <linux/module.h> |
d29389de DB |
18 | #include <linux/platform_device.h> |
19 | #include <linux/gpio.h> | |
ecc77773 | 20 | #include <linux/of.h> |
38ab18ca DM |
21 | #include <linux/of_device.h> |
22 | #include <linux/of_gpio.h> | |
d29389de DB |
23 | |
24 | #include <linux/spi/spi.h> | |
25 | #include <linux/spi/spi_bitbang.h> | |
26 | #include <linux/spi/spi_gpio.h> | |
27 | ||
28 | ||
29 | /* | |
30 | * This bitbanging SPI master driver should help make systems usable | |
31 | * when a native hardware SPI engine is not available, perhaps because | |
32 | * its driver isn't yet working or because the I/O pins it requires | |
33 | * are used for other purposes. | |
34 | * | |
35 | * platform_device->driver_data ... points to spi_gpio | |
36 | * | |
37 | * spi->controller_state ... reserved for bitbang framework code | |
38 | * spi->controller_data ... holds chipselect GPIO | |
39 | * | |
40 | * spi->master->dev.driver_data ... points to spi_gpio->bitbang | |
41 | */ | |
42 | ||
43 | struct spi_gpio { | |
44 | struct spi_bitbang bitbang; | |
45 | struct spi_gpio_platform_data pdata; | |
46 | struct platform_device *pdev; | |
cfb4bbd8 | 47 | unsigned long cs_gpios[0]; |
d29389de DB |
48 | }; |
49 | ||
50 | /*----------------------------------------------------------------------*/ | |
51 | ||
52 | /* | |
53 | * Because the overhead of going through four GPIO procedure calls | |
54 | * per transferred bit can make performance a problem, this code | |
55 | * is set up so that you can use it in either of two ways: | |
56 | * | |
57 | * - The slow generic way: set up platform_data to hold the GPIO | |
58 | * numbers used for MISO/MOSI/SCK, and issue procedure calls for | |
59 | * each of them. This driver can handle several such busses. | |
60 | * | |
61 | * - The quicker inlined way: only helps with platform GPIO code | |
62 | * that inlines operations for constant GPIOs. This can give | |
63 | * you tight (fast!) inner loops, but each such bus needs a | |
64 | * new driver. You'll define a new C file, with Makefile and | |
65 | * Kconfig support; the C code can be a total of six lines: | |
66 | * | |
67 | * #define DRIVER_NAME "myboard_spi2" | |
68 | * #define SPI_MISO_GPIO 119 | |
69 | * #define SPI_MOSI_GPIO 120 | |
70 | * #define SPI_SCK_GPIO 121 | |
71 | * #define SPI_N_CHIPSEL 4 | |
ca632f55 | 72 | * #include "spi-gpio.c" |
d29389de DB |
73 | */ |
74 | ||
75 | #ifndef DRIVER_NAME | |
76 | #define DRIVER_NAME "spi_gpio" | |
77 | ||
78 | #define GENERIC_BITBANG /* vs tight inlines */ | |
79 | ||
80 | /* all functions referencing these symbols must define pdata */ | |
81 | #define SPI_MISO_GPIO ((pdata)->miso) | |
82 | #define SPI_MOSI_GPIO ((pdata)->mosi) | |
83 | #define SPI_SCK_GPIO ((pdata)->sck) | |
84 | ||
85 | #define SPI_N_CHIPSEL ((pdata)->num_chipselect) | |
86 | ||
87 | #endif | |
88 | ||
89 | /*----------------------------------------------------------------------*/ | |
90 | ||
650705cf | 91 | static inline struct spi_gpio *__pure |
161c2dd3 | 92 | spi_to_spi_gpio(const struct spi_device *spi) |
d29389de DB |
93 | { |
94 | const struct spi_bitbang *bang; | |
161c2dd3 | 95 | struct spi_gpio *spi_gpio; |
d29389de DB |
96 | |
97 | bang = spi_master_get_devdata(spi->master); | |
98 | spi_gpio = container_of(bang, struct spi_gpio, bitbang); | |
161c2dd3 DM |
99 | return spi_gpio; |
100 | } | |
101 | ||
650705cf | 102 | static inline struct spi_gpio_platform_data *__pure |
161c2dd3 DM |
103 | spi_to_pdata(const struct spi_device *spi) |
104 | { | |
105 | return &spi_to_spi_gpio(spi)->pdata; | |
d29389de DB |
106 | } |
107 | ||
108 | /* this is #defined to avoid unused-variable warnings when inlining */ | |
109 | #define pdata spi_to_pdata(spi) | |
110 | ||
111 | static inline void setsck(const struct spi_device *spi, int is_on) | |
112 | { | |
d9dda5a1 | 113 | gpio_set_value_cansleep(SPI_SCK_GPIO, is_on); |
d29389de DB |
114 | } |
115 | ||
116 | static inline void setmosi(const struct spi_device *spi, int is_on) | |
117 | { | |
d9dda5a1 | 118 | gpio_set_value_cansleep(SPI_MOSI_GPIO, is_on); |
d29389de DB |
119 | } |
120 | ||
121 | static inline int getmiso(const struct spi_device *spi) | |
122 | { | |
d9dda5a1 | 123 | return !!gpio_get_value_cansleep(SPI_MISO_GPIO); |
d29389de DB |
124 | } |
125 | ||
126 | #undef pdata | |
127 | ||
128 | /* | |
129 | * NOTE: this clocks "as fast as we can". It "should" be a function of the | |
130 | * requested device clock. Software overhead means we usually have trouble | |
131 | * reaching even one Mbit/sec (except when we can inline bitops), so for now | |
132 | * we'll just assume we never need additional per-bit slowdowns. | |
133 | */ | |
134 | #define spidelay(nsecs) do {} while (0) | |
135 | ||
ca632f55 | 136 | #include "spi-bitbang-txrx.h" |
d29389de DB |
137 | |
138 | /* | |
139 | * These functions can leverage inline expansion of GPIO calls to shrink | |
140 | * costs for a txrx bit, often by factors of around ten (by instruction | |
141 | * count). That is particularly visible for larger word sizes, but helps | |
142 | * even with default 8-bit words. | |
143 | * | |
144 | * REVISIT overheads calling these functions for each word also have | |
145 | * significant performance costs. Having txrx_bufs() calls that inline | |
146 | * the txrx_word() logic would help performance, e.g. on larger blocks | |
147 | * used with flash storage or MMC/SD. There should also be ways to make | |
148 | * GCC be less stupid about reloading registers inside the I/O loops, | |
149 | * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3? | |
150 | */ | |
151 | ||
152 | static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi, | |
153 | unsigned nsecs, u32 word, u8 bits) | |
154 | { | |
04bb2a03 | 155 | return bitbang_txrx_be_cpha0(spi, nsecs, 0, 0, word, bits); |
d29389de DB |
156 | } |
157 | ||
158 | static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi, | |
159 | unsigned nsecs, u32 word, u8 bits) | |
160 | { | |
04bb2a03 | 161 | return bitbang_txrx_be_cpha1(spi, nsecs, 0, 0, word, bits); |
d29389de DB |
162 | } |
163 | ||
164 | static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi, | |
165 | unsigned nsecs, u32 word, u8 bits) | |
166 | { | |
04bb2a03 | 167 | return bitbang_txrx_be_cpha0(spi, nsecs, 1, 0, word, bits); |
d29389de DB |
168 | } |
169 | ||
170 | static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi, | |
171 | unsigned nsecs, u32 word, u8 bits) | |
172 | { | |
04bb2a03 | 173 | return bitbang_txrx_be_cpha1(spi, nsecs, 1, 0, word, bits); |
d29389de DB |
174 | } |
175 | ||
3c8e1a84 MS |
176 | /* |
177 | * These functions do not call setmosi or getmiso if respective flag | |
178 | * (SPI_MASTER_NO_RX or SPI_MASTER_NO_TX) is set, so they are safe to | |
179 | * call when such pin is not present or defined in the controller. | |
180 | * A separate set of callbacks is defined to get highest possible | |
181 | * speed in the generic case (when both MISO and MOSI lines are | |
182 | * available), as optimiser will remove the checks when argument is | |
183 | * constant. | |
184 | */ | |
185 | ||
186 | static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi, | |
187 | unsigned nsecs, u32 word, u8 bits) | |
188 | { | |
189 | unsigned flags = spi->master->flags; | |
190 | return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits); | |
191 | } | |
192 | ||
193 | static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi, | |
194 | unsigned nsecs, u32 word, u8 bits) | |
195 | { | |
196 | unsigned flags = spi->master->flags; | |
197 | return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits); | |
198 | } | |
199 | ||
200 | static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi, | |
201 | unsigned nsecs, u32 word, u8 bits) | |
202 | { | |
203 | unsigned flags = spi->master->flags; | |
204 | return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits); | |
205 | } | |
206 | ||
207 | static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi, | |
208 | unsigned nsecs, u32 word, u8 bits) | |
209 | { | |
210 | unsigned flags = spi->master->flags; | |
211 | return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits); | |
212 | } | |
213 | ||
d29389de DB |
214 | /*----------------------------------------------------------------------*/ |
215 | ||
216 | static void spi_gpio_chipselect(struct spi_device *spi, int is_active) | |
217 | { | |
161c2dd3 | 218 | struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); |
cfb4bbd8 | 219 | unsigned long cs = spi_gpio->cs_gpios[spi->chip_select]; |
d29389de DB |
220 | |
221 | /* set initial clock polarity */ | |
222 | if (is_active) | |
223 | setsck(spi, spi->mode & SPI_CPOL); | |
224 | ||
bfb9bcdb MB |
225 | if (cs != SPI_GPIO_NO_CHIPSELECT) { |
226 | /* SPI is normally active-low */ | |
d9dda5a1 | 227 | gpio_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active); |
bfb9bcdb | 228 | } |
d29389de DB |
229 | } |
230 | ||
231 | static int spi_gpio_setup(struct spi_device *spi) | |
232 | { | |
cfb4bbd8 | 233 | unsigned long cs; |
161c2dd3 DM |
234 | int status = 0; |
235 | struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); | |
38ab18ca | 236 | struct device_node *np = spi->master->dev.of_node; |
d29389de | 237 | |
38ab18ca DM |
238 | if (np) { |
239 | /* | |
240 | * In DT environments, the CS GPIOs have already been | |
241 | * initialized from the "cs-gpios" property of the node. | |
242 | */ | |
243 | cs = spi_gpio->cs_gpios[spi->chip_select]; | |
244 | } else { | |
245 | /* | |
246 | * ... otherwise, take it from spi->controller_data | |
247 | */ | |
cfb4bbd8 | 248 | cs = (uintptr_t) spi->controller_data; |
38ab18ca DM |
249 | } |
250 | ||
d29389de | 251 | if (!spi->controller_state) { |
bfb9bcdb MB |
252 | if (cs != SPI_GPIO_NO_CHIPSELECT) { |
253 | status = gpio_request(cs, dev_name(&spi->dev)); | |
254 | if (status) | |
255 | return status; | |
05644147 UKK |
256 | status = gpio_direction_output(cs, |
257 | !(spi->mode & SPI_CS_HIGH)); | |
bfb9bcdb | 258 | } |
d29389de | 259 | } |
161c2dd3 | 260 | if (!status) { |
38ab18ca | 261 | /* in case it was initialized from static board data */ |
161c2dd3 | 262 | spi_gpio->cs_gpios[spi->chip_select] = cs; |
6b8cc330 | 263 | status = spi_bitbang_setup(spi); |
161c2dd3 DM |
264 | } |
265 | ||
d29389de | 266 | if (status) { |
bfb9bcdb | 267 | if (!spi->controller_state && cs != SPI_GPIO_NO_CHIPSELECT) |
d29389de DB |
268 | gpio_free(cs); |
269 | } | |
270 | return status; | |
271 | } | |
272 | ||
273 | static void spi_gpio_cleanup(struct spi_device *spi) | |
274 | { | |
161c2dd3 | 275 | struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); |
cfb4bbd8 | 276 | unsigned long cs = spi_gpio->cs_gpios[spi->chip_select]; |
d29389de | 277 | |
bfb9bcdb MB |
278 | if (cs != SPI_GPIO_NO_CHIPSELECT) |
279 | gpio_free(cs); | |
d29389de DB |
280 | spi_bitbang_cleanup(spi); |
281 | } | |
282 | ||
fd4a319b | 283 | static int spi_gpio_alloc(unsigned pin, const char *label, bool is_in) |
d29389de DB |
284 | { |
285 | int value; | |
286 | ||
287 | value = gpio_request(pin, label); | |
288 | if (value == 0) { | |
289 | if (is_in) | |
290 | value = gpio_direction_input(pin); | |
291 | else | |
292 | value = gpio_direction_output(pin, 0); | |
293 | } | |
294 | return value; | |
295 | } | |
296 | ||
fd4a319b GL |
297 | static int spi_gpio_request(struct spi_gpio_platform_data *pdata, |
298 | const char *label, u16 *res_flags) | |
d29389de DB |
299 | { |
300 | int value; | |
301 | ||
302 | /* NOTE: SPI_*_GPIO symbols may reference "pdata" */ | |
303 | ||
3c8e1a84 MS |
304 | if (SPI_MOSI_GPIO != SPI_GPIO_NO_MOSI) { |
305 | value = spi_gpio_alloc(SPI_MOSI_GPIO, label, false); | |
306 | if (value) | |
307 | goto done; | |
308 | } else { | |
309 | /* HW configuration without MOSI pin */ | |
310 | *res_flags |= SPI_MASTER_NO_TX; | |
311 | } | |
d29389de | 312 | |
3c8e1a84 MS |
313 | if (SPI_MISO_GPIO != SPI_GPIO_NO_MISO) { |
314 | value = spi_gpio_alloc(SPI_MISO_GPIO, label, true); | |
315 | if (value) | |
316 | goto free_mosi; | |
317 | } else { | |
318 | /* HW configuration without MISO pin */ | |
319 | *res_flags |= SPI_MASTER_NO_RX; | |
320 | } | |
d29389de DB |
321 | |
322 | value = spi_gpio_alloc(SPI_SCK_GPIO, label, false); | |
323 | if (value) | |
324 | goto free_miso; | |
325 | ||
326 | goto done; | |
327 | ||
328 | free_miso: | |
3c8e1a84 MS |
329 | if (SPI_MISO_GPIO != SPI_GPIO_NO_MISO) |
330 | gpio_free(SPI_MISO_GPIO); | |
d29389de | 331 | free_mosi: |
3c8e1a84 MS |
332 | if (SPI_MOSI_GPIO != SPI_GPIO_NO_MOSI) |
333 | gpio_free(SPI_MOSI_GPIO); | |
d29389de DB |
334 | done: |
335 | return value; | |
336 | } | |
337 | ||
38ab18ca | 338 | #ifdef CONFIG_OF |
d9e15281 | 339 | static const struct of_device_id spi_gpio_dt_ids[] = { |
38ab18ca DM |
340 | { .compatible = "spi-gpio" }, |
341 | {} | |
342 | }; | |
343 | MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids); | |
344 | ||
345 | static int spi_gpio_probe_dt(struct platform_device *pdev) | |
346 | { | |
347 | int ret; | |
348 | u32 tmp; | |
349 | struct spi_gpio_platform_data *pdata; | |
350 | struct device_node *np = pdev->dev.of_node; | |
351 | const struct of_device_id *of_id = | |
352 | of_match_device(spi_gpio_dt_ids, &pdev->dev); | |
353 | ||
354 | if (!of_id) | |
355 | return 0; | |
356 | ||
357 | pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); | |
358 | if (!pdata) | |
359 | return -ENOMEM; | |
360 | ||
0202a32d MR |
361 | ret = of_get_named_gpio(np, "gpio-sck", 0); |
362 | if (ret < 0) { | |
363 | dev_err(&pdev->dev, "gpio-sck property not found\n"); | |
364 | goto error_free; | |
365 | } | |
366 | pdata->sck = ret; | |
367 | ||
368 | ret = of_get_named_gpio(np, "gpio-miso", 0); | |
369 | if (ret < 0) { | |
370 | dev_info(&pdev->dev, "gpio-miso property not found, switching to no-rx mode\n"); | |
371 | pdata->miso = SPI_GPIO_NO_MISO; | |
372 | } else | |
373 | pdata->miso = ret; | |
374 | ||
375 | ret = of_get_named_gpio(np, "gpio-mosi", 0); | |
376 | if (ret < 0) { | |
377 | dev_info(&pdev->dev, "gpio-mosi property not found, switching to no-tx mode\n"); | |
378 | pdata->mosi = SPI_GPIO_NO_MOSI; | |
379 | } else | |
380 | pdata->mosi = ret; | |
38ab18ca DM |
381 | |
382 | ret = of_property_read_u32(np, "num-chipselects", &tmp); | |
383 | if (ret < 0) { | |
384 | dev_err(&pdev->dev, "num-chipselects property not found\n"); | |
385 | goto error_free; | |
386 | } | |
387 | ||
388 | pdata->num_chipselect = tmp; | |
389 | pdev->dev.platform_data = pdata; | |
390 | ||
391 | return 1; | |
392 | ||
393 | error_free: | |
394 | devm_kfree(&pdev->dev, pdata); | |
395 | return ret; | |
396 | } | |
397 | #else | |
ac2cb30b | 398 | static inline int spi_gpio_probe_dt(struct platform_device *pdev) |
38ab18ca DM |
399 | { |
400 | return 0; | |
401 | } | |
402 | #endif | |
403 | ||
fd4a319b | 404 | static int spi_gpio_probe(struct platform_device *pdev) |
d29389de DB |
405 | { |
406 | int status; | |
407 | struct spi_master *master; | |
408 | struct spi_gpio *spi_gpio; | |
409 | struct spi_gpio_platform_data *pdata; | |
3c8e1a84 | 410 | u16 master_flags = 0; |
38ab18ca | 411 | bool use_of = 0; |
d1d81802 | 412 | int num_devices; |
38ab18ca DM |
413 | |
414 | status = spi_gpio_probe_dt(pdev); | |
415 | if (status < 0) | |
416 | return status; | |
417 | if (status > 0) | |
418 | use_of = 1; | |
d29389de | 419 | |
8074cf06 | 420 | pdata = dev_get_platdata(&pdev->dev); |
d29389de | 421 | #ifdef GENERIC_BITBANG |
d1d81802 | 422 | if (!pdata || (!use_of && !pdata->num_chipselect)) |
d29389de DB |
423 | return -ENODEV; |
424 | #endif | |
425 | ||
d1d81802 TF |
426 | if (use_of && !SPI_N_CHIPSEL) |
427 | num_devices = 1; | |
428 | else | |
429 | num_devices = SPI_N_CHIPSEL; | |
430 | ||
3c8e1a84 | 431 | status = spi_gpio_request(pdata, dev_name(&pdev->dev), &master_flags); |
d29389de DB |
432 | if (status < 0) |
433 | return status; | |
434 | ||
161c2dd3 | 435 | master = spi_alloc_master(&pdev->dev, sizeof(*spi_gpio) + |
cfb4bbd8 | 436 | (sizeof(unsigned long) * num_devices)); |
d29389de DB |
437 | if (!master) { |
438 | status = -ENOMEM; | |
439 | goto gpio_free; | |
440 | } | |
441 | spi_gpio = spi_master_get_devdata(master); | |
442 | platform_set_drvdata(pdev, spi_gpio); | |
443 | ||
444 | spi_gpio->pdev = pdev; | |
445 | if (pdata) | |
446 | spi_gpio->pdata = *pdata; | |
447 | ||
24778be2 | 448 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); |
3c8e1a84 | 449 | master->flags = master_flags; |
d29389de | 450 | master->bus_num = pdev->id; |
d1d81802 | 451 | master->num_chipselect = num_devices; |
d29389de DB |
452 | master->setup = spi_gpio_setup; |
453 | master->cleanup = spi_gpio_cleanup; | |
38ab18ca DM |
454 | #ifdef CONFIG_OF |
455 | master->dev.of_node = pdev->dev.of_node; | |
456 | ||
457 | if (use_of) { | |
458 | int i; | |
459 | struct device_node *np = pdev->dev.of_node; | |
460 | ||
461 | /* | |
462 | * In DT environments, take the CS GPIO from the "cs-gpios" | |
463 | * property of the node. | |
464 | */ | |
465 | ||
d1d81802 TF |
466 | if (!SPI_N_CHIPSEL) |
467 | spi_gpio->cs_gpios[0] = SPI_GPIO_NO_CHIPSELECT; | |
468 | else | |
cfb4bbd8 TF |
469 | for (i = 0; i < SPI_N_CHIPSEL; i++) { |
470 | status = of_get_named_gpio(np, "cs-gpios", i); | |
471 | if (status < 0) { | |
472 | dev_err(&pdev->dev, | |
473 | "invalid cs-gpios property\n"); | |
474 | goto gpio_free; | |
475 | } | |
476 | spi_gpio->cs_gpios[i] = status; | |
477 | } | |
38ab18ca DM |
478 | } |
479 | #endif | |
d29389de | 480 | |
94c69f76 | 481 | spi_gpio->bitbang.master = master; |
d29389de | 482 | spi_gpio->bitbang.chipselect = spi_gpio_chipselect; |
3c8e1a84 | 483 | |
23699f98 | 484 | if ((master_flags & (SPI_MASTER_NO_TX | SPI_MASTER_NO_RX)) == 0) { |
3c8e1a84 MS |
485 | spi_gpio->bitbang.txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0; |
486 | spi_gpio->bitbang.txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1; | |
487 | spi_gpio->bitbang.txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2; | |
488 | spi_gpio->bitbang.txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3; | |
489 | } else { | |
490 | spi_gpio->bitbang.txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0; | |
491 | spi_gpio->bitbang.txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1; | |
492 | spi_gpio->bitbang.txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2; | |
493 | spi_gpio->bitbang.txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3; | |
494 | } | |
d29389de DB |
495 | spi_gpio->bitbang.setup_transfer = spi_bitbang_setup_transfer; |
496 | spi_gpio->bitbang.flags = SPI_CS_HIGH; | |
497 | ||
498 | status = spi_bitbang_start(&spi_gpio->bitbang); | |
499 | if (status < 0) { | |
d29389de | 500 | gpio_free: |
3c8e1a84 MS |
501 | if (SPI_MISO_GPIO != SPI_GPIO_NO_MISO) |
502 | gpio_free(SPI_MISO_GPIO); | |
503 | if (SPI_MOSI_GPIO != SPI_GPIO_NO_MOSI) | |
504 | gpio_free(SPI_MOSI_GPIO); | |
d29389de DB |
505 | gpio_free(SPI_SCK_GPIO); |
506 | spi_master_put(master); | |
507 | } | |
508 | ||
509 | return status; | |
510 | } | |
511 | ||
fd4a319b | 512 | static int spi_gpio_remove(struct platform_device *pdev) |
d29389de DB |
513 | { |
514 | struct spi_gpio *spi_gpio; | |
515 | struct spi_gpio_platform_data *pdata; | |
d29389de DB |
516 | |
517 | spi_gpio = platform_get_drvdata(pdev); | |
8074cf06 | 518 | pdata = dev_get_platdata(&pdev->dev); |
d29389de DB |
519 | |
520 | /* stop() unregisters child devices too */ | |
d9721ae1 | 521 | spi_bitbang_stop(&spi_gpio->bitbang); |
d29389de | 522 | |
3c8e1a84 MS |
523 | if (SPI_MISO_GPIO != SPI_GPIO_NO_MISO) |
524 | gpio_free(SPI_MISO_GPIO); | |
525 | if (SPI_MOSI_GPIO != SPI_GPIO_NO_MOSI) | |
526 | gpio_free(SPI_MOSI_GPIO); | |
d29389de | 527 | gpio_free(SPI_SCK_GPIO); |
94c69f76 | 528 | spi_master_put(spi_gpio->bitbang.master); |
d29389de | 529 | |
d9721ae1 | 530 | return 0; |
d29389de DB |
531 | } |
532 | ||
533 | MODULE_ALIAS("platform:" DRIVER_NAME); | |
534 | ||
535 | static struct platform_driver spi_gpio_driver = { | |
38ab18ca DM |
536 | .driver = { |
537 | .name = DRIVER_NAME, | |
38ab18ca DM |
538 | .of_match_table = of_match_ptr(spi_gpio_dt_ids), |
539 | }, | |
940ab889 | 540 | .probe = spi_gpio_probe, |
fd4a319b | 541 | .remove = spi_gpio_remove, |
d29389de | 542 | }; |
940ab889 | 543 | module_platform_driver(spi_gpio_driver); |
d29389de DB |
544 | |
545 | MODULE_DESCRIPTION("SPI master driver using generic bitbanged GPIO "); | |
546 | MODULE_AUTHOR("David Brownell"); | |
547 | MODULE_LICENSE("GPL"); |