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Commit | Line | Data |
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2744e8af LW |
1 | /* |
2 | * Core driver for the pin muxing portions of the pin control subsystem | |
3 | * | |
e93bcee0 | 4 | * Copyright (C) 2011-2012 ST-Ericsson SA |
2744e8af LW |
5 | * Written on behalf of Linaro for ST-Ericsson |
6 | * Based on bits of regulator core, gpio core and clk core | |
7 | * | |
8 | * Author: Linus Walleij <[email protected]> | |
9 | * | |
7ecdb16f SW |
10 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. |
11 | * | |
2744e8af LW |
12 | * License terms: GNU General Public License (GPL) version 2 |
13 | */ | |
14 | #define pr_fmt(fmt) "pinmux core: " fmt | |
15 | ||
16 | #include <linux/kernel.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/device.h> | |
20 | #include <linux/slab.h> | |
21 | #include <linux/radix-tree.h> | |
22 | #include <linux/err.h> | |
23 | #include <linux/list.h> | |
97607d15 | 24 | #include <linux/string.h> |
2744e8af LW |
25 | #include <linux/sysfs.h> |
26 | #include <linux/debugfs.h> | |
27 | #include <linux/seq_file.h> | |
28 | #include <linux/pinctrl/machine.h> | |
29 | #include <linux/pinctrl/pinmux.h> | |
30 | #include "core.h" | |
befe5bdf | 31 | #include "pinmux.h" |
2744e8af | 32 | |
03665e0f SW |
33 | int pinmux_check_ops(struct pinctrl_dev *pctldev) |
34 | { | |
35 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
a1d31f71 | 36 | unsigned nfuncs; |
03665e0f SW |
37 | unsigned selector = 0; |
38 | ||
39 | /* Check that we implement required operations */ | |
a1d31f71 DA |
40 | if (!ops || |
41 | !ops->get_functions_count || | |
03665e0f SW |
42 | !ops->get_function_name || |
43 | !ops->get_function_groups || | |
03e9f0ca | 44 | !ops->set_mux) { |
ad6e1107 | 45 | dev_err(pctldev->dev, "pinmux ops lacks necessary functions\n"); |
03665e0f | 46 | return -EINVAL; |
ad6e1107 | 47 | } |
03665e0f | 48 | /* Check that all functions registered have names */ |
a1d31f71 | 49 | nfuncs = ops->get_functions_count(pctldev); |
d1e90e9e | 50 | while (selector < nfuncs) { |
03665e0f SW |
51 | const char *fname = ops->get_function_name(pctldev, |
52 | selector); | |
53 | if (!fname) { | |
a1d31f71 | 54 | dev_err(pctldev->dev, "pinmux ops has no name for function%u\n", |
03665e0f SW |
55 | selector); |
56 | return -EINVAL; | |
57 | } | |
58 | selector++; | |
59 | } | |
60 | ||
61 | return 0; | |
62 | } | |
63 | ||
3f713b7c | 64 | int pinmux_validate_map(const struct pinctrl_map *map, int i) |
1e2082b5 SW |
65 | { |
66 | if (!map->data.mux.function) { | |
67 | pr_err("failed to register map %s (%d): no function given\n", | |
68 | map->name, i); | |
69 | return -EINVAL; | |
70 | } | |
71 | ||
72 | return 0; | |
73 | } | |
74 | ||
2744e8af LW |
75 | /** |
76 | * pin_request() - request a single pin to be muxed in, typically for GPIO | |
77 | * @pin: the pin number in the global pin space | |
3cc70ed3 SW |
78 | * @owner: a representation of the owner of this pin; typically the device |
79 | * name that controls its mux function, or the requested GPIO name | |
2744e8af LW |
80 | * @gpio_range: the range matching the GPIO pin if this is a request for a |
81 | * single GPIO pin | |
82 | */ | |
83 | static int pin_request(struct pinctrl_dev *pctldev, | |
3cc70ed3 | 84 | int pin, const char *owner, |
2744e8af LW |
85 | struct pinctrl_gpio_range *gpio_range) |
86 | { | |
87 | struct pin_desc *desc; | |
88 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
89 | int status = -EINVAL; | |
90 | ||
2744e8af LW |
91 | desc = pin_desc_get(pctldev, pin); |
92 | if (desc == NULL) { | |
51cd24ee | 93 | dev_err(pctldev->dev, |
d4705316 SW |
94 | "pin %d is not registered so it cannot be requested\n", |
95 | pin); | |
2744e8af LW |
96 | goto out; |
97 | } | |
98 | ||
d0bd8df5 DA |
99 | dev_dbg(pctldev->dev, "request pin %d (%s) for %s\n", |
100 | pin, desc->name, owner); | |
101 | ||
b1eb8fab VZ |
102 | if ((!gpio_range || ops->strict) && |
103 | desc->mux_usecount && strcmp(desc->mux_owner, owner)) { | |
104 | dev_err(pctldev->dev, | |
105 | "pin %s already requested by %s; cannot claim for %s\n", | |
106 | desc->name, desc->mux_owner, owner); | |
107 | goto out; | |
108 | } | |
109 | ||
110 | if ((gpio_range || ops->strict) && desc->gpio_owner) { | |
111 | dev_err(pctldev->dev, | |
112 | "pin %s already requested by %s; cannot claim for %s\n", | |
113 | desc->name, desc->gpio_owner, owner); | |
114 | goto out; | |
115 | } | |
0e3db173 | 116 | |
b1eb8fab | 117 | if (gpio_range) { |
652162d4 SW |
118 | desc->gpio_owner = owner; |
119 | } else { | |
652162d4 SW |
120 | desc->mux_usecount++; |
121 | if (desc->mux_usecount > 1) | |
122 | return 0; | |
123 | ||
124 | desc->mux_owner = owner; | |
125 | } | |
2744e8af LW |
126 | |
127 | /* Let each pin increase references to this module */ | |
128 | if (!try_module_get(pctldev->owner)) { | |
51cd24ee | 129 | dev_err(pctldev->dev, |
2744e8af LW |
130 | "could not increase module refcount for pin %d\n", |
131 | pin); | |
132 | status = -EINVAL; | |
133 | goto out_free_pin; | |
134 | } | |
135 | ||
136 | /* | |
137 | * If there is no kind of request function for the pin we just assume | |
138 | * we got it by default and proceed. | |
139 | */ | |
3712a3c4 | 140 | if (gpio_range && ops->gpio_request_enable) |
2744e8af LW |
141 | /* This requests and enables a single GPIO pin */ |
142 | status = ops->gpio_request_enable(pctldev, gpio_range, pin); | |
143 | else if (ops->request) | |
144 | status = ops->request(pctldev, pin); | |
145 | else | |
146 | status = 0; | |
147 | ||
0e3db173 | 148 | if (status) { |
d4705316 | 149 | dev_err(pctldev->dev, "request() failed for pin %d\n", pin); |
0e3db173 SW |
150 | module_put(pctldev->owner); |
151 | } | |
152 | ||
2744e8af | 153 | out_free_pin: |
0e3db173 | 154 | if (status) { |
652162d4 SW |
155 | if (gpio_range) { |
156 | desc->gpio_owner = NULL; | |
157 | } else { | |
158 | desc->mux_usecount--; | |
159 | if (!desc->mux_usecount) | |
160 | desc->mux_owner = NULL; | |
161 | } | |
0e3db173 | 162 | } |
2744e8af LW |
163 | out: |
164 | if (status) | |
51cd24ee | 165 | dev_err(pctldev->dev, "pin-%d (%s) status %d\n", |
d4705316 | 166 | pin, owner, status); |
2744e8af LW |
167 | |
168 | return status; | |
169 | } | |
170 | ||
171 | /** | |
172 | * pin_free() - release a single muxed in pin so something else can be muxed | |
173 | * @pctldev: pin controller device handling this pin | |
174 | * @pin: the pin to free | |
3712a3c4 SW |
175 | * @gpio_range: the range matching the GPIO pin if this is a request for a |
176 | * single GPIO pin | |
336cdba0 | 177 | * |
3cc70ed3 SW |
178 | * This function returns a pointer to the previous owner. This is used |
179 | * for callers that dynamically allocate an owner name so it can be freed | |
336cdba0 | 180 | * once the pin is free. This is done for GPIO request functions. |
2744e8af | 181 | */ |
3712a3c4 SW |
182 | static const char *pin_free(struct pinctrl_dev *pctldev, int pin, |
183 | struct pinctrl_gpio_range *gpio_range) | |
2744e8af LW |
184 | { |
185 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
186 | struct pin_desc *desc; | |
3cc70ed3 | 187 | const char *owner; |
2744e8af LW |
188 | |
189 | desc = pin_desc_get(pctldev, pin); | |
190 | if (desc == NULL) { | |
51cd24ee | 191 | dev_err(pctldev->dev, |
2744e8af | 192 | "pin is not registered so it cannot be freed\n"); |
3712a3c4 | 193 | return NULL; |
2744e8af LW |
194 | } |
195 | ||
652162d4 | 196 | if (!gpio_range) { |
740924a2 RG |
197 | /* |
198 | * A pin should not be freed more times than allocated. | |
199 | */ | |
200 | if (WARN_ON(!desc->mux_usecount)) | |
201 | return NULL; | |
652162d4 SW |
202 | desc->mux_usecount--; |
203 | if (desc->mux_usecount) | |
204 | return NULL; | |
205 | } | |
0e3db173 | 206 | |
3712a3c4 SW |
207 | /* |
208 | * If there is no kind of request function for the pin we just assume | |
209 | * we got it by default and proceed. | |
210 | */ | |
211 | if (gpio_range && ops->gpio_disable_free) | |
212 | ops->gpio_disable_free(pctldev, gpio_range, pin); | |
213 | else if (ops->free) | |
2744e8af LW |
214 | ops->free(pctldev, pin); |
215 | ||
652162d4 SW |
216 | if (gpio_range) { |
217 | owner = desc->gpio_owner; | |
218 | desc->gpio_owner = NULL; | |
219 | } else { | |
220 | owner = desc->mux_owner; | |
221 | desc->mux_owner = NULL; | |
222 | desc->mux_setting = NULL; | |
223 | } | |
224 | ||
2744e8af | 225 | module_put(pctldev->owner); |
3712a3c4 | 226 | |
3cc70ed3 | 227 | return owner; |
2744e8af LW |
228 | } |
229 | ||
230 | /** | |
befe5bdf LW |
231 | * pinmux_request_gpio() - request pinmuxing for a GPIO pin |
232 | * @pctldev: pin controller device affected | |
233 | * @pin: the pin to mux in for GPIO | |
234 | * @range: the applicable GPIO range | |
2744e8af | 235 | */ |
befe5bdf LW |
236 | int pinmux_request_gpio(struct pinctrl_dev *pctldev, |
237 | struct pinctrl_gpio_range *range, | |
238 | unsigned pin, unsigned gpio) | |
2744e8af | 239 | { |
3cc70ed3 | 240 | const char *owner; |
2744e8af | 241 | int ret; |
2744e8af LW |
242 | |
243 | /* Conjure some name stating what chip and pin this is taken by */ | |
23a895ae | 244 | owner = kasprintf(GFP_KERNEL, "%s:%d", range->name, gpio); |
3cc70ed3 | 245 | if (!owner) |
1fb1f054 | 246 | return -ENOMEM; |
5d2eaf80 | 247 | |
3cc70ed3 | 248 | ret = pin_request(pctldev, pin, owner, range); |
5d2eaf80 | 249 | if (ret < 0) |
3cc70ed3 | 250 | kfree(owner); |
5d2eaf80 SW |
251 | |
252 | return ret; | |
2744e8af | 253 | } |
2744e8af LW |
254 | |
255 | /** | |
befe5bdf LW |
256 | * pinmux_free_gpio() - release a pin from GPIO muxing |
257 | * @pctldev: the pin controller device for the pin | |
258 | * @pin: the affected currently GPIO-muxed in pin | |
259 | * @range: applicable GPIO range | |
2744e8af | 260 | */ |
befe5bdf LW |
261 | void pinmux_free_gpio(struct pinctrl_dev *pctldev, unsigned pin, |
262 | struct pinctrl_gpio_range *range) | |
2744e8af | 263 | { |
3cc70ed3 | 264 | const char *owner; |
2744e8af | 265 | |
3cc70ed3 SW |
266 | owner = pin_free(pctldev, pin, range); |
267 | kfree(owner); | |
2744e8af | 268 | } |
2744e8af | 269 | |
befe5bdf LW |
270 | /** |
271 | * pinmux_gpio_direction() - set the direction of a single muxed-in GPIO pin | |
272 | * @pctldev: the pin controller handling this pin | |
273 | * @range: applicable GPIO range | |
274 | * @pin: the affected GPIO pin in this controller | |
275 | * @input: true if we set the pin as input, false for output | |
276 | */ | |
277 | int pinmux_gpio_direction(struct pinctrl_dev *pctldev, | |
278 | struct pinctrl_gpio_range *range, | |
279 | unsigned pin, bool input) | |
542e704f | 280 | { |
542e704f LW |
281 | const struct pinmux_ops *ops; |
282 | int ret; | |
542e704f LW |
283 | |
284 | ops = pctldev->desc->pmxops; | |
285 | ||
542e704f LW |
286 | if (ops->gpio_set_direction) |
287 | ret = ops->gpio_set_direction(pctldev, range, pin, input); | |
288 | else | |
289 | ret = 0; | |
290 | ||
291 | return ret; | |
292 | } | |
293 | ||
7ecdb16f SW |
294 | static int pinmux_func_name_to_selector(struct pinctrl_dev *pctldev, |
295 | const char *function) | |
2744e8af LW |
296 | { |
297 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
d1e90e9e | 298 | unsigned nfuncs = ops->get_functions_count(pctldev); |
2744e8af LW |
299 | unsigned selector = 0; |
300 | ||
301 | /* See if this pctldev has this function */ | |
d1e90e9e | 302 | while (selector < nfuncs) { |
163dc9f3 | 303 | const char *fname = ops->get_function_name(pctldev, selector); |
2744e8af | 304 | |
7ecdb16f SW |
305 | if (!strcmp(function, fname)) |
306 | return selector; | |
2744e8af | 307 | |
2744e8af LW |
308 | selector++; |
309 | } | |
310 | ||
e3249570 | 311 | dev_err(pctldev->dev, "function '%s' not supported\n", function); |
2744e8af LW |
312 | return -EINVAL; |
313 | } | |
314 | ||
3f713b7c | 315 | int pinmux_map_to_setting(const struct pinctrl_map *map, |
7ecdb16f | 316 | struct pinctrl_setting *setting) |
2744e8af | 317 | { |
7ecdb16f SW |
318 | struct pinctrl_dev *pctldev = setting->pctldev; |
319 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
7ecdb16f SW |
320 | char const * const *groups; |
321 | unsigned num_groups; | |
2744e8af | 322 | int ret; |
7ecdb16f | 323 | const char *group; |
2744e8af | 324 | |
ad8bb720 DA |
325 | if (!pmxops) { |
326 | dev_err(pctldev->dev, "does not support mux function\n"); | |
327 | return -EINVAL; | |
328 | } | |
329 | ||
15f70e1b | 330 | ret = pinmux_func_name_to_selector(pctldev, map->data.mux.function); |
ad6e1107 JC |
331 | if (ret < 0) { |
332 | dev_err(pctldev->dev, "invalid function %s in map table\n", | |
333 | map->data.mux.function); | |
15f70e1b | 334 | return ret; |
ad6e1107 | 335 | } |
15f70e1b | 336 | setting->data.mux.func = ret; |
2744e8af | 337 | |
1e2082b5 | 338 | ret = pmxops->get_function_groups(pctldev, setting->data.mux.func, |
7ecdb16f | 339 | &groups, &num_groups); |
ad6e1107 JC |
340 | if (ret < 0) { |
341 | dev_err(pctldev->dev, "can't query groups for function %s\n", | |
342 | map->data.mux.function); | |
7ecdb16f | 343 | return ret; |
ad6e1107 JC |
344 | } |
345 | if (!num_groups) { | |
346 | dev_err(pctldev->dev, | |
347 | "function %s can't be selected on any group\n", | |
348 | map->data.mux.function); | |
2744e8af | 349 | return -EINVAL; |
ad6e1107 | 350 | } |
1e2082b5 | 351 | if (map->data.mux.group) { |
1e2082b5 | 352 | group = map->data.mux.group; |
dff43594 AS |
353 | ret = match_string(groups, num_groups, group); |
354 | if (ret < 0) { | |
ad6e1107 JC |
355 | dev_err(pctldev->dev, |
356 | "invalid group \"%s\" for function \"%s\"\n", | |
357 | group, map->data.mux.function); | |
dff43594 | 358 | return ret; |
ad6e1107 | 359 | } |
7ecdb16f SW |
360 | } else { |
361 | group = groups[0]; | |
2744e8af | 362 | } |
2744e8af | 363 | |
15f70e1b | 364 | ret = pinctrl_get_group_selector(pctldev, group); |
ad6e1107 JC |
365 | if (ret < 0) { |
366 | dev_err(pctldev->dev, "invalid group %s in map table\n", | |
367 | map->data.mux.group); | |
15f70e1b | 368 | return ret; |
ad6e1107 | 369 | } |
15f70e1b | 370 | setting->data.mux.group = ret; |
2744e8af | 371 | |
2744e8af LW |
372 | return 0; |
373 | } | |
374 | ||
3f713b7c | 375 | void pinmux_free_setting(const struct pinctrl_setting *setting) |
2744e8af | 376 | { |
1a78958d | 377 | /* This function is currently unused */ |
2744e8af | 378 | } |
2744e8af | 379 | |
3f713b7c | 380 | int pinmux_enable_setting(const struct pinctrl_setting *setting) |
2744e8af | 381 | { |
7ecdb16f | 382 | struct pinctrl_dev *pctldev = setting->pctldev; |
ba110d90 | 383 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; |
befe5bdf | 384 | const struct pinmux_ops *ops = pctldev->desc->pmxops; |
e5b3b2d9 AT |
385 | int ret = 0; |
386 | const unsigned *pins = NULL; | |
387 | unsigned num_pins = 0; | |
ba110d90 SW |
388 | int i; |
389 | struct pin_desc *desc; | |
390 | ||
e5b3b2d9 AT |
391 | if (pctlops->get_group_pins) |
392 | ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, | |
393 | &pins, &num_pins); | |
394 | ||
ba110d90 | 395 | if (ret) { |
1c8e7944 LW |
396 | const char *gname; |
397 | ||
ba110d90 | 398 | /* errors only affect debug data, so just warn */ |
1c8e7944 LW |
399 | gname = pctlops->get_group_name(pctldev, |
400 | setting->data.mux.group); | |
ba110d90 | 401 | dev_warn(pctldev->dev, |
1c8e7944 LW |
402 | "could not get pins for group %s\n", |
403 | gname); | |
ba110d90 SW |
404 | num_pins = 0; |
405 | } | |
406 | ||
1a78958d LW |
407 | /* Try to allocate all pins in this group, one by one */ |
408 | for (i = 0; i < num_pins; i++) { | |
409 | ret = pin_request(pctldev, pins[i], setting->dev_name, NULL); | |
410 | if (ret) { | |
1c8e7944 LW |
411 | const char *gname; |
412 | const char *pname; | |
413 | ||
414 | desc = pin_desc_get(pctldev, pins[i]); | |
415 | pname = desc ? desc->name : "non-existing"; | |
416 | gname = pctlops->get_group_name(pctldev, | |
417 | setting->data.mux.group); | |
1a78958d | 418 | dev_err(pctldev->dev, |
1c8e7944 LW |
419 | "could not request pin %d (%s) from group %s " |
420 | " on device %s\n", | |
421 | pins[i], pname, gname, | |
422 | pinctrl_dev_get_name(pctldev)); | |
e38d457d | 423 | goto err_pin_request; |
1a78958d LW |
424 | } |
425 | } | |
426 | ||
427 | /* Now that we have acquired the pins, encode the mux setting */ | |
ba110d90 SW |
428 | for (i = 0; i < num_pins; i++) { |
429 | desc = pin_desc_get(pctldev, pins[i]); | |
430 | if (desc == NULL) { | |
431 | dev_warn(pctldev->dev, | |
432 | "could not get pin desc for pin %d\n", | |
433 | pins[i]); | |
434 | continue; | |
435 | } | |
436 | desc->mux_setting = &(setting->data.mux); | |
437 | } | |
2744e8af | 438 | |
03e9f0ca LW |
439 | ret = ops->set_mux(pctldev, setting->data.mux.func, |
440 | setting->data.mux.group); | |
e38d457d AL |
441 | |
442 | if (ret) | |
03e9f0ca | 443 | goto err_set_mux; |
e38d457d AL |
444 | |
445 | return 0; | |
446 | ||
03e9f0ca | 447 | err_set_mux: |
e38d457d AL |
448 | for (i = 0; i < num_pins; i++) { |
449 | desc = pin_desc_get(pctldev, pins[i]); | |
450 | if (desc) | |
451 | desc->mux_setting = NULL; | |
452 | } | |
453 | err_pin_request: | |
454 | /* On error release all taken pins */ | |
455 | while (--i >= 0) | |
456 | pin_free(pctldev, pins[i], NULL); | |
457 | ||
458 | return ret; | |
2744e8af | 459 | } |
2744e8af | 460 | |
3f713b7c | 461 | void pinmux_disable_setting(const struct pinctrl_setting *setting) |
2744e8af | 462 | { |
7ecdb16f | 463 | struct pinctrl_dev *pctldev = setting->pctldev; |
ba110d90 | 464 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; |
e5b3b2d9 AT |
465 | int ret = 0; |
466 | const unsigned *pins = NULL; | |
467 | unsigned num_pins = 0; | |
ba110d90 SW |
468 | int i; |
469 | struct pin_desc *desc; | |
470 | ||
e5b3b2d9 AT |
471 | if (pctlops->get_group_pins) |
472 | ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, | |
473 | &pins, &num_pins); | |
ba110d90 | 474 | if (ret) { |
1c8e7944 LW |
475 | const char *gname; |
476 | ||
ba110d90 | 477 | /* errors only affect debug data, so just warn */ |
1c8e7944 LW |
478 | gname = pctlops->get_group_name(pctldev, |
479 | setting->data.mux.group); | |
ba110d90 | 480 | dev_warn(pctldev->dev, |
1c8e7944 LW |
481 | "could not get pins for group %s\n", |
482 | gname); | |
ba110d90 SW |
483 | num_pins = 0; |
484 | } | |
485 | ||
1a78958d | 486 | /* Flag the descs that no setting is active */ |
ba110d90 SW |
487 | for (i = 0; i < num_pins; i++) { |
488 | desc = pin_desc_get(pctldev, pins[i]); | |
489 | if (desc == NULL) { | |
490 | dev_warn(pctldev->dev, | |
491 | "could not get pin desc for pin %d\n", | |
492 | pins[i]); | |
493 | continue; | |
494 | } | |
744f0a9a | 495 | if (desc->mux_setting == &(setting->data.mux)) { |
744f0a9a | 496 | pin_free(pctldev, pins[i], NULL); |
1c8e7944 LW |
497 | } else { |
498 | const char *gname; | |
1c8e7944 | 499 | |
1c8e7944 LW |
500 | gname = pctlops->get_group_name(pctldev, |
501 | setting->data.mux.group); | |
502 | dev_warn(pctldev->dev, | |
503 | "not freeing pin %d (%s) as part of " | |
504 | "deactivating group %s - it is already " | |
505 | "used for some other setting", | |
808e657c | 506 | pins[i], desc->name, gname); |
744f0a9a | 507 | } |
ba110d90 | 508 | } |
2744e8af | 509 | } |
2744e8af | 510 | |
2744e8af LW |
511 | #ifdef CONFIG_DEBUG_FS |
512 | ||
513 | /* Called from pincontrol core */ | |
514 | static int pinmux_functions_show(struct seq_file *s, void *what) | |
515 | { | |
516 | struct pinctrl_dev *pctldev = s->private; | |
517 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
ad8bb720 | 518 | unsigned nfuncs; |
2744e8af LW |
519 | unsigned func_selector = 0; |
520 | ||
ad8bb720 DA |
521 | if (!pmxops) |
522 | return 0; | |
57b676f9 | 523 | |
42fed7ba | 524 | mutex_lock(&pctldev->mutex); |
ad8bb720 | 525 | nfuncs = pmxops->get_functions_count(pctldev); |
d1e90e9e | 526 | while (func_selector < nfuncs) { |
2744e8af LW |
527 | const char *func = pmxops->get_function_name(pctldev, |
528 | func_selector); | |
529 | const char * const *groups; | |
530 | unsigned num_groups; | |
531 | int ret; | |
532 | int i; | |
533 | ||
534 | ret = pmxops->get_function_groups(pctldev, func_selector, | |
535 | &groups, &num_groups); | |
9d7ebbbf | 536 | if (ret) { |
2744e8af LW |
537 | seq_printf(s, "function %s: COULD NOT GET GROUPS\n", |
538 | func); | |
9d7ebbbf LD |
539 | func_selector++; |
540 | continue; | |
541 | } | |
2744e8af LW |
542 | |
543 | seq_printf(s, "function: %s, groups = [ ", func); | |
544 | for (i = 0; i < num_groups; i++) | |
545 | seq_printf(s, "%s ", groups[i]); | |
546 | seq_puts(s, "]\n"); | |
547 | ||
548 | func_selector++; | |
2744e8af LW |
549 | } |
550 | ||
42fed7ba | 551 | mutex_unlock(&pctldev->mutex); |
57b676f9 | 552 | |
2744e8af LW |
553 | return 0; |
554 | } | |
555 | ||
556 | static int pinmux_pins_show(struct seq_file *s, void *what) | |
557 | { | |
558 | struct pinctrl_dev *pctldev = s->private; | |
ba110d90 SW |
559 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; |
560 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
706e8520 | 561 | unsigned i, pin; |
2744e8af | 562 | |
ad8bb720 DA |
563 | if (!pmxops) |
564 | return 0; | |
565 | ||
2744e8af | 566 | seq_puts(s, "Pinmux settings per pin\n"); |
81508855 LW |
567 | if (pmxops->strict) |
568 | seq_puts(s, | |
569 | "Format: pin (name): mux_owner|gpio_owner (strict) hog?\n"); | |
570 | else | |
571 | seq_puts(s, | |
572 | "Format: pin (name): mux_owner gpio_owner hog?\n"); | |
2744e8af | 573 | |
42fed7ba | 574 | mutex_lock(&pctldev->mutex); |
57b676f9 | 575 | |
706e8520 CP |
576 | /* The pin number can be retrived from the pin controller descriptor */ |
577 | for (i = 0; i < pctldev->desc->npins; i++) { | |
2744e8af | 578 | struct pin_desc *desc; |
1cf94c45 | 579 | bool is_hog = false; |
2744e8af | 580 | |
706e8520 | 581 | pin = pctldev->desc->pins[i].number; |
2744e8af | 582 | desc = pin_desc_get(pctldev, pin); |
706e8520 | 583 | /* Skip if we cannot search the pin */ |
2744e8af LW |
584 | if (desc == NULL) |
585 | continue; | |
586 | ||
652162d4 SW |
587 | if (desc->mux_owner && |
588 | !strcmp(desc->mux_owner, pinctrl_dev_get_name(pctldev))) | |
1cf94c45 LW |
589 | is_hog = true; |
590 | ||
81508855 LW |
591 | if (pmxops->strict) { |
592 | if (desc->mux_owner) | |
593 | seq_printf(s, "pin %d (%s): device %s%s", | |
cf9d994d | 594 | pin, desc->name, desc->mux_owner, |
81508855 LW |
595 | is_hog ? " (HOG)" : ""); |
596 | else if (desc->gpio_owner) | |
597 | seq_printf(s, "pin %d (%s): GPIO %s", | |
cf9d994d | 598 | pin, desc->name, desc->gpio_owner); |
81508855 LW |
599 | else |
600 | seq_printf(s, "pin %d (%s): UNCLAIMED", | |
cf9d994d | 601 | pin, desc->name); |
81508855 LW |
602 | } else { |
603 | /* For non-strict controllers */ | |
cf9d994d | 604 | seq_printf(s, "pin %d (%s): %s %s%s", pin, desc->name, |
81508855 LW |
605 | desc->mux_owner ? desc->mux_owner |
606 | : "(MUX UNCLAIMED)", | |
607 | desc->gpio_owner ? desc->gpio_owner | |
608 | : "(GPIO UNCLAIMED)", | |
609 | is_hog ? " (HOG)" : ""); | |
610 | } | |
ba110d90 | 611 | |
81508855 | 612 | /* If mux: print function+group claiming the pin */ |
ba110d90 SW |
613 | if (desc->mux_setting) |
614 | seq_printf(s, " function %s group %s\n", | |
615 | pmxops->get_function_name(pctldev, | |
616 | desc->mux_setting->func), | |
617 | pctlops->get_group_name(pctldev, | |
618 | desc->mux_setting->group)); | |
619 | else | |
ffd10c2e | 620 | seq_putc(s, '\n'); |
2744e8af LW |
621 | } |
622 | ||
42fed7ba | 623 | mutex_unlock(&pctldev->mutex); |
57b676f9 | 624 | |
2744e8af LW |
625 | return 0; |
626 | } | |
627 | ||
3f713b7c | 628 | void pinmux_show_map(struct seq_file *s, const struct pinctrl_map *map) |
1e2082b5 SW |
629 | { |
630 | seq_printf(s, "group %s\nfunction %s\n", | |
631 | map->data.mux.group ? map->data.mux.group : "(default)", | |
632 | map->data.mux.function); | |
633 | } | |
634 | ||
635 | void pinmux_show_setting(struct seq_file *s, | |
3f713b7c | 636 | const struct pinctrl_setting *setting) |
2744e8af | 637 | { |
7ecdb16f SW |
638 | struct pinctrl_dev *pctldev = setting->pctldev; |
639 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
640 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
641 | ||
1e2082b5 SW |
642 | seq_printf(s, "group: %s (%u) function: %s (%u)\n", |
643 | pctlops->get_group_name(pctldev, setting->data.mux.group), | |
644 | setting->data.mux.group, | |
645 | pmxops->get_function_name(pctldev, setting->data.mux.func), | |
646 | setting->data.mux.func); | |
2744e8af LW |
647 | } |
648 | ||
649 | static int pinmux_functions_open(struct inode *inode, struct file *file) | |
650 | { | |
651 | return single_open(file, pinmux_functions_show, inode->i_private); | |
652 | } | |
653 | ||
654 | static int pinmux_pins_open(struct inode *inode, struct file *file) | |
655 | { | |
656 | return single_open(file, pinmux_pins_show, inode->i_private); | |
657 | } | |
658 | ||
2744e8af LW |
659 | static const struct file_operations pinmux_functions_ops = { |
660 | .open = pinmux_functions_open, | |
661 | .read = seq_read, | |
662 | .llseek = seq_lseek, | |
663 | .release = single_release, | |
664 | }; | |
665 | ||
666 | static const struct file_operations pinmux_pins_ops = { | |
667 | .open = pinmux_pins_open, | |
668 | .read = seq_read, | |
669 | .llseek = seq_lseek, | |
670 | .release = single_release, | |
671 | }; | |
672 | ||
2744e8af LW |
673 | void pinmux_init_device_debugfs(struct dentry *devroot, |
674 | struct pinctrl_dev *pctldev) | |
675 | { | |
676 | debugfs_create_file("pinmux-functions", S_IFREG | S_IRUGO, | |
677 | devroot, pctldev, &pinmux_functions_ops); | |
678 | debugfs_create_file("pinmux-pins", S_IFREG | S_IRUGO, | |
679 | devroot, pctldev, &pinmux_pins_ops); | |
2744e8af LW |
680 | } |
681 | ||
682 | #endif /* CONFIG_DEBUG_FS */ | |
a76edc89 TL |
683 | |
684 | #ifdef CONFIG_GENERIC_PINMUX_FUNCTIONS | |
685 | ||
686 | /** | |
687 | * pinmux_generic_get_function_count() - returns number of functions | |
688 | * @pctldev: pin controller device | |
689 | */ | |
690 | int pinmux_generic_get_function_count(struct pinctrl_dev *pctldev) | |
691 | { | |
692 | return pctldev->num_functions; | |
693 | } | |
694 | EXPORT_SYMBOL_GPL(pinmux_generic_get_function_count); | |
695 | ||
696 | /** | |
697 | * pinmux_generic_get_function_name() - returns the function name | |
698 | * @pctldev: pin controller device | |
699 | * @selector: function number | |
700 | */ | |
701 | const char * | |
702 | pinmux_generic_get_function_name(struct pinctrl_dev *pctldev, | |
703 | unsigned int selector) | |
704 | { | |
705 | struct function_desc *function; | |
706 | ||
707 | function = radix_tree_lookup(&pctldev->pin_function_tree, | |
708 | selector); | |
709 | if (!function) | |
710 | return NULL; | |
711 | ||
712 | return function->name; | |
713 | } | |
714 | EXPORT_SYMBOL_GPL(pinmux_generic_get_function_name); | |
715 | ||
716 | /** | |
717 | * pinmux_generic_get_function_groups() - gets the function groups | |
718 | * @pctldev: pin controller device | |
719 | * @selector: function number | |
720 | * @groups: array of pin groups | |
721 | * @num_groups: number of pin groups | |
722 | */ | |
723 | int pinmux_generic_get_function_groups(struct pinctrl_dev *pctldev, | |
724 | unsigned int selector, | |
725 | const char * const **groups, | |
726 | unsigned * const num_groups) | |
727 | { | |
728 | struct function_desc *function; | |
729 | ||
730 | function = radix_tree_lookup(&pctldev->pin_function_tree, | |
731 | selector); | |
732 | if (!function) { | |
733 | dev_err(pctldev->dev, "%s could not find function%i\n", | |
734 | __func__, selector); | |
735 | return -EINVAL; | |
736 | } | |
737 | *groups = function->group_names; | |
738 | *num_groups = function->num_group_names; | |
739 | ||
740 | return 0; | |
741 | } | |
742 | EXPORT_SYMBOL_GPL(pinmux_generic_get_function_groups); | |
743 | ||
744 | /** | |
745 | * pinmux_generic_get_function() - returns a function based on the number | |
746 | * @pctldev: pin controller device | |
747 | * @group_selector: function number | |
748 | */ | |
749 | struct function_desc *pinmux_generic_get_function(struct pinctrl_dev *pctldev, | |
750 | unsigned int selector) | |
751 | { | |
752 | struct function_desc *function; | |
753 | ||
754 | function = radix_tree_lookup(&pctldev->pin_function_tree, | |
755 | selector); | |
756 | if (!function) | |
757 | return NULL; | |
758 | ||
759 | return function; | |
760 | } | |
761 | EXPORT_SYMBOL_GPL(pinmux_generic_get_function); | |
762 | ||
763 | /** | |
6bffa7e1 | 764 | * pinmux_generic_add_function() - adds a function group |
a76edc89 TL |
765 | * @pctldev: pin controller device |
766 | * @name: name of the function | |
767 | * @groups: array of pin groups | |
768 | * @num_groups: number of pin groups | |
769 | * @data: pin controller driver specific data | |
770 | */ | |
771 | int pinmux_generic_add_function(struct pinctrl_dev *pctldev, | |
772 | const char *name, | |
773 | const char **groups, | |
774 | const unsigned int num_groups, | |
775 | void *data) | |
776 | { | |
777 | struct function_desc *function; | |
778 | ||
779 | function = devm_kzalloc(pctldev->dev, sizeof(*function), GFP_KERNEL); | |
780 | if (!function) | |
781 | return -ENOMEM; | |
782 | ||
783 | function->name = name; | |
784 | function->group_names = groups; | |
785 | function->num_group_names = num_groups; | |
786 | function->data = data; | |
787 | ||
788 | radix_tree_insert(&pctldev->pin_function_tree, pctldev->num_functions, | |
789 | function); | |
790 | ||
791 | pctldev->num_functions++; | |
792 | ||
793 | return 0; | |
794 | } | |
795 | EXPORT_SYMBOL_GPL(pinmux_generic_add_function); | |
796 | ||
797 | /** | |
798 | * pinmux_generic_remove_function() - removes a numbered function | |
799 | * @pctldev: pin controller device | |
800 | * @selector: function number | |
801 | * | |
802 | * Note that the caller must take care of locking. | |
803 | */ | |
804 | int pinmux_generic_remove_function(struct pinctrl_dev *pctldev, | |
805 | unsigned int selector) | |
806 | { | |
807 | struct function_desc *function; | |
808 | ||
809 | function = radix_tree_lookup(&pctldev->pin_function_tree, | |
810 | selector); | |
811 | if (!function) | |
812 | return -ENOENT; | |
813 | ||
814 | radix_tree_delete(&pctldev->pin_function_tree, selector); | |
815 | devm_kfree(pctldev->dev, function); | |
816 | ||
817 | pctldev->num_functions--; | |
818 | ||
819 | return 0; | |
820 | } | |
821 | EXPORT_SYMBOL_GPL(pinmux_generic_remove_function); | |
822 | ||
823 | /** | |
824 | * pinmux_generic_free_functions() - removes all functions | |
825 | * @pctldev: pin controller device | |
826 | * | |
664b7c47 TL |
827 | * Note that the caller must take care of locking. The pinctrl |
828 | * functions are allocated with devm_kzalloc() so no need to free | |
829 | * them here. | |
a76edc89 TL |
830 | */ |
831 | void pinmux_generic_free_functions(struct pinctrl_dev *pctldev) | |
832 | { | |
833 | struct radix_tree_iter iter; | |
906a2a39 | 834 | void __rcu **slot; |
a76edc89 TL |
835 | |
836 | radix_tree_for_each_slot(slot, &pctldev->pin_function_tree, &iter, 0) | |
664b7c47 | 837 | radix_tree_delete(&pctldev->pin_function_tree, iter.index); |
a76edc89 TL |
838 | |
839 | pctldev->num_functions = 0; | |
840 | } | |
841 | ||
842 | #endif /* CONFIG_GENERIC_PINMUX_FUNCTIONS */ |