]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * Intel & MS High Precision Event Timer Implementation. | |
3 | * | |
4 | * Copyright (C) 2003 Intel Corporation | |
5 | * Venki Pallipadi | |
6 | * (c) Copyright 2004 Hewlett-Packard Development Company, L.P. | |
7 | * Bob Picco <[email protected]> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
1da177e4 LT |
14 | #include <linux/interrupt.h> |
15 | #include <linux/module.h> | |
16 | #include <linux/kernel.h> | |
17 | #include <linux/types.h> | |
18 | #include <linux/miscdevice.h> | |
19 | #include <linux/major.h> | |
20 | #include <linux/ioport.h> | |
21 | #include <linux/fcntl.h> | |
22 | #include <linux/init.h> | |
23 | #include <linux/poll.h> | |
f23f6e08 | 24 | #include <linux/mm.h> |
1da177e4 LT |
25 | #include <linux/proc_fs.h> |
26 | #include <linux/spinlock.h> | |
27 | #include <linux/sysctl.h> | |
28 | #include <linux/wait.h> | |
29 | #include <linux/bcd.h> | |
30 | #include <linux/seq_file.h> | |
31 | #include <linux/bitops.h> | |
54066a57 | 32 | #include <linux/compat.h> |
0aa366f3 | 33 | #include <linux/clocksource.h> |
0ca01763 | 34 | #include <linux/uaccess.h> |
5a0e3ad6 | 35 | #include <linux/slab.h> |
0ca01763 | 36 | #include <linux/io.h> |
1da177e4 LT |
37 | |
38 | #include <asm/current.h> | |
1da177e4 LT |
39 | #include <asm/irq.h> |
40 | #include <asm/div64.h> | |
41 | ||
42 | #include <linux/acpi.h> | |
43 | #include <acpi/acpi_bus.h> | |
44 | #include <linux/hpet.h> | |
45 | ||
46 | /* | |
47 | * The High Precision Event Timer driver. | |
48 | * This driver is closely modelled after the rtc.c driver. | |
e45f2c07 | 49 | * http://www.intel.com/hardwaredesign/hpetspec_1.pdf |
1da177e4 LT |
50 | */ |
51 | #define HPET_USER_FREQ (64) | |
52 | #define HPET_DRIFT (500) | |
53 | ||
757c4724 RD |
54 | #define HPET_RANGE_SIZE 1024 /* from HPET spec */ |
55 | ||
64a76f66 DB |
56 | |
57 | /* WARNING -- don't get confused. These macros are never used | |
58 | * to write the (single) counter, and rarely to read it. | |
59 | * They're badly named; to fix, someday. | |
60 | */ | |
0aa366f3 TL |
61 | #if BITS_PER_LONG == 64 |
62 | #define write_counter(V, MC) writeq(V, MC) | |
63 | #define read_counter(MC) readq(MC) | |
64 | #else | |
65 | #define write_counter(V, MC) writel(V, MC) | |
66 | #define read_counter(MC) readl(MC) | |
67 | #endif | |
68 | ||
54066a57 | 69 | static DEFINE_MUTEX(hpet_mutex); /* replaces BKL */ |
642d30bb | 70 | static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ; |
1da177e4 | 71 | |
3dffec45 ÇO |
72 | /* This clocksource driver currently only works on ia64 */ |
73 | #ifdef CONFIG_IA64 | |
0aa366f3 TL |
74 | static void __iomem *hpet_mctr; |
75 | ||
8e19608e | 76 | static cycle_t read_hpet(struct clocksource *cs) |
0aa366f3 TL |
77 | { |
78 | return (cycle_t)read_counter((void __iomem *)hpet_mctr); | |
79 | } | |
80 | ||
81 | static struct clocksource clocksource_hpet = { | |
0ca01763 JSR |
82 | .name = "hpet", |
83 | .rating = 250, | |
84 | .read = read_hpet, | |
85 | .mask = CLOCKSOURCE_MASK(64), | |
0ca01763 | 86 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
0aa366f3 TL |
87 | }; |
88 | static struct clocksource *hpet_clocksource; | |
3dffec45 | 89 | #endif |
0aa366f3 | 90 | |
1da177e4 LT |
91 | /* A lock for concurrent access by app and isr hpet activity. */ |
92 | static DEFINE_SPINLOCK(hpet_lock); | |
1da177e4 LT |
93 | |
94 | #define HPET_DEV_NAME (7) | |
95 | ||
96 | struct hpet_dev { | |
97 | struct hpets *hd_hpets; | |
98 | struct hpet __iomem *hd_hpet; | |
99 | struct hpet_timer __iomem *hd_timer; | |
100 | unsigned long hd_ireqfreq; | |
101 | unsigned long hd_irqdata; | |
102 | wait_queue_head_t hd_waitqueue; | |
103 | struct fasync_struct *hd_async_queue; | |
1da177e4 LT |
104 | unsigned int hd_flags; |
105 | unsigned int hd_irq; | |
106 | unsigned int hd_hdwirq; | |
107 | char hd_name[HPET_DEV_NAME]; | |
108 | }; | |
109 | ||
110 | struct hpets { | |
111 | struct hpets *hp_next; | |
112 | struct hpet __iomem *hp_hpet; | |
113 | unsigned long hp_hpet_phys; | |
0aa366f3 | 114 | struct clocksource *hp_clocksource; |
ba3f213f | 115 | unsigned long long hp_tick_freq; |
1da177e4 LT |
116 | unsigned long hp_delta; |
117 | unsigned int hp_ntimer; | |
118 | unsigned int hp_which; | |
119 | struct hpet_dev hp_dev[1]; | |
120 | }; | |
121 | ||
122 | static struct hpets *hpets; | |
123 | ||
124 | #define HPET_OPEN 0x0001 | |
125 | #define HPET_IE 0x0002 /* interrupt enabled */ | |
126 | #define HPET_PERIODIC 0x0004 | |
0d290861 | 127 | #define HPET_SHARED_IRQ 0x0008 |
1da177e4 | 128 | |
1da177e4 LT |
129 | |
130 | #ifndef readq | |
887c27f3 | 131 | static inline unsigned long long readq(void __iomem *addr) |
1da177e4 LT |
132 | { |
133 | return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL); | |
134 | } | |
135 | #endif | |
136 | ||
137 | #ifndef writeq | |
887c27f3 | 138 | static inline void writeq(unsigned long long v, void __iomem *addr) |
1da177e4 LT |
139 | { |
140 | writel(v & 0xffffffff, addr); | |
141 | writel(v >> 32, addr + 4); | |
142 | } | |
143 | #endif | |
144 | ||
7d12e780 | 145 | static irqreturn_t hpet_interrupt(int irq, void *data) |
1da177e4 LT |
146 | { |
147 | struct hpet_dev *devp; | |
148 | unsigned long isr; | |
149 | ||
150 | devp = data; | |
0d290861 CL |
151 | isr = 1 << (devp - devp->hd_hpets->hp_dev); |
152 | ||
153 | if ((devp->hd_flags & HPET_SHARED_IRQ) && | |
154 | !(isr & readl(&devp->hd_hpet->hpet_isr))) | |
155 | return IRQ_NONE; | |
1da177e4 LT |
156 | |
157 | spin_lock(&hpet_lock); | |
158 | devp->hd_irqdata++; | |
159 | ||
160 | /* | |
161 | * For non-periodic timers, increment the accumulator. | |
162 | * This has the effect of treating non-periodic like periodic. | |
163 | */ | |
164 | if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) { | |
273ef950 NC |
165 | unsigned long m, t, mc, base, k; |
166 | struct hpet __iomem *hpet = devp->hd_hpet; | |
167 | struct hpets *hpetp = devp->hd_hpets; | |
1da177e4 LT |
168 | |
169 | t = devp->hd_ireqfreq; | |
ae21cf92 | 170 | m = read_counter(&devp->hd_timer->hpet_compare); |
273ef950 NC |
171 | mc = read_counter(&hpet->hpet_mc); |
172 | /* The time for the next interrupt would logically be t + m, | |
173 | * however, if we are very unlucky and the interrupt is delayed | |
174 | * for longer than t then we will completely miss the next | |
175 | * interrupt if we set t + m and an application will hang. | |
176 | * Therefore we need to make a more complex computation assuming | |
177 | * that there exists a k for which the following is true: | |
178 | * k * t + base < mc + delta | |
179 | * (k + 1) * t + base > mc + delta | |
180 | * where t is the interval in hpet ticks for the given freq, | |
181 | * base is the theoretical start value 0 < base < t, | |
182 | * mc is the main counter value at the time of the interrupt, | |
183 | * delta is the time it takes to write the a value to the | |
184 | * comparator. | |
185 | * k may then be computed as (mc - base + delta) / t . | |
186 | */ | |
187 | base = mc % t; | |
188 | k = (mc - base + hpetp->hp_delta) / t; | |
189 | write_counter(t * (k + 1) + base, | |
190 | &devp->hd_timer->hpet_compare); | |
1da177e4 LT |
191 | } |
192 | ||
0d290861 CL |
193 | if (devp->hd_flags & HPET_SHARED_IRQ) |
194 | writel(isr, &devp->hd_hpet->hpet_isr); | |
1da177e4 LT |
195 | spin_unlock(&hpet_lock); |
196 | ||
1da177e4 LT |
197 | wake_up_interruptible(&devp->hd_waitqueue); |
198 | ||
199 | kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN); | |
200 | ||
201 | return IRQ_HANDLED; | |
202 | } | |
203 | ||
70ef6d59 KH |
204 | static void hpet_timer_set_irq(struct hpet_dev *devp) |
205 | { | |
206 | unsigned long v; | |
207 | int irq, gsi; | |
208 | struct hpet_timer __iomem *timer; | |
209 | ||
210 | spin_lock_irq(&hpet_lock); | |
211 | if (devp->hd_hdwirq) { | |
212 | spin_unlock_irq(&hpet_lock); | |
213 | return; | |
214 | } | |
215 | ||
216 | timer = devp->hd_timer; | |
217 | ||
218 | /* we prefer level triggered mode */ | |
219 | v = readl(&timer->hpet_config); | |
220 | if (!(v & Tn_INT_TYPE_CNF_MASK)) { | |
221 | v |= Tn_INT_TYPE_CNF_MASK; | |
222 | writel(v, &timer->hpet_config); | |
223 | } | |
224 | spin_unlock_irq(&hpet_lock); | |
225 | ||
226 | v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >> | |
227 | Tn_INT_ROUTE_CAP_SHIFT; | |
228 | ||
229 | /* | |
230 | * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by | |
231 | * legacy device. In IO APIC mode, we skip all the legacy IRQS. | |
232 | */ | |
233 | if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) | |
234 | v &= ~0xf3df; | |
235 | else | |
236 | v &= ~0xffff; | |
237 | ||
e5d61511 | 238 | for_each_set_bit(irq, &v, HPET_MAX_IRQ) { |
1f45f562 | 239 | if (irq >= nr_irqs) { |
70ef6d59 KH |
240 | irq = HPET_MAX_IRQ; |
241 | break; | |
242 | } | |
243 | ||
a2f809b0 | 244 | gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE, |
70ef6d59 KH |
245 | ACPI_ACTIVE_LOW); |
246 | if (gsi > 0) | |
247 | break; | |
248 | ||
249 | /* FIXME: Setup interrupt source table */ | |
250 | } | |
251 | ||
252 | if (irq < HPET_MAX_IRQ) { | |
253 | spin_lock_irq(&hpet_lock); | |
254 | v = readl(&timer->hpet_config); | |
255 | v |= irq << Tn_INT_ROUTE_CNF_SHIFT; | |
256 | writel(v, &timer->hpet_config); | |
257 | devp->hd_hdwirq = gsi; | |
258 | spin_unlock_irq(&hpet_lock); | |
259 | } | |
260 | return; | |
261 | } | |
262 | ||
1da177e4 LT |
263 | static int hpet_open(struct inode *inode, struct file *file) |
264 | { | |
265 | struct hpet_dev *devp; | |
266 | struct hpets *hpetp; | |
267 | int i; | |
268 | ||
269 | if (file->f_mode & FMODE_WRITE) | |
270 | return -EINVAL; | |
271 | ||
54066a57 | 272 | mutex_lock(&hpet_mutex); |
1da177e4 LT |
273 | spin_lock_irq(&hpet_lock); |
274 | ||
275 | for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next) | |
276 | for (i = 0; i < hpetp->hp_ntimer; i++) | |
64a76f66 | 277 | if (hpetp->hp_dev[i].hd_flags & HPET_OPEN) |
1da177e4 LT |
278 | continue; |
279 | else { | |
280 | devp = &hpetp->hp_dev[i]; | |
281 | break; | |
282 | } | |
283 | ||
284 | if (!devp) { | |
285 | spin_unlock_irq(&hpet_lock); | |
54066a57 | 286 | mutex_unlock(&hpet_mutex); |
1da177e4 LT |
287 | return -EBUSY; |
288 | } | |
289 | ||
290 | file->private_data = devp; | |
291 | devp->hd_irqdata = 0; | |
292 | devp->hd_flags |= HPET_OPEN; | |
293 | spin_unlock_irq(&hpet_lock); | |
54066a57 | 294 | mutex_unlock(&hpet_mutex); |
1da177e4 | 295 | |
70ef6d59 KH |
296 | hpet_timer_set_irq(devp); |
297 | ||
1da177e4 LT |
298 | return 0; |
299 | } | |
300 | ||
301 | static ssize_t | |
302 | hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos) | |
303 | { | |
304 | DECLARE_WAITQUEUE(wait, current); | |
305 | unsigned long data; | |
306 | ssize_t retval; | |
307 | struct hpet_dev *devp; | |
308 | ||
309 | devp = file->private_data; | |
310 | if (!devp->hd_ireqfreq) | |
311 | return -EIO; | |
312 | ||
313 | if (count < sizeof(unsigned long)) | |
314 | return -EINVAL; | |
315 | ||
316 | add_wait_queue(&devp->hd_waitqueue, &wait); | |
317 | ||
318 | for ( ; ; ) { | |
319 | set_current_state(TASK_INTERRUPTIBLE); | |
320 | ||
321 | spin_lock_irq(&hpet_lock); | |
322 | data = devp->hd_irqdata; | |
323 | devp->hd_irqdata = 0; | |
324 | spin_unlock_irq(&hpet_lock); | |
325 | ||
326 | if (data) | |
327 | break; | |
328 | else if (file->f_flags & O_NONBLOCK) { | |
329 | retval = -EAGAIN; | |
330 | goto out; | |
331 | } else if (signal_pending(current)) { | |
332 | retval = -ERESTARTSYS; | |
333 | goto out; | |
334 | } | |
335 | schedule(); | |
336 | } | |
337 | ||
338 | retval = put_user(data, (unsigned long __user *)buf); | |
339 | if (!retval) | |
340 | retval = sizeof(unsigned long); | |
341 | out: | |
342 | __set_current_state(TASK_RUNNING); | |
343 | remove_wait_queue(&devp->hd_waitqueue, &wait); | |
344 | ||
345 | return retval; | |
346 | } | |
347 | ||
348 | static unsigned int hpet_poll(struct file *file, poll_table * wait) | |
349 | { | |
350 | unsigned long v; | |
351 | struct hpet_dev *devp; | |
352 | ||
353 | devp = file->private_data; | |
354 | ||
355 | if (!devp->hd_ireqfreq) | |
356 | return 0; | |
357 | ||
358 | poll_wait(file, &devp->hd_waitqueue, wait); | |
359 | ||
360 | spin_lock_irq(&hpet_lock); | |
361 | v = devp->hd_irqdata; | |
362 | spin_unlock_irq(&hpet_lock); | |
363 | ||
364 | if (v != 0) | |
365 | return POLLIN | POLLRDNORM; | |
366 | ||
367 | return 0; | |
368 | } | |
369 | ||
370 | static int hpet_mmap(struct file *file, struct vm_area_struct *vma) | |
371 | { | |
372 | #ifdef CONFIG_HPET_MMAP | |
373 | struct hpet_dev *devp; | |
374 | unsigned long addr; | |
375 | ||
1da177e4 LT |
376 | devp = file->private_data; |
377 | addr = devp->hd_hpets->hp_hpet_phys; | |
378 | ||
379 | if (addr & (PAGE_SIZE - 1)) | |
380 | return -ENOSYS; | |
381 | ||
1da177e4 | 382 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); |
2323036d | 383 | return vm_iomap_memory(vma, addr, PAGE_SIZE); |
1da177e4 LT |
384 | #else |
385 | return -ENOSYS; | |
386 | #endif | |
387 | } | |
388 | ||
389 | static int hpet_fasync(int fd, struct file *file, int on) | |
390 | { | |
391 | struct hpet_dev *devp; | |
392 | ||
393 | devp = file->private_data; | |
394 | ||
395 | if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0) | |
396 | return 0; | |
397 | else | |
398 | return -EIO; | |
399 | } | |
400 | ||
401 | static int hpet_release(struct inode *inode, struct file *file) | |
402 | { | |
403 | struct hpet_dev *devp; | |
404 | struct hpet_timer __iomem *timer; | |
405 | int irq = 0; | |
406 | ||
407 | devp = file->private_data; | |
408 | timer = devp->hd_timer; | |
409 | ||
410 | spin_lock_irq(&hpet_lock); | |
411 | ||
412 | writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK), | |
413 | &timer->hpet_config); | |
414 | ||
415 | irq = devp->hd_irq; | |
416 | devp->hd_irq = 0; | |
417 | ||
418 | devp->hd_ireqfreq = 0; | |
419 | ||
420 | if (devp->hd_flags & HPET_PERIODIC | |
421 | && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { | |
422 | unsigned long v; | |
423 | ||
424 | v = readq(&timer->hpet_config); | |
425 | v ^= Tn_TYPE_CNF_MASK; | |
426 | writeq(v, &timer->hpet_config); | |
427 | } | |
428 | ||
429 | devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC); | |
430 | spin_unlock_irq(&hpet_lock); | |
431 | ||
432 | if (irq) | |
433 | free_irq(irq, devp); | |
434 | ||
1da177e4 LT |
435 | file->private_data = NULL; |
436 | return 0; | |
437 | } | |
438 | ||
1da177e4 LT |
439 | static int hpet_ioctl_ieon(struct hpet_dev *devp) |
440 | { | |
441 | struct hpet_timer __iomem *timer; | |
442 | struct hpet __iomem *hpet; | |
443 | struct hpets *hpetp; | |
444 | int irq; | |
445 | unsigned long g, v, t, m; | |
446 | unsigned long flags, isr; | |
447 | ||
448 | timer = devp->hd_timer; | |
449 | hpet = devp->hd_hpet; | |
450 | hpetp = devp->hd_hpets; | |
451 | ||
9090e6db CL |
452 | if (!devp->hd_ireqfreq) |
453 | return -EIO; | |
454 | ||
1da177e4 LT |
455 | spin_lock_irq(&hpet_lock); |
456 | ||
457 | if (devp->hd_flags & HPET_IE) { | |
458 | spin_unlock_irq(&hpet_lock); | |
459 | return -EBUSY; | |
460 | } | |
461 | ||
462 | devp->hd_flags |= HPET_IE; | |
0d290861 CL |
463 | |
464 | if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK) | |
465 | devp->hd_flags |= HPET_SHARED_IRQ; | |
1da177e4 LT |
466 | spin_unlock_irq(&hpet_lock); |
467 | ||
1da177e4 LT |
468 | irq = devp->hd_hdwirq; |
469 | ||
470 | if (irq) { | |
0d290861 | 471 | unsigned long irq_flags; |
1da177e4 | 472 | |
96e9694d CL |
473 | if (devp->hd_flags & HPET_SHARED_IRQ) { |
474 | /* | |
475 | * To prevent the interrupt handler from seeing an | |
476 | * unwanted interrupt status bit, program the timer | |
477 | * so that it will not fire in the near future ... | |
478 | */ | |
479 | writel(readl(&timer->hpet_config) & ~Tn_TYPE_CNF_MASK, | |
480 | &timer->hpet_config); | |
481 | write_counter(read_counter(&hpet->hpet_mc), | |
482 | &timer->hpet_compare); | |
483 | /* ... and clear any left-over status. */ | |
484 | isr = 1 << (devp - devp->hd_hpets->hp_dev); | |
485 | writel(isr, &hpet->hpet_isr); | |
486 | } | |
487 | ||
0d290861 CL |
488 | sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev)); |
489 | irq_flags = devp->hd_flags & HPET_SHARED_IRQ | |
0f2ed4c6 | 490 | ? IRQF_SHARED : IRQF_DISABLED; |
0d290861 CL |
491 | if (request_irq(irq, hpet_interrupt, irq_flags, |
492 | devp->hd_name, (void *)devp)) { | |
1da177e4 LT |
493 | printk(KERN_ERR "hpet: IRQ %d is not free\n", irq); |
494 | irq = 0; | |
495 | } | |
496 | } | |
497 | ||
498 | if (irq == 0) { | |
499 | spin_lock_irq(&hpet_lock); | |
500 | devp->hd_flags ^= HPET_IE; | |
501 | spin_unlock_irq(&hpet_lock); | |
502 | return -EIO; | |
503 | } | |
504 | ||
505 | devp->hd_irq = irq; | |
506 | t = devp->hd_ireqfreq; | |
507 | v = readq(&timer->hpet_config); | |
64a76f66 DB |
508 | |
509 | /* 64-bit comparators are not yet supported through the ioctls, | |
510 | * so force this into 32-bit mode if it supports both modes | |
511 | */ | |
512 | g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK; | |
1da177e4 LT |
513 | |
514 | if (devp->hd_flags & HPET_PERIODIC) { | |
1da177e4 | 515 | g |= Tn_TYPE_CNF_MASK; |
ae21cf92 | 516 | v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK; |
1da177e4 LT |
517 | writeq(v, &timer->hpet_config); |
518 | local_irq_save(flags); | |
64a76f66 | 519 | |
ae21cf92 NC |
520 | /* |
521 | * NOTE: First we modify the hidden accumulator | |
64a76f66 DB |
522 | * register supported by periodic-capable comparators. |
523 | * We never want to modify the (single) counter; that | |
ae21cf92 NC |
524 | * would affect all the comparators. The value written |
525 | * is the counter value when the first interrupt is due. | |
64a76f66 | 526 | */ |
1da177e4 LT |
527 | m = read_counter(&hpet->hpet_mc); |
528 | write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); | |
ae21cf92 NC |
529 | /* |
530 | * Then we modify the comparator, indicating the period | |
531 | * for subsequent interrupt. | |
532 | */ | |
533 | write_counter(t, &timer->hpet_compare); | |
1da177e4 LT |
534 | } else { |
535 | local_irq_save(flags); | |
536 | m = read_counter(&hpet->hpet_mc); | |
537 | write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); | |
538 | } | |
539 | ||
0d290861 | 540 | if (devp->hd_flags & HPET_SHARED_IRQ) { |
3d5640d1 | 541 | isr = 1 << (devp - devp->hd_hpets->hp_dev); |
0d290861 CL |
542 | writel(isr, &hpet->hpet_isr); |
543 | } | |
1da177e4 LT |
544 | writeq(g, &timer->hpet_config); |
545 | local_irq_restore(flags); | |
546 | ||
547 | return 0; | |
548 | } | |
549 | ||
ba3f213f CL |
550 | /* converts Hz to number of timer ticks */ |
551 | static inline unsigned long hpet_time_div(struct hpets *hpets, | |
552 | unsigned long dis) | |
1da177e4 | 553 | { |
ba3f213f | 554 | unsigned long long m; |
1da177e4 | 555 | |
ba3f213f | 556 | m = hpets->hp_tick_freq + (dis >> 1); |
1da177e4 | 557 | do_div(m, dis); |
1da177e4 LT |
558 | return (unsigned long)m; |
559 | } | |
560 | ||
561 | static int | |
54066a57 AB |
562 | hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg, |
563 | struct hpet_info *info) | |
1da177e4 LT |
564 | { |
565 | struct hpet_timer __iomem *timer; | |
566 | struct hpet __iomem *hpet; | |
567 | struct hpets *hpetp; | |
568 | int err; | |
569 | unsigned long v; | |
570 | ||
571 | switch (cmd) { | |
572 | case HPET_IE_OFF: | |
573 | case HPET_INFO: | |
574 | case HPET_EPI: | |
575 | case HPET_DPI: | |
576 | case HPET_IRQFREQ: | |
577 | timer = devp->hd_timer; | |
578 | hpet = devp->hd_hpet; | |
579 | hpetp = devp->hd_hpets; | |
580 | break; | |
581 | case HPET_IE_ON: | |
582 | return hpet_ioctl_ieon(devp); | |
583 | default: | |
584 | return -EINVAL; | |
585 | } | |
586 | ||
587 | err = 0; | |
588 | ||
589 | switch (cmd) { | |
590 | case HPET_IE_OFF: | |
591 | if ((devp->hd_flags & HPET_IE) == 0) | |
592 | break; | |
593 | v = readq(&timer->hpet_config); | |
594 | v &= ~Tn_INT_ENB_CNF_MASK; | |
595 | writeq(v, &timer->hpet_config); | |
596 | if (devp->hd_irq) { | |
597 | free_irq(devp->hd_irq, devp); | |
598 | devp->hd_irq = 0; | |
599 | } | |
600 | devp->hd_flags ^= HPET_IE; | |
601 | break; | |
602 | case HPET_INFO: | |
603 | { | |
dae512ed | 604 | memset(info, 0, sizeof(*info)); |
af95eade | 605 | if (devp->hd_ireqfreq) |
54066a57 | 606 | info->hi_ireqfreq = |
af95eade | 607 | hpet_time_div(hpetp, devp->hd_ireqfreq); |
54066a57 | 608 | info->hi_flags = |
1da177e4 | 609 | readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK; |
54066a57 AB |
610 | info->hi_hpet = hpetp->hp_which; |
611 | info->hi_timer = devp - hpetp->hp_dev; | |
1da177e4 LT |
612 | break; |
613 | } | |
614 | case HPET_EPI: | |
615 | v = readq(&timer->hpet_config); | |
616 | if ((v & Tn_PER_INT_CAP_MASK) == 0) { | |
617 | err = -ENXIO; | |
618 | break; | |
619 | } | |
620 | devp->hd_flags |= HPET_PERIODIC; | |
621 | break; | |
622 | case HPET_DPI: | |
623 | v = readq(&timer->hpet_config); | |
624 | if ((v & Tn_PER_INT_CAP_MASK) == 0) { | |
625 | err = -ENXIO; | |
626 | break; | |
627 | } | |
628 | if (devp->hd_flags & HPET_PERIODIC && | |
629 | readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { | |
630 | v = readq(&timer->hpet_config); | |
631 | v ^= Tn_TYPE_CNF_MASK; | |
632 | writeq(v, &timer->hpet_config); | |
633 | } | |
634 | devp->hd_flags &= ~HPET_PERIODIC; | |
635 | break; | |
636 | case HPET_IRQFREQ: | |
54066a57 | 637 | if ((arg > hpet_max_freq) && |
1da177e4 LT |
638 | !capable(CAP_SYS_RESOURCE)) { |
639 | err = -EACCES; | |
640 | break; | |
641 | } | |
642 | ||
189e2dd1 | 643 | if (!arg) { |
1da177e4 LT |
644 | err = -EINVAL; |
645 | break; | |
646 | } | |
647 | ||
ba3f213f | 648 | devp->hd_ireqfreq = hpet_time_div(hpetp, arg); |
1da177e4 LT |
649 | } |
650 | ||
651 | return err; | |
652 | } | |
653 | ||
54066a57 AB |
654 | static long |
655 | hpet_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |
656 | { | |
657 | struct hpet_info info; | |
658 | int err; | |
659 | ||
660 | mutex_lock(&hpet_mutex); | |
661 | err = hpet_ioctl_common(file->private_data, cmd, arg, &info); | |
662 | mutex_unlock(&hpet_mutex); | |
663 | ||
664 | if ((cmd == HPET_INFO) && !err && | |
665 | (copy_to_user((void __user *)arg, &info, sizeof(info)))) | |
666 | err = -EFAULT; | |
667 | ||
668 | return err; | |
669 | } | |
670 | ||
671 | #ifdef CONFIG_COMPAT | |
672 | struct compat_hpet_info { | |
673 | compat_ulong_t hi_ireqfreq; /* Hz */ | |
674 | compat_ulong_t hi_flags; /* information */ | |
675 | unsigned short hi_hpet; | |
676 | unsigned short hi_timer; | |
677 | }; | |
678 | ||
679 | static long | |
680 | hpet_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |
681 | { | |
682 | struct hpet_info info; | |
683 | int err; | |
684 | ||
685 | mutex_lock(&hpet_mutex); | |
686 | err = hpet_ioctl_common(file->private_data, cmd, arg, &info); | |
687 | mutex_unlock(&hpet_mutex); | |
688 | ||
689 | if ((cmd == HPET_INFO) && !err) { | |
690 | struct compat_hpet_info __user *u = compat_ptr(arg); | |
691 | if (put_user(info.hi_ireqfreq, &u->hi_ireqfreq) || | |
692 | put_user(info.hi_flags, &u->hi_flags) || | |
693 | put_user(info.hi_hpet, &u->hi_hpet) || | |
694 | put_user(info.hi_timer, &u->hi_timer)) | |
695 | err = -EFAULT; | |
696 | } | |
697 | ||
698 | return err; | |
699 | } | |
700 | #endif | |
701 | ||
62322d25 | 702 | static const struct file_operations hpet_fops = { |
1da177e4 LT |
703 | .owner = THIS_MODULE, |
704 | .llseek = no_llseek, | |
705 | .read = hpet_read, | |
706 | .poll = hpet_poll, | |
55929332 | 707 | .unlocked_ioctl = hpet_ioctl, |
54066a57 AB |
708 | #ifdef CONFIG_COMPAT |
709 | .compat_ioctl = hpet_compat_ioctl, | |
710 | #endif | |
1da177e4 LT |
711 | .open = hpet_open, |
712 | .release = hpet_release, | |
713 | .fasync = hpet_fasync, | |
714 | .mmap = hpet_mmap, | |
715 | }; | |
716 | ||
3e6716e7 RD |
717 | static int hpet_is_known(struct hpet_data *hdp) |
718 | { | |
719 | struct hpets *hpetp; | |
720 | ||
721 | for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next) | |
722 | if (hpetp->hp_hpet_phys == hdp->hd_phys_address) | |
723 | return 1; | |
724 | ||
725 | return 0; | |
726 | } | |
727 | ||
a151427e | 728 | static struct ctl_table hpet_table[] = { |
1da177e4 | 729 | { |
1da177e4 LT |
730 | .procname = "max-user-freq", |
731 | .data = &hpet_max_freq, | |
732 | .maxlen = sizeof(int), | |
733 | .mode = 0644, | |
6d456111 | 734 | .proc_handler = proc_dointvec, |
1da177e4 | 735 | }, |
894d2491 | 736 | {} |
1da177e4 LT |
737 | }; |
738 | ||
a151427e | 739 | static struct ctl_table hpet_root[] = { |
1da177e4 | 740 | { |
1da177e4 LT |
741 | .procname = "hpet", |
742 | .maxlen = 0, | |
743 | .mode = 0555, | |
744 | .child = hpet_table, | |
745 | }, | |
894d2491 | 746 | {} |
1da177e4 LT |
747 | }; |
748 | ||
a151427e | 749 | static struct ctl_table dev_root[] = { |
1da177e4 | 750 | { |
1da177e4 LT |
751 | .procname = "dev", |
752 | .maxlen = 0, | |
753 | .mode = 0555, | |
754 | .child = hpet_root, | |
755 | }, | |
894d2491 | 756 | {} |
1da177e4 LT |
757 | }; |
758 | ||
759 | static struct ctl_table_header *sysctl_header; | |
760 | ||
1da177e4 LT |
761 | /* |
762 | * Adjustment for when arming the timer with | |
763 | * initial conditions. That is, main counter | |
764 | * ticks expired before interrupts are enabled. | |
765 | */ | |
766 | #define TICK_CALIBRATE (1000UL) | |
767 | ||
303d379c | 768 | static unsigned long __hpet_calibrate(struct hpets *hpetp) |
1da177e4 LT |
769 | { |
770 | struct hpet_timer __iomem *timer = NULL; | |
771 | unsigned long t, m, count, i, flags, start; | |
772 | struct hpet_dev *devp; | |
773 | int j; | |
774 | struct hpet __iomem *hpet; | |
775 | ||
776 | for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++) | |
777 | if ((devp->hd_flags & HPET_OPEN) == 0) { | |
778 | timer = devp->hd_timer; | |
779 | break; | |
780 | } | |
781 | ||
782 | if (!timer) | |
783 | return 0; | |
784 | ||
3d5640d1 | 785 | hpet = hpetp->hp_hpet; |
1da177e4 LT |
786 | t = read_counter(&timer->hpet_compare); |
787 | ||
788 | i = 0; | |
ba3f213f | 789 | count = hpet_time_div(hpetp, TICK_CALIBRATE); |
1da177e4 LT |
790 | |
791 | local_irq_save(flags); | |
792 | ||
793 | start = read_counter(&hpet->hpet_mc); | |
794 | ||
795 | do { | |
796 | m = read_counter(&hpet->hpet_mc); | |
797 | write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); | |
798 | } while (i++, (m - start) < count); | |
799 | ||
800 | local_irq_restore(flags); | |
801 | ||
802 | return (m - start) / i; | |
803 | } | |
804 | ||
303d379c YG |
805 | static unsigned long hpet_calibrate(struct hpets *hpetp) |
806 | { | |
2cf4e52e | 807 | unsigned long ret = ~0UL; |
303d379c YG |
808 | unsigned long tmp; |
809 | ||
810 | /* | |
811 | * Try to calibrate until return value becomes stable small value. | |
812 | * If SMI interruption occurs in calibration loop, the return value | |
813 | * will be big. This avoids its impact. | |
814 | */ | |
815 | for ( ; ; ) { | |
816 | tmp = __hpet_calibrate(hpetp); | |
817 | if (ret <= tmp) | |
818 | break; | |
819 | ret = tmp; | |
820 | } | |
821 | ||
822 | return ret; | |
823 | } | |
824 | ||
1da177e4 LT |
825 | int hpet_alloc(struct hpet_data *hdp) |
826 | { | |
5761d64b | 827 | u64 cap, mcfg; |
1da177e4 | 828 | struct hpet_dev *devp; |
5761d64b | 829 | u32 i, ntimer; |
1da177e4 LT |
830 | struct hpets *hpetp; |
831 | size_t siz; | |
832 | struct hpet __iomem *hpet; | |
0ca01763 | 833 | static struct hpets *last; |
5761d64b | 834 | unsigned long period; |
ba3f213f | 835 | unsigned long long temp; |
f92a789d | 836 | u32 remainder; |
1da177e4 LT |
837 | |
838 | /* | |
839 | * hpet_alloc can be called by platform dependent code. | |
3e6716e7 RD |
840 | * If platform dependent code has allocated the hpet that |
841 | * ACPI has also reported, then we catch it here. | |
1da177e4 | 842 | */ |
3e6716e7 RD |
843 | if (hpet_is_known(hdp)) { |
844 | printk(KERN_DEBUG "%s: duplicate HPET ignored\n", | |
bf9d8929 | 845 | __func__); |
3e6716e7 RD |
846 | return 0; |
847 | } | |
1da177e4 LT |
848 | |
849 | siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) * | |
850 | sizeof(struct hpet_dev)); | |
851 | ||
3e6716e7 | 852 | hpetp = kzalloc(siz, GFP_KERNEL); |
1da177e4 LT |
853 | |
854 | if (!hpetp) | |
855 | return -ENOMEM; | |
856 | ||
1da177e4 LT |
857 | hpetp->hp_which = hpet_nhpet++; |
858 | hpetp->hp_hpet = hdp->hd_address; | |
859 | hpetp->hp_hpet_phys = hdp->hd_phys_address; | |
860 | ||
861 | hpetp->hp_ntimer = hdp->hd_nirqs; | |
e3f37a54 | 862 | |
5761d64b TG |
863 | for (i = 0; i < hdp->hd_nirqs; i++) |
864 | hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i]; | |
37a47db8 | 865 | |
5761d64b | 866 | hpet = hpetp->hp_hpet; |
e3f37a54 | 867 | |
1da177e4 LT |
868 | cap = readq(&hpet->hpet_cap); |
869 | ||
870 | ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1; | |
871 | ||
872 | if (hpetp->hp_ntimer != ntimer) { | |
873 | printk(KERN_WARNING "hpet: number irqs doesn't agree" | |
874 | " with number of timers\n"); | |
875 | kfree(hpetp); | |
876 | return -ENODEV; | |
877 | } | |
878 | ||
879 | if (last) | |
880 | last->hp_next = hpetp; | |
881 | else | |
882 | hpets = hpetp; | |
883 | ||
884 | last = hpetp; | |
885 | ||
ba3f213f CL |
886 | period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >> |
887 | HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */ | |
888 | temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */ | |
889 | temp += period >> 1; /* round */ | |
890 | do_div(temp, period); | |
891 | hpetp->hp_tick_freq = temp; /* ticks per second */ | |
1da177e4 | 892 | |
3034d11c AK |
893 | printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s", |
894 | hpetp->hp_which, hdp->hd_phys_address, | |
1da177e4 LT |
895 | hpetp->hp_ntimer > 1 ? "s" : ""); |
896 | for (i = 0; i < hpetp->hp_ntimer; i++) | |
5da527aa KS |
897 | printk(KERN_CONT "%s %d", i > 0 ? "," : "", hdp->hd_irq[i]); |
898 | printk(KERN_CONT "\n"); | |
1da177e4 | 899 | |
f92a789d DB |
900 | temp = hpetp->hp_tick_freq; |
901 | remainder = do_div(temp, 1000000); | |
64a76f66 DB |
902 | printk(KERN_INFO |
903 | "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n", | |
904 | hpetp->hp_which, hpetp->hp_ntimer, | |
905 | cap & HPET_COUNTER_SIZE_MASK ? 64 : 32, | |
f92a789d | 906 | (unsigned) temp, remainder); |
1da177e4 LT |
907 | |
908 | mcfg = readq(&hpet->hpet_config); | |
909 | if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) { | |
910 | write_counter(0L, &hpet->hpet_mc); | |
911 | mcfg |= HPET_ENABLE_CNF_MASK; | |
912 | writeq(mcfg, &hpet->hpet_config); | |
913 | } | |
914 | ||
642d30bb | 915 | for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) { |
1da177e4 LT |
916 | struct hpet_timer __iomem *timer; |
917 | ||
918 | timer = &hpet->hpet_timers[devp - hpetp->hp_dev]; | |
1da177e4 LT |
919 | |
920 | devp->hd_hpets = hpetp; | |
921 | devp->hd_hpet = hpet; | |
922 | devp->hd_timer = timer; | |
923 | ||
924 | /* | |
925 | * If the timer was reserved by platform code, | |
926 | * then make timer unavailable for opens. | |
927 | */ | |
928 | if (hdp->hd_state & (1 << i)) { | |
929 | devp->hd_flags = HPET_OPEN; | |
930 | continue; | |
931 | } | |
932 | ||
933 | init_waitqueue_head(&devp->hd_waitqueue); | |
934 | } | |
935 | ||
936 | hpetp->hp_delta = hpet_calibrate(hpetp); | |
0aa366f3 | 937 | |
3b2b64fd LT |
938 | /* This clocksource driver currently only works on ia64 */ |
939 | #ifdef CONFIG_IA64 | |
0aa366f3 TL |
940 | if (!hpet_clocksource) { |
941 | hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc; | |
574c44fa | 942 | clocksource_hpet.archdata.fsys_mmio = hpet_mctr; |
d60c3041 | 943 | clocksource_register_hz(&clocksource_hpet, hpetp->hp_tick_freq); |
0aa366f3 TL |
944 | hpetp->hp_clocksource = &clocksource_hpet; |
945 | hpet_clocksource = &clocksource_hpet; | |
946 | } | |
3b2b64fd | 947 | #endif |
1da177e4 LT |
948 | |
949 | return 0; | |
950 | } | |
951 | ||
952 | static acpi_status hpet_resources(struct acpi_resource *res, void *data) | |
953 | { | |
954 | struct hpet_data *hdp; | |
955 | acpi_status status; | |
956 | struct acpi_resource_address64 addr; | |
1da177e4 LT |
957 | |
958 | hdp = data; | |
959 | ||
960 | status = acpi_resource_to_address64(res, &addr); | |
961 | ||
962 | if (ACPI_SUCCESS(status)) { | |
50eca3eb | 963 | hdp->hd_phys_address = addr.minimum; |
9224a867 | 964 | hdp->hd_address = ioremap(addr.minimum, addr.address_length); |
1da177e4 | 965 | |
3e6716e7 | 966 | if (hpet_is_known(hdp)) { |
3e6716e7 | 967 | iounmap(hdp->hd_address); |
78e1ca49 | 968 | return AE_ALREADY_EXISTS; |
3e6716e7 | 969 | } |
50eca3eb BM |
970 | } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) { |
971 | struct acpi_resource_fixed_memory32 *fixmem32; | |
757c4724 RD |
972 | |
973 | fixmem32 = &res->data.fixed_memory32; | |
974 | if (!fixmem32) | |
78e1ca49 | 975 | return AE_NO_MEMORY; |
757c4724 | 976 | |
50eca3eb BM |
977 | hdp->hd_phys_address = fixmem32->address; |
978 | hdp->hd_address = ioremap(fixmem32->address, | |
757c4724 RD |
979 | HPET_RANGE_SIZE); |
980 | ||
3e6716e7 | 981 | if (hpet_is_known(hdp)) { |
3e6716e7 | 982 | iounmap(hdp->hd_address); |
78e1ca49 | 983 | return AE_ALREADY_EXISTS; |
3e6716e7 | 984 | } |
50eca3eb BM |
985 | } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) { |
986 | struct acpi_resource_extended_irq *irqp; | |
be5efffb | 987 | int i, irq; |
1da177e4 LT |
988 | |
989 | irqp = &res->data.extended_irq; | |
990 | ||
be5efffb | 991 | for (i = 0; i < irqp->interrupt_count; i++) { |
2cf4e52e CG |
992 | if (hdp->hd_nirqs >= HPET_MAX_TIMERS) |
993 | break; | |
994 | ||
a2f809b0 | 995 | irq = acpi_register_gsi(NULL, irqp->interrupts[i], |
be5efffb BH |
996 | irqp->triggering, irqp->polarity); |
997 | if (irq < 0) | |
998 | return AE_ERROR; | |
999 | ||
1000 | hdp->hd_irq[hdp->hd_nirqs] = irq; | |
1001 | hdp->hd_nirqs++; | |
1da177e4 LT |
1002 | } |
1003 | } | |
1004 | ||
1005 | return AE_OK; | |
1006 | } | |
1007 | ||
1008 | static int hpet_acpi_add(struct acpi_device *device) | |
1009 | { | |
1010 | acpi_status result; | |
1011 | struct hpet_data data; | |
1012 | ||
1013 | memset(&data, 0, sizeof(data)); | |
1014 | ||
1015 | result = | |
1016 | acpi_walk_resources(device->handle, METHOD_NAME__CRS, | |
1017 | hpet_resources, &data); | |
1018 | ||
1019 | if (ACPI_FAILURE(result)) | |
1020 | return -ENODEV; | |
1021 | ||
1022 | if (!data.hd_address || !data.hd_nirqs) { | |
a56d5318 JS |
1023 | if (data.hd_address) |
1024 | iounmap(data.hd_address); | |
bf9d8929 | 1025 | printk("%s: no address or irqs in _CRS\n", __func__); |
1da177e4 LT |
1026 | return -ENODEV; |
1027 | } | |
1028 | ||
1029 | return hpet_alloc(&data); | |
1030 | } | |
1031 | ||
51fac838 | 1032 | static int hpet_acpi_remove(struct acpi_device *device) |
1da177e4 | 1033 | { |
0aa366f3 | 1034 | /* XXX need to unregister clocksource, dealloc mem, etc */ |
1da177e4 LT |
1035 | return -EINVAL; |
1036 | } | |
1037 | ||
1ba90e3a TR |
1038 | static const struct acpi_device_id hpet_device_ids[] = { |
1039 | {"PNP0103", 0}, | |
1040 | {"", 0}, | |
1041 | }; | |
1042 | MODULE_DEVICE_TABLE(acpi, hpet_device_ids); | |
1043 | ||
1da177e4 LT |
1044 | static struct acpi_driver hpet_acpi_driver = { |
1045 | .name = "hpet", | |
1ba90e3a | 1046 | .ids = hpet_device_ids, |
1da177e4 LT |
1047 | .ops = { |
1048 | .add = hpet_acpi_add, | |
1049 | .remove = hpet_acpi_remove, | |
1050 | }, | |
1051 | }; | |
1052 | ||
1053 | static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops }; | |
1054 | ||
1055 | static int __init hpet_init(void) | |
1056 | { | |
1057 | int result; | |
1058 | ||
1059 | result = misc_register(&hpet_misc); | |
1060 | if (result < 0) | |
1061 | return -ENODEV; | |
1062 | ||
0b4d4147 | 1063 | sysctl_header = register_sysctl_table(dev_root); |
1da177e4 LT |
1064 | |
1065 | result = acpi_bus_register_driver(&hpet_acpi_driver); | |
1066 | if (result < 0) { | |
1067 | if (sysctl_header) | |
1068 | unregister_sysctl_table(sysctl_header); | |
1069 | misc_deregister(&hpet_misc); | |
1070 | return result; | |
1071 | } | |
1072 | ||
1073 | return 0; | |
1074 | } | |
1075 | ||
1076 | static void __exit hpet_exit(void) | |
1077 | { | |
1078 | acpi_bus_unregister_driver(&hpet_acpi_driver); | |
1079 | ||
1080 | if (sysctl_header) | |
1081 | unregister_sysctl_table(sysctl_header); | |
1082 | misc_deregister(&hpet_misc); | |
1083 | ||
1084 | return; | |
1085 | } | |
1086 | ||
1087 | module_init(hpet_init); | |
1088 | module_exit(hpet_exit); | |
1089 | MODULE_AUTHOR("Bob Picco <[email protected]>"); | |
1090 | MODULE_LICENSE("GPL"); |