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Commit | Line | Data |
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2c2e6ecf DD |
1 | /* |
2 | * cpuidle-powernv - idle state cpuidle driver. | |
3 | * Adapted from drivers/cpuidle/cpuidle-pseries | |
4 | * | |
5 | */ | |
6 | ||
7 | #include <linux/kernel.h> | |
8 | #include <linux/module.h> | |
9 | #include <linux/init.h> | |
10 | #include <linux/moduleparam.h> | |
11 | #include <linux/cpuidle.h> | |
12 | #include <linux/cpu.h> | |
13 | #include <linux/notifier.h> | |
0d948730 | 14 | #include <linux/clockchips.h> |
0888839c | 15 | #include <linux/of.h> |
92c83ff5 | 16 | #include <linux/slab.h> |
2c2e6ecf DD |
17 | |
18 | #include <asm/machdep.h> | |
19 | #include <asm/firmware.h> | |
8eb8ac89 | 20 | #include <asm/opal.h> |
591ac0cb | 21 | #include <asm/runlatch.h> |
09206b60 | 22 | #include <asm/cpuidle.h> |
2c2e6ecf | 23 | |
9e9fc6f0 GS |
24 | /* |
25 | * Expose only those Hardware idle states via the cpuidle framework | |
26 | * that have latency value below POWERNV_THRESHOLD_LATENCY_NS. | |
27 | */ | |
3005c597 SP |
28 | #define POWERNV_THRESHOLD_LATENCY_NS 200000 |
29 | ||
ed61390b | 30 | static struct cpuidle_driver powernv_idle_driver = { |
2c2e6ecf DD |
31 | .name = "powernv_idle", |
32 | .owner = THIS_MODULE, | |
33 | }; | |
34 | ||
35 | static int max_idle_state; | |
36 | static struct cpuidle_state *cpuidle_state_table; | |
3005c597 | 37 | |
09206b60 GS |
38 | struct stop_psscr_table { |
39 | u64 val; | |
40 | u64 mask; | |
41 | }; | |
42 | ||
43 | static struct stop_psscr_table stop_psscr_table[CPUIDLE_STATE_MAX]; | |
3005c597 | 44 | |
78eaa10f SB |
45 | static u64 snooze_timeout; |
46 | static bool snooze_timeout_en; | |
2c2e6ecf DD |
47 | |
48 | static int snooze_loop(struct cpuidle_device *dev, | |
49 | struct cpuidle_driver *drv, | |
50 | int index) | |
51 | { | |
78eaa10f SB |
52 | u64 snooze_exit_time; |
53 | ||
2c2e6ecf DD |
54 | local_irq_enable(); |
55 | set_thread_flag(TIF_POLLING_NRFLAG); | |
56 | ||
78eaa10f | 57 | snooze_exit_time = get_tb() + snooze_timeout; |
591ac0cb | 58 | ppc64_runlatch_off(); |
26eb48a9 | 59 | HMT_very_low(); |
2c2e6ecf | 60 | while (!need_resched()) { |
0baa91cb | 61 | if (likely(snooze_timeout_en) && get_tb() > snooze_exit_time) |
78eaa10f | 62 | break; |
2c2e6ecf DD |
63 | } |
64 | ||
65 | HMT_medium(); | |
591ac0cb | 66 | ppc64_runlatch_on(); |
2c2e6ecf DD |
67 | clear_thread_flag(TIF_POLLING_NRFLAG); |
68 | smp_mb(); | |
69 | return index; | |
70 | } | |
71 | ||
72 | static int nap_loop(struct cpuidle_device *dev, | |
73 | struct cpuidle_driver *drv, | |
74 | int index) | |
75 | { | |
591ac0cb | 76 | ppc64_runlatch_off(); |
2c2e6ecf | 77 | power7_idle(); |
591ac0cb | 78 | ppc64_runlatch_on(); |
2c2e6ecf DD |
79 | return index; |
80 | } | |
81 | ||
cc5a2f7b | 82 | /* Register for fastsleep only in oneshot mode of broadcast */ |
83 | #ifdef CONFIG_TICK_ONESHOT | |
0d948730 PM |
84 | static int fastsleep_loop(struct cpuidle_device *dev, |
85 | struct cpuidle_driver *drv, | |
86 | int index) | |
87 | { | |
88 | unsigned long old_lpcr = mfspr(SPRN_LPCR); | |
89 | unsigned long new_lpcr; | |
90 | ||
91 | if (unlikely(system_state < SYSTEM_RUNNING)) | |
92 | return index; | |
93 | ||
94 | new_lpcr = old_lpcr; | |
9b6a68d9 MN |
95 | /* Do not exit powersave upon decrementer as we've setup the timer |
96 | * offload. | |
0d948730 | 97 | */ |
9b6a68d9 | 98 | new_lpcr &= ~LPCR_PECE1; |
0d948730 PM |
99 | |
100 | mtspr(SPRN_LPCR, new_lpcr); | |
101 | power7_sleep(); | |
102 | ||
103 | mtspr(SPRN_LPCR, old_lpcr); | |
104 | ||
105 | return index; | |
106 | } | |
cc5a2f7b | 107 | #endif |
3005c597 SP |
108 | |
109 | static int stop_loop(struct cpuidle_device *dev, | |
110 | struct cpuidle_driver *drv, | |
111 | int index) | |
112 | { | |
113 | ppc64_runlatch_off(); | |
09206b60 GS |
114 | power9_idle_stop(stop_psscr_table[index].val, |
115 | stop_psscr_table[index].mask); | |
3005c597 SP |
116 | ppc64_runlatch_on(); |
117 | return index; | |
118 | } | |
119 | ||
2c2e6ecf DD |
120 | /* |
121 | * States for dedicated partition case. | |
122 | */ | |
169f3fae | 123 | static struct cpuidle_state powernv_states[CPUIDLE_STATE_MAX] = { |
2c2e6ecf DD |
124 | { /* Snooze */ |
125 | .name = "snooze", | |
126 | .desc = "snooze", | |
2c2e6ecf DD |
127 | .exit_latency = 0, |
128 | .target_residency = 0, | |
957efced | 129 | .enter = snooze_loop }, |
2c2e6ecf DD |
130 | }; |
131 | ||
10fcca9d | 132 | static int powernv_cpuidle_cpu_online(unsigned int cpu) |
2c2e6ecf | 133 | { |
10fcca9d | 134 | struct cpuidle_device *dev = per_cpu(cpuidle_devices, cpu); |
2c2e6ecf DD |
135 | |
136 | if (dev && cpuidle_get_driver()) { | |
10fcca9d SAS |
137 | cpuidle_pause_and_lock(); |
138 | cpuidle_enable_device(dev); | |
139 | cpuidle_resume_and_unlock(); | |
140 | } | |
141 | return 0; | |
142 | } | |
2c2e6ecf | 143 | |
10fcca9d SAS |
144 | static int powernv_cpuidle_cpu_dead(unsigned int cpu) |
145 | { | |
146 | struct cpuidle_device *dev = per_cpu(cpuidle_devices, cpu); | |
2c2e6ecf | 147 | |
10fcca9d SAS |
148 | if (dev && cpuidle_get_driver()) { |
149 | cpuidle_pause_and_lock(); | |
150 | cpuidle_disable_device(dev); | |
151 | cpuidle_resume_and_unlock(); | |
2c2e6ecf | 152 | } |
10fcca9d | 153 | return 0; |
2c2e6ecf DD |
154 | } |
155 | ||
2c2e6ecf DD |
156 | /* |
157 | * powernv_cpuidle_driver_init() | |
158 | */ | |
159 | static int powernv_cpuidle_driver_init(void) | |
160 | { | |
161 | int idle_state; | |
162 | struct cpuidle_driver *drv = &powernv_idle_driver; | |
163 | ||
164 | drv->state_count = 0; | |
165 | ||
166 | for (idle_state = 0; idle_state < max_idle_state; ++idle_state) { | |
167 | /* Is the state not enabled? */ | |
168 | if (cpuidle_state_table[idle_state].enter == NULL) | |
169 | continue; | |
170 | ||
171 | drv->states[drv->state_count] = /* structure copy */ | |
172 | cpuidle_state_table[idle_state]; | |
173 | ||
174 | drv->state_count += 1; | |
175 | } | |
176 | ||
293d264f VS |
177 | /* |
178 | * On the PowerNV platform cpu_present may be less than cpu_possible in | |
179 | * cases when firmware detects the CPU, but it is not available to the | |
180 | * OS. If CONFIG_HOTPLUG_CPU=n, then such CPUs are not hotplugable at | |
181 | * run time and hence cpu_devices are not created for those CPUs by the | |
182 | * generic topology_init(). | |
183 | * | |
184 | * drv->cpumask defaults to cpu_possible_mask in | |
185 | * __cpuidle_driver_init(). This breaks cpuidle on PowerNV where | |
186 | * cpu_devices are not created for CPUs in cpu_possible_mask that | |
187 | * cannot be hot-added later at run time. | |
188 | * | |
189 | * Trying cpuidle_register_device() on a CPU without a cpu_device is | |
190 | * incorrect, so pass a correct CPU mask to the generic cpuidle driver. | |
191 | */ | |
192 | ||
193 | drv->cpumask = (struct cpumask *)cpu_present_mask; | |
194 | ||
2c2e6ecf DD |
195 | return 0; |
196 | } | |
197 | ||
9e9fc6f0 GS |
198 | static inline void add_powernv_state(int index, const char *name, |
199 | unsigned int flags, | |
200 | int (*idle_fn)(struct cpuidle_device *, | |
201 | struct cpuidle_driver *, | |
202 | int), | |
203 | unsigned int target_residency, | |
204 | unsigned int exit_latency, | |
09206b60 | 205 | u64 psscr_val, u64 psscr_mask) |
9e9fc6f0 GS |
206 | { |
207 | strlcpy(powernv_states[index].name, name, CPUIDLE_NAME_LEN); | |
208 | strlcpy(powernv_states[index].desc, name, CPUIDLE_NAME_LEN); | |
209 | powernv_states[index].flags = flags; | |
210 | powernv_states[index].target_residency = target_residency; | |
211 | powernv_states[index].exit_latency = exit_latency; | |
212 | powernv_states[index].enter = idle_fn; | |
09206b60 GS |
213 | stop_psscr_table[index].val = psscr_val; |
214 | stop_psscr_table[index].mask = psscr_mask; | |
9e9fc6f0 GS |
215 | } |
216 | ||
ecad4502 GS |
217 | /* |
218 | * Returns 0 if prop1_len == prop2_len. Else returns -1 | |
219 | */ | |
220 | static inline int validate_dt_prop_sizes(const char *prop1, int prop1_len, | |
221 | const char *prop2, int prop2_len) | |
222 | { | |
223 | if (prop1_len == prop2_len) | |
224 | return 0; | |
225 | ||
226 | pr_warn("cpuidle-powernv: array sizes don't match for %s and %s\n", | |
227 | prop1, prop2); | |
228 | return -1; | |
229 | } | |
230 | ||
0888839c PM |
231 | static int powernv_add_idle_states(void) |
232 | { | |
233 | struct device_node *power_mgt; | |
0888839c | 234 | int nr_idle_states = 1; /* Snooze */ |
ecad4502 | 235 | int dt_idle_states, count; |
957efced SP |
236 | u32 latency_ns[CPUIDLE_STATE_MAX]; |
237 | u32 residency_ns[CPUIDLE_STATE_MAX]; | |
238 | u32 flags[CPUIDLE_STATE_MAX]; | |
3005c597 | 239 | u64 psscr_val[CPUIDLE_STATE_MAX]; |
09206b60 | 240 | u64 psscr_mask[CPUIDLE_STATE_MAX]; |
3005c597 | 241 | const char *names[CPUIDLE_STATE_MAX]; |
09206b60 | 242 | u32 has_stop_states = 0; |
92c83ff5 | 243 | int i, rc; |
0888839c PM |
244 | |
245 | /* Currently we have snooze statically defined */ | |
246 | ||
247 | power_mgt = of_find_node_by_path("/ibm,opal/power-mgt"); | |
248 | if (!power_mgt) { | |
249 | pr_warn("opal: PowerMgmt Node not found\n"); | |
92c83ff5 | 250 | goto out; |
0888839c PM |
251 | } |
252 | ||
70734a78 PM |
253 | /* Read values of any property to determine the num of idle states */ |
254 | dt_idle_states = of_property_count_u32_elems(power_mgt, "ibm,cpu-idle-state-flags"); | |
255 | if (dt_idle_states < 0) { | |
256 | pr_warn("cpuidle-powernv: no idle states found in the DT\n"); | |
92c83ff5 | 257 | goto out; |
0888839c PM |
258 | } |
259 | ||
ecad4502 GS |
260 | count = of_property_count_u32_elems(power_mgt, |
261 | "ibm,cpu-idle-state-latencies-ns"); | |
262 | ||
263 | if (validate_dt_prop_sizes("ibm,cpu-idle-state-flags", dt_idle_states, | |
264 | "ibm,cpu-idle-state-latencies-ns", | |
265 | count) != 0) | |
266 | goto out; | |
267 | ||
268 | count = of_property_count_strings(power_mgt, | |
269 | "ibm,cpu-idle-state-names"); | |
270 | if (validate_dt_prop_sizes("ibm,cpu-idle-state-flags", dt_idle_states, | |
271 | "ibm,cpu-idle-state-names", | |
272 | count) != 0) | |
273 | goto out; | |
274 | ||
957efced SP |
275 | /* |
276 | * Since snooze is used as first idle state, max idle states allowed is | |
277 | * CPUIDLE_STATE_MAX -1 | |
278 | */ | |
279 | if (dt_idle_states > CPUIDLE_STATE_MAX - 1) { | |
280 | pr_warn("cpuidle-powernv: discovered idle states more than allowed"); | |
281 | dt_idle_states = CPUIDLE_STATE_MAX - 1; | |
282 | } | |
283 | ||
70734a78 PM |
284 | if (of_property_read_u32_array(power_mgt, |
285 | "ibm,cpu-idle-state-flags", flags, dt_idle_states)) { | |
286 | pr_warn("cpuidle-powernv : missing ibm,cpu-idle-state-flags in DT\n"); | |
957efced | 287 | goto out; |
70734a78 | 288 | } |
92c83ff5 | 289 | |
957efced SP |
290 | if (of_property_read_u32_array(power_mgt, |
291 | "ibm,cpu-idle-state-latencies-ns", latency_ns, | |
292 | dt_idle_states)) { | |
92c83ff5 | 293 | pr_warn("cpuidle-powernv: missing ibm,cpu-idle-state-latencies-ns in DT\n"); |
957efced | 294 | goto out; |
74aa51b5 | 295 | } |
3005c597 SP |
296 | if (of_property_read_string_array(power_mgt, |
297 | "ibm,cpu-idle-state-names", names, dt_idle_states) < 0) { | |
298 | pr_warn("cpuidle-powernv: missing ibm,cpu-idle-state-names in DT\n"); | |
299 | goto out; | |
300 | } | |
301 | ||
302 | /* | |
303 | * If the idle states use stop instruction, probe for psscr values | |
09206b60 | 304 | * and psscr mask which are necessary to specify required stop level. |
3005c597 | 305 | */ |
09206b60 GS |
306 | has_stop_states = (flags[0] & |
307 | (OPAL_PM_STOP_INST_FAST | OPAL_PM_STOP_INST_DEEP)); | |
308 | if (has_stop_states) { | |
ecad4502 GS |
309 | count = of_property_count_u64_elems(power_mgt, |
310 | "ibm,cpu-idle-state-psscr"); | |
311 | if (validate_dt_prop_sizes("ibm,cpu-idle-state-flags", | |
312 | dt_idle_states, | |
313 | "ibm,cpu-idle-state-psscr", | |
314 | count) != 0) | |
315 | goto out; | |
316 | ||
317 | count = of_property_count_u64_elems(power_mgt, | |
318 | "ibm,cpu-idle-state-psscr-mask"); | |
319 | if (validate_dt_prop_sizes("ibm,cpu-idle-state-flags", | |
320 | dt_idle_states, | |
321 | "ibm,cpu-idle-state-psscr-mask", | |
322 | count) != 0) | |
323 | goto out; | |
324 | ||
3005c597 SP |
325 | if (of_property_read_u64_array(power_mgt, |
326 | "ibm,cpu-idle-state-psscr", psscr_val, dt_idle_states)) { | |
09206b60 | 327 | pr_warn("cpuidle-powernv: missing ibm,cpu-idle-state-psscr in DT\n"); |
3005c597 SP |
328 | goto out; |
329 | } | |
74aa51b5 | 330 | |
09206b60 GS |
331 | if (of_property_read_u64_array(power_mgt, |
332 | "ibm,cpu-idle-state-psscr-mask", | |
333 | psscr_mask, dt_idle_states)) { | |
334 | pr_warn("cpuidle-powernv:Missing ibm,cpu-idle-state-psscr-mask in DT\n"); | |
335 | goto out; | |
336 | } | |
337 | } | |
338 | ||
ecad4502 GS |
339 | count = of_property_count_u32_elems(power_mgt, |
340 | "ibm,cpu-idle-state-residency-ns"); | |
341 | ||
342 | if (count < 0) { | |
343 | rc = count; | |
344 | } else if (validate_dt_prop_sizes("ibm,cpu-idle-state-flags", | |
345 | dt_idle_states, | |
346 | "ibm,cpu-idle-state-residency-ns", | |
347 | count) != 0) { | |
348 | goto out; | |
349 | } else { | |
350 | rc = of_property_read_u32_array(power_mgt, | |
351 | "ibm,cpu-idle-state-residency-ns", | |
352 | residency_ns, dt_idle_states); | |
353 | } | |
0888839c PM |
354 | |
355 | for (i = 0; i < dt_idle_states; i++) { | |
9e9fc6f0 | 356 | unsigned int exit_latency, target_residency; |
3005c597 SP |
357 | /* |
358 | * If an idle state has exit latency beyond | |
359 | * POWERNV_THRESHOLD_LATENCY_NS then don't use it | |
360 | * in cpu-idle. | |
361 | */ | |
362 | if (latency_ns[i] > POWERNV_THRESHOLD_LATENCY_NS) | |
363 | continue; | |
9e9fc6f0 GS |
364 | /* |
365 | * Firmware passes residency and latency values in ns. | |
366 | * cpuidle expects it in us. | |
367 | */ | |
368 | exit_latency = latency_ns[i] / 1000; | |
369 | if (!rc) | |
370 | target_residency = residency_ns[i] / 1000; | |
371 | else | |
372 | target_residency = 0; | |
0888839c | 373 | |
09206b60 GS |
374 | if (has_stop_states) { |
375 | int err = validate_psscr_val_mask(&psscr_val[i], | |
376 | &psscr_mask[i], | |
377 | flags[i]); | |
378 | if (err) { | |
379 | report_invalid_psscr_val(psscr_val[i], err); | |
380 | continue; | |
381 | } | |
382 | } | |
383 | ||
92c83ff5 | 384 | /* |
9e9fc6f0 GS |
385 | * For nap and fastsleep, use default target_residency |
386 | * values if f/w does not expose it. | |
74aa51b5 | 387 | */ |
70734a78 | 388 | if (flags[i] & OPAL_PM_NAP_ENABLED) { |
9e9fc6f0 GS |
389 | if (!rc) |
390 | target_residency = 100; | |
0888839c | 391 | /* Add NAP state */ |
9e9fc6f0 GS |
392 | add_powernv_state(nr_idle_states, "Nap", |
393 | CPUIDLE_FLAG_NONE, nap_loop, | |
09206b60 | 394 | target_residency, exit_latency, 0, 0); |
3005c597 SP |
395 | } else if ((flags[i] & OPAL_PM_STOP_INST_FAST) && |
396 | !(flags[i] & OPAL_PM_TIMEBASE_STOP)) { | |
9e9fc6f0 GS |
397 | add_powernv_state(nr_idle_states, names[i], |
398 | CPUIDLE_FLAG_NONE, stop_loop, | |
399 | target_residency, exit_latency, | |
09206b60 | 400 | psscr_val[i], psscr_mask[i]); |
cc5a2f7b | 401 | } |
402 | ||
403 | /* | |
404 | * All cpuidle states with CPUIDLE_FLAG_TIMER_STOP set must come | |
405 | * within this config dependency check. | |
406 | */ | |
407 | #ifdef CONFIG_TICK_ONESHOT | |
408 | if (flags[i] & OPAL_PM_SLEEP_ENABLED || | |
70734a78 | 409 | flags[i] & OPAL_PM_SLEEP_ENABLED_ER1) { |
9e9fc6f0 GS |
410 | if (!rc) |
411 | target_residency = 300000; | |
0888839c | 412 | /* Add FASTSLEEP state */ |
9e9fc6f0 GS |
413 | add_powernv_state(nr_idle_states, "FastSleep", |
414 | CPUIDLE_FLAG_TIMER_STOP, | |
415 | fastsleep_loop, | |
09206b60 | 416 | target_residency, exit_latency, 0, 0); |
3005c597 SP |
417 | } else if ((flags[i] & OPAL_PM_STOP_INST_DEEP) && |
418 | (flags[i] & OPAL_PM_TIMEBASE_STOP)) { | |
9e9fc6f0 GS |
419 | add_powernv_state(nr_idle_states, names[i], |
420 | CPUIDLE_FLAG_TIMER_STOP, stop_loop, | |
421 | target_residency, exit_latency, | |
09206b60 | 422 | psscr_val[i], psscr_mask[i]); |
0888839c | 423 | } |
cc5a2f7b | 424 | #endif |
92c83ff5 | 425 | nr_idle_states++; |
0888839c | 426 | } |
92c83ff5 | 427 | out: |
0888839c PM |
428 | return nr_idle_states; |
429 | } | |
430 | ||
2c2e6ecf DD |
431 | /* |
432 | * powernv_idle_probe() | |
433 | * Choose state table for shared versus dedicated partition | |
434 | */ | |
435 | static int powernv_idle_probe(void) | |
436 | { | |
2c2e6ecf DD |
437 | if (cpuidle_disable != IDLE_NO_OVERRIDE) |
438 | return -ENODEV; | |
439 | ||
e4d54f71 | 440 | if (firmware_has_feature(FW_FEATURE_OPAL)) { |
2c2e6ecf | 441 | cpuidle_state_table = powernv_states; |
0888839c PM |
442 | /* Device tree can indicate more idle states */ |
443 | max_idle_state = powernv_add_idle_states(); | |
78eaa10f SB |
444 | if (max_idle_state > 1) { |
445 | snooze_timeout_en = true; | |
446 | snooze_timeout = powernv_states[1].target_residency * | |
447 | tb_ticks_per_usec; | |
448 | } | |
2c2e6ecf DD |
449 | } else |
450 | return -ENODEV; | |
451 | ||
452 | return 0; | |
453 | } | |
454 | ||
455 | static int __init powernv_processor_idle_init(void) | |
456 | { | |
457 | int retval; | |
458 | ||
459 | retval = powernv_idle_probe(); | |
460 | if (retval) | |
461 | return retval; | |
462 | ||
463 | powernv_cpuidle_driver_init(); | |
464 | retval = cpuidle_register(&powernv_idle_driver, NULL); | |
465 | if (retval) { | |
466 | printk(KERN_DEBUG "Registration of powernv driver failed.\n"); | |
467 | return retval; | |
468 | } | |
469 | ||
10fcca9d SAS |
470 | retval = cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, |
471 | "cpuidle/powernv:online", | |
472 | powernv_cpuidle_cpu_online, NULL); | |
473 | WARN_ON(retval < 0); | |
474 | retval = cpuhp_setup_state_nocalls(CPUHP_CPUIDLE_DEAD, | |
475 | "cpuidle/powernv:dead", NULL, | |
476 | powernv_cpuidle_cpu_dead); | |
477 | WARN_ON(retval < 0); | |
2c2e6ecf DD |
478 | printk(KERN_DEBUG "powernv_idle_driver registered\n"); |
479 | return 0; | |
480 | } | |
481 | ||
482 | device_initcall(powernv_processor_idle_init); |