]>
Commit | Line | Data |
---|---|---|
2874c5fd | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
1da177e4 LT |
2 | /* |
3 | ** SMP Support | |
4 | ** | |
5 | ** Copyright (C) 1999 Walt Drummond <[email protected]> | |
6 | ** Copyright (C) 1999 David Mosberger-Tang <[email protected]> | |
7 | ** Copyright (C) 2001,2004 Grant Grundler <[email protected]> | |
8 | ** | |
9 | ** Lots of stuff stolen from arch/alpha/kernel/smp.c | |
10 | ** ...and then parisc stole from arch/ia64/kernel/smp.c. Thanks David! :^) | |
11 | ** | |
7022672e | 12 | ** Thanks to John Curry and Ullas Ponnadi. I learned a lot from their work. |
1da177e4 LT |
13 | ** -grant (1/12/2001) |
14 | ** | |
1da177e4 | 15 | */ |
1da177e4 LT |
16 | #include <linux/types.h> |
17 | #include <linux/spinlock.h> | |
1da177e4 LT |
18 | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/module.h> | |
68e21be2 | 21 | #include <linux/sched/mm.h> |
1da177e4 LT |
22 | #include <linux/init.h> |
23 | #include <linux/interrupt.h> | |
24 | #include <linux/smp.h> | |
25 | #include <linux/kernel_stat.h> | |
26 | #include <linux/mm.h> | |
4e950f6f | 27 | #include <linux/err.h> |
1da177e4 LT |
28 | #include <linux/delay.h> |
29 | #include <linux/bitops.h> | |
d75f054a | 30 | #include <linux/ftrace.h> |
ec2e0f98 | 31 | #include <linux/cpu.h> |
1da177e4 | 32 | |
60063497 | 33 | #include <linux/atomic.h> |
1da177e4 LT |
34 | #include <asm/current.h> |
35 | #include <asm/delay.h> | |
1b2425e3 | 36 | #include <asm/tlbflush.h> |
1da177e4 LT |
37 | |
38 | #include <asm/io.h> | |
39 | #include <asm/irq.h> /* for CPU_IRQ_REGION and friends */ | |
40 | #include <asm/mmu_context.h> | |
41 | #include <asm/page.h> | |
1da177e4 LT |
42 | #include <asm/processor.h> |
43 | #include <asm/ptrace.h> | |
44 | #include <asm/unistd.h> | |
45 | #include <asm/cacheflush.h> | |
46 | ||
5492a0f0 KM |
47 | #undef DEBUG_SMP |
48 | #ifdef DEBUG_SMP | |
49 | static int smp_debug_lvl = 0; | |
50 | #define smp_debug(lvl, printargs...) \ | |
51 | if (lvl >= smp_debug_lvl) \ | |
52 | printk(printargs); | |
53 | #else | |
ef017beb | 54 | #define smp_debug(lvl, ...) do { } while(0) |
5492a0f0 | 55 | #endif /* DEBUG_SMP */ |
1da177e4 | 56 | |
1da177e4 LT |
57 | volatile struct task_struct *smp_init_current_idle_task; |
58 | ||
ef017beb | 59 | /* track which CPU is booting */ |
60ffef06 | 60 | static volatile int cpu_now_booting; |
1da177e4 | 61 | |
60ffef06 | 62 | static int parisc_max_cpus = 1; |
1da177e4 | 63 | |
6ad6c424 | 64 | static DEFINE_PER_CPU(spinlock_t, ipi_lock); |
1da177e4 | 65 | |
1da177e4 LT |
66 | enum ipi_message_type { |
67 | IPI_NOP=0, | |
68 | IPI_RESCHEDULE=1, | |
69 | IPI_CALL_FUNC, | |
70 | IPI_CPU_START, | |
71 | IPI_CPU_STOP, | |
72 | IPI_CPU_TEST | |
73 | }; | |
74 | ||
75 | ||
76 | /********** SMP inter processor interrupt and communication routines */ | |
77 | ||
78 | #undef PER_CPU_IRQ_REGION | |
79 | #ifdef PER_CPU_IRQ_REGION | |
80 | /* XXX REVISIT Ignore for now. | |
81 | ** *May* need this "hook" to register IPI handler | |
82 | ** once we have perCPU ExtIntr switch tables. | |
83 | */ | |
84 | static void | |
85 | ipi_init(int cpuid) | |
86 | { | |
1da177e4 LT |
87 | #error verify IRQ_OFFSET(IPI_IRQ) is ipi_interrupt() in new IRQ region |
88 | ||
89 | if(cpu_online(cpuid) ) | |
90 | { | |
91 | switch_to_idle_task(current); | |
92 | } | |
93 | ||
94 | return; | |
95 | } | |
96 | #endif | |
97 | ||
98 | ||
99 | /* | |
100 | ** Yoink this CPU from the runnable list... | |
101 | ** | |
102 | */ | |
103 | static void | |
104 | halt_processor(void) | |
105 | { | |
1da177e4 LT |
106 | /* REVISIT : redirect I/O Interrupts to another CPU? */ |
107 | /* REVISIT : does PM *know* this CPU isn't available? */ | |
9bc181d8 | 108 | set_cpu_online(smp_processor_id(), false); |
1da177e4 | 109 | local_irq_disable(); |
507efd63 | 110 | __pdc_cpu_rendezvous(); |
1da177e4 LT |
111 | for (;;) |
112 | ; | |
1da177e4 LT |
113 | } |
114 | ||
115 | ||
d75f054a | 116 | irqreturn_t __irq_entry |
c7753f18 | 117 | ipi_interrupt(int irq, void *dev_id) |
1da177e4 LT |
118 | { |
119 | int this_cpu = smp_processor_id(); | |
ef017beb | 120 | struct cpuinfo_parisc *p = &per_cpu(cpu_data, this_cpu); |
1da177e4 LT |
121 | unsigned long ops; |
122 | unsigned long flags; | |
123 | ||
1da177e4 | 124 | for (;;) { |
3c97b5e9 KM |
125 | spinlock_t *lock = &per_cpu(ipi_lock, this_cpu); |
126 | spin_lock_irqsave(lock, flags); | |
1da177e4 LT |
127 | ops = p->pending_ipi; |
128 | p->pending_ipi = 0; | |
3c97b5e9 | 129 | spin_unlock_irqrestore(lock, flags); |
1da177e4 LT |
130 | |
131 | mb(); /* Order bit clearing and data access. */ | |
132 | ||
133 | if (!ops) | |
134 | break; | |
135 | ||
136 | while (ops) { | |
137 | unsigned long which = ffz(~ops); | |
138 | ||
d911aed8 JB |
139 | ops &= ~(1 << which); |
140 | ||
1da177e4 | 141 | switch (which) { |
d911aed8 | 142 | case IPI_NOP: |
5492a0f0 | 143 | smp_debug(100, KERN_DEBUG "CPU%d IPI_NOP\n", this_cpu); |
d911aed8 JB |
144 | break; |
145 | ||
1da177e4 | 146 | case IPI_RESCHEDULE: |
5492a0f0 | 147 | smp_debug(100, KERN_DEBUG "CPU%d IPI_RESCHEDULE\n", this_cpu); |
cd85d551 | 148 | inc_irq_stat(irq_resched_count); |
184748cc | 149 | scheduler_ipi(); |
1da177e4 LT |
150 | break; |
151 | ||
152 | case IPI_CALL_FUNC: | |
5492a0f0 | 153 | smp_debug(100, KERN_DEBUG "CPU%d IPI_CALL_FUNC\n", this_cpu); |
b102f29b | 154 | inc_irq_stat(irq_call_count); |
dbcf4787 JA |
155 | generic_smp_call_function_interrupt(); |
156 | break; | |
157 | ||
1da177e4 | 158 | case IPI_CPU_START: |
5492a0f0 | 159 | smp_debug(100, KERN_DEBUG "CPU%d IPI_CPU_START\n", this_cpu); |
1da177e4 LT |
160 | break; |
161 | ||
162 | case IPI_CPU_STOP: | |
5492a0f0 | 163 | smp_debug(100, KERN_DEBUG "CPU%d IPI_CPU_STOP\n", this_cpu); |
1da177e4 | 164 | halt_processor(); |
1da177e4 LT |
165 | break; |
166 | ||
167 | case IPI_CPU_TEST: | |
5492a0f0 | 168 | smp_debug(100, KERN_DEBUG "CPU%d is alive!\n", this_cpu); |
1da177e4 LT |
169 | break; |
170 | ||
171 | default: | |
172 | printk(KERN_CRIT "Unknown IPI num on CPU%d: %lu\n", | |
173 | this_cpu, which); | |
1da177e4 LT |
174 | return IRQ_NONE; |
175 | } /* Switch */ | |
f4d0d40c HD |
176 | |
177 | /* before doing more, let in any pending interrupts */ | |
178 | if (ops) { | |
179 | local_irq_enable(); | |
180 | local_irq_disable(); | |
181 | } | |
1da177e4 LT |
182 | } /* while (ops) */ |
183 | } | |
184 | return IRQ_HANDLED; | |
185 | } | |
186 | ||
187 | ||
188 | static inline void | |
189 | ipi_send(int cpu, enum ipi_message_type op) | |
190 | { | |
ef017beb | 191 | struct cpuinfo_parisc *p = &per_cpu(cpu_data, cpu); |
3c97b5e9 | 192 | spinlock_t *lock = &per_cpu(ipi_lock, cpu); |
1da177e4 LT |
193 | unsigned long flags; |
194 | ||
3c97b5e9 | 195 | spin_lock_irqsave(lock, flags); |
1da177e4 | 196 | p->pending_ipi |= 1 << op; |
ef017beb | 197 | gsc_writel(IPI_IRQ - CPU_IRQ_BASE, p->hpa); |
3c97b5e9 | 198 | spin_unlock_irqrestore(lock, flags); |
1da177e4 LT |
199 | } |
200 | ||
dbcf4787 | 201 | static void |
91887a36 | 202 | send_IPI_mask(const struct cpumask *mask, enum ipi_message_type op) |
dbcf4787 JA |
203 | { |
204 | int cpu; | |
205 | ||
91887a36 | 206 | for_each_cpu(cpu, mask) |
dbcf4787 JA |
207 | ipi_send(cpu, op); |
208 | } | |
1da177e4 LT |
209 | |
210 | static inline void | |
211 | send_IPI_single(int dest_cpu, enum ipi_message_type op) | |
212 | { | |
7f2347a4 | 213 | BUG_ON(dest_cpu == NO_PROC_ID); |
1da177e4 LT |
214 | |
215 | ipi_send(dest_cpu, op); | |
216 | } | |
217 | ||
218 | static inline void | |
219 | send_IPI_allbutself(enum ipi_message_type op) | |
220 | { | |
221 | int i; | |
1c2fb946 SS |
222 | |
223 | preempt_disable(); | |
394e3902 AM |
224 | for_each_online_cpu(i) { |
225 | if (i != smp_processor_id()) | |
1da177e4 LT |
226 | send_IPI_single(i, op); |
227 | } | |
1c2fb946 | 228 | preempt_enable(); |
1da177e4 LT |
229 | } |
230 | ||
231 | ||
232 | inline void | |
233 | smp_send_stop(void) { send_IPI_allbutself(IPI_CPU_STOP); } | |
234 | ||
1da177e4 LT |
235 | void |
236 | smp_send_reschedule(int cpu) { send_IPI_single(cpu, IPI_RESCHEDULE); } | |
237 | ||
d911aed8 JB |
238 | void |
239 | smp_send_all_nop(void) | |
240 | { | |
241 | send_IPI_allbutself(IPI_NOP); | |
242 | } | |
243 | ||
91887a36 | 244 | void arch_send_call_function_ipi_mask(const struct cpumask *mask) |
1da177e4 | 245 | { |
dbcf4787 | 246 | send_IPI_mask(mask, IPI_CALL_FUNC); |
1da177e4 LT |
247 | } |
248 | ||
dbcf4787 JA |
249 | void arch_send_call_function_single_ipi(int cpu) |
250 | { | |
528d8eb2 | 251 | send_IPI_single(cpu, IPI_CALL_FUNC); |
dbcf4787 | 252 | } |
1da177e4 | 253 | |
1da177e4 LT |
254 | /* |
255 | * Called by secondaries to update state and initialize CPU registers. | |
256 | */ | |
257 | static void __init | |
258 | smp_cpu_init(int cpunum) | |
259 | { | |
1da177e4 | 260 | extern void init_IRQ(void); /* arch/parisc/kernel/irq.c */ |
56f335c8 | 261 | extern void start_cpu_itimer(void); /* arch/parisc/kernel/time.c */ |
1da177e4 LT |
262 | |
263 | /* Set modes and Enable floating point coprocessor */ | |
a7e6601f | 264 | init_per_cpu(cpunum); |
1da177e4 LT |
265 | |
266 | disable_sr_hashing(); | |
267 | ||
268 | mb(); | |
269 | ||
270 | /* Well, support 2.4 linux scheme as well. */ | |
7ec6118c | 271 | if (cpu_online(cpunum)) { |
1da177e4 LT |
272 | extern void machine_halt(void); /* arch/parisc.../process.c */ |
273 | ||
274 | printk(KERN_CRIT "CPU#%d already initialized!\n", cpunum); | |
275 | machine_halt(); | |
ec2e0f98 SB |
276 | } |
277 | ||
278 | notify_cpu_starting(cpunum); | |
279 | ||
9bc181d8 | 280 | set_cpu_online(cpunum, true); |
1da177e4 LT |
281 | |
282 | /* Initialise the idle task for this CPU */ | |
f1f10076 | 283 | mmgrab(&init_mm); |
1da177e4 | 284 | current->active_mm = &init_mm; |
7f2347a4 | 285 | BUG_ON(current->mm); |
1da177e4 LT |
286 | enter_lazy_tlb(&init_mm, current); |
287 | ||
7022672e | 288 | init_IRQ(); /* make sure no IRQs are enabled or pending */ |
56f335c8 | 289 | start_cpu_itimer(); |
1da177e4 LT |
290 | } |
291 | ||
292 | ||
293 | /* | |
294 | * Slaves start using C here. Indirectly called from smp_slave_stext. | |
295 | * Do what start_kernel() and main() do for boot strap processor (aka monarch) | |
296 | */ | |
0ed1fe4a | 297 | void __init smp_callin(unsigned long pdce_proc) |
1da177e4 LT |
298 | { |
299 | int slave_id = cpu_now_booting; | |
1da177e4 | 300 | |
0ed1fe4a HD |
301 | #ifdef CONFIG_64BIT |
302 | WARN_ON(((unsigned long)(PAGE0->mem_pdc_hi) << 32 | |
303 | | PAGE0->mem_pdc) != pdce_proc); | |
304 | #endif | |
305 | ||
1da177e4 LT |
306 | smp_cpu_init(slave_id); |
307 | ||
1da177e4 | 308 | flush_cache_all_local(); /* start with known state */ |
1b2425e3 | 309 | flush_tlb_all_local(NULL); |
1da177e4 LT |
310 | |
311 | local_irq_enable(); /* Interrupts have been off until now */ | |
312 | ||
fc6d73d6 | 313 | cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); |
1da177e4 LT |
314 | |
315 | /* NOTREACHED */ | |
316 | panic("smp_callin() AAAAaaaaahhhh....\n"); | |
317 | } | |
318 | ||
319 | /* | |
320 | * Bring one cpu online. | |
321 | */ | |
60ffef06 | 322 | int smp_boot_one_cpu(int cpuid, struct task_struct *idle) |
1da177e4 | 323 | { |
ef017beb | 324 | const struct cpuinfo_parisc *p = &per_cpu(cpu_data, cpuid); |
1da177e4 LT |
325 | long timeout; |
326 | ||
2214c0e7 | 327 | idle->cpu = cpuid; |
1da177e4 LT |
328 | |
329 | /* Let _start know what logical CPU we're booting | |
330 | ** (offset into init_tasks[],cpu_data[]) | |
331 | */ | |
332 | cpu_now_booting = cpuid; | |
333 | ||
334 | /* | |
335 | ** boot strap code needs to know the task address since | |
336 | ** it also contains the process stack. | |
337 | */ | |
338 | smp_init_current_idle_task = idle ; | |
339 | mb(); | |
340 | ||
ef017beb | 341 | printk(KERN_INFO "Releasing cpu %d now, hpa=%lx\n", cpuid, p->hpa); |
1da177e4 LT |
342 | |
343 | /* | |
344 | ** This gets PDC to release the CPU from a very tight loop. | |
345 | ** | |
346 | ** From the PA-RISC 2.0 Firmware Architecture Reference Specification: | |
347 | ** "The MEM_RENDEZ vector specifies the location of OS_RENDEZ which | |
348 | ** is executed after receiving the rendezvous signal (an interrupt to | |
349 | ** EIR{0}). MEM_RENDEZ is valid only when it is nonzero and the | |
350 | ** contents of memory are valid." | |
351 | */ | |
ef017beb | 352 | gsc_writel(TIMER_IRQ - CPU_IRQ_BASE, p->hpa); |
1da177e4 LT |
353 | mb(); |
354 | ||
355 | /* | |
356 | * OK, wait a bit for that CPU to finish staggering about. | |
357 | * Slave will set a bit when it reaches smp_cpu_init(). | |
358 | * Once the "monarch CPU" sees the bit change, it can move on. | |
359 | */ | |
360 | for (timeout = 0; timeout < 10000; timeout++) { | |
361 | if(cpu_online(cpuid)) { | |
362 | /* Which implies Slave has started up */ | |
363 | cpu_now_booting = 0; | |
364 | smp_init_current_idle_task = NULL; | |
365 | goto alive ; | |
366 | } | |
367 | udelay(100); | |
368 | barrier(); | |
369 | } | |
1da177e4 LT |
370 | printk(KERN_CRIT "SMP: CPU:%d is stuck.\n", cpuid); |
371 | return -1; | |
372 | ||
373 | alive: | |
374 | /* Remember the Slave data */ | |
5492a0f0 | 375 | smp_debug(100, KERN_DEBUG "SMP: CPU:%d came alive after %ld _us\n", |
1da177e4 | 376 | cpuid, timeout * 100); |
1da177e4 LT |
377 | return 0; |
378 | } | |
379 | ||
ef017beb | 380 | void __init smp_prepare_boot_cpu(void) |
1da177e4 | 381 | { |
ef017beb | 382 | int bootstrap_processor = per_cpu(cpu_data, 0).cpuid; |
1da177e4 | 383 | |
1da177e4 | 384 | /* Setup BSP mappings */ |
ef017beb | 385 | printk(KERN_INFO "SMP: bootstrap CPU ID is %d\n", bootstrap_processor); |
1da177e4 | 386 | |
9bc181d8 RR |
387 | set_cpu_online(bootstrap_processor, true); |
388 | set_cpu_present(bootstrap_processor, true); | |
1da177e4 LT |
389 | } |
390 | ||
391 | ||
392 | ||
393 | /* | |
394 | ** inventory.c:do_inventory() hasn't yet been run and thus we | |
7022672e | 395 | ** don't 'discover' the additional CPUs until later. |
1da177e4 LT |
396 | */ |
397 | void __init smp_prepare_cpus(unsigned int max_cpus) | |
398 | { | |
6ad6c424 TG |
399 | int cpu; |
400 | ||
401 | for_each_possible_cpu(cpu) | |
402 | spin_lock_init(&per_cpu(ipi_lock, cpu)); | |
403 | ||
9bc181d8 | 404 | init_cpu_present(cpumask_of(0)); |
1da177e4 LT |
405 | |
406 | parisc_max_cpus = max_cpus; | |
407 | if (!max_cpus) | |
408 | printk(KERN_INFO "SMP mode deactivated.\n"); | |
409 | } | |
410 | ||
411 | ||
412 | void smp_cpus_done(unsigned int cpu_max) | |
413 | { | |
414 | return; | |
415 | } | |
416 | ||
417 | ||
60ffef06 | 418 | int __cpu_up(unsigned int cpu, struct task_struct *tidle) |
1da177e4 | 419 | { |
5baf919d HD |
420 | if (cpu != 0 && cpu < parisc_max_cpus && smp_boot_one_cpu(cpu, tidle)) |
421 | return -ENOSYS; | |
1da177e4 LT |
422 | |
423 | return cpu_online(cpu) ? 0 : -ENOSYS; | |
424 | } | |
425 | ||
1da177e4 | 426 | #ifdef CONFIG_PROC_FS |
01f56832 | 427 | int setup_profiling_timer(unsigned int multiplier) |
1da177e4 LT |
428 | { |
429 | return -EINVAL; | |
430 | } | |
431 | #endif |