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Merge branches 'acpi-cleanup', 'acpi-dock', 'acpi-pci' and 'acpi-dsm'
[linux.git] / drivers / tty / mxser.c
CommitLineData
1da177e4
LT		 1/*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
80ff8a80
JS		 4 * Copyright (C) 1999-2006 Moxa Technologies ([email protected]).
5 * Copyright (C) 2006-2008 Jiri Slaby <[email protected]>
1da177e4 6 *
1c45607a
JS		 7 * This code is loosely based on the 1.8 moxa driver which is based on
8 * Linux serial driver, written by Linus Torvalds, Theodore T'so and
9 * others.
1da177e4
LT		 10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
8ea2c2ec 14 * (at your option) any later version.
1da177e4 15 *
1da177e4 16 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
8eb04cf3
AC		 17 * <[email protected]>. The original 1.8 code is available on
18 * www.moxa.com.
1da177e4 19 * - Fixed x86_64 cleanness
1da177e4
LT		 20 */
21
1da177e4 22#include <linux/module.h>
1da177e4
LT		 23#include <linux/errno.h>
24#include <linux/signal.h>
25#include <linux/sched.h>
26#include <linux/timer.h>
27#include <linux/interrupt.h>
28#include <linux/tty.h>
29#include <linux/tty_flip.h>
30#include <linux/serial.h>
31#include <linux/serial_reg.h>
32#include <linux/major.h>
33#include <linux/string.h>
34#include <linux/fcntl.h>
35#include <linux/ptrace.h>
1da177e4
LT		 36#include <linux/ioport.h>
37#include <linux/mm.h>
1da177e4
LT		 38#include <linux/delay.h>
39#include <linux/pci.h>
1977f032 40#include <linux/bitops.h>
5a0e3ad6 41#include <linux/slab.h>
5a3c6b25 42#include <linux/ratelimit.h>
1da177e4 43
1da177e4
LT		 44#include <asm/io.h>
45#include <asm/irq.h>
1da177e4
LT		 46#include <asm/uaccess.h>
47
48#include "mxser.h"
49
502f295f 50#define MXSER_VERSION "2.0.5" /* 1.14 */
1da177e4 51#define MXSERMAJOR 174
1da177e4 52
1da177e4 53#define MXSER_BOARDS 4 /* Max. boards */
1da177e4 54#define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
1c45607a
JS		 55#define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
56#define MXSER_ISR_PASS_LIMIT 100
1da177e4 57
1c45607a
JS		 58/*CheckIsMoxaMust return value*/
59#define MOXA_OTHER_UART 0x00
60#define MOXA_MUST_MU150_HWID 0x01
61#define MOXA_MUST_MU860_HWID 0x02
62
1da177e4
LT		 63#define WAKEUP_CHARS 256
64
65#define UART_MCR_AFE 0x20
66#define UART_LSR_SPECIAL 0x1E
67
e129deff 68#define PCI_DEVICE_ID_POS104UL 0x1044
1c45607a 69#define PCI_DEVICE_ID_CB108 0x1080
e129deff 70#define PCI_DEVICE_ID_CP102UF 0x1023
502f295f 71#define PCI_DEVICE_ID_CP112UL 0x1120
1c45607a 72#define PCI_DEVICE_ID_CB114 0x1142
80ff8a80 73#define PCI_DEVICE_ID_CP114UL 0x1143
1c45607a
JS		 74#define PCI_DEVICE_ID_CB134I 0x1341
75#define PCI_DEVICE_ID_CP138U 0x1380
1da177e4 76
1da177e4
LT		 77
78#define C168_ASIC_ID 1
79#define C104_ASIC_ID 2
80#define C102_ASIC_ID 0xB
81#define CI132_ASIC_ID 4
82#define CI134_ASIC_ID 3
83#define CI104J_ASIC_ID 5
84
1c45607a
JS		 85#define MXSER_HIGHBAUD 1
86#define MXSER_HAS2 2
1da177e4 87
8ea2c2ec 88/* This is only for PCI */
1c45607a 89static const struct {
1da177e4
LT		 90 int type;
91 int tx_fifo;
92 int rx_fifo;
93 int xmit_fifo_size;
94 int rx_high_water;
95 int rx_trigger;
96 int rx_low_water;
97 long max_baud;
1c45607a 98} Gpci_uart_info[] = {
1da177e4
LT		 99 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
100 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
101 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
102};
1c45607a 103#define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
1da177e4 104
1c45607a
JS		 105struct mxser_cardinfo {
106 char *name;
107 unsigned int nports;
108 unsigned int flags;
109};
1da177e4 110
1c45607a
JS		 111static const struct mxser_cardinfo mxser_cards[] = {
112/* 0*/ { "C168 series", 8, },
113 { "C104 series", 4, },
114 { "CI-104J series", 4, },
115 { "C168H/PCI series", 8, },
116 { "C104H/PCI series", 4, },
117/* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
118 { "CI-132 series", 4, MXSER_HAS2 },
119 { "CI-134 series", 4, },
120 { "CP-132 series", 2, },
121 { "CP-114 series", 4, },
122/*10*/ { "CT-114 series", 4, },
123 { "CP-102 series", 2, MXSER_HIGHBAUD },
124 { "CP-104U series", 4, },
125 { "CP-168U series", 8, },
126 { "CP-132U series", 2, },
127/*15*/ { "CP-134U series", 4, },
128 { "CP-104JU series", 4, },
129 { "Moxa UC7000 Serial", 8, }, /* RC7000 */
130 { "CP-118U series", 8, },
131 { "CP-102UL series", 2, },
132/*20*/ { "CP-102U series", 2, },
133 { "CP-118EL series", 8, },
134 { "CP-168EL series", 8, },
135 { "CP-104EL series", 4, },
136 { "CB-108 series", 8, },
137/*25*/ { "CB-114 series", 4, },
138 { "CB-134I series", 4, },
139 { "CP-138U series", 8, },
80ff8a80 140 { "POS-104UL series", 4, },
e129deff 141 { "CP-114UL series", 4, },
502f295f
JS		 142/*30*/ { "CP-102UF series", 2, },
143 { "CP-112UL series", 2, },
1c45607a 144};
1da177e4 145
1c45607a
JS		 146/* driver_data correspond to the lines in the structure above
147 see also ISA probe function before you change something */
1da177e4 148static struct pci_device_id mxser_pcibrds[] = {
1c45607a
JS		 149 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
150 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
151 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
152 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
153 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
154 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
155 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
156 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
157 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
158 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
159 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
160 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
161 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
162 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
163 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
164 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
165 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
166 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
167 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
168 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
169 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
170 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
171 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
80ff8a80 172 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
e129deff 173 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
502f295f 174 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP112UL), .driver_data = 31 },
1c45607a 175 { }
1da177e4 176};
1da177e4
LT		 177MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
178
1df00924 179static unsigned long ioaddr[MXSER_BOARDS];
1da177e4 180static int ttymajor = MXSERMAJOR;
1da177e4
LT		 181
182/* Variables for insmod */
183
184MODULE_AUTHOR("Casper Yang");
185MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
1df00924
JS		 186module_param_array(ioaddr, ulong, NULL, 0);
187MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board");
8d3b33f6 188module_param(ttymajor, int, 0);
1da177e4
LT		 189MODULE_LICENSE("GPL");
190
191struct mxser_log {
192 int tick;
193 unsigned long rxcnt[MXSER_PORTS];
194 unsigned long txcnt[MXSER_PORTS];
195};
196
1da177e4
LT		 197struct mxser_mon {
198 unsigned long rxcnt;
199 unsigned long txcnt;
200 unsigned long up_rxcnt;
201 unsigned long up_txcnt;
202 int modem_status;
203 unsigned char hold_reason;
204};
205
206struct mxser_mon_ext {
207 unsigned long rx_cnt[32];
208 unsigned long tx_cnt[32];
209 unsigned long up_rxcnt[32];
210 unsigned long up_txcnt[32];
211 int modem_status[32];
212
213 long baudrate[32];
214 int databits[32];
215 int stopbits[32];
216 int parity[32];
217 int flowctrl[32];
218 int fifo[32];
219 int iftype[32];
220};
8ea2c2ec 221
1c45607a
JS		 222struct mxser_board;
223
224struct mxser_port {
0ad9e7d1 225 struct tty_port port;
1c45607a 226 struct mxser_board *board;
1c45607a
JS		 227
228 unsigned long ioaddr;
229 unsigned long opmode_ioaddr;
230 int max_baud;
1da177e4 231
1da177e4
LT		 232 int rx_high_water;
233 int rx_trigger; /* Rx fifo trigger level */
234 int rx_low_water;
235 int baud_base; /* max. speed */
1da177e4 236 int type; /* UART type */
1c45607a 237
1da177e4 238 int x_char; /* xon/xoff character */
1da177e4
LT		 239 int IER; /* Interrupt Enable Register */
240 int MCR; /* Modem control register */
1c45607a
JS		 241
242 unsigned char stop_rx;
243 unsigned char ldisc_stop_rx;
244
245 int custom_divisor;
1c45607a 246 unsigned char err_shadow;
1c45607a 247
1c45607a
JS		 248 struct async_icount icount; /* kernel counters for 4 input interrupts */
249 int timeout;
250
251 int read_status_mask;
252 int ignore_status_mask;
253 int xmit_fifo_size;
1da177e4
LT		 254 int xmit_head;
255 int xmit_tail;
256 int xmit_cnt;
1c45607a 257
606d099c 258 struct ktermios normal_termios;
1c45607a 259
1da177e4 260 struct mxser_mon mon_data;
1c45607a 261
1da177e4 262 spinlock_t slock;
1c45607a
JS		 263};
264
265struct mxser_board {
266 unsigned int idx;
267 int irq;
268 const struct mxser_cardinfo *info;
269 unsigned long vector;
270 unsigned long vector_mask;
271
272 int chip_flag;
273 int uart_type;
274
275 struct mxser_port ports[MXSER_PORTS_PER_BOARD];
1da177e4
LT		 276};
277
1da177e4
LT		 278struct mxser_mstatus {
279 tcflag_t cflag;
280 int cts;
281 int dsr;
282 int ri;
283 int dcd;
284};
285
1c45607a 286static struct mxser_board mxser_boards[MXSER_BOARDS];
1da177e4 287static struct tty_driver *mxvar_sdriver;
1da177e4 288static struct mxser_log mxvar_log;
1da177e4 289static int mxser_set_baud_method[MXSER_PORTS + 1];
1da177e4 290
148ff86b
CH		 291static void mxser_enable_must_enchance_mode(unsigned long baseio)
292{
293 u8 oldlcr;
294 u8 efr;
295
296 oldlcr = inb(baseio + UART_LCR);
297 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
298
299 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
300 efr |= MOXA_MUST_EFR_EFRB_ENABLE;
301
302 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
303 outb(oldlcr, baseio + UART_LCR);
304}
305
e89d67cf 306#ifdef CONFIG_PCI
148ff86b
CH		 307static void mxser_disable_must_enchance_mode(unsigned long baseio)
308{
309 u8 oldlcr;
310 u8 efr;
311
312 oldlcr = inb(baseio + UART_LCR);
313 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
314
315 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
316 efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
317
318 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
319 outb(oldlcr, baseio + UART_LCR);
320}
e89d67cf 321#endif
148ff86b
CH		 322
323static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
324{
325 u8 oldlcr;
326 u8 efr;
327
328 oldlcr = inb(baseio + UART_LCR);
329 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
330
331 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
332 efr &= ~MOXA_MUST_EFR_BANK_MASK;
333 efr |= MOXA_MUST_EFR_BANK0;
334
335 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
336 outb(value, baseio + MOXA_MUST_XON1_REGISTER);
337 outb(oldlcr, baseio + UART_LCR);
338}
339
340static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
341{
342 u8 oldlcr;
343 u8 efr;
344
345 oldlcr = inb(baseio + UART_LCR);
346 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
347
348 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
349 efr &= ~MOXA_MUST_EFR_BANK_MASK;
350 efr |= MOXA_MUST_EFR_BANK0;
351
352 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
353 outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
354 outb(oldlcr, baseio + UART_LCR);
355}
356
357static void mxser_set_must_fifo_value(struct mxser_port *info)
358{
359 u8 oldlcr;
360 u8 efr;
361
362 oldlcr = inb(info->ioaddr + UART_LCR);
363 outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
364
365 efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
366 efr &= ~MOXA_MUST_EFR_BANK_MASK;
367 efr |= MOXA_MUST_EFR_BANK1;
368
369 outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
370 outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
371 outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
372 outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
373 outb(oldlcr, info->ioaddr + UART_LCR);
374}
375
376static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
377{
378 u8 oldlcr;
379 u8 efr;
380
381 oldlcr = inb(baseio + UART_LCR);
382 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
383
384 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
385 efr &= ~MOXA_MUST_EFR_BANK_MASK;
386 efr |= MOXA_MUST_EFR_BANK2;
387
388 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
389 outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
390 outb(oldlcr, baseio + UART_LCR);
391}
392
e89d67cf 393#ifdef CONFIG_PCI
148ff86b
CH		 394static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
395{
396 u8 oldlcr;
397 u8 efr;
398
399 oldlcr = inb(baseio + UART_LCR);
400 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
401
402 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
403 efr &= ~MOXA_MUST_EFR_BANK_MASK;
404 efr |= MOXA_MUST_EFR_BANK2;
405
406 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
407 *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
408 outb(oldlcr, baseio + UART_LCR);
409}
e89d67cf 410#endif
148ff86b
CH		 411
412static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
413{
414 u8 oldlcr;
415 u8 efr;
416
417 oldlcr = inb(baseio + UART_LCR);
418 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
419
420 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
421 efr &= ~MOXA_MUST_EFR_SF_MASK;
422
423 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
424 outb(oldlcr, baseio + UART_LCR);
425}
426
427static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
428{
429 u8 oldlcr;
430 u8 efr;
431
432 oldlcr = inb(baseio + UART_LCR);
433 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
434
435 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
436 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
437 efr |= MOXA_MUST_EFR_SF_TX1;
438
439 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
440 outb(oldlcr, baseio + UART_LCR);
441}
442
443static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
444{
445 u8 oldlcr;
446 u8 efr;
447
448 oldlcr = inb(baseio + UART_LCR);
449 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
450
451 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
452 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
453
454 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
455 outb(oldlcr, baseio + UART_LCR);
456}
457
458static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
459{
460 u8 oldlcr;
461 u8 efr;
462
463 oldlcr = inb(baseio + UART_LCR);
464 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
465
466 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
467 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
468 efr |= MOXA_MUST_EFR_SF_RX1;
469
470 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
471 outb(oldlcr, baseio + UART_LCR);
472}
473
474static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
475{
476 u8 oldlcr;
477 u8 efr;
478
479 oldlcr = inb(baseio + UART_LCR);
480 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
481
482 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
483 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
484
485 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
486 outb(oldlcr, baseio + UART_LCR);
487}
488
b8cc5549 489#ifdef CONFIG_PCI
9671f099 490static int CheckIsMoxaMust(unsigned long io)
1da177e4
LT		 491{
492 u8 oldmcr, hwid;
493 int i;
494
495 outb(0, io + UART_LCR);
148ff86b 496 mxser_disable_must_enchance_mode(io);
1da177e4
LT		 497 oldmcr = inb(io + UART_MCR);
498 outb(0, io + UART_MCR);
148ff86b 499 mxser_set_must_xon1_value(io, 0x11);
1da177e4
LT		 500 if ((hwid = inb(io + UART_MCR)) != 0) {
501 outb(oldmcr, io + UART_MCR);
8ea2c2ec 502 return MOXA_OTHER_UART;
1da177e4
LT		 503 }
504
148ff86b 505 mxser_get_must_hardware_id(io, &hwid);
1c45607a
JS		 506 for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
507 if (hwid == Gpci_uart_info[i].type)
8ea2c2ec 508 return (int)hwid;
1da177e4
LT		 509 }
510 return MOXA_OTHER_UART;
511}
b8cc5549 512#endif
1da177e4 513
1c45607a 514static void process_txrx_fifo(struct mxser_port *info)
1da177e4
LT		 515{
516 int i;
517
518 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
519 info->rx_trigger = 1;
520 info->rx_high_water = 1;
521 info->rx_low_water = 1;
522 info->xmit_fifo_size = 1;
1c45607a
JS		 523 } else
524 for (i = 0; i < UART_INFO_NUM; i++)
525 if (info->board->chip_flag == Gpci_uart_info[i].type) {
1da177e4
LT		 526 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
527 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
528 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
529 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
530 break;
531 }
1da177e4
LT		 532}
533
1c45607a 534static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
1da177e4 535{
72800df9 536 static unsigned char mxser_msr[MXSER_PORTS + 1];
1c45607a 537 unsigned char status = 0;
1da177e4 538
1c45607a 539 status = inb(baseaddr + UART_MSR);
1da177e4 540
1c45607a
JS		 541 mxser_msr[port] &= 0x0F;
542 mxser_msr[port] |= status;
543 status = mxser_msr[port];
544 if (mode)
545 mxser_msr[port] = 0;
1da177e4 546
1c45607a
JS		 547 return status;
548}
1da177e4 549
31f35939
AC		 550static int mxser_carrier_raised(struct tty_port *port)
551{
552 struct mxser_port *mp = container_of(port, struct mxser_port, port);
553 return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0;
554}
555
fcc8ac18 556static void mxser_dtr_rts(struct tty_port *port, int on)
5d951fb4
AC		 557{
558 struct mxser_port *mp = container_of(port, struct mxser_port, port);
559 unsigned long flags;
560
561 spin_lock_irqsave(&mp->slock, flags);
fcc8ac18
AC		 562 if (on)
563 outb(inb(mp->ioaddr + UART_MCR) |
564 UART_MCR_DTR | UART_MCR_RTS, mp->ioaddr + UART_MCR);
565 else
566 outb(inb(mp->ioaddr + UART_MCR)&~(UART_MCR_DTR | UART_MCR_RTS),
567 mp->ioaddr + UART_MCR);
5d951fb4
AC		 568 spin_unlock_irqrestore(&mp->slock, flags);
569}
570
216ba023 571static int mxser_set_baud(struct tty_struct *tty, long newspd)
1da177e4 572{
216ba023 573 struct mxser_port *info = tty->driver_data;
1c45607a
JS		 574 int quot = 0, baud;
575 unsigned char cval;
1da177e4 576
216ba023 577 if (!info->ioaddr)
1c45607a 578 return -1;
1da177e4 579
1c45607a
JS		 580 if (newspd > info->max_baud)
581 return -1;
1da177e4 582
1c45607a
JS		 583 if (newspd == 134) {
584 quot = 2 * info->baud_base / 269;
216ba023 585 tty_encode_baud_rate(tty, 134, 134);
1c45607a
JS		 586 } else if (newspd) {
587 quot = info->baud_base / newspd;
588 if (quot == 0)
589 quot = 1;
590 baud = info->baud_base/quot;
216ba023 591 tty_encode_baud_rate(tty, baud, baud);
1c45607a
JS		 592 } else {
593 quot = 0;
594 }
1da177e4 595
1c45607a
JS		 596 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
597 info->timeout += HZ / 50; /* Add .02 seconds of slop */
1da177e4 598
1c45607a
JS		 599 if (quot) {
600 info->MCR |= UART_MCR_DTR;
601 outb(info->MCR, info->ioaddr + UART_MCR);
602 } else {
603 info->MCR &= ~UART_MCR_DTR;
604 outb(info->MCR, info->ioaddr + UART_MCR);
605 return 0;
606 }
1da177e4 607
1c45607a 608 cval = inb(info->ioaddr + UART_LCR);
1da177e4 609
1c45607a 610 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
1da177e4 611
1c45607a
JS		 612 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
613 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
614 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
1da177e4 615
1c45607a 616#ifdef BOTHER
216ba023 617 if (C_BAUD(tty) == BOTHER) {
1c45607a
JS		 618 quot = info->baud_base % newspd;
619 quot *= 8;
620 if (quot % newspd > newspd / 2) {
621 quot /= newspd;
622 quot++;
623 } else
624 quot /= newspd;
625
148ff86b 626 mxser_set_must_enum_value(info->ioaddr, quot);
1c45607a
JS		 627 } else
628#endif
148ff86b 629 mxser_set_must_enum_value(info->ioaddr, 0);
1da177e4 630
8ea2c2ec 631 return 0;
1da177e4 632}
1da177e4 633
1c45607a
JS		 634/*
635 * This routine is called to set the UART divisor registers to match
636 * the specified baud rate for a serial port.
637 */
216ba023
AC		 638static int mxser_change_speed(struct tty_struct *tty,
639 struct ktermios *old_termios)
1da177e4 640{
216ba023 641 struct mxser_port *info = tty->driver_data;
1c45607a
JS		 642 unsigned cflag, cval, fcr;
643 int ret = 0;
644 unsigned char status;
1da177e4 645
adc8d746 646 cflag = tty->termios.c_cflag;
216ba023 647 if (!info->ioaddr)
1c45607a 648 return ret;
1da177e4 649
216ba023
AC		 650 if (mxser_set_baud_method[tty->index] == 0)
651 mxser_set_baud(tty, tty_get_baud_rate(tty));
1da177e4 652
1c45607a
JS		 653 /* byte size and parity */
654 switch (cflag & CSIZE) {
655 case CS5:
656 cval = 0x00;
657 break;
658 case CS6:
659 cval = 0x01;
660 break;
661 case CS7:
662 cval = 0x02;
663 break;
664 case CS8:
665 cval = 0x03;
666 break;
667 default:
668 cval = 0x00;
669 break; /* too keep GCC shut... */
670 }
671 if (cflag & CSTOPB)
672 cval |= 0x04;
673 if (cflag & PARENB)
674 cval |= UART_LCR_PARITY;
675 if (!(cflag & PARODD))
676 cval |= UART_LCR_EPAR;
677 if (cflag & CMSPAR)
678 cval |= UART_LCR_SPAR;
1da177e4 679
1c45607a
JS		 680 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
681 if (info->board->chip_flag) {
682 fcr = UART_FCR_ENABLE_FIFO;
683 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
148ff86b 684 mxser_set_must_fifo_value(info);
1c45607a
JS		 685 } else
686 fcr = 0;
687 } else {
688 fcr = UART_FCR_ENABLE_FIFO;
689 if (info->board->chip_flag) {
690 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
148ff86b 691 mxser_set_must_fifo_value(info);
1c45607a
JS		 692 } else {
693 switch (info->rx_trigger) {
694 case 1:
695 fcr |= UART_FCR_TRIGGER_1;
696 break;
697 case 4:
698 fcr |= UART_FCR_TRIGGER_4;
699 break;
700 case 8:
701 fcr |= UART_FCR_TRIGGER_8;
702 break;
703 default:
704 fcr |= UART_FCR_TRIGGER_14;
705 break;
706 }
1da177e4 707 }
1da177e4
LT		 708 }
709
1c45607a
JS		 710 /* CTS flow control flag and modem status interrupts */
711 info->IER &= ~UART_IER_MSI;
712 info->MCR &= ~UART_MCR_AFE;
713 if (cflag & CRTSCTS) {
0ad9e7d1 714 info->port.flags |= ASYNC_CTS_FLOW;
1c45607a
JS		 715 info->IER |= UART_IER_MSI;
716 if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
717 info->MCR |= UART_MCR_AFE;
718 } else {
719 status = inb(info->ioaddr + UART_MSR);
216ba023 720 if (tty->hw_stopped) {
1c45607a 721 if (status & UART_MSR_CTS) {
216ba023 722 tty->hw_stopped = 0;
1c45607a
JS		 723 if (info->type != PORT_16550A &&
724 !info->board->chip_flag) {
725 outb(info->IER & ~UART_IER_THRI,
726 info->ioaddr +
727 UART_IER);
728 info->IER |= UART_IER_THRI;
729 outb(info->IER, info->ioaddr +
730 UART_IER);
731 }
216ba023 732 tty_wakeup(tty);
1c45607a
JS		 733 }
734 } else {
735 if (!(status & UART_MSR_CTS)) {
216ba023 736 tty->hw_stopped = 1;
1c45607a
JS		 737 if ((info->type != PORT_16550A) &&
738 (!info->board->chip_flag)) {
739 info->IER &= ~UART_IER_THRI;
740 outb(info->IER, info->ioaddr +
741 UART_IER);
742 }
743 }
744 }
1da177e4 745 }
1c45607a 746 } else {
0ad9e7d1 747 info->port.flags &= ~ASYNC_CTS_FLOW;
1c45607a
JS		 748 }
749 outb(info->MCR, info->ioaddr + UART_MCR);
750 if (cflag & CLOCAL) {
0ad9e7d1 751 info->port.flags &= ~ASYNC_CHECK_CD;
1c45607a 752 } else {
0ad9e7d1 753 info->port.flags |= ASYNC_CHECK_CD;
1c45607a
JS		 754 info->IER |= UART_IER_MSI;
755 }
756 outb(info->IER, info->ioaddr + UART_IER);
757
758 /*
759 * Set up parity check flag
760 */
761 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
216ba023 762 if (I_INPCK(tty))
1c45607a 763 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
216ba023 764 if (I_BRKINT(tty) || I_PARMRK(tty))
1c45607a 765 info->read_status_mask |= UART_LSR_BI;
1da177e4 766
1c45607a 767 info->ignore_status_mask = 0;
1da177e4 768
216ba023 769 if (I_IGNBRK(tty)) {
1c45607a
JS		 770 info->ignore_status_mask |= UART_LSR_BI;
771 info->read_status_mask |= UART_LSR_BI;
8ea2c2ec 772 /*
1c45607a
JS		 773 * If we're ignore parity and break indicators, ignore
774 * overruns too. (For real raw support).
8ea2c2ec 775 */
216ba023 776 if (I_IGNPAR(tty)) {
1c45607a
JS		 777 info->ignore_status_mask |=
778 UART_LSR_OE |
779 UART_LSR_PE |
780 UART_LSR_FE;
781 info->read_status_mask |=
782 UART_LSR_OE |
783 UART_LSR_PE |
784 UART_LSR_FE;
785 }
1da177e4 786 }
1c45607a 787 if (info->board->chip_flag) {
216ba023
AC		 788 mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty));
789 mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty));
790 if (I_IXON(tty)) {
148ff86b
CH		 791 mxser_enable_must_rx_software_flow_control(
792 info->ioaddr);
1c45607a 793 } else {
148ff86b
CH		 794 mxser_disable_must_rx_software_flow_control(
795 info->ioaddr);
1da177e4 796 }
216ba023 797 if (I_IXOFF(tty)) {
148ff86b
CH		 798 mxser_enable_must_tx_software_flow_control(
799 info->ioaddr);
1c45607a 800 } else {
148ff86b
CH		 801 mxser_disable_must_tx_software_flow_control(
802 info->ioaddr);
1da177e4
LT		 803 }
804 }
1da177e4 805
1da177e4 806
1c45607a
JS		 807 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
808 outb(cval, info->ioaddr + UART_LCR);
1da177e4 809
1c45607a 810 return ret;
1da177e4
LT		 811}
812
216ba023
AC		 813static void mxser_check_modem_status(struct tty_struct *tty,
814 struct mxser_port *port, int status)
1da177e4 815{
1c45607a
JS		 816 /* update input line counters */
817 if (status & UART_MSR_TERI)
818 port->icount.rng++;
819 if (status & UART_MSR_DDSR)
820 port->icount.dsr++;
821 if (status & UART_MSR_DDCD)
822 port->icount.dcd++;
823 if (status & UART_MSR_DCTS)
824 port->icount.cts++;
825 port->mon_data.modem_status = status;
bdc04e31 826 wake_up_interruptible(&port->port.delta_msr_wait);
1da177e4 827
0ad9e7d1 828 if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
1c45607a 829 if (status & UART_MSR_DCD)
0ad9e7d1 830 wake_up_interruptible(&port->port.open_wait);
1c45607a 831 }
1da177e4 832
f21ec3d2 833 if (tty_port_cts_enabled(&port->port)) {
216ba023 834 if (tty->hw_stopped) {
1c45607a 835 if (status & UART_MSR_CTS) {
216ba023 836 tty->hw_stopped = 0;
1c45607a
JS		 837
838 if ((port->type != PORT_16550A) &&
839 (!port->board->chip_flag)) {
840 outb(port->IER & ~UART_IER_THRI,
841 port->ioaddr + UART_IER);
842 port->IER |= UART_IER_THRI;
843 outb(port->IER, port->ioaddr +
844 UART_IER);
845 }
216ba023 846 tty_wakeup(tty);
1c45607a
JS		 847 }
848 } else {
849 if (!(status & UART_MSR_CTS)) {
216ba023 850 tty->hw_stopped = 1;
1c45607a
JS		 851 if (port->type != PORT_16550A &&
852 !port->board->chip_flag) {
853 port->IER &= ~UART_IER_THRI;
854 outb(port->IER, port->ioaddr +
855 UART_IER);
856 }
857 }
858 }
1da177e4
LT		 859 }
860}
861
6769140d 862static int mxser_activate(struct tty_port *port, struct tty_struct *tty)
1da177e4 863{
6769140d 864 struct mxser_port *info = container_of(port, struct mxser_port, port);
1c45607a
JS		 865 unsigned long page;
866 unsigned long flags;
1da177e4 867
1c45607a
JS		 868 page = __get_free_page(GFP_KERNEL);
869 if (!page)
870 return -ENOMEM;
1da177e4 871
1c45607a 872 spin_lock_irqsave(&info->slock, flags);
1da177e4 873
1c45607a 874 if (!info->ioaddr || !info->type) {
216ba023 875 set_bit(TTY_IO_ERROR, &tty->flags);
1c45607a
JS		 876 free_page(page);
877 spin_unlock_irqrestore(&info->slock, flags);
1da177e4 878 return 0;
1c45607a 879 }
6769140d 880 info->port.xmit_buf = (unsigned char *) page;
1da177e4 881
1da177e4 882 /*
1c45607a
JS		 883 * Clear the FIFO buffers and disable them
884 * (they will be reenabled in mxser_change_speed())
1da177e4 885 */
1c45607a
JS		 886 if (info->board->chip_flag)
887 outb((UART_FCR_CLEAR_RCVR |
888 UART_FCR_CLEAR_XMIT |
889 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
890 else
891 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
892 info->ioaddr + UART_FCR);
1da177e4 893
1c45607a
JS		 894 /*
895 * At this point there's no way the LSR could still be 0xFF;
896 * if it is, then bail out, because there's likely no UART
897 * here.
898 */
899 if (inb(info->ioaddr + UART_LSR) == 0xff) {
900 spin_unlock_irqrestore(&info->slock, flags);
901 if (capable(CAP_SYS_ADMIN)) {
f43a510d 902 set_bit(TTY_IO_ERROR, &tty->flags);
1c45607a
JS		 903 return 0;
904 } else
905 return -ENODEV;
906 }
1da177e4 907
1c45607a
JS		 908 /*
909 * Clear the interrupt registers.
910 */
911 (void) inb(info->ioaddr + UART_LSR);
912 (void) inb(info->ioaddr + UART_RX);
913 (void) inb(info->ioaddr + UART_IIR);
914 (void) inb(info->ioaddr + UART_MSR);
915
916 /*
917 * Now, initialize the UART
918 */
919 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
920 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
921 outb(info->MCR, info->ioaddr + UART_MCR);
922
923 /*
924 * Finally, enable interrupts
925 */
926 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
927
928 if (info->board->chip_flag)
929 info->IER |= MOXA_MUST_IER_EGDAI;
930 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
931
932 /*
933 * And clear the interrupt registers again for luck.
934 */
935 (void) inb(info->ioaddr + UART_LSR);
936 (void) inb(info->ioaddr + UART_RX);
937 (void) inb(info->ioaddr + UART_IIR);
938 (void) inb(info->ioaddr + UART_MSR);
939
216ba023 940 clear_bit(TTY_IO_ERROR, &tty->flags);
1c45607a
JS		 941 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
942
943 /*
944 * and set the speed of the serial port
945 */
216ba023 946 mxser_change_speed(tty, NULL);
1c45607a
JS		 947 spin_unlock_irqrestore(&info->slock, flags);
948
949 return 0;
950}
951
952/*
6769140d 953 * This routine will shutdown a serial port
1c45607a 954 */
6769140d 955static void mxser_shutdown_port(struct tty_port *port)
1c45607a 956{
6769140d 957 struct mxser_port *info = container_of(port, struct mxser_port, port);
1c45607a
JS		 958 unsigned long flags;
959
1c45607a
JS		 960 spin_lock_irqsave(&info->slock, flags);
961
962 /*
963 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
964 * here so the queue might never be waken up
965 */
bdc04e31 966 wake_up_interruptible(&info->port.delta_msr_wait);
1c45607a
JS		 967
968 /*
6769140d 969 * Free the xmit buffer, if necessary
1c45607a 970 */
0ad9e7d1
AC		 971 if (info->port.xmit_buf) {
972 free_page((unsigned long) info->port.xmit_buf);
973 info->port.xmit_buf = NULL;
1da177e4
LT		 974 }
975
1c45607a
JS		 976 info->IER = 0;
977 outb(0x00, info->ioaddr + UART_IER);
978
1c45607a
JS		 979 /* clear Rx/Tx FIFO's */
980 if (info->board->chip_flag)
981 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
982 MOXA_MUST_FCR_GDA_MODE_ENABLE,
983 info->ioaddr + UART_FCR);
984 else
985 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
986 info->ioaddr + UART_FCR);
987
988 /* read data port to reset things */
989 (void) inb(info->ioaddr + UART_RX);
990
1c45607a
JS		 991
992 if (info->board->chip_flag)
993 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
994
995 spin_unlock_irqrestore(&info->slock, flags);
996}
997
998/*
999 * This routine is called whenever a serial port is opened. It
1000 * enables interrupts for a serial port, linking in its async structure into
1001 * the IRQ chain. It also performs the serial-specific
1002 * initialization for the tty structure.
1003 */
1004static int mxser_open(struct tty_struct *tty, struct file *filp)
1005{
1006 struct mxser_port *info;
6769140d 1007 int line;
1c45607a
JS		 1008
1009 line = tty->index;
1010 if (line == MXSER_PORTS)
1011 return 0;
1c45607a
JS		 1012 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
1013 if (!info->ioaddr)
1014 return -ENODEV;
1015
a2d1e351 1016 tty->driver_data = info;
6769140d 1017 return tty_port_open(&info->port, tty, filp);
1da177e4
LT		 1018}
1019
978e595f
AC		 1020static void mxser_flush_buffer(struct tty_struct *tty)
1021{
1022 struct mxser_port *info = tty->driver_data;
1023 char fcr;
1024 unsigned long flags;
1025
1026
1027 spin_lock_irqsave(&info->slock, flags);
1028 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1029
1030 fcr = inb(info->ioaddr + UART_FCR);
1031 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
1032 info->ioaddr + UART_FCR);
1033 outb(fcr, info->ioaddr + UART_FCR);
1034
1035 spin_unlock_irqrestore(&info->slock, flags);
1036
1037 tty_wakeup(tty);
1038}
1039
1040
6769140d 1041static void mxser_close_port(struct tty_port *port)
1da177e4 1042{
1e2b0254 1043 struct mxser_port *info = container_of(port, struct mxser_port, port);
1da177e4 1044 unsigned long timeout;
1da177e4
LT		 1045 /*
1046 * At this point we stop accepting input. To do this, we
1047 * disable the receive line status interrupts, and tell the
1048 * interrupt driver to stop checking the data ready bit in the
1049 * line status register.
1050 */
1051 info->IER &= ~UART_IER_RLSI;
1c45607a 1052 if (info->board->chip_flag)
1da177e4 1053 info->IER &= ~MOXA_MUST_RECV_ISR;
1c45607a 1054
6769140d
AC		 1055 outb(info->IER, info->ioaddr + UART_IER);
1056 /*
1057 * Before we drop DTR, make sure the UART transmitter
1058 * has completely drained; this is especially
1059 * important if there is a transmit FIFO!
1060 */
1061 timeout = jiffies + HZ;
1062 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
1063 schedule_timeout_interruptible(5);
1064 if (time_after(jiffies, timeout))
1065 break;
1da177e4 1066 }
1e2b0254
AC		 1067}
1068
1069/*
1070 * This routine is called when the serial port gets closed. First, we
1071 * wait for the last remaining data to be sent. Then, we unlink its
1072 * async structure from the interrupt chain if necessary, and we free
1073 * that IRQ if nothing is left in the chain.
1074 */
1075static void mxser_close(struct tty_struct *tty, struct file *filp)
1076{
1077 struct mxser_port *info = tty->driver_data;
1078 struct tty_port *port = &info->port;
1079
a2d1e351 1080 if (tty->index == MXSER_PORTS || info == NULL)
1e2b0254
AC		 1081 return;
1082 if (tty_port_close_start(port, tty, filp) == 0)
1083 return;
6769140d
AC		 1084 mutex_lock(&port->mutex);
1085 mxser_close_port(port);
1e2b0254 1086 mxser_flush_buffer(tty);
957dacae
JH		 1087 if (test_bit(ASYNCB_INITIALIZED, &port->flags)) {
1088 if (C_HUPCL(tty))
1089 tty_port_lower_dtr_rts(port);
1090 }
6769140d
AC		 1091 mxser_shutdown_port(port);
1092 clear_bit(ASYNCB_INITIALIZED, &port->flags);
1093 mutex_unlock(&port->mutex);
a6614999
AC		 1094 /* Right now the tty_port set is done outside of the close_end helper
1095 as we don't yet have everyone using refcounts */
1096 tty_port_close_end(port, tty);
1097 tty_port_tty_set(port, NULL);
1da177e4
LT		 1098}
1099
1100static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1101{
1102 int c, total = 0;
1c45607a 1103 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1104 unsigned long flags;
1105
0ad9e7d1 1106 if (!info->port.xmit_buf)
8ea2c2ec 1107 return 0;
1da177e4
LT		 1108
1109 while (1) {
8ea2c2ec
JJ		 1110 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1111 SERIAL_XMIT_SIZE - info->xmit_head));
1da177e4
LT		 1112 if (c <= 0)
1113 break;
1114
0ad9e7d1 1115 memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
1da177e4 1116 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 1117 info->xmit_head = (info->xmit_head + c) &
1118 (SERIAL_XMIT_SIZE - 1);
1da177e4
LT		 1119 info->xmit_cnt += c;
1120 spin_unlock_irqrestore(&info->slock, flags);
1121
1122 buf += c;
1123 count -= c;
1124 total += c;
1da177e4
LT		 1125 }
1126
1c45607a 1127 if (info->xmit_cnt && !tty->stopped) {
8ea2c2ec
JJ		 1128 if (!tty->hw_stopped ||
1129 (info->type == PORT_16550A) ||
1c45607a 1130 (info->board->chip_flag)) {
1da177e4 1131 spin_lock_irqsave(&info->slock, flags);
1c45607a
JS		 1132 outb(info->IER & ~UART_IER_THRI, info->ioaddr +
1133 UART_IER);
1da177e4 1134 info->IER |= UART_IER_THRI;
1c45607a 1135 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1136 spin_unlock_irqrestore(&info->slock, flags);
1137 }
1138 }
1139 return total;
1140}
1141
0be2eade 1142static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
1da177e4 1143{
1c45607a 1144 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1145 unsigned long flags;
1146
0ad9e7d1 1147 if (!info->port.xmit_buf)
0be2eade 1148 return 0;
1da177e4
LT		 1149
1150 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
0be2eade 1151 return 0;
1da177e4
LT		 1152
1153 spin_lock_irqsave(&info->slock, flags);
0ad9e7d1 1154 info->port.xmit_buf[info->xmit_head++] = ch;
1da177e4
LT		 1155 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1156 info->xmit_cnt++;
1157 spin_unlock_irqrestore(&info->slock, flags);
1c45607a 1158 if (!tty->stopped) {
8ea2c2ec
JJ		 1159 if (!tty->hw_stopped ||
1160 (info->type == PORT_16550A) ||
1c45607a 1161 info->board->chip_flag) {
1da177e4 1162 spin_lock_irqsave(&info->slock, flags);
1c45607a 1163 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1da177e4 1164 info->IER |= UART_IER_THRI;
1c45607a 1165 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1166 spin_unlock_irqrestore(&info->slock, flags);
1167 }
1168 }
0be2eade 1169 return 1;
1da177e4
LT		 1170}
1171
1172
1173static void mxser_flush_chars(struct tty_struct *tty)
1174{
1c45607a 1175 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1176 unsigned long flags;
1177
ace7dd96
JS		 1178 if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf ||
1179 (tty->hw_stopped && info->type != PORT_16550A &&
1180 !info->board->chip_flag))
1da177e4
LT		 1181 return;
1182
1183 spin_lock_irqsave(&info->slock, flags);
1184
1c45607a 1185 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1da177e4 1186 info->IER |= UART_IER_THRI;
1c45607a 1187 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1188
1189 spin_unlock_irqrestore(&info->slock, flags);
1190}
1191
1192static int mxser_write_room(struct tty_struct *tty)
1193{
1c45607a 1194 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1195 int ret;
1196
1197 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
ace7dd96 1198 return ret < 0 ? 0 : ret;
1da177e4
LT		 1199}
1200
1201static int mxser_chars_in_buffer(struct tty_struct *tty)
1202{
1c45607a 1203 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1204 return info->xmit_cnt;
1205}
1206
1c45607a
JS		 1207/*
1208 * ------------------------------------------------------------
1209 * friends of mxser_ioctl()
1210 * ------------------------------------------------------------
1211 */
216ba023 1212static int mxser_get_serial_info(struct tty_struct *tty,
1c45607a
JS		 1213 struct serial_struct __user *retinfo)
1214{
216ba023 1215 struct mxser_port *info = tty->driver_data;
1c45607a
JS		 1216 struct serial_struct tmp = {
1217 .type = info->type,
216ba023 1218 .line = tty->index,
1c45607a
JS		 1219 .port = info->ioaddr,
1220 .irq = info->board->irq,
0ad9e7d1 1221 .flags = info->port.flags,
1c45607a 1222 .baud_base = info->baud_base,
44b7d1b3
AC		 1223 .close_delay = info->port.close_delay,
1224 .closing_wait = info->port.closing_wait,
1c45607a
JS		 1225 .custom_divisor = info->custom_divisor,
1226 .hub6 = 0
1227 };
1228 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
1229 return -EFAULT;
1230 return 0;
1231}
1232
216ba023 1233static int mxser_set_serial_info(struct tty_struct *tty,
1c45607a 1234 struct serial_struct __user *new_info)
1da177e4 1235{
216ba023 1236 struct mxser_port *info = tty->driver_data;
07f86c03 1237 struct tty_port *port = &info->port;
1c45607a 1238 struct serial_struct new_serial;
80ff8a80 1239 speed_t baud;
1c45607a
JS		 1240 unsigned long sl_flags;
1241 unsigned int flags;
1242 int retval = 0;
1da177e4 1243
1c45607a 1244 if (!new_info || !info->ioaddr)
80ff8a80 1245 return -ENODEV;
1c45607a
JS		 1246 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
1247 return -EFAULT;
1da177e4 1248
80ff8a80
JS		 1249 if (new_serial.irq != info->board->irq ||
1250 new_serial.port != info->ioaddr)
1251 return -EINVAL;
1da177e4 1252
07f86c03 1253 flags = port->flags & ASYNC_SPD_MASK;
1da177e4 1254
1c45607a
JS		 1255 if (!capable(CAP_SYS_ADMIN)) {
1256 if ((new_serial.baud_base != info->baud_base) ||
44b7d1b3 1257 (new_serial.close_delay != info->port.close_delay) ||
0ad9e7d1 1258 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK)))
1c45607a 1259 return -EPERM;
0ad9e7d1 1260 info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
1c45607a
JS		 1261 (new_serial.flags & ASYNC_USR_MASK));
1262 } else {
1da177e4 1263 /*
1c45607a
JS		 1264 * OK, past this point, all the error checking has been done.
1265 * At this point, we start making changes.....
1da177e4 1266 */
07f86c03 1267 port->flags = ((port->flags & ~ASYNC_FLAGS) |
1c45607a 1268 (new_serial.flags & ASYNC_FLAGS));
07f86c03
AC		 1269 port->close_delay = new_serial.close_delay * HZ / 100;
1270 port->closing_wait = new_serial.closing_wait * HZ / 100;
d6c53c0e 1271 port->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
07f86c03 1272 if ((port->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
80ff8a80
JS		 1273 (new_serial.baud_base != info->baud_base ||
1274 new_serial.custom_divisor !=
1275 info->custom_divisor)) {
07f86c03
AC		 1276 if (new_serial.custom_divisor == 0)
1277 return -EINVAL;
80ff8a80 1278 baud = new_serial.baud_base / new_serial.custom_divisor;
216ba023 1279 tty_encode_baud_rate(tty, baud, baud);
80ff8a80 1280 }
1c45607a 1281 }
fc83815c 1282
1c45607a 1283 info->type = new_serial.type;
1da177e4 1284
1c45607a
JS		 1285 process_txrx_fifo(info);
1286
07f86c03
AC		 1287 if (test_bit(ASYNCB_INITIALIZED, &port->flags)) {
1288 if (flags != (port->flags & ASYNC_SPD_MASK)) {
1c45607a 1289 spin_lock_irqsave(&info->slock, sl_flags);
216ba023 1290 mxser_change_speed(tty, NULL);
1c45607a 1291 spin_unlock_irqrestore(&info->slock, sl_flags);
1da177e4 1292 }
6769140d 1293 } else {
07f86c03 1294 retval = mxser_activate(port, tty);
6769140d 1295 if (retval == 0)
07f86c03 1296 set_bit(ASYNCB_INITIALIZED, &port->flags);
6769140d 1297 }
1c45607a
JS		 1298 return retval;
1299}
1da177e4 1300
1c45607a
JS		 1301/*
1302 * mxser_get_lsr_info - get line status register info
1303 *
1304 * Purpose: Let user call ioctl() to get info when the UART physically
1305 * is emptied. On bus types like RS485, the transmitter must
1306 * release the bus after transmitting. This must be done when
1307 * the transmit shift register is empty, not be done when the
1308 * transmit holding register is empty. This functionality
1309 * allows an RS485 driver to be written in user space.
1310 */
1311static int mxser_get_lsr_info(struct mxser_port *info,
1312 unsigned int __user *value)
1313{
1314 unsigned char status;
1315 unsigned int result;
1316 unsigned long flags;
1da177e4 1317
1c45607a
JS		 1318 spin_lock_irqsave(&info->slock, flags);
1319 status = inb(info->ioaddr + UART_LSR);
1320 spin_unlock_irqrestore(&info->slock, flags);
1321 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1322 return put_user(result, value);
1323}
1da177e4 1324
60b33c13 1325static int mxser_tiocmget(struct tty_struct *tty)
1c45607a
JS		 1326{
1327 struct mxser_port *info = tty->driver_data;
1328 unsigned char control, status;
1329 unsigned long flags;
1da177e4 1330
8ea2c2ec 1331
1c45607a
JS		 1332 if (tty->index == MXSER_PORTS)
1333 return -ENOIOCTLCMD;
1334 if (test_bit(TTY_IO_ERROR, &tty->flags))
1335 return -EIO;
1da177e4 1336
1c45607a 1337 control = info->MCR;
1da177e4 1338
1c45607a
JS		 1339 spin_lock_irqsave(&info->slock, flags);
1340 status = inb(info->ioaddr + UART_MSR);
1341 if (status & UART_MSR_ANY_DELTA)
216ba023 1342 mxser_check_modem_status(tty, info, status);
1c45607a
JS		 1343 spin_unlock_irqrestore(&info->slock, flags);
1344 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
1345 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
1346 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
1347 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
1348 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
1349 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1350}
1da177e4 1351
20b9d177 1352static int mxser_tiocmset(struct tty_struct *tty,
1c45607a
JS		 1353 unsigned int set, unsigned int clear)
1354{
1355 struct mxser_port *info = tty->driver_data;
1356 unsigned long flags;
1da177e4 1357
1da177e4 1358
1c45607a
JS		 1359 if (tty->index == MXSER_PORTS)
1360 return -ENOIOCTLCMD;
1361 if (test_bit(TTY_IO_ERROR, &tty->flags))
1362 return -EIO;
1da177e4 1363
1c45607a 1364 spin_lock_irqsave(&info->slock, flags);
1da177e4 1365
1c45607a
JS		 1366 if (set & TIOCM_RTS)
1367 info->MCR |= UART_MCR_RTS;
1368 if (set & TIOCM_DTR)
1369 info->MCR |= UART_MCR_DTR;
1da177e4 1370
1c45607a
JS		 1371 if (clear & TIOCM_RTS)
1372 info->MCR &= ~UART_MCR_RTS;
1373 if (clear & TIOCM_DTR)
1374 info->MCR &= ~UART_MCR_DTR;
8ea2c2ec 1375
1c45607a
JS		 1376 outb(info->MCR, info->ioaddr + UART_MCR);
1377 spin_unlock_irqrestore(&info->slock, flags);
1378 return 0;
1379}
1da177e4 1380
1c45607a
JS		 1381static int __init mxser_program_mode(int port)
1382{
1383 int id, i, j, n;
1384
1385 outb(0, port);
1386 outb(0, port);
1387 outb(0, port);
1388 (void)inb(port);
1389 (void)inb(port);
1390 outb(0, port);
1391 (void)inb(port);
1392
1393 id = inb(port + 1) & 0x1F;
1394 if ((id != C168_ASIC_ID) &&
1395 (id != C104_ASIC_ID) &&
1396 (id != C102_ASIC_ID) &&
1397 (id != CI132_ASIC_ID) &&
1398 (id != CI134_ASIC_ID) &&
1399 (id != CI104J_ASIC_ID))
1400 return -1;
1401 for (i = 0, j = 0; i < 4; i++) {
1402 n = inb(port + 2);
1403 if (n == 'M') {
1404 j = 1;
1405 } else if ((j == 1) && (n == 1)) {
1406 j = 2;
1407 break;
1408 } else
1409 j = 0;
1da177e4 1410 }
1c45607a
JS		 1411 if (j != 2)
1412 id = -2;
1413 return id;
1da177e4
LT		 1414}
1415
1c45607a
JS		 1416static void __init mxser_normal_mode(int port)
1417{
1418 int i, n;
1419
1420 outb(0xA5, port + 1);
1421 outb(0x80, port + 3);
1422 outb(12, port + 0); /* 9600 bps */
1423 outb(0, port + 1);
1424 outb(0x03, port + 3); /* 8 data bits */
1425 outb(0x13, port + 4); /* loop back mode */
1426 for (i = 0; i < 16; i++) {
1427 n = inb(port + 5);
1428 if ((n & 0x61) == 0x60)
1429 break;
1430 if ((n & 1) == 1)
1431 (void)inb(port);
1432 }
1433 outb(0x00, port + 4);
1434}
1435
1436#define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
1437#define CHIP_DO 0x02 /* Serial Data Output in Eprom */
1438#define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
1439#define CHIP_DI 0x08 /* Serial Data Input in Eprom */
1440#define EN_CCMD 0x000 /* Chip's command register */
1441#define EN0_RSARLO 0x008 /* Remote start address reg 0 */
1442#define EN0_RSARHI 0x009 /* Remote start address reg 1 */
1443#define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
1444#define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
1445#define EN0_DCFG 0x00E /* Data configuration reg WR */
1446#define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
1447#define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
1448#define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
1449static int __init mxser_read_register(int port, unsigned short *regs)
1450{
1451 int i, k, value, id;
1452 unsigned int j;
1453
1454 id = mxser_program_mode(port);
1455 if (id < 0)
1456 return id;
1457 for (i = 0; i < 14; i++) {
1458 k = (i & 0x3F) | 0x180;
1459 for (j = 0x100; j > 0; j >>= 1) {
1460 outb(CHIP_CS, port);
1461 if (k & j) {
1462 outb(CHIP_CS | CHIP_DO, port);
1463 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
1464 } else {
1465 outb(CHIP_CS, port);
1466 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
1467 }
1468 }
1469 (void)inb(port);
1470 value = 0;
1471 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
1472 outb(CHIP_CS, port);
1473 outb(CHIP_CS | CHIP_SK, port);
1474 if (inb(port) & CHIP_DI)
1475 value |= j;
1476 }
1477 regs[i] = value;
1478 outb(0, port);
1479 }
1480 mxser_normal_mode(port);
1481 return id;
1482}
1da177e4
LT		 1483
1484static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1485{
07f86c03
AC		 1486 struct mxser_port *ip;
1487 struct tty_port *port;
216ba023 1488 struct tty_struct *tty;
1c45607a
JS		 1489 int result, status;
1490 unsigned int i, j;
9d6d162d 1491 int ret = 0;
1da177e4
LT		 1492
1493 switch (cmd) {
1da177e4 1494 case MOXA_GET_MAJOR:
5a3c6b25 1495 printk_ratelimited(KERN_WARNING "mxser: '%s' uses deprecated ioctl "
8f3d137e
JS		 1496 "%x (GET_MAJOR), fix your userspace\n",
1497 current->comm, cmd);
1c45607a 1498 return put_user(ttymajor, (int __user *)argp);
1da177e4
LT		 1499
1500 case MOXA_CHKPORTENABLE:
1501 result = 0;
1c45607a
JS		 1502 for (i = 0; i < MXSER_BOARDS; i++)
1503 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
1504 if (mxser_boards[i].ports[j].ioaddr)
1505 result |= (1 << i);
8ea2c2ec 1506 return put_user(result, (unsigned long __user *)argp);
1da177e4 1507 case MOXA_GETDATACOUNT:
07f86c03
AC		 1508 /* The receive side is locked by port->slock but it isn't
1509 clear that an exact snapshot is worth copying here */
1da177e4 1510 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
9d6d162d 1511 ret = -EFAULT;
9d6d162d 1512 return ret;
72800df9
JS		 1513 case MOXA_GETMSTATUS: {
1514 struct mxser_mstatus ms, __user *msu = argp;
1c45607a
JS		 1515 for (i = 0; i < MXSER_BOARDS; i++)
1516 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
07f86c03
AC		 1517 ip = &mxser_boards[i].ports[j];
1518 port = &ip->port;
72800df9 1519 memset(&ms, 0, sizeof(ms));
1c45607a 1520
07f86c03
AC		 1521 mutex_lock(&port->mutex);
1522 if (!ip->ioaddr)
72800df9 1523 goto copy;
216ba023 1524
07f86c03 1525 tty = tty_port_tty_get(port);
1da177e4 1526
adc8d746 1527 if (!tty)
07f86c03 1528 ms.cflag = ip->normal_termios.c_cflag;
1c45607a 1529 else
adc8d746 1530 ms.cflag = tty->termios.c_cflag;
216ba023 1531 tty_kref_put(tty);
07f86c03
AC		 1532 spin_lock_irq(&ip->slock);
1533 status = inb(ip->ioaddr + UART_MSR);
1534 spin_unlock_irq(&ip->slock);
72800df9
JS		 1535 if (status & UART_MSR_DCD)
1536 ms.dcd = 1;
1537 if (status & UART_MSR_DSR)
1538 ms.dsr = 1;
1539 if (status & UART_MSR_CTS)
1540 ms.cts = 1;
1541 copy:
07f86c03
AC		 1542 mutex_unlock(&port->mutex);
1543 if (copy_to_user(msu, &ms, sizeof(ms)))
72800df9 1544 return -EFAULT;
72800df9 1545 msu++;
1c45607a 1546 }
1da177e4 1547 return 0;
72800df9 1548 }
8ea2c2ec 1549 case MOXA_ASPP_MON_EXT: {
72800df9
JS		 1550 struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */
1551 unsigned int cflag, iflag, p;
1552 u8 opmode;
1553
1554 me = kzalloc(sizeof(*me), GFP_KERNEL);
1555 if (!me)
1556 return -ENOMEM;
1c45607a 1557
72800df9
JS		 1558 for (i = 0, p = 0; i < MXSER_BOARDS; i++) {
1559 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) {
1560 if (p >= ARRAY_SIZE(me->rx_cnt)) {
1561 i = MXSER_BOARDS;
1562 break;
1563 }
07f86c03
AC		 1564 ip = &mxser_boards[i].ports[j];
1565 port = &ip->port;
1566
1567 mutex_lock(&port->mutex);
1568 if (!ip->ioaddr) {
1569 mutex_unlock(&port->mutex);
1da177e4 1570 continue;
07f86c03 1571 }
1da177e4 1572
07f86c03
AC		 1573 spin_lock_irq(&ip->slock);
1574 status = mxser_get_msr(ip->ioaddr, 0, p);
1c45607a 1575
1da177e4 1576 if (status & UART_MSR_TERI)
07f86c03 1577 ip->icount.rng++;
1da177e4 1578 if (status & UART_MSR_DDSR)
07f86c03 1579 ip->icount.dsr++;
1da177e4 1580 if (status & UART_MSR_DDCD)
07f86c03 1581 ip->icount.dcd++;
1da177e4 1582 if (status & UART_MSR_DCTS)
07f86c03 1583 ip->icount.cts++;
1c45607a 1584
07f86c03
AC		 1585 ip->mon_data.modem_status = status;
1586 me->rx_cnt[p] = ip->mon_data.rxcnt;
1587 me->tx_cnt[p] = ip->mon_data.txcnt;
1588 me->up_rxcnt[p] = ip->mon_data.up_rxcnt;
1589 me->up_txcnt[p] = ip->mon_data.up_txcnt;
72800df9 1590 me->modem_status[p] =
07f86c03
AC		 1591 ip->mon_data.modem_status;
1592 spin_unlock_irq(&ip->slock);
1593
1594 tty = tty_port_tty_get(&ip->port);
1c45607a 1595
adc8d746 1596 if (!tty) {
07f86c03
AC		 1597 cflag = ip->normal_termios.c_cflag;
1598 iflag = ip->normal_termios.c_iflag;
1599 me->baudrate[p] = tty_termios_baud_rate(&ip->normal_termios);
1da177e4 1600 } else {
adc8d746
AC		 1601 cflag = tty->termios.c_cflag;
1602 iflag = tty->termios.c_iflag;
216ba023 1603 me->baudrate[p] = tty_get_baud_rate(tty);
1da177e4 1604 }
216ba023 1605 tty_kref_put(tty);
1da177e4 1606
72800df9
JS		 1607 me->databits[p] = cflag & CSIZE;
1608 me->stopbits[p] = cflag & CSTOPB;
1609 me->parity[p] = cflag & (PARENB | PARODD |
1610 CMSPAR);
1da177e4
LT		 1611
1612 if (cflag & CRTSCTS)
72800df9 1613 me->flowctrl[p] |= 0x03;
1da177e4
LT		 1614
1615 if (iflag & (IXON | IXOFF))
72800df9 1616 me->flowctrl[p] |= 0x0C;
1da177e4 1617
07f86c03 1618 if (ip->type == PORT_16550A)
72800df9 1619 me->fifo[p] = 1;
1da177e4 1620
dfc7b837
MK		 1621 if (ip->board->chip_flag == MOXA_MUST_MU860_HWID) {
1622 opmode = inb(ip->opmode_ioaddr)>>((p % 4) * 2);
1623 opmode &= OP_MODE_MASK;
1624 } else {
1625 opmode = RS232_MODE;
1626 }
72800df9 1627 me->iftype[p] = opmode;
07f86c03 1628 mutex_unlock(&port->mutex);
1da177e4 1629 }
9d6d162d 1630 }
72800df9
JS		 1631 if (copy_to_user(argp, me, sizeof(*me)))
1632 ret = -EFAULT;
1633 kfree(me);
1634 return ret;
9d6d162d
AC		 1635 }
1636 default:
1da177e4
LT		 1637 return -ENOIOCTLCMD;
1638 }
1639 return 0;
1640}
1641
1c45607a
JS		 1642static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
1643 struct async_icount *cprev)
1da177e4 1644{
1c45607a
JS		 1645 struct async_icount cnow;
1646 unsigned long flags;
1647 int ret;
1da177e4 1648
1c45607a
JS		 1649 spin_lock_irqsave(&info->slock, flags);
1650 cnow = info->icount; /* atomic copy */
1651 spin_unlock_irqrestore(&info->slock, flags);
1da177e4 1652
1c45607a
JS		 1653 ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
1654 ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
1655 ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
1656 ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
1da177e4 1657
1c45607a
JS		 1658 *cprev = cnow;
1659
1660 return ret;
1661}
1662
6caa76b7 1663static int mxser_ioctl(struct tty_struct *tty,
1c45607a 1664 unsigned int cmd, unsigned long arg)
1da177e4 1665{
1c45607a 1666 struct mxser_port *info = tty->driver_data;
07f86c03 1667 struct tty_port *port = &info->port;
1c45607a 1668 struct async_icount cnow;
1c45607a
JS		 1669 unsigned long flags;
1670 void __user *argp = (void __user *)arg;
1671 int retval;
1da177e4 1672
1c45607a
JS		 1673 if (tty->index == MXSER_PORTS)
1674 return mxser_ioctl_special(cmd, argp);
1da177e4 1675
1c45607a
JS		 1676 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1677 int p;
1678 unsigned long opmode;
1679 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1680 int shiftbit;
1681 unsigned char val, mask;
1da177e4 1682
e037f95f
MK		 1683 if (info->board->chip_flag != MOXA_MUST_MU860_HWID)
1684 return -EFAULT;
1685
1c45607a
JS		 1686 p = tty->index % 4;
1687 if (cmd == MOXA_SET_OP_MODE) {
1688 if (get_user(opmode, (int __user *) argp))
1689 return -EFAULT;
1690 if (opmode != RS232_MODE &&
1691 opmode != RS485_2WIRE_MODE &&
1692 opmode != RS422_MODE &&
1693 opmode != RS485_4WIRE_MODE)
1694 return -EFAULT;
1695 mask = ModeMask[p];
1696 shiftbit = p * 2;
07f86c03 1697 spin_lock_irq(&info->slock);
1c45607a
JS		 1698 val = inb(info->opmode_ioaddr);
1699 val &= mask;
1700 val |= (opmode << shiftbit);
1701 outb(val, info->opmode_ioaddr);
07f86c03 1702 spin_unlock_irq(&info->slock);
1c45607a
JS		 1703 } else {
1704 shiftbit = p * 2;
07f86c03 1705 spin_lock_irq(&info->slock);
1c45607a 1706 opmode = inb(info->opmode_ioaddr) >> shiftbit;
07f86c03 1707 spin_unlock_irq(&info->slock);
1c45607a
JS		 1708 opmode &= OP_MODE_MASK;
1709 if (put_user(opmode, (int __user *)argp))
1710 return -EFAULT;
1711 }
1712 return 0;
1713 }
1714
0587102c 1715 if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT &&
1c45607a
JS		 1716 test_bit(TTY_IO_ERROR, &tty->flags))
1717 return -EIO;
1718
1719 switch (cmd) {
1c45607a 1720 case TIOCGSERIAL:
07f86c03 1721 mutex_lock(&port->mutex);
216ba023 1722 retval = mxser_get_serial_info(tty, argp);
07f86c03 1723 mutex_unlock(&port->mutex);
9d6d162d 1724 return retval;
1c45607a 1725 case TIOCSSERIAL:
07f86c03 1726 mutex_lock(&port->mutex);
216ba023 1727 retval = mxser_set_serial_info(tty, argp);
07f86c03 1728 mutex_unlock(&port->mutex);
9d6d162d 1729 return retval;
1c45607a 1730 case TIOCSERGETLSR: /* Get line status register */
9d6d162d 1731 return mxser_get_lsr_info(info, argp);
1c45607a
JS		 1732 /*
1733 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1734 * - mask passed in arg for lines of interest
1735 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1736 * Caller should use TIOCGICOUNT to see which one it was
1737 */
1738 case TIOCMIWAIT:
1739 spin_lock_irqsave(&info->slock, flags);
1740 cnow = info->icount; /* note the counters on entry */
1741 spin_unlock_irqrestore(&info->slock, flags);
1742
bdc04e31 1743 return wait_event_interruptible(info->port.delta_msr_wait,
1c45607a 1744 mxser_cflags_changed(info, arg, &cnow));
1c45607a
JS		 1745 case MOXA_HighSpeedOn:
1746 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1747 case MOXA_SDS_RSTICOUNTER:
07f86c03 1748 spin_lock_irq(&info->slock);
1c45607a
JS		 1749 info->mon_data.rxcnt = 0;
1750 info->mon_data.txcnt = 0;
07f86c03 1751 spin_unlock_irq(&info->slock);
1c45607a
JS		 1752 return 0;
1753
1754 case MOXA_ASPP_OQUEUE:{
1755 int len, lsr;
1756
1757 len = mxser_chars_in_buffer(tty);
c6eb69ac 1758 spin_lock_irq(&info->slock);
a75b7b68 1759 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_THRE;
07f86c03 1760 spin_unlock_irq(&info->slock);
1c45607a
JS		 1761 len += (lsr ? 0 : 1);
1762
1763 return put_user(len, (int __user *)argp);
1764 }
1765 case MOXA_ASPP_MON: {
1766 int mcr, status;
1767
c6eb69ac 1768 spin_lock_irq(&info->slock);
1c45607a 1769 status = mxser_get_msr(info->ioaddr, 1, tty->index);
216ba023 1770 mxser_check_modem_status(tty, info, status);
1c45607a
JS		 1771
1772 mcr = inb(info->ioaddr + UART_MCR);
c6eb69ac 1773 spin_unlock_irq(&info->slock);
07f86c03 1774
1c45607a
JS		 1775 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1776 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1777 else
1778 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1779
1780 if (mcr & MOXA_MUST_MCR_TX_XON)
1781 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1782 else
1783 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1784
216ba023 1785 if (tty->hw_stopped)
1c45607a
JS		 1786 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1787 else
1788 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
07f86c03 1789
1c45607a
JS		 1790 if (copy_to_user(argp, &info->mon_data,
1791 sizeof(struct mxser_mon)))
1792 return -EFAULT;
1793
1794 return 0;
1795 }
1796 case MOXA_ASPP_LSTATUS: {
1797 if (put_user(info->err_shadow, (unsigned char __user *)argp))
1798 return -EFAULT;
1799
1800 info->err_shadow = 0;
1801 return 0;
1802 }
1803 case MOXA_SET_BAUD_METHOD: {
1804 int method;
1805
1806 if (get_user(method, (int __user *)argp))
1807 return -EFAULT;
1808 mxser_set_baud_method[tty->index] = method;
1809 return put_user(method, (int __user *)argp);
1810 }
1811 default:
1812 return -ENOIOCTLCMD;
1813 }
1814 return 0;
1815}
1816
0587102c
AC		 1817 /*
1818 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1819 * Return: write counters to the user passed counter struct
1820 * NB: both 1->0 and 0->1 transitions are counted except for
1821 * RI where only 0->1 is counted.
1822 */
1823
1824static int mxser_get_icount(struct tty_struct *tty,
1825 struct serial_icounter_struct *icount)
1826
1827{
1828 struct mxser_port *info = tty->driver_data;
1829 struct async_icount cnow;
1830 unsigned long flags;
1831
1832 spin_lock_irqsave(&info->slock, flags);
1833 cnow = info->icount;
1834 spin_unlock_irqrestore(&info->slock, flags);
1835
1836 icount->frame = cnow.frame;
1837 icount->brk = cnow.brk;
1838 icount->overrun = cnow.overrun;
1839 icount->buf_overrun = cnow.buf_overrun;
1840 icount->parity = cnow.parity;
1841 icount->rx = cnow.rx;
1842 icount->tx = cnow.tx;
1843 icount->cts = cnow.cts;
1844 icount->dsr = cnow.dsr;
1845 icount->rng = cnow.rng;
1846 icount->dcd = cnow.dcd;
1847 return 0;
1848}
1849
1c45607a
JS		 1850static void mxser_stoprx(struct tty_struct *tty)
1851{
1852 struct mxser_port *info = tty->driver_data;
1853
1854 info->ldisc_stop_rx = 1;
1855 if (I_IXOFF(tty)) {
1856 if (info->board->chip_flag) {
1857 info->IER &= ~MOXA_MUST_RECV_ISR;
1858 outb(info->IER, info->ioaddr + UART_IER);
1859 } else {
1860 info->x_char = STOP_CHAR(tty);
1861 outb(0, info->ioaddr + UART_IER);
1862 info->IER |= UART_IER_THRI;
1863 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1864 }
1865 }
1866
adc8d746 1867 if (tty->termios.c_cflag & CRTSCTS) {
1c45607a
JS		 1868 info->MCR &= ~UART_MCR_RTS;
1869 outb(info->MCR, info->ioaddr + UART_MCR);
1da177e4
LT		 1870 }
1871}
1872
1873/*
1874 * This routine is called by the upper-layer tty layer to signal that
1875 * incoming characters should be throttled.
1876 */
1877static void mxser_throttle(struct tty_struct *tty)
1878{
1da177e4 1879 mxser_stoprx(tty);
1da177e4
LT		 1880}
1881
1882static void mxser_unthrottle(struct tty_struct *tty)
1883{
1c45607a 1884 struct mxser_port *info = tty->driver_data;
1da177e4 1885
1c45607a
JS		 1886 /* startrx */
1887 info->ldisc_stop_rx = 0;
1888 if (I_IXOFF(tty)) {
1889 if (info->x_char)
1890 info->x_char = 0;
1891 else {
1892 if (info->board->chip_flag) {
1893 info->IER |= MOXA_MUST_RECV_ISR;
1894 outb(info->IER, info->ioaddr + UART_IER);
1895 } else {
1896 info->x_char = START_CHAR(tty);
1897 outb(0, info->ioaddr + UART_IER);
1898 info->IER |= UART_IER_THRI;
1899 outb(info->IER, info->ioaddr + UART_IER);
1900 }
1da177e4 1901 }
1c45607a 1902 }
1da177e4 1903
adc8d746 1904 if (tty->termios.c_cflag & CRTSCTS) {
1c45607a
JS		 1905 info->MCR |= UART_MCR_RTS;
1906 outb(info->MCR, info->ioaddr + UART_MCR);
1da177e4
LT		 1907 }
1908}
1909
1910/*
1911 * mxser_stop() and mxser_start()
1912 *
1913 * This routines are called before setting or resetting tty->stopped.
1914 * They enable or disable transmitter interrupts, as necessary.
1915 */
1916static void mxser_stop(struct tty_struct *tty)
1917{
1c45607a 1918 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1919 unsigned long flags;
1920
1921 spin_lock_irqsave(&info->slock, flags);
1922 if (info->IER & UART_IER_THRI) {
1923 info->IER &= ~UART_IER_THRI;
1c45607a 1924 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1925 }
1926 spin_unlock_irqrestore(&info->slock, flags);
1927}
1928
1929static void mxser_start(struct tty_struct *tty)
1930{
1c45607a 1931 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1932 unsigned long flags;
1933
1934 spin_lock_irqsave(&info->slock, flags);
0ad9e7d1 1935 if (info->xmit_cnt && info->port.xmit_buf) {
1c45607a 1936 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1da177e4 1937 info->IER |= UART_IER_THRI;
1c45607a 1938 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1939 }
1940 spin_unlock_irqrestore(&info->slock, flags);
1941}
1942
1c45607a
JS		 1943static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1944{
1945 struct mxser_port *info = tty->driver_data;
1946 unsigned long flags;
1947
1948 spin_lock_irqsave(&info->slock, flags);
216ba023 1949 mxser_change_speed(tty, old_termios);
1c45607a
JS		 1950 spin_unlock_irqrestore(&info->slock, flags);
1951
1952 if ((old_termios->c_cflag & CRTSCTS) &&
adc8d746 1953 !(tty->termios.c_cflag & CRTSCTS)) {
1c45607a
JS		 1954 tty->hw_stopped = 0;
1955 mxser_start(tty);
1956 }
1957
1958 /* Handle sw stopped */
1959 if ((old_termios->c_iflag & IXON) &&
adc8d746 1960 !(tty->termios.c_iflag & IXON)) {
1c45607a
JS		 1961 tty->stopped = 0;
1962
1963 if (info->board->chip_flag) {
1964 spin_lock_irqsave(&info->slock, flags);
148ff86b
CH		 1965 mxser_disable_must_rx_software_flow_control(
1966 info->ioaddr);
1c45607a
JS		 1967 spin_unlock_irqrestore(&info->slock, flags);
1968 }
1969
1970 mxser_start(tty);
1971 }
1972}
1973
1da177e4
LT		 1974/*
1975 * mxser_wait_until_sent() --- wait until the transmitter is empty
1976 */
1977static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
1978{
1c45607a 1979 struct mxser_port *info = tty->driver_data;
1da177e4 1980 unsigned long orig_jiffies, char_time;
07f86c03 1981 unsigned long flags;
1da177e4
LT		 1982 int lsr;
1983
1984 if (info->type == PORT_UNKNOWN)
1985 return;
1986
1987 if (info->xmit_fifo_size == 0)
1988 return; /* Just in case.... */
1989
1990 orig_jiffies = jiffies;
1991 /*
1992 * Set the check interval to be 1/5 of the estimated time to
1993 * send a single character, and make it at least 1. The check
1994 * interval should also be less than the timeout.
1995 *
1996 * Note: we have to use pretty tight timings here to satisfy
1997 * the NIST-PCTS.
1998 */
1999 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
2000 char_time = char_time / 5;
2001 if (char_time == 0)
2002 char_time = 1;
2003 if (timeout && timeout < char_time)
2004 char_time = timeout;
2005 /*
2006 * If the transmitter hasn't cleared in twice the approximate
2007 * amount of time to send the entire FIFO, it probably won't
2008 * ever clear. This assumes the UART isn't doing flow
2009 * control, which is currently the case. Hence, if it ever
2010 * takes longer than info->timeout, this is probably due to a
2011 * UART bug of some kind. So, we clamp the timeout parameter at
2012 * 2*info->timeout.
2013 */
2014 if (!timeout || timeout > 2 * info->timeout)
2015 timeout = 2 * info->timeout;
8bab534b 2016
07f86c03 2017 spin_lock_irqsave(&info->slock, flags);
1c45607a 2018 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
07f86c03 2019 spin_unlock_irqrestore(&info->slock, flags);
da4cd8df 2020 schedule_timeout_interruptible(char_time);
07f86c03 2021 spin_lock_irqsave(&info->slock, flags);
1da177e4 2022 if (signal_pending(current))
1c45607a
JS		 2023 break;
2024 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2025 break;
1da177e4 2026 }
07f86c03 2027 spin_unlock_irqrestore(&info->slock, flags);
1c45607a 2028 set_current_state(TASK_RUNNING);
1c45607a 2029}
1da177e4 2030
1c45607a
JS		 2031/*
2032 * This routine is called by tty_hangup() when a hangup is signaled.
2033 */
2034static void mxser_hangup(struct tty_struct *tty)
2035{
2036 struct mxser_port *info = tty->driver_data;
1da177e4 2037
1c45607a 2038 mxser_flush_buffer(tty);
3b6826b2 2039 tty_port_hangup(&info->port);
1da177e4
LT		 2040}
2041
1c45607a
JS		 2042/*
2043 * mxser_rs_break() --- routine which turns the break handling on or off
2044 */
9e98966c 2045static int mxser_rs_break(struct tty_struct *tty, int break_state)
1da177e4 2046{
1c45607a 2047 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 2048 unsigned long flags;
2049
1c45607a
JS		 2050 spin_lock_irqsave(&info->slock, flags);
2051 if (break_state == -1)
2052 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
2053 info->ioaddr + UART_LCR);
2054 else
2055 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
2056 info->ioaddr + UART_LCR);
2057 spin_unlock_irqrestore(&info->slock, flags);
9e98966c 2058 return 0;
1c45607a 2059}
1da177e4 2060
216ba023
AC		 2061static void mxser_receive_chars(struct tty_struct *tty,
2062 struct mxser_port *port, int *status)
1c45607a 2063{
1c45607a
JS		 2064 unsigned char ch, gdl;
2065 int ignored = 0;
2066 int cnt = 0;
2067 int recv_room;
2068 int max = 256;
1da177e4 2069
1c45607a 2070 recv_room = tty->receive_room;
216ba023 2071 if (recv_room == 0 && !port->ldisc_stop_rx)
1c45607a 2072 mxser_stoprx(tty);
1c45607a 2073 if (port->board->chip_flag != MOXA_OTHER_UART) {
1da177e4 2074
1c45607a
JS		 2075 if (*status & UART_LSR_SPECIAL)
2076 goto intr_old;
2077 if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
2078 (*status & MOXA_MUST_LSR_RERR))
2079 goto intr_old;
2080 if (*status & MOXA_MUST_LSR_RERR)
2081 goto intr_old;
1da177e4 2082
1c45607a
JS		 2083 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
2084
2085 if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
2086 gdl &= MOXA_MUST_GDL_MASK;
2087 if (gdl >= recv_room) {
2088 if (!port->ldisc_stop_rx)
2089 mxser_stoprx(tty);
2090 }
2091 while (gdl--) {
2092 ch = inb(port->ioaddr + UART_RX);
92a19f9c 2093 tty_insert_flip_char(&port->port, ch, 0);
1c45607a
JS		 2094 cnt++;
2095 }
2096 goto end_intr;
1da177e4 2097 }
1c45607a
JS		 2098intr_old:
2099
2100 do {
2101 if (max-- < 0)
2102 break;
1da177e4 2103
1c45607a
JS		 2104 ch = inb(port->ioaddr + UART_RX);
2105 if (port->board->chip_flag && (*status & UART_LSR_OE))
2106 outb(0x23, port->ioaddr + UART_FCR);
2107 *status &= port->read_status_mask;
2108 if (*status & port->ignore_status_mask) {
2109 if (++ignored > 100)
2110 break;
2111 } else {
2112 char flag = 0;
2113 if (*status & UART_LSR_SPECIAL) {
2114 if (*status & UART_LSR_BI) {
2115 flag = TTY_BREAK;
2116 port->icount.brk++;
1da177e4 2117
0ad9e7d1 2118 if (port->port.flags & ASYNC_SAK)
1c45607a
JS		 2119 do_SAK(tty);
2120 } else if (*status & UART_LSR_PE) {
2121 flag = TTY_PARITY;
2122 port->icount.parity++;
2123 } else if (*status & UART_LSR_FE) {
2124 flag = TTY_FRAME;
2125 port->icount.frame++;
2126 } else if (*status & UART_LSR_OE) {
2127 flag = TTY_OVERRUN;
2128 port->icount.overrun++;
2129 } else
2130 flag = TTY_BREAK;
2131 }
92a19f9c 2132 tty_insert_flip_char(&port->port, ch, flag);
1c45607a
JS		 2133 cnt++;
2134 if (cnt >= recv_room) {
2135 if (!port->ldisc_stop_rx)
2136 mxser_stoprx(tty);
2137 break;
2138 }
1da177e4 2139
1c45607a 2140 }
1da177e4 2141
1c45607a
JS		 2142 if (port->board->chip_flag)
2143 break;
1da177e4 2144
1c45607a
JS		 2145 *status = inb(port->ioaddr + UART_LSR);
2146 } while (*status & UART_LSR_DR);
1da177e4 2147
1c45607a 2148end_intr:
216ba023 2149 mxvar_log.rxcnt[tty->index] += cnt;
1c45607a
JS		 2150 port->mon_data.rxcnt += cnt;
2151 port->mon_data.up_rxcnt += cnt;
1da177e4 2152
1c45607a
JS		 2153 /*
2154 * We are called from an interrupt context with &port->slock
2155 * being held. Drop it temporarily in order to prevent
2156 * recursive locking.
2157 */
2158 spin_unlock(&port->slock);
2e124b4a 2159 tty_flip_buffer_push(&port->port);
1c45607a 2160 spin_lock(&port->slock);
1da177e4
LT		 2161}
2162
216ba023 2163static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port)
1da177e4 2164{
1c45607a 2165 int count, cnt;
1da177e4 2166
1c45607a
JS		 2167 if (port->x_char) {
2168 outb(port->x_char, port->ioaddr + UART_TX);
2169 port->x_char = 0;
216ba023 2170 mxvar_log.txcnt[tty->index]++;
1c45607a
JS		 2171 port->mon_data.txcnt++;
2172 port->mon_data.up_txcnt++;
2173 port->icount.tx++;
2174 return;
2175 }
1da177e4 2176
0ad9e7d1 2177 if (port->port.xmit_buf == NULL)
1c45607a 2178 return;
1da177e4 2179
216ba023
AC		 2180 if (port->xmit_cnt <= 0 || tty->stopped ||
2181 (tty->hw_stopped &&
1c45607a
JS		 2182 (port->type != PORT_16550A) &&
2183 (!port->board->chip_flag))) {
2184 port->IER &= ~UART_IER_THRI;
2185 outb(port->IER, port->ioaddr + UART_IER);
2186 return;
1da177e4
LT		 2187 }
2188
1c45607a
JS		 2189 cnt = port->xmit_cnt;
2190 count = port->xmit_fifo_size;
2191 do {
0ad9e7d1 2192 outb(port->port.xmit_buf[port->xmit_tail++],
1c45607a
JS		 2193 port->ioaddr + UART_TX);
2194 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2195 if (--port->xmit_cnt <= 0)
2196 break;
2197 } while (--count > 0);
216ba023 2198 mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt);
1da177e4 2199
1c45607a
JS		 2200 port->mon_data.txcnt += (cnt - port->xmit_cnt);
2201 port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
2202 port->icount.tx += (cnt - port->xmit_cnt);
1da177e4 2203
464eb8f5 2204 if (port->xmit_cnt < WAKEUP_CHARS)
216ba023 2205 tty_wakeup(tty);
1c45607a
JS		 2206
2207 if (port->xmit_cnt <= 0) {
2208 port->IER &= ~UART_IER_THRI;
2209 outb(port->IER, port->ioaddr + UART_IER);
1da177e4 2210 }
1da177e4
LT		 2211}
2212
2213/*
1c45607a 2214 * This is the serial driver's generic interrupt routine
1da177e4 2215 */
1c45607a 2216static irqreturn_t mxser_interrupt(int irq, void *dev_id)
1da177e4 2217{
1c45607a
JS		 2218 int status, iir, i;
2219 struct mxser_board *brd = NULL;
2220 struct mxser_port *port;
2221 int max, irqbits, bits, msr;
2222 unsigned int int_cnt, pass_counter = 0;
2223 int handled = IRQ_NONE;
216ba023 2224 struct tty_struct *tty;
1da177e4 2225
1c45607a
JS		 2226 for (i = 0; i < MXSER_BOARDS; i++)
2227 if (dev_id == &mxser_boards[i]) {
2228 brd = dev_id;
2229 break;
2230 }
1da177e4 2231
1c45607a
JS		 2232 if (i == MXSER_BOARDS)
2233 goto irq_stop;
2234 if (brd == NULL)
2235 goto irq_stop;
2236 max = brd->info->nports;
2237 while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
2238 irqbits = inb(brd->vector) & brd->vector_mask;
2239 if (irqbits == brd->vector_mask)
2240 break;
1da177e4 2241
1c45607a
JS		 2242 handled = IRQ_HANDLED;
2243 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
2244 if (irqbits == brd->vector_mask)
2245 break;
2246 if (bits & irqbits)
2247 continue;
2248 port = &brd->ports[i];
2249
2250 int_cnt = 0;
2251 spin_lock(&port->slock);
2252 do {
2253 iir = inb(port->ioaddr + UART_IIR);
2254 if (iir & UART_IIR_NO_INT)
2255 break;
2256 iir &= MOXA_MUST_IIR_MASK;
216ba023
AC		 2257 tty = tty_port_tty_get(&port->port);
2258 if (!tty ||
0ad9e7d1
AC		 2259 (port->port.flags & ASYNC_CLOSING) ||
2260 !(port->port.flags &
1c45607a
JS		 2261 ASYNC_INITIALIZED)) {
2262 status = inb(port->ioaddr + UART_LSR);
2263 outb(0x27, port->ioaddr + UART_FCR);
2264 inb(port->ioaddr + UART_MSR);
216ba023 2265 tty_kref_put(tty);
1c45607a
JS		 2266 break;
2267 }
1da177e4 2268
1c45607a
JS		 2269 status = inb(port->ioaddr + UART_LSR);
2270
2271 if (status & UART_LSR_PE)
2272 port->err_shadow |= NPPI_NOTIFY_PARITY;
2273 if (status & UART_LSR_FE)
2274 port->err_shadow |= NPPI_NOTIFY_FRAMING;
2275 if (status & UART_LSR_OE)
2276 port->err_shadow |=
2277 NPPI_NOTIFY_HW_OVERRUN;
2278 if (status & UART_LSR_BI)
2279 port->err_shadow |= NPPI_NOTIFY_BREAK;
2280
2281 if (port->board->chip_flag) {
2282 if (iir == MOXA_MUST_IIR_GDA ||
2283 iir == MOXA_MUST_IIR_RDA ||
2284 iir == MOXA_MUST_IIR_RTO ||
2285 iir == MOXA_MUST_IIR_LSR)
216ba023 2286 mxser_receive_chars(tty, port,
1c45607a
JS		 2287 &status);
2288
2289 } else {
2290 status &= port->read_status_mask;
2291 if (status & UART_LSR_DR)
216ba023 2292 mxser_receive_chars(tty, port,
1c45607a
JS		 2293 &status);
2294 }
2295 msr = inb(port->ioaddr + UART_MSR);
2296 if (msr & UART_MSR_ANY_DELTA)
216ba023 2297 mxser_check_modem_status(tty, port, msr);
1c45607a
JS		 2298
2299 if (port->board->chip_flag) {
2300 if (iir == 0x02 && (status &
2301 UART_LSR_THRE))
216ba023 2302 mxser_transmit_chars(tty, port);
1c45607a
JS		 2303 } else {
2304 if (status & UART_LSR_THRE)
216ba023 2305 mxser_transmit_chars(tty, port);
1c45607a 2306 }
216ba023 2307 tty_kref_put(tty);
1c45607a
JS		 2308 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
2309 spin_unlock(&port->slock);
2310 }
2311 }
1da177e4 2312
1c45607a
JS		 2313irq_stop:
2314 return handled;
2315}
1da177e4 2316
1c45607a
JS		 2317static const struct tty_operations mxser_ops = {
2318 .open = mxser_open,
2319 .close = mxser_close,
2320 .write = mxser_write,
2321 .put_char = mxser_put_char,
2322 .flush_chars = mxser_flush_chars,
2323 .write_room = mxser_write_room,
2324 .chars_in_buffer = mxser_chars_in_buffer,
2325 .flush_buffer = mxser_flush_buffer,
2326 .ioctl = mxser_ioctl,
2327 .throttle = mxser_throttle,
2328 .unthrottle = mxser_unthrottle,
2329 .set_termios = mxser_set_termios,
2330 .stop = mxser_stop,
2331 .start = mxser_start,
2332 .hangup = mxser_hangup,
2333 .break_ctl = mxser_rs_break,
2334 .wait_until_sent = mxser_wait_until_sent,
2335 .tiocmget = mxser_tiocmget,
2336 .tiocmset = mxser_tiocmset,
0587102c 2337 .get_icount = mxser_get_icount,
1c45607a 2338};
1da177e4 2339
e391edb7 2340static struct tty_port_operations mxser_port_ops = {
31f35939 2341 .carrier_raised = mxser_carrier_raised,
fcc8ac18 2342 .dtr_rts = mxser_dtr_rts,
6769140d
AC		 2343 .activate = mxser_activate,
2344 .shutdown = mxser_shutdown_port,
31f35939
AC		 2345};
2346
1c45607a
JS		 2347/*
2348 * The MOXA Smartio/Industio serial driver boot-time initialization code!
2349 */
1da177e4 2350
38daf88a 2351static bool allow_overlapping_vector;
a342ca1c 2352module_param(allow_overlapping_vector, bool, S_IRUGO);
38daf88a
JS		 2353MODULE_PARM_DESC(allow_overlapping_vector, "whether we allow ISA cards to be configured such that vector overlabs IO ports (default=no)");
2354
2355static bool mxser_overlapping_vector(struct mxser_board *brd)
2356{
2357 return allow_overlapping_vector &&
2358 brd->vector >= brd->ports[0].ioaddr &&
2359 brd->vector < brd->ports[0].ioaddr + 8 * brd->info->nports;
2360}
2361
2362static int mxser_request_vector(struct mxser_board *brd)
2363{
2364 if (mxser_overlapping_vector(brd))
2365 return 0;
2366 return request_region(brd->vector, 1, "mxser(vector)") ? 0 : -EIO;
2367}
2368
2369static void mxser_release_vector(struct mxser_board *brd)
2370{
2371 if (mxser_overlapping_vector(brd))
2372 return;
2373 release_region(brd->vector, 1);
2374}
2375
df480518 2376static void mxser_release_ISA_res(struct mxser_board *brd)
1c45607a 2377{
df480518 2378 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
38daf88a 2379 mxser_release_vector(brd);
1da177e4
LT		 2380}
2381
9671f099 2382static int mxser_initbrd(struct mxser_board *brd,
1c45607a 2383 struct pci_dev *pdev)
1da177e4 2384{
1c45607a
JS		 2385 struct mxser_port *info;
2386 unsigned int i;
2387 int retval;
1da177e4 2388
83766bc6
JS		 2389 printk(KERN_INFO "mxser: max. baud rate = %d bps\n",
2390 brd->ports[0].max_baud);
1da177e4 2391
1c45607a
JS		 2392 for (i = 0; i < brd->info->nports; i++) {
2393 info = &brd->ports[i];
44b7d1b3 2394 tty_port_init(&info->port);
31f35939 2395 info->port.ops = &mxser_port_ops;
1c45607a
JS		 2396 info->board = brd;
2397 info->stop_rx = 0;
2398 info->ldisc_stop_rx = 0;
1da177e4 2399
1c45607a
JS		 2400 /* Enhance mode enabled here */
2401 if (brd->chip_flag != MOXA_OTHER_UART)
148ff86b 2402 mxser_enable_must_enchance_mode(info->ioaddr);
1da177e4 2403
0ad9e7d1 2404 info->port.flags = ASYNC_SHARE_IRQ;
1c45607a 2405 info->type = brd->uart_type;
1da177e4 2406
1c45607a 2407 process_txrx_fifo(info);
1da177e4 2408
1c45607a 2409 info->custom_divisor = info->baud_base * 16;
44b7d1b3
AC		 2410 info->port.close_delay = 5 * HZ / 10;
2411 info->port.closing_wait = 30 * HZ;
1c45607a 2412 info->normal_termios = mxvar_sdriver->init_termios;
1c45607a
JS		 2413 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
2414 info->err_shadow = 0;
2415 spin_lock_init(&info->slock);
1da177e4 2416
1c45607a
JS		 2417 /* before set INT ISR, disable all int */
2418 outb(inb(info->ioaddr + UART_IER) & 0xf0,
2419 info->ioaddr + UART_IER);
2420 }
1da177e4 2421
1c45607a
JS		 2422 retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
2423 brd);
191c5f10
JS		 2424 if (retval) {
2425 for (i = 0; i < brd->info->nports; i++)
2426 tty_port_destroy(&brd->ports[i].port);
1c45607a
JS		 2427 printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
2428 "conflict with another device.\n",
2429 brd->info->name, brd->irq);
191c5f10 2430 }
df480518 2431
1c45607a
JS		 2432 return retval;
2433}
1da177e4 2434
191c5f10
JS		 2435static void mxser_board_remove(struct mxser_board *brd)
2436{
2437 unsigned int i;
2438
2439 for (i = 0; i < brd->info->nports; i++) {
2440 tty_unregister_device(mxvar_sdriver, brd->idx + i);
2441 tty_port_destroy(&brd->ports[i].port);
2442 }
9e17df37 2443 free_irq(brd->irq, brd);
191c5f10
JS		 2444}
2445
1c45607a 2446static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
1da177e4 2447{
38daf88a 2448 int id, i, bits, ret;
1da177e4
LT		 2449 unsigned short regs[16], irq;
2450 unsigned char scratch, scratch2;
2451
1c45607a 2452 brd->chip_flag = MOXA_OTHER_UART;
1da177e4
LT		 2453
2454 id = mxser_read_register(cap, regs);
1c45607a
JS		 2455 switch (id) {
2456 case C168_ASIC_ID:
2457 brd->info = &mxser_cards[0];
2458 break;
2459 case C104_ASIC_ID:
2460 brd->info = &mxser_cards[1];
2461 break;
2462 case CI104J_ASIC_ID:
2463 brd->info = &mxser_cards[2];
2464 break;
2465 case C102_ASIC_ID:
2466 brd->info = &mxser_cards[5];
2467 break;
2468 case CI132_ASIC_ID:
2469 brd->info = &mxser_cards[6];
2470 break;
2471 case CI134_ASIC_ID:
2472 brd->info = &mxser_cards[7];
2473 break;
2474 default:
8ea2c2ec 2475 return 0;
1c45607a 2476 }
1da177e4
LT		 2477
2478 irq = 0;
1c45607a
JS		 2479 /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
2480 Flag-hack checks if configuration should be read as 2-port here. */
2481 if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
1da177e4
LT		 2482 irq = regs[9] & 0xF000;
2483 irq = irq | (irq >> 4);
2484 if (irq != (regs[9] & 0xFF00))
83766bc6 2485 goto err_irqconflict;
1c45607a 2486 } else if (brd->info->nports == 4) {
1da177e4
LT		 2487 irq = regs[9] & 0xF000;
2488 irq = irq | (irq >> 4);
2489 irq = irq | (irq >> 8);
2490 if (irq != regs[9])
83766bc6 2491 goto err_irqconflict;
1c45607a 2492 } else if (brd->info->nports == 8) {
1da177e4
LT		 2493 irq = regs[9] & 0xF000;
2494 irq = irq | (irq >> 4);
2495 irq = irq | (irq >> 8);
2496 if ((irq != regs[9]) || (irq != regs[10]))
83766bc6 2497 goto err_irqconflict;
1da177e4
LT		 2498 }
2499
83766bc6
JS		 2500 if (!irq) {
2501 printk(KERN_ERR "mxser: interrupt number unset\n");
2502 return -EIO;
2503 }
1c45607a 2504 brd->irq = ((int)(irq & 0xF000) >> 12);
1da177e4 2505 for (i = 0; i < 8; i++)
1c45607a 2506 brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
83766bc6
JS		 2507 if ((regs[12] & 0x80) == 0) {
2508 printk(KERN_ERR "mxser: invalid interrupt vector\n");
2509 return -EIO;
2510 }
1c45607a 2511 brd->vector = (int)regs[11]; /* interrupt vector */
1da177e4 2512 if (id == 1)
1c45607a 2513 brd->vector_mask = 0x00FF;
1da177e4 2514 else
1c45607a 2515 brd->vector_mask = 0x000F;
1da177e4
LT		 2516 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
2517 if (regs[12] & bits) {
1c45607a
JS		 2518 brd->ports[i].baud_base = 921600;
2519 brd->ports[i].max_baud = 921600;
1da177e4 2520 } else {
1c45607a
JS		 2521 brd->ports[i].baud_base = 115200;
2522 brd->ports[i].max_baud = 115200;
1da177e4
LT		 2523 }
2524 }
2525 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
2526 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
2527 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
2528 outb(scratch2, cap + UART_LCR);
2529 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
2530 scratch = inb(cap + UART_IIR);
2531
2532 if (scratch & 0xC0)
1c45607a 2533 brd->uart_type = PORT_16550A;
1da177e4 2534 else
1c45607a
JS		 2535 brd->uart_type = PORT_16450;
2536 if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
83766bc6
JS		 2537 "mxser(IO)")) {
2538 printk(KERN_ERR "mxser: can't request ports I/O region: "
2539 "0x%.8lx-0x%.8lx\n",
2540 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2541 8 * brd->info->nports - 1);
2542 return -EIO;
2543 }
38daf88a
JS		 2544
2545 ret = mxser_request_vector(brd);
2546 if (ret) {
1c45607a 2547 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
83766bc6
JS		 2548 printk(KERN_ERR "mxser: can't request interrupt vector region: "
2549 "0x%.8lx-0x%.8lx\n",
2550 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2551 8 * brd->info->nports - 1);
38daf88a 2552 return ret;
1c45607a
JS		 2553 }
2554 return brd->info->nports;
83766bc6
JS		 2555
2556err_irqconflict:
2557 printk(KERN_ERR "mxser: invalid interrupt number\n");
2558 return -EIO;
1da177e4
LT		 2559}
2560
9671f099 2561static int mxser_probe(struct pci_dev *pdev,
1c45607a 2562 const struct pci_device_id *ent)
1da177e4 2563{
1c45607a
JS		 2564#ifdef CONFIG_PCI
2565 struct mxser_board *brd;
2566 unsigned int i, j;
2567 unsigned long ioaddress;
9e17df37 2568 struct device *tty_dev;
1c45607a 2569 int retval = -EINVAL;
1da177e4 2570
1c45607a
JS		 2571 for (i = 0; i < MXSER_BOARDS; i++)
2572 if (mxser_boards[i].info == NULL)
2573 break;
2574
2575 if (i >= MXSER_BOARDS) {
83766bc6
JS		 2576 dev_err(&pdev->dev, "too many boards found (maximum %d), board "
2577 "not configured\n", MXSER_BOARDS);
1c45607a
JS		 2578 goto err;
2579 }
2580
2581 brd = &mxser_boards[i];
2582 brd->idx = i * MXSER_PORTS_PER_BOARD;
83766bc6 2583 dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n",
1c45607a
JS		 2584 mxser_cards[ent->driver_data].name,
2585 pdev->bus->number, PCI_SLOT(pdev->devfn));
2586
2587 retval = pci_enable_device(pdev);
2588 if (retval) {
83766bc6 2589 dev_err(&pdev->dev, "PCI enable failed\n");
1c45607a
JS		 2590 goto err;
2591 }
2592
2593 /* io address */
2594 ioaddress = pci_resource_start(pdev, 2);
2595 retval = pci_request_region(pdev, 2, "mxser(IO)");
2596 if (retval)
df480518 2597 goto err_dis;
1c45607a
JS		 2598
2599 brd->info = &mxser_cards[ent->driver_data];
2600 for (i = 0; i < brd->info->nports; i++)
2601 brd->ports[i].ioaddr = ioaddress + 8 * i;
2602
2603 /* vector */
2604 ioaddress = pci_resource_start(pdev, 3);
2605 retval = pci_request_region(pdev, 3, "mxser(vector)");
2606 if (retval)
df480518 2607 goto err_zero;
1c45607a
JS		 2608 brd->vector = ioaddress;
2609
2610 /* irq */
2611 brd->irq = pdev->irq;
2612
2613 brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
2614 brd->uart_type = PORT_16550A;
2615 brd->vector_mask = 0;
2616
2617 for (i = 0; i < brd->info->nports; i++) {
2618 for (j = 0; j < UART_INFO_NUM; j++) {
2619 if (Gpci_uart_info[j].type == brd->chip_flag) {
2620 brd->ports[i].max_baud =
2621 Gpci_uart_info[j].max_baud;
2622
2623 /* exception....CP-102 */
2624 if (brd->info->flags & MXSER_HIGHBAUD)
2625 brd->ports[i].max_baud = 921600;
2626 break;
1da177e4
LT		 2627 }
2628 }
1c45607a
JS		 2629 }
2630
2631 if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
2632 for (i = 0; i < brd->info->nports; i++) {
2633 if (i < 4)
2634 brd->ports[i].opmode_ioaddr = ioaddress + 4;
2635 else
2636 brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
1da177e4 2637 }
1c45607a
JS		 2638 outb(0, ioaddress + 4); /* default set to RS232 mode */
2639 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
1da177e4 2640 }
1c45607a
JS		 2641
2642 for (i = 0; i < brd->info->nports; i++) {
2643 brd->vector_mask |= (1 << i);
2644 brd->ports[i].baud_base = 921600;
2645 }
2646
2647 /* mxser_initbrd will hook ISR. */
2648 retval = mxser_initbrd(brd, pdev);
2649 if (retval)
df480518 2650 goto err_rel3;
1c45607a 2651
9e17df37
AK		 2652 for (i = 0; i < brd->info->nports; i++) {
2653 tty_dev = tty_port_register_device(&brd->ports[i].port,
2654 mxvar_sdriver, brd->idx + i, &pdev->dev);
2655 if (IS_ERR(tty_dev)) {
2656 retval = PTR_ERR(tty_dev);
1b581f17 2657 for (; i > 0; i--)
9e17df37 2658 tty_unregister_device(mxvar_sdriver,
1b581f17 2659 brd->idx + i - 1);
9e17df37
AK		 2660 goto err_relbrd;
2661 }
2662 }
1c45607a
JS		 2663
2664 pci_set_drvdata(pdev, brd);
2665
2666 return 0;
9e17df37
AK		 2667err_relbrd:
2668 for (i = 0; i < brd->info->nports; i++)
2669 tty_port_destroy(&brd->ports[i].port);
2670 free_irq(brd->irq, brd);
df480518
JS		 2671err_rel3:
2672 pci_release_region(pdev, 3);
2673err_zero:
1c45607a 2674 brd->info = NULL;
df480518
JS		 2675 pci_release_region(pdev, 2);
2676err_dis:
2677 pci_disable_device(pdev);
1c45607a
JS		 2678err:
2679 return retval;
2680#else
2681 return -ENODEV;
2682#endif
1da177e4
LT		 2683}
2684
ae8d8a14 2685static void mxser_remove(struct pci_dev *pdev)
1da177e4 2686{
df480518 2687#ifdef CONFIG_PCI
1c45607a 2688 struct mxser_board *brd = pci_get_drvdata(pdev);
1da177e4 2689
191c5f10 2690 mxser_board_remove(brd);
1da177e4 2691
df480518
JS		 2692 pci_release_region(pdev, 2);
2693 pci_release_region(pdev, 3);
2694 pci_disable_device(pdev);
1c45607a 2695 brd->info = NULL;
df480518 2696#endif
1da177e4
LT		 2697}
2698
1c45607a
JS		 2699static struct pci_driver mxser_driver = {
2700 .name = "mxser",
2701 .id_table = mxser_pcibrds,
2702 .probe = mxser_probe,
91116cba 2703 .remove = mxser_remove
1c45607a
JS		 2704};
2705
2706static int __init mxser_module_init(void)
1da177e4 2707{
1c45607a 2708 struct mxser_board *brd;
9e17df37 2709 struct device *tty_dev;
1df00924
JS		 2710 unsigned int b, i, m;
2711 int retval;
1da177e4 2712
1c45607a
JS		 2713 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
2714 if (!mxvar_sdriver)
2715 return -ENOMEM;
2716
2717 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
2718 MXSER_VERSION);
2719
2720 /* Initialize the tty_driver structure */
1c45607a
JS		 2721 mxvar_sdriver->name = "ttyMI";
2722 mxvar_sdriver->major = ttymajor;
2723 mxvar_sdriver->minor_start = 0;
1c45607a
JS		 2724 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
2725 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
2726 mxvar_sdriver->init_termios = tty_std_termios;
2727 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
2728 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
2729 tty_set_operations(mxvar_sdriver, &mxser_ops);
2730
2731 retval = tty_register_driver(mxvar_sdriver);
2732 if (retval) {
2733 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
2734 "tty driver !\n");
2735 goto err_put;
1da177e4 2736 }
1c45607a 2737
1c45607a 2738 /* Start finding ISA boards here */
1df00924
JS		 2739 for (m = 0, b = 0; b < MXSER_BOARDS; b++) {
2740 if (!ioaddr[b])
2741 continue;
2742
2743 brd = &mxser_boards[m];
96050dfb 2744 retval = mxser_get_ISA_conf(ioaddr[b], brd);
1df00924
JS		 2745 if (retval <= 0) {
2746 brd->info = NULL;
2747 continue;
2748 }
1c45607a 2749
1df00924
JS		 2750 printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n",
2751 brd->info->name, ioaddr[b]);
83766bc6 2752
1df00924
JS		 2753 /* mxser_initbrd will hook ISR. */
2754 if (mxser_initbrd(brd, NULL) < 0) {
9e17df37 2755 mxser_release_ISA_res(brd);
1df00924
JS		 2756 brd->info = NULL;
2757 continue;
2758 }
1c45607a 2759
1df00924 2760 brd->idx = m * MXSER_PORTS_PER_BOARD;
9e17df37
AK		 2761 for (i = 0; i < brd->info->nports; i++) {
2762 tty_dev = tty_port_register_device(&brd->ports[i].port,
734cc178 2763 mxvar_sdriver, brd->idx + i, NULL);
9e17df37 2764 if (IS_ERR(tty_dev)) {
1b581f17 2765 for (; i > 0; i--)
9e17df37 2766 tty_unregister_device(mxvar_sdriver,
1b581f17 2767 brd->idx + i - 1);
9e17df37
AK		 2768 for (i = 0; i < brd->info->nports; i++)
2769 tty_port_destroy(&brd->ports[i].port);
2770 free_irq(brd->irq, brd);
2771 mxser_release_ISA_res(brd);
2772 brd->info = NULL;
2773 break;
2774 }
2775 }
2776 if (brd->info == NULL)
2777 continue;
1c45607a 2778
1df00924
JS		 2779 m++;
2780 }
1c45607a
JS		 2781
2782 retval = pci_register_driver(&mxser_driver);
2783 if (retval) {
83766bc6 2784 printk(KERN_ERR "mxser: can't register pci driver\n");
1c45607a
JS		 2785 if (!m) {
2786 retval = -ENODEV;
2787 goto err_unr;
2788 } /* else: we have some ISA cards under control */
2789 }
2790
1c45607a
JS		 2791 return 0;
2792err_unr:
2793 tty_unregister_driver(mxvar_sdriver);
2794err_put:
2795 put_tty_driver(mxvar_sdriver);
2796 return retval;
2797}
2798
2799static void __exit mxser_module_exit(void)
2800{
191c5f10 2801 unsigned int i;
1c45607a 2802
1c45607a
JS		 2803 pci_unregister_driver(&mxser_driver);
2804
2805 for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
2806 if (mxser_boards[i].info != NULL)
191c5f10 2807 mxser_board_remove(&mxser_boards[i]);
1c45607a
JS		 2808 tty_unregister_driver(mxvar_sdriver);
2809 put_tty_driver(mxvar_sdriver);
2810
2811 for (i = 0; i < MXSER_BOARDS; i++)
2812 if (mxser_boards[i].info != NULL)
df480518 2813 mxser_release_ISA_res(&mxser_boards[i]);
1da177e4
LT		 2814}
2815
2816module_init(mxser_module_init);
2817module_exit(mxser_module_exit);
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