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a0f950d3 | 1 | // SPDX-License-Identifier: GPL-2.0 |
47ac9aa1 SH |
2 | /* |
3 | * Versatile Express SPC CPUFreq Interface driver | |
4 | * | |
a0f950d3 SH |
5 | * Copyright (C) 2013 - 2019 ARM Ltd. |
6 | * Sudeep Holla <[email protected]> | |
47ac9aa1 | 7 | * |
a0f950d3 SH |
8 | * Copyright (C) 2013 Linaro. |
9 | * Viresh Kumar <[email protected]> | |
47ac9aa1 SH |
10 | */ |
11 | ||
12 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
13 | ||
a0f950d3 | 14 | #include <linux/clk.h> |
d9975b0b | 15 | #include <linux/cpu.h> |
47ac9aa1 | 16 | #include <linux/cpufreq.h> |
a0f950d3 SH |
17 | #include <linux/cpumask.h> |
18 | #include <linux/cpu_cooling.h> | |
19 | #include <linux/device.h> | |
47ac9aa1 | 20 | #include <linux/module.h> |
a0f950d3 SH |
21 | #include <linux/mutex.h> |
22 | #include <linux/of_platform.h> | |
47ac9aa1 SH |
23 | #include <linux/platform_device.h> |
24 | #include <linux/pm_opp.h> | |
a0f950d3 SH |
25 | #include <linux/slab.h> |
26 | #include <linux/topology.h> | |
47ac9aa1 SH |
27 | #include <linux/types.h> |
28 | ||
a0f950d3 SH |
29 | /* Currently we support only two clusters */ |
30 | #define A15_CLUSTER 0 | |
31 | #define A7_CLUSTER 1 | |
32 | #define MAX_CLUSTERS 2 | |
33 | ||
34 | #ifdef CONFIG_BL_SWITCHER | |
35 | #include <asm/bL_switcher.h> | |
36 | static bool bL_switching_enabled; | |
37 | #define is_bL_switching_enabled() bL_switching_enabled | |
38 | #define set_switching_enabled(x) (bL_switching_enabled = (x)) | |
39 | #else | |
40 | #define is_bL_switching_enabled() false | |
41 | #define set_switching_enabled(x) do { } while (0) | |
42 | #define bL_switch_request(...) do { } while (0) | |
43 | #define bL_switcher_put_enabled() do { } while (0) | |
44 | #define bL_switcher_get_enabled() do { } while (0) | |
45 | #endif | |
46 | ||
47 | #define ACTUAL_FREQ(cluster, freq) ((cluster == A7_CLUSTER) ? freq << 1 : freq) | |
48 | #define VIRT_FREQ(cluster, freq) ((cluster == A7_CLUSTER) ? freq >> 1 : freq) | |
49 | ||
50 | static struct thermal_cooling_device *cdev[MAX_CLUSTERS]; | |
a0f950d3 SH |
51 | static struct clk *clk[MAX_CLUSTERS]; |
52 | static struct cpufreq_frequency_table *freq_table[MAX_CLUSTERS + 1]; | |
53 | static atomic_t cluster_usage[MAX_CLUSTERS + 1]; | |
54 | ||
55 | static unsigned int clk_big_min; /* (Big) clock frequencies */ | |
56 | static unsigned int clk_little_max; /* Maximum clock frequency (Little) */ | |
57 | ||
58 | static DEFINE_PER_CPU(unsigned int, physical_cluster); | |
59 | static DEFINE_PER_CPU(unsigned int, cpu_last_req_freq); | |
60 | ||
61 | static struct mutex cluster_lock[MAX_CLUSTERS]; | |
62 | ||
63 | static inline int raw_cpu_to_cluster(int cpu) | |
64 | { | |
65 | return topology_physical_package_id(cpu); | |
66 | } | |
67 | ||
68 | static inline int cpu_to_cluster(int cpu) | |
69 | { | |
70 | return is_bL_switching_enabled() ? | |
71 | MAX_CLUSTERS : raw_cpu_to_cluster(cpu); | |
72 | } | |
73 | ||
74 | static unsigned int find_cluster_maxfreq(int cluster) | |
75 | { | |
76 | int j; | |
77 | u32 max_freq = 0, cpu_freq; | |
78 | ||
79 | for_each_online_cpu(j) { | |
80 | cpu_freq = per_cpu(cpu_last_req_freq, j); | |
81 | ||
82 | if ((cluster == per_cpu(physical_cluster, j)) && | |
83 | (max_freq < cpu_freq)) | |
84 | max_freq = cpu_freq; | |
85 | } | |
86 | ||
87 | pr_debug("%s: cluster: %d, max freq: %d\n", __func__, cluster, | |
88 | max_freq); | |
89 | ||
90 | return max_freq; | |
91 | } | |
92 | ||
93 | static unsigned int clk_get_cpu_rate(unsigned int cpu) | |
94 | { | |
95 | u32 cur_cluster = per_cpu(physical_cluster, cpu); | |
96 | u32 rate = clk_get_rate(clk[cur_cluster]) / 1000; | |
97 | ||
98 | /* For switcher we use virtual A7 clock rates */ | |
99 | if (is_bL_switching_enabled()) | |
100 | rate = VIRT_FREQ(cur_cluster, rate); | |
101 | ||
102 | pr_debug("%s: cpu: %d, cluster: %d, freq: %u\n", __func__, cpu, | |
103 | cur_cluster, rate); | |
104 | ||
105 | return rate; | |
106 | } | |
107 | ||
1f1b4650 | 108 | static unsigned int ve_spc_cpufreq_get_rate(unsigned int cpu) |
a0f950d3 SH |
109 | { |
110 | if (is_bL_switching_enabled()) { | |
111 | pr_debug("%s: freq: %d\n", __func__, per_cpu(cpu_last_req_freq, | |
112 | cpu)); | |
113 | ||
114 | return per_cpu(cpu_last_req_freq, cpu); | |
115 | } else { | |
116 | return clk_get_cpu_rate(cpu); | |
117 | } | |
118 | } | |
119 | ||
120 | static unsigned int | |
1f1b4650 | 121 | ve_spc_cpufreq_set_rate(u32 cpu, u32 old_cluster, u32 new_cluster, u32 rate) |
a0f950d3 SH |
122 | { |
123 | u32 new_rate, prev_rate; | |
124 | int ret; | |
125 | bool bLs = is_bL_switching_enabled(); | |
126 | ||
127 | mutex_lock(&cluster_lock[new_cluster]); | |
128 | ||
129 | if (bLs) { | |
130 | prev_rate = per_cpu(cpu_last_req_freq, cpu); | |
131 | per_cpu(cpu_last_req_freq, cpu) = rate; | |
132 | per_cpu(physical_cluster, cpu) = new_cluster; | |
133 | ||
134 | new_rate = find_cluster_maxfreq(new_cluster); | |
135 | new_rate = ACTUAL_FREQ(new_cluster, new_rate); | |
136 | } else { | |
137 | new_rate = rate; | |
138 | } | |
139 | ||
140 | pr_debug("%s: cpu: %d, old cluster: %d, new cluster: %d, freq: %d\n", | |
141 | __func__, cpu, old_cluster, new_cluster, new_rate); | |
142 | ||
143 | ret = clk_set_rate(clk[new_cluster], new_rate * 1000); | |
144 | if (!ret) { | |
145 | /* | |
146 | * FIXME: clk_set_rate hasn't returned an error here however it | |
147 | * may be that clk_change_rate failed due to hardware or | |
148 | * firmware issues and wasn't able to report that due to the | |
149 | * current design of the clk core layer. To work around this | |
150 | * problem we will read back the clock rate and check it is | |
151 | * correct. This needs to be removed once clk core is fixed. | |
152 | */ | |
153 | if (clk_get_rate(clk[new_cluster]) != new_rate * 1000) | |
154 | ret = -EIO; | |
155 | } | |
156 | ||
157 | if (WARN_ON(ret)) { | |
158 | pr_err("clk_set_rate failed: %d, new cluster: %d\n", ret, | |
159 | new_cluster); | |
160 | if (bLs) { | |
161 | per_cpu(cpu_last_req_freq, cpu) = prev_rate; | |
162 | per_cpu(physical_cluster, cpu) = old_cluster; | |
163 | } | |
164 | ||
165 | mutex_unlock(&cluster_lock[new_cluster]); | |
166 | ||
167 | return ret; | |
168 | } | |
169 | ||
170 | mutex_unlock(&cluster_lock[new_cluster]); | |
171 | ||
172 | /* Recalc freq for old cluster when switching clusters */ | |
173 | if (old_cluster != new_cluster) { | |
174 | pr_debug("%s: cpu: %d, old cluster: %d, new cluster: %d\n", | |
175 | __func__, cpu, old_cluster, new_cluster); | |
176 | ||
177 | /* Switch cluster */ | |
178 | bL_switch_request(cpu, new_cluster); | |
179 | ||
180 | mutex_lock(&cluster_lock[old_cluster]); | |
181 | ||
182 | /* Set freq of old cluster if there are cpus left on it */ | |
183 | new_rate = find_cluster_maxfreq(old_cluster); | |
184 | new_rate = ACTUAL_FREQ(old_cluster, new_rate); | |
185 | ||
186 | if (new_rate) { | |
187 | pr_debug("%s: Updating rate of old cluster: %d, to freq: %d\n", | |
188 | __func__, old_cluster, new_rate); | |
189 | ||
190 | if (clk_set_rate(clk[old_cluster], new_rate * 1000)) | |
191 | pr_err("%s: clk_set_rate failed: %d, old cluster: %d\n", | |
192 | __func__, ret, old_cluster); | |
193 | } | |
194 | mutex_unlock(&cluster_lock[old_cluster]); | |
195 | } | |
196 | ||
197 | return 0; | |
198 | } | |
199 | ||
200 | /* Set clock frequency */ | |
1f1b4650 SH |
201 | static int ve_spc_cpufreq_set_target(struct cpufreq_policy *policy, |
202 | unsigned int index) | |
a0f950d3 SH |
203 | { |
204 | u32 cpu = policy->cpu, cur_cluster, new_cluster, actual_cluster; | |
205 | unsigned int freqs_new; | |
206 | int ret; | |
207 | ||
208 | cur_cluster = cpu_to_cluster(cpu); | |
209 | new_cluster = actual_cluster = per_cpu(physical_cluster, cpu); | |
210 | ||
211 | freqs_new = freq_table[cur_cluster][index].frequency; | |
212 | ||
213 | if (is_bL_switching_enabled()) { | |
214 | if ((actual_cluster == A15_CLUSTER) && | |
215 | (freqs_new < clk_big_min)) { | |
216 | new_cluster = A7_CLUSTER; | |
217 | } else if ((actual_cluster == A7_CLUSTER) && | |
218 | (freqs_new > clk_little_max)) { | |
219 | new_cluster = A15_CLUSTER; | |
220 | } | |
221 | } | |
222 | ||
1f1b4650 SH |
223 | ret = ve_spc_cpufreq_set_rate(cpu, actual_cluster, new_cluster, |
224 | freqs_new); | |
a0f950d3 SH |
225 | |
226 | if (!ret) { | |
227 | arch_set_freq_scale(policy->related_cpus, freqs_new, | |
228 | policy->cpuinfo.max_freq); | |
229 | } | |
230 | ||
231 | return ret; | |
232 | } | |
233 | ||
234 | static inline u32 get_table_count(struct cpufreq_frequency_table *table) | |
235 | { | |
236 | int count; | |
237 | ||
238 | for (count = 0; table[count].frequency != CPUFREQ_TABLE_END; count++) | |
239 | ; | |
240 | ||
241 | return count; | |
242 | } | |
243 | ||
244 | /* get the minimum frequency in the cpufreq_frequency_table */ | |
245 | static inline u32 get_table_min(struct cpufreq_frequency_table *table) | |
246 | { | |
247 | struct cpufreq_frequency_table *pos; | |
248 | uint32_t min_freq = ~0; | |
249 | cpufreq_for_each_entry(pos, table) | |
250 | if (pos->frequency < min_freq) | |
251 | min_freq = pos->frequency; | |
252 | return min_freq; | |
253 | } | |
254 | ||
255 | /* get the maximum frequency in the cpufreq_frequency_table */ | |
256 | static inline u32 get_table_max(struct cpufreq_frequency_table *table) | |
257 | { | |
258 | struct cpufreq_frequency_table *pos; | |
259 | uint32_t max_freq = 0; | |
260 | cpufreq_for_each_entry(pos, table) | |
261 | if (pos->frequency > max_freq) | |
262 | max_freq = pos->frequency; | |
263 | return max_freq; | |
264 | } | |
265 | ||
266 | static int merge_cluster_tables(void) | |
267 | { | |
268 | int i, j, k = 0, count = 1; | |
269 | struct cpufreq_frequency_table *table; | |
270 | ||
271 | for (i = 0; i < MAX_CLUSTERS; i++) | |
272 | count += get_table_count(freq_table[i]); | |
273 | ||
274 | table = kcalloc(count, sizeof(*table), GFP_KERNEL); | |
275 | if (!table) | |
276 | return -ENOMEM; | |
277 | ||
278 | freq_table[MAX_CLUSTERS] = table; | |
279 | ||
280 | /* Add in reverse order to get freqs in increasing order */ | |
281 | for (i = MAX_CLUSTERS - 1; i >= 0; i--) { | |
282 | for (j = 0; freq_table[i][j].frequency != CPUFREQ_TABLE_END; | |
283 | j++) { | |
284 | table[k].frequency = VIRT_FREQ(i, | |
285 | freq_table[i][j].frequency); | |
286 | pr_debug("%s: index: %d, freq: %d\n", __func__, k, | |
287 | table[k].frequency); | |
288 | k++; | |
289 | } | |
290 | } | |
291 | ||
292 | table[k].driver_data = k; | |
293 | table[k].frequency = CPUFREQ_TABLE_END; | |
294 | ||
295 | pr_debug("%s: End, table: %p, count: %d\n", __func__, table, k); | |
296 | ||
297 | return 0; | |
298 | } | |
299 | ||
300 | static void _put_cluster_clk_and_freq_table(struct device *cpu_dev, | |
301 | const struct cpumask *cpumask) | |
302 | { | |
303 | u32 cluster = raw_cpu_to_cluster(cpu_dev->id); | |
304 | ||
305 | if (!freq_table[cluster]) | |
306 | return; | |
307 | ||
308 | clk_put(clk[cluster]); | |
309 | dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table[cluster]); | |
a0f950d3 SH |
310 | dev_dbg(cpu_dev, "%s: cluster: %d\n", __func__, cluster); |
311 | } | |
312 | ||
313 | static void put_cluster_clk_and_freq_table(struct device *cpu_dev, | |
314 | const struct cpumask *cpumask) | |
315 | { | |
316 | u32 cluster = cpu_to_cluster(cpu_dev->id); | |
317 | int i; | |
318 | ||
319 | if (atomic_dec_return(&cluster_usage[cluster])) | |
320 | return; | |
321 | ||
322 | if (cluster < MAX_CLUSTERS) | |
323 | return _put_cluster_clk_and_freq_table(cpu_dev, cpumask); | |
324 | ||
325 | for_each_present_cpu(i) { | |
326 | struct device *cdev = get_cpu_device(i); | |
327 | if (!cdev) { | |
328 | pr_err("%s: failed to get cpu%d device\n", __func__, i); | |
329 | return; | |
330 | } | |
331 | ||
332 | _put_cluster_clk_and_freq_table(cdev, cpumask); | |
333 | } | |
334 | ||
335 | /* free virtual table */ | |
336 | kfree(freq_table[cluster]); | |
337 | } | |
338 | ||
339 | static int _get_cluster_clk_and_freq_table(struct device *cpu_dev, | |
340 | const struct cpumask *cpumask) | |
341 | { | |
342 | u32 cluster = raw_cpu_to_cluster(cpu_dev->id); | |
343 | int ret; | |
344 | ||
345 | if (freq_table[cluster]) | |
346 | return 0; | |
347 | ||
1f1b4650 SH |
348 | /* |
349 | * platform specific SPC code must initialise the opp table | |
350 | * so just check if the OPP count is non-zero | |
351 | */ | |
352 | ret = dev_pm_opp_get_opp_count(cpu_dev) <= 0; | |
353 | if (ret) | |
a0f950d3 | 354 | goto out; |
a0f950d3 SH |
355 | |
356 | ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table[cluster]); | |
357 | if (ret) { | |
358 | dev_err(cpu_dev, "%s: failed to init cpufreq table, cpu: %d, err: %d\n", | |
359 | __func__, cpu_dev->id, ret); | |
1f1b4650 | 360 | goto out; |
a0f950d3 SH |
361 | } |
362 | ||
363 | clk[cluster] = clk_get(cpu_dev, NULL); | |
364 | if (!IS_ERR(clk[cluster])) { | |
365 | dev_dbg(cpu_dev, "%s: clk: %p & freq table: %p, cluster: %d\n", | |
366 | __func__, clk[cluster], freq_table[cluster], | |
367 | cluster); | |
368 | return 0; | |
369 | } | |
370 | ||
371 | dev_err(cpu_dev, "%s: Failed to get clk for cpu: %d, cluster: %d\n", | |
372 | __func__, cpu_dev->id, cluster); | |
373 | ret = PTR_ERR(clk[cluster]); | |
374 | dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table[cluster]); | |
375 | ||
a0f950d3 SH |
376 | out: |
377 | dev_err(cpu_dev, "%s: Failed to get data for cluster: %d\n", __func__, | |
378 | cluster); | |
379 | return ret; | |
380 | } | |
381 | ||
382 | static int get_cluster_clk_and_freq_table(struct device *cpu_dev, | |
383 | const struct cpumask *cpumask) | |
384 | { | |
385 | u32 cluster = cpu_to_cluster(cpu_dev->id); | |
386 | int i, ret; | |
387 | ||
388 | if (atomic_inc_return(&cluster_usage[cluster]) != 1) | |
389 | return 0; | |
390 | ||
391 | if (cluster < MAX_CLUSTERS) { | |
392 | ret = _get_cluster_clk_and_freq_table(cpu_dev, cpumask); | |
393 | if (ret) | |
394 | atomic_dec(&cluster_usage[cluster]); | |
395 | return ret; | |
396 | } | |
397 | ||
398 | /* | |
399 | * Get data for all clusters and fill virtual cluster with a merge of | |
400 | * both | |
401 | */ | |
402 | for_each_present_cpu(i) { | |
403 | struct device *cdev = get_cpu_device(i); | |
404 | if (!cdev) { | |
405 | pr_err("%s: failed to get cpu%d device\n", __func__, i); | |
406 | return -ENODEV; | |
407 | } | |
408 | ||
409 | ret = _get_cluster_clk_and_freq_table(cdev, cpumask); | |
410 | if (ret) | |
411 | goto put_clusters; | |
412 | } | |
413 | ||
414 | ret = merge_cluster_tables(); | |
415 | if (ret) | |
416 | goto put_clusters; | |
417 | ||
418 | /* Assuming 2 cluster, set clk_big_min and clk_little_max */ | |
419 | clk_big_min = get_table_min(freq_table[0]); | |
420 | clk_little_max = VIRT_FREQ(1, get_table_max(freq_table[1])); | |
421 | ||
422 | pr_debug("%s: cluster: %d, clk_big_min: %d, clk_little_max: %d\n", | |
423 | __func__, cluster, clk_big_min, clk_little_max); | |
424 | ||
425 | return 0; | |
426 | ||
427 | put_clusters: | |
428 | for_each_present_cpu(i) { | |
429 | struct device *cdev = get_cpu_device(i); | |
430 | if (!cdev) { | |
431 | pr_err("%s: failed to get cpu%d device\n", __func__, i); | |
432 | return -ENODEV; | |
433 | } | |
434 | ||
435 | _put_cluster_clk_and_freq_table(cdev, cpumask); | |
436 | } | |
437 | ||
438 | atomic_dec(&cluster_usage[cluster]); | |
439 | ||
440 | return ret; | |
441 | } | |
442 | ||
443 | /* Per-CPU initialization */ | |
1f1b4650 | 444 | static int ve_spc_cpufreq_init(struct cpufreq_policy *policy) |
a0f950d3 SH |
445 | { |
446 | u32 cur_cluster = cpu_to_cluster(policy->cpu); | |
447 | struct device *cpu_dev; | |
448 | int ret; | |
449 | ||
450 | cpu_dev = get_cpu_device(policy->cpu); | |
451 | if (!cpu_dev) { | |
452 | pr_err("%s: failed to get cpu%d device\n", __func__, | |
453 | policy->cpu); | |
454 | return -ENODEV; | |
455 | } | |
456 | ||
457 | if (cur_cluster < MAX_CLUSTERS) { | |
458 | int cpu; | |
459 | ||
460 | cpumask_copy(policy->cpus, topology_core_cpumask(policy->cpu)); | |
461 | ||
462 | for_each_cpu(cpu, policy->cpus) | |
463 | per_cpu(physical_cluster, cpu) = cur_cluster; | |
464 | } else { | |
465 | /* Assumption: during init, we are always running on A15 */ | |
466 | per_cpu(physical_cluster, policy->cpu) = A15_CLUSTER; | |
467 | } | |
468 | ||
469 | ret = get_cluster_clk_and_freq_table(cpu_dev, policy->cpus); | |
470 | if (ret) | |
471 | return ret; | |
472 | ||
473 | policy->freq_table = freq_table[cur_cluster]; | |
1f1b4650 | 474 | policy->cpuinfo.transition_latency = 1000000; /* 1 ms */ |
a0f950d3 SH |
475 | |
476 | dev_pm_opp_of_register_em(policy->cpus); | |
477 | ||
478 | if (is_bL_switching_enabled()) | |
479 | per_cpu(cpu_last_req_freq, policy->cpu) = clk_get_cpu_rate(policy->cpu); | |
480 | ||
481 | dev_info(cpu_dev, "%s: CPU %d initialized\n", __func__, policy->cpu); | |
482 | return 0; | |
483 | } | |
484 | ||
1f1b4650 | 485 | static int ve_spc_cpufreq_exit(struct cpufreq_policy *policy) |
a0f950d3 SH |
486 | { |
487 | struct device *cpu_dev; | |
488 | int cur_cluster = cpu_to_cluster(policy->cpu); | |
489 | ||
490 | if (cur_cluster < MAX_CLUSTERS) { | |
491 | cpufreq_cooling_unregister(cdev[cur_cluster]); | |
492 | cdev[cur_cluster] = NULL; | |
493 | } | |
494 | ||
495 | cpu_dev = get_cpu_device(policy->cpu); | |
496 | if (!cpu_dev) { | |
497 | pr_err("%s: failed to get cpu%d device\n", __func__, | |
498 | policy->cpu); | |
499 | return -ENODEV; | |
500 | } | |
501 | ||
502 | put_cluster_clk_and_freq_table(cpu_dev, policy->related_cpus); | |
503 | dev_dbg(cpu_dev, "%s: Exited, cpu: %d\n", __func__, policy->cpu); | |
504 | ||
505 | return 0; | |
506 | } | |
507 | ||
1f1b4650 | 508 | static void ve_spc_cpufreq_ready(struct cpufreq_policy *policy) |
a0f950d3 SH |
509 | { |
510 | int cur_cluster = cpu_to_cluster(policy->cpu); | |
511 | ||
512 | /* Do not register a cpu_cooling device if we are in IKS mode */ | |
513 | if (cur_cluster >= MAX_CLUSTERS) | |
514 | return; | |
515 | ||
516 | cdev[cur_cluster] = of_cpufreq_cooling_register(policy); | |
517 | } | |
518 | ||
1f1b4650 SH |
519 | static struct cpufreq_driver ve_spc_cpufreq_driver = { |
520 | .name = "vexpress-spc", | |
a0f950d3 SH |
521 | .flags = CPUFREQ_STICKY | |
522 | CPUFREQ_HAVE_GOVERNOR_PER_POLICY | | |
523 | CPUFREQ_NEED_INITIAL_FREQ_CHECK, | |
524 | .verify = cpufreq_generic_frequency_table_verify, | |
1f1b4650 SH |
525 | .target_index = ve_spc_cpufreq_set_target, |
526 | .get = ve_spc_cpufreq_get_rate, | |
527 | .init = ve_spc_cpufreq_init, | |
528 | .exit = ve_spc_cpufreq_exit, | |
529 | .ready = ve_spc_cpufreq_ready, | |
a0f950d3 SH |
530 | .attr = cpufreq_generic_attr, |
531 | }; | |
532 | ||
533 | #ifdef CONFIG_BL_SWITCHER | |
534 | static int bL_cpufreq_switcher_notifier(struct notifier_block *nfb, | |
535 | unsigned long action, void *_arg) | |
536 | { | |
537 | pr_debug("%s: action: %ld\n", __func__, action); | |
538 | ||
539 | switch (action) { | |
540 | case BL_NOTIFY_PRE_ENABLE: | |
541 | case BL_NOTIFY_PRE_DISABLE: | |
1f1b4650 | 542 | cpufreq_unregister_driver(&ve_spc_cpufreq_driver); |
a0f950d3 SH |
543 | break; |
544 | ||
545 | case BL_NOTIFY_POST_ENABLE: | |
546 | set_switching_enabled(true); | |
1f1b4650 | 547 | cpufreq_register_driver(&ve_spc_cpufreq_driver); |
a0f950d3 SH |
548 | break; |
549 | ||
550 | case BL_NOTIFY_POST_DISABLE: | |
551 | set_switching_enabled(false); | |
1f1b4650 | 552 | cpufreq_register_driver(&ve_spc_cpufreq_driver); |
a0f950d3 SH |
553 | break; |
554 | ||
555 | default: | |
556 | return NOTIFY_DONE; | |
557 | } | |
558 | ||
559 | return NOTIFY_OK; | |
560 | } | |
561 | ||
562 | static struct notifier_block bL_switcher_notifier = { | |
563 | .notifier_call = bL_cpufreq_switcher_notifier, | |
564 | }; | |
565 | ||
566 | static int __bLs_register_notifier(void) | |
567 | { | |
568 | return bL_switcher_register_notifier(&bL_switcher_notifier); | |
569 | } | |
570 | ||
571 | static int __bLs_unregister_notifier(void) | |
572 | { | |
573 | return bL_switcher_unregister_notifier(&bL_switcher_notifier); | |
574 | } | |
575 | #else | |
576 | static int __bLs_register_notifier(void) { return 0; } | |
577 | static int __bLs_unregister_notifier(void) { return 0; } | |
578 | #endif | |
579 | ||
1f1b4650 | 580 | static int ve_spc_cpufreq_probe(struct platform_device *pdev) |
a0f950d3 SH |
581 | { |
582 | int ret, i; | |
583 | ||
a0f950d3 SH |
584 | set_switching_enabled(bL_switcher_get_enabled()); |
585 | ||
586 | for (i = 0; i < MAX_CLUSTERS; i++) | |
587 | mutex_init(&cluster_lock[i]); | |
588 | ||
1f1b4650 | 589 | ret = cpufreq_register_driver(&ve_spc_cpufreq_driver); |
a0f950d3 SH |
590 | if (ret) { |
591 | pr_info("%s: Failed registering platform driver: %s, err: %d\n", | |
1f1b4650 | 592 | __func__, ve_spc_cpufreq_driver.name, ret); |
a0f950d3 SH |
593 | } else { |
594 | ret = __bLs_register_notifier(); | |
1f1b4650 SH |
595 | if (ret) |
596 | cpufreq_unregister_driver(&ve_spc_cpufreq_driver); | |
597 | else | |
a0f950d3 | 598 | pr_info("%s: Registered platform driver: %s\n", |
1f1b4650 | 599 | __func__, ve_spc_cpufreq_driver.name); |
a0f950d3 SH |
600 | } |
601 | ||
602 | bL_switcher_put_enabled(); | |
603 | return ret; | |
604 | } | |
605 | ||
1f1b4650 | 606 | static int ve_spc_cpufreq_remove(struct platform_device *pdev) |
a0f950d3 | 607 | { |
a0f950d3 SH |
608 | bL_switcher_get_enabled(); |
609 | __bLs_unregister_notifier(); | |
1f1b4650 | 610 | cpufreq_unregister_driver(&ve_spc_cpufreq_driver); |
a0f950d3 SH |
611 | bL_switcher_put_enabled(); |
612 | pr_info("%s: Un-registered platform driver: %s\n", __func__, | |
1f1b4650 | 613 | ve_spc_cpufreq_driver.name); |
47ac9aa1 SH |
614 | return 0; |
615 | } | |
616 | ||
617 | static struct platform_driver ve_spc_cpufreq_platdrv = { | |
618 | .driver = { | |
619 | .name = "vexpress-spc-cpufreq", | |
47ac9aa1 SH |
620 | }, |
621 | .probe = ve_spc_cpufreq_probe, | |
622 | .remove = ve_spc_cpufreq_remove, | |
623 | }; | |
624 | module_platform_driver(ve_spc_cpufreq_platdrv); | |
625 | ||
a0f950d3 SH |
626 | MODULE_AUTHOR("Viresh Kumar <[email protected]>"); |
627 | MODULE_AUTHOR("Sudeep Holla <[email protected]>"); | |
628 | MODULE_DESCRIPTION("Vexpress SPC ARM big LITTLE cpufreq driver"); | |
629 | MODULE_LICENSE("GPL v2"); |