projects / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| ea8c64ac CH |
1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | #ifndef _LINUX_DMA_DIRECT_H | |
| 3 | #define _LINUX_DMA_DIRECT_H 1 | |
| 4 | ||
| 5 | #include <linux/dma-mapping.h> | |
| b6e05477 | 6 | #include <linux/mem_encrypt.h> |
| ea8c64ac | 7 | |
| b3408715 | 8 | #define DIRECT_MAPPING_ERROR (~(dma_addr_t)0) |
| dff8d6c1 | 9 | |
| ea8c64ac CH |
10 | #ifdef CONFIG_ARCH_HAS_PHYS_TO_DMA |
| 11 | #include <asm/dma-direct.h> | |
| 12 | #else | |
| b6e05477 | 13 | static inline dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t paddr) |
| ea8c64ac CH |
14 | { |
| 15 | dma_addr_t dev_addr = (dma_addr_t)paddr; | |
| 16 | ||
| 17 | return dev_addr - ((dma_addr_t)dev->dma_pfn_offset << PAGE_SHIFT); | |
| 18 | } | |
| 19 | ||
| b6e05477 | 20 | static inline phys_addr_t __dma_to_phys(struct device *dev, dma_addr_t dev_addr) |
| ea8c64ac CH |
21 | { |
| 22 | phys_addr_t paddr = (phys_addr_t)dev_addr; | |
| 23 | ||
| 24 | return paddr + ((phys_addr_t)dev->dma_pfn_offset << PAGE_SHIFT); | |
| 25 | } | |
| 26 | ||
| 27 | static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) | |
| 28 | { | |
| 29 | if (!dev->dma_mask) | |
| 30 | return false; | |
| 31 | ||
| b4ebe606 CH |
32 | return addr + size - 1 <= |
| 33 | min_not_zero(*dev->dma_mask, dev->bus_dma_mask); | |
| ea8c64ac CH |
34 | } |
| 35 | #endif /* !CONFIG_ARCH_HAS_PHYS_TO_DMA */ | |
| b49efd76 | 36 | |
| b6e05477 CH |
37 | /* |
| 38 | * If memory encryption is supported, phys_to_dma will set the memory encryption | |
| 39 | * bit in the DMA address, and dma_to_phys will clear it. The raw __phys_to_dma | |
| 40 | * and __dma_to_phys versions should only be used on non-encrypted memory for | |
| 41 | * special occasions like DMA coherent buffers. | |
| 42 | */ | |
| 43 | static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr) | |
| 44 | { | |
| 45 | return __sme_set(__phys_to_dma(dev, paddr)); | |
| 46 | } | |
| 47 | ||
| 48 | static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr) | |
| 49 | { | |
| 50 | return __sme_clr(__dma_to_phys(dev, daddr)); | |
| 51 | } | |
| 52 | ||
| b49efd76 CH |
53 | #ifdef CONFIG_ARCH_HAS_DMA_MARK_CLEAN |
| 54 | void dma_mark_clean(void *addr, size_t size); | |
| 55 | #else | |
| 56 | static inline void dma_mark_clean(void *addr, size_t size) | |
| 57 | { | |
| 58 | } | |
| 59 | #endif /* CONFIG_ARCH_HAS_DMA_MARK_CLEAN */ | |
| 60 | ||
| a20bb058 | 61 | u64 dma_direct_get_required_mask(struct device *dev); |
| 19dca8c0 CH |
62 | void *dma_direct_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle, |
| 63 | gfp_t gfp, unsigned long attrs); | |
| 64 | void dma_direct_free(struct device *dev, size_t size, void *cpu_addr, | |
| 65 | dma_addr_t dma_addr, unsigned long attrs); | |
| bc3ec75d CH |
66 | void *dma_direct_alloc_pages(struct device *dev, size_t size, |
| 67 | dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs); | |
| 68 | void dma_direct_free_pages(struct device *dev, size_t size, void *cpu_addr, | |
| 69 | dma_addr_t dma_addr, unsigned long attrs); | |
| 782e6769 CH |
70 | dma_addr_t dma_direct_map_page(struct device *dev, struct page *page, |
| 71 | unsigned long offset, size_t size, enum dma_data_direction dir, | |
| 72 | unsigned long attrs); | |
| 73 | int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, int nents, | |
| 74 | enum dma_data_direction dir, unsigned long attrs); | |
| 1a9777a8 | 75 | int dma_direct_supported(struct device *dev, u64 mask); |
| 782e6769 | 76 | int dma_direct_mapping_error(struct device *dev, dma_addr_t dma_addr); |
| ea8c64ac | 77 | #endif /* _LINUX_DMA_DIRECT_H */ |