]> Git Repo - linux.git/blame - drivers/gpu/drm/omapdrm/dss/hdmi4.c
Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[linux.git] / drivers / gpu / drm / omapdrm / dss / hdmi4.c
CommitLineData
c3198a5e 1/*
ef26958a 2 * HDMI interface DSS driver for TI's OMAP4 family of SoCs.
bb5cdf8d 3 *
c3198a5e
M
4 * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/
5 * Authors: Yong Zhi
6 * Mythri pk <[email protected]>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published by
10 * the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
21#define DSS_SUBSYS_NAME "HDMI"
22
23#include <linux/kernel.h>
24#include <linux/module.h>
25#include <linux/err.h>
26#include <linux/io.h>
27#include <linux/interrupt.h>
28#include <linux/mutex.h>
29#include <linux/delay.h>
30#include <linux/string.h>
24e6289c 31#include <linux/platform_device.h>
4fbafaf3
TV
32#include <linux/pm_runtime.h>
33#include <linux/clk.h>
cca35017 34#include <linux/gpio.h>
17486943 35#include <linux/regulator/consumer.h>
736e60dd 36#include <linux/component.h>
d9e32ecd 37#include <linux/of.h>
09bffa6e 38#include <linux/of_graph.h>
4d594dff 39#include <sound/omap-hdmi-audio.h>
1897e1a3 40#include <media/cec.h>
c3198a5e 41
32043da7 42#include "omapdss.h"
ef26958a 43#include "hdmi4_core.h"
1897e1a3 44#include "hdmi4_cec.h"
c3198a5e 45#include "dss.h"
945514b5 46#include "hdmi.h"
c3198a5e 47
ac767456 48static int hdmi_runtime_get(struct omap_hdmi *hdmi)
4fbafaf3
TV
49{
50 int r;
51
52 DSSDBG("hdmi_runtime_get\n");
53
ac767456 54 r = pm_runtime_get_sync(&hdmi->pdev->dev);
4fbafaf3 55 WARN_ON(r < 0);
a247ce78 56 if (r < 0)
852f0838 57 return r;
a247ce78
AT
58
59 return 0;
4fbafaf3
TV
60}
61
ac767456 62static void hdmi_runtime_put(struct omap_hdmi *hdmi)
4fbafaf3
TV
63{
64 int r;
65
66 DSSDBG("hdmi_runtime_put\n");
67
ac767456 68 r = pm_runtime_put_sync(&hdmi->pdev->dev);
5be3aebd 69 WARN_ON(r < 0 && r != -ENOSYS);
4fbafaf3
TV
70}
71
dcf5f729
TV
72static irqreturn_t hdmi_irq_handler(int irq, void *data)
73{
f3096a4a
HV
74 struct omap_hdmi *hdmi = data;
75 struct hdmi_wp_data *wp = &hdmi->wp;
dcf5f729
TV
76 u32 irqstatus;
77
78 irqstatus = hdmi_wp_get_irqstatus(wp);
79 hdmi_wp_set_irqstatus(wp, irqstatus);
80
81 if ((irqstatus & HDMI_IRQ_LINK_CONNECT) &&
82 irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
83 /*
84 * If we get both connect and disconnect interrupts at the same
85 * time, turn off the PHY, clear interrupts, and restart, which
86 * raises connect interrupt if a cable is connected, or nothing
87 * if cable is not connected.
88 */
89 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
90
91 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
92 HDMI_IRQ_LINK_DISCONNECT);
93
94 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
95 } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) {
96 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
97 } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
98 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
99 }
1897e1a3
HV
100 if (irqstatus & HDMI_IRQ_CORE) {
101 u32 intr4 = hdmi_read_reg(hdmi->core.base, HDMI_CORE_SYS_INTR4);
102
103 hdmi_write_reg(hdmi->core.base, HDMI_CORE_SYS_INTR4, intr4);
104 if (intr4 & 8)
105 hdmi4_cec_irq(&hdmi->core);
106 }
dcf5f729
TV
107
108 return IRQ_HANDLED;
109}
110
ac767456 111static int hdmi_power_on_core(struct omap_hdmi *hdmi)
c3198a5e 112{
46095b2d 113 int r;
c3198a5e 114
ac767456 115 if (hdmi->core.core_pwr_cnt++)
a141a296
HV
116 return 0;
117
ac767456 118 r = regulator_enable(hdmi->vdda_reg);
17486943 119 if (r)
a141a296 120 goto err_reg_enable;
17486943 121
ac767456 122 r = hdmi_runtime_get(hdmi);
4fbafaf3 123 if (r)
cca35017 124 goto err_runtime_get;
c3198a5e 125
ac767456 126 hdmi4_core_powerdown_disable(&hdmi->core);
1d54ecf2 127
bb426fc9 128 /* Make selection of HDMI in DSS */
ac767456 129 dss_select_hdmi_venc_clk_source(hdmi->dss, DSS_HDMI_M_PCLK);
bb426fc9 130
ac767456 131 hdmi->core_enabled = true;
0b450c31 132
bb426fc9
TV
133 return 0;
134
135err_runtime_get:
ac767456 136 regulator_disable(hdmi->vdda_reg);
a141a296 137err_reg_enable:
ac767456 138 hdmi->core.core_pwr_cnt--;
164ebdd1 139
bb426fc9
TV
140 return r;
141}
142
ac767456 143static void hdmi_power_off_core(struct omap_hdmi *hdmi)
bb426fc9 144{
ac767456 145 if (--hdmi->core.core_pwr_cnt)
a141a296
HV
146 return;
147
ac767456 148 hdmi->core_enabled = false;
0b450c31 149
ac767456
LP
150 hdmi_runtime_put(hdmi);
151 regulator_disable(hdmi->vdda_reg);
bb426fc9
TV
152}
153
ac767456 154static int hdmi_power_on_full(struct omap_hdmi *hdmi)
bb426fc9
TV
155{
156 int r;
95e472da 157 const struct videomode *vm;
ac767456 158 struct hdmi_wp_data *wp = &hdmi->wp;
c84c3a5b 159 struct dss_pll_clock_info hdmi_cinfo = { 0 };
d11e5c82 160 unsigned int pc;
bb426fc9 161
ac767456 162 r = hdmi_power_on_core(hdmi);
bb426fc9
TV
163 if (r)
164 return r;
165
dcf5f729 166 /* disable and clear irqs */
f3096a4a
HV
167 hdmi_wp_clear_irqenable(wp, ~HDMI_IRQ_CORE);
168 hdmi_wp_set_irqstatus(wp, ~HDMI_IRQ_CORE);
dcf5f729 169
ac767456 170 vm = &hdmi->cfg.vm;
c3198a5e 171
da11bbbb
PU
172 DSSDBG("hdmi_power_on hactive= %d vactive = %d\n", vm->hactive,
173 vm->vactive);
c3198a5e 174
da11bbbb
PU
175 pc = vm->pixelclock;
176 if (vm->flags & DISPLAY_FLAGS_DOUBLECLK)
67d8ffdd
TV
177 pc *= 2;
178
c107751d
TV
179 /* DSS_HDMI_TCLK is bitclk / 10 */
180 pc *= 10;
181
ac767456 182 dss_pll_calc_b(&hdmi->pll.pll, clk_get_rate(hdmi->pll.pll.clkin),
c17dc0e3 183 pc, &hdmi_cinfo);
c3198a5e 184
ac767456 185 r = dss_pll_enable(&hdmi->pll.pll);
c3198a5e 186 if (r) {
c2fbd061 187 DSSERR("Failed to enable PLL\n");
cca35017 188 goto err_pll_enable;
c3198a5e
M
189 }
190
ac767456 191 r = dss_pll_set_config(&hdmi->pll.pll, &hdmi_cinfo);
c2fbd061
TV
192 if (r) {
193 DSSERR("Failed to configure PLL\n");
194 goto err_pll_cfg;
195 }
196
ac767456 197 r = hdmi_phy_configure(&hdmi->phy, hdmi_cinfo.clkdco,
c84c3a5b 198 hdmi_cinfo.clkout[0]);
c3198a5e 199 if (r) {
dcf5f729
TV
200 DSSDBG("Failed to configure PHY\n");
201 goto err_phy_cfg;
c3198a5e
M
202 }
203
dcf5f729
TV
204 r = hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
205 if (r)
206 goto err_phy_pwr;
207
ac767456 208 hdmi4_configure(&hdmi->core, &hdmi->wp, &hdmi->cfg);
c3198a5e 209
ac767456 210 r = dss_mgr_enable(&hdmi->output);
33ca237f
TV
211 if (r)
212 goto err_mgr_enable;
3870c909 213
ac767456 214 r = hdmi_wp_video_start(&hdmi->wp);
4e4b53ce
TV
215 if (r)
216 goto err_vid_enable;
217
dcf5f729
TV
218 hdmi_wp_set_irqenable(wp,
219 HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT);
220
c3198a5e 221 return 0;
33ca237f 222
c0456be3 223err_vid_enable:
ac767456 224 dss_mgr_disable(&hdmi->output);
4e4b53ce 225err_mgr_enable:
ac767456 226 hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_OFF);
dcf5f729 227err_phy_pwr:
9bba13f0 228err_phy_cfg:
c2fbd061 229err_pll_cfg:
ac767456 230 dss_pll_disable(&hdmi->pll.pll);
cca35017 231err_pll_enable:
ac767456 232 hdmi_power_off_core(hdmi);
c3198a5e
M
233 return -EIO;
234}
235
ac767456 236static void hdmi_power_off_full(struct omap_hdmi *hdmi)
c3198a5e 237{
ac767456 238 hdmi_wp_clear_irqenable(&hdmi->wp, ~HDMI_IRQ_CORE);
dcf5f729 239
ac767456 240 hdmi_wp_video_stop(&hdmi->wp);
dcf5f729 241
ac767456 242 dss_mgr_disable(&hdmi->output);
4e4b53ce 243
ac767456 244 hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_OFF);
dcf5f729 245
ac767456 246 dss_pll_disable(&hdmi->pll.pll);
17486943 247
ac767456 248 hdmi_power_off_core(hdmi);
c3198a5e
M
249}
250
ec68cd5a 251static void hdmi_display_set_timings(struct omap_dss_device *dssdev,
8fe1d361 252 const struct videomode *vm)
c3198a5e 253{
ac767456 254 struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
ed1aa900 255
ac767456 256 mutex_lock(&hdmi->lock);
5391e87d 257
ac767456 258 hdmi->cfg.vm = *vm;
1e676248 259
ac767456
LP
260 dispc_set_tv_pclk(hdmi->dss->dispc, vm->pixelclock);
261
262 mutex_unlock(&hdmi->lock);
c3198a5e
M
263}
264
f33656e1 265static int hdmi_dump_regs(struct seq_file *s, void *p)
162874d5 266{
ac767456
LP
267 struct omap_hdmi *hdmi = s->private;
268
269 mutex_lock(&hdmi->lock);
162874d5 270
ac767456
LP
271 if (hdmi_runtime_get(hdmi)) {
272 mutex_unlock(&hdmi->lock);
f33656e1 273 return 0;
f8fb7d7b 274 }
162874d5 275
ac767456
LP
276 hdmi_wp_dump(&hdmi->wp, s);
277 hdmi_pll_dump(&hdmi->pll, s);
278 hdmi_phy_dump(&hdmi->phy, s);
279 hdmi4_core_dump(&hdmi->core, s);
162874d5 280
ac767456
LP
281 hdmi_runtime_put(hdmi);
282 mutex_unlock(&hdmi->lock);
f33656e1 283 return 0;
162874d5
M
284}
285
ac767456 286static int read_edid(struct omap_hdmi *hdmi, u8 *buf, int len)
47024565
TV
287{
288 int r;
289
ac767456 290 mutex_lock(&hdmi->lock);
47024565 291
ac767456 292 r = hdmi_runtime_get(hdmi);
47024565
TV
293 BUG_ON(r);
294
ac767456 295 r = hdmi4_read_edid(&hdmi->core, buf, len);
47024565 296
ac767456
LP
297 hdmi_runtime_put(hdmi);
298 mutex_unlock(&hdmi->lock);
47024565
TV
299
300 return r;
301}
302
8a9d4626
JS
303static void hdmi_start_audio_stream(struct omap_hdmi *hd)
304{
305 hdmi_wp_audio_enable(&hd->wp, true);
306 hdmi4_audio_start(&hd->core, &hd->wp);
307}
308
309static void hdmi_stop_audio_stream(struct omap_hdmi *hd)
310{
311 hdmi4_audio_stop(&hd->core, &hd->wp);
312 hdmi_wp_audio_enable(&hd->wp, false);
313}
314
164ebdd1 315static int hdmi_display_enable(struct omap_dss_device *dssdev)
c3198a5e 316{
ac767456 317 struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
8a9d4626 318 unsigned long flags;
c3198a5e
M
319 int r = 0;
320
321 DSSDBG("ENTER hdmi_display_enable\n");
322
ac767456 323 mutex_lock(&hdmi->lock);
c3198a5e 324
ac767456 325 if (!dssdev->dispc_channel_connected) {
cea87b92 326 DSSERR("failed to enable display: no output/manager\n");
05e1d606
TV
327 r = -ENODEV;
328 goto err0;
329 }
330
ac767456 331 r = hdmi_power_on_full(hdmi);
c3198a5e
M
332 if (r) {
333 DSSERR("failed to power on device\n");
d3923933 334 goto err0;
c3198a5e
M
335 }
336
ac767456
LP
337 if (hdmi->audio_configured) {
338 r = hdmi4_audio_config(&hdmi->core, &hdmi->wp,
339 &hdmi->audio_config,
340 hdmi->cfg.vm.pixelclock);
8a9d4626
JS
341 if (r) {
342 DSSERR("Error restoring audio configuration: %d", r);
ac767456
LP
343 hdmi->audio_abort_cb(&hdmi->pdev->dev);
344 hdmi->audio_configured = false;
8a9d4626
JS
345 }
346 }
347
ac767456
LP
348 spin_lock_irqsave(&hdmi->audio_playing_lock, flags);
349 if (hdmi->audio_configured && hdmi->audio_playing)
350 hdmi_start_audio_stream(hdmi);
351 hdmi->display_enabled = true;
352 spin_unlock_irqrestore(&hdmi->audio_playing_lock, flags);
4d594dff 353
ac767456 354 mutex_unlock(&hdmi->lock);
c3198a5e
M
355 return 0;
356
c3198a5e 357err0:
ac767456 358 mutex_unlock(&hdmi->lock);
c3198a5e
M
359 return r;
360}
361
164ebdd1 362static void hdmi_display_disable(struct omap_dss_device *dssdev)
c3198a5e 363{
ac767456 364 struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
8a9d4626
JS
365 unsigned long flags;
366
c3198a5e
M
367 DSSDBG("Enter hdmi_display_disable\n");
368
ac767456 369 mutex_lock(&hdmi->lock);
c3198a5e 370
ac767456
LP
371 spin_lock_irqsave(&hdmi->audio_playing_lock, flags);
372 hdmi_stop_audio_stream(hdmi);
373 hdmi->display_enabled = false;
374 spin_unlock_irqrestore(&hdmi->audio_playing_lock, flags);
4d594dff 375
ac767456 376 hdmi_power_off_full(hdmi);
c3198a5e 377
ac767456 378 mutex_unlock(&hdmi->lock);
c3198a5e
M
379}
380
ac767456 381int hdmi4_core_enable(struct hdmi_core_data *core)
4489823c 382{
ac767456 383 struct omap_hdmi *hdmi = container_of(core, struct omap_hdmi, core);
4489823c
TV
384 int r = 0;
385
5bebbbfe 386 DSSDBG("ENTER omapdss_hdmi4_core_enable\n");
4489823c 387
ac767456 388 mutex_lock(&hdmi->lock);
4489823c 389
ac767456 390 r = hdmi_power_on_core(hdmi);
4489823c
TV
391 if (r) {
392 DSSERR("failed to power on device\n");
393 goto err0;
394 }
395
ac767456 396 mutex_unlock(&hdmi->lock);
4489823c
TV
397 return 0;
398
399err0:
ac767456 400 mutex_unlock(&hdmi->lock);
4489823c
TV
401 return r;
402}
403
ac767456 404void hdmi4_core_disable(struct hdmi_core_data *core)
4489823c 405{
ac767456
LP
406 struct omap_hdmi *hdmi = container_of(core, struct omap_hdmi, core);
407
5bebbbfe 408 DSSDBG("Enter omapdss_hdmi4_core_disable\n");
4489823c 409
ac767456 410 mutex_lock(&hdmi->lock);
4489823c 411
ac767456 412 hdmi_power_off_core(hdmi);
4489823c 413
ac767456 414 mutex_unlock(&hdmi->lock);
4489823c
TV
415}
416
511afb44
LP
417static int hdmi_connect(struct omap_dss_device *src,
418 struct omap_dss_device *dst)
0b450c31 419{
0b450c31
TV
420 int r;
421
71316556 422 r = omapdss_device_connect(dst->dss, dst, dst->next);
43f7078f 423 if (r)
71316556 424 return r;
0b450c31 425
0f37938c 426 dst->dispc_channel_connected = true;
0b450c31
TV
427 return 0;
428}
429
511afb44
LP
430static void hdmi_disconnect(struct omap_dss_device *src,
431 struct omap_dss_device *dst)
0b450c31 432{
0f37938c
LP
433 dst->dispc_channel_connected = false;
434
511afb44 435 omapdss_device_disconnect(dst, dst->next);
0b450c31
TV
436}
437
438static int hdmi_read_edid(struct omap_dss_device *dssdev,
439 u8 *edid, int len)
440{
ac767456 441 struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
0b450c31
TV
442 bool need_enable;
443 int r;
444
ac767456 445 need_enable = hdmi->core_enabled == false;
0b450c31
TV
446
447 if (need_enable) {
ac767456 448 r = hdmi4_core_enable(&hdmi->core);
0b450c31
TV
449 if (r)
450 return r;
451 }
452
ac767456 453 r = read_edid(hdmi, edid, len);
1897e1a3 454 if (r >= 256)
ac767456 455 hdmi4_cec_set_phys_addr(&hdmi->core,
1897e1a3
HV
456 cec_get_edid_phys_addr(edid, r, NULL));
457 else
ac767456 458 hdmi4_cec_set_phys_addr(&hdmi->core, CEC_PHYS_ADDR_INVALID);
0b450c31 459 if (need_enable)
ac767456 460 hdmi4_core_disable(&hdmi->core);
0b450c31
TV
461
462 return r;
463}
464
019114ef
HV
465static void hdmi_lost_hotplug(struct omap_dss_device *dssdev)
466{
ac767456
LP
467 struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
468
469 hdmi4_cec_set_phys_addr(&hdmi->core, CEC_PHYS_ADDR_INVALID);
019114ef
HV
470}
471
ab0aee95
TV
472static int hdmi_set_infoframe(struct omap_dss_device *dssdev,
473 const struct hdmi_avi_infoframe *avi)
474{
ac767456
LP
475 struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
476
477 hdmi->cfg.infoframe = *avi;
ab0aee95
TV
478 return 0;
479}
480
481static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev,
482 bool hdmi_mode)
483{
ac767456
LP
484 struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
485
486 hdmi->cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI;
ab0aee95
TV
487 return 0;
488}
489
b93109d7 490static const struct omap_dss_device_ops hdmi_ops = {
0b450c31
TV
491 .connect = hdmi_connect,
492 .disconnect = hdmi_disconnect,
493
164ebdd1
TV
494 .enable = hdmi_display_enable,
495 .disable = hdmi_display_disable,
0b450c31 496
ec68cd5a 497 .set_timings = hdmi_display_set_timings,
0b450c31 498
83910ad3
LP
499 .read_edid = hdmi_read_edid,
500
b93109d7 501 .hdmi = {
b93109d7
LP
502 .lost_hotplug = hdmi_lost_hotplug,
503 .set_infoframe = hdmi_set_infoframe,
504 .set_hdmi_mode = hdmi_set_hdmi_mode,
505 },
0b450c31
TV
506};
507
5fc15d98
LP
508/* -----------------------------------------------------------------------------
509 * Audio Callbacks
510 */
2f5dc676 511
4d594dff
JS
512static int hdmi_audio_startup(struct device *dev,
513 void (*abort_cb)(struct device *dev))
514{
515 struct omap_hdmi *hd = dev_get_drvdata(dev);
4d594dff
JS
516
517 mutex_lock(&hd->lock);
518
c1899cb3 519 WARN_ON(hd->audio_abort_cb != NULL);
4d594dff
JS
520
521 hd->audio_abort_cb = abort_cb;
522
4d594dff
JS
523 mutex_unlock(&hd->lock);
524
c1899cb3 525 return 0;
4d594dff
JS
526}
527
528static int hdmi_audio_shutdown(struct device *dev)
529{
530 struct omap_hdmi *hd = dev_get_drvdata(dev);
531
532 mutex_lock(&hd->lock);
533 hd->audio_abort_cb = NULL;
8a9d4626
JS
534 hd->audio_configured = false;
535 hd->audio_playing = false;
4d594dff
JS
536 mutex_unlock(&hd->lock);
537
538 return 0;
539}
540
541static int hdmi_audio_start(struct device *dev)
542{
543 struct omap_hdmi *hd = dev_get_drvdata(dev);
8a9d4626 544 unsigned long flags;
4d594dff 545
8a9d4626
JS
546 spin_lock_irqsave(&hd->audio_playing_lock, flags);
547
c1899cb3
JS
548 if (hd->display_enabled) {
549 if (!hdmi_mode_has_audio(&hd->cfg))
550 DSSERR("%s: Video mode does not support audio\n",
551 __func__);
8a9d4626 552 hdmi_start_audio_stream(hd);
c1899cb3 553 }
8a9d4626 554 hd->audio_playing = true;
4d594dff 555
8a9d4626 556 spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
4d594dff
JS
557 return 0;
558}
559
560static void hdmi_audio_stop(struct device *dev)
561{
562 struct omap_hdmi *hd = dev_get_drvdata(dev);
8a9d4626 563 unsigned long flags;
4d594dff
JS
564
565 WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
4d594dff 566
8a9d4626
JS
567 spin_lock_irqsave(&hd->audio_playing_lock, flags);
568
569 if (hd->display_enabled)
570 hdmi_stop_audio_stream(hd);
571 hd->audio_playing = false;
572
573 spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
4d594dff
JS
574}
575
576static int hdmi_audio_config(struct device *dev,
577 struct omap_dss_audio *dss_audio)
578{
579 struct omap_hdmi *hd = dev_get_drvdata(dev);
77eeac24 580 int ret = 0;
4d594dff
JS
581
582 mutex_lock(&hd->lock);
583
c1899cb3
JS
584 if (hd->display_enabled) {
585 ret = hdmi4_audio_config(&hd->core, &hd->wp, dss_audio,
586 hd->cfg.vm.pixelclock);
587 if (ret)
588 goto out;
4d594dff
JS
589 }
590
c1899cb3
JS
591 hd->audio_configured = true;
592 hd->audio_config = *dss_audio;
4d594dff
JS
593out:
594 mutex_unlock(&hd->lock);
595
596 return ret;
597}
598
599static const struct omap_hdmi_audio_ops hdmi_audio_ops = {
600 .audio_startup = hdmi_audio_startup,
601 .audio_shutdown = hdmi_audio_shutdown,
602 .audio_start = hdmi_audio_start,
603 .audio_stop = hdmi_audio_stop,
604 .audio_config = hdmi_audio_config,
605};
606
ac767456 607static int hdmi_audio_register(struct omap_hdmi *hdmi)
4d594dff
JS
608{
609 struct omap_hdmi_audio_pdata pdata = {
ac767456 610 .dev = &hdmi->pdev->dev,
d20fa5a0 611 .version = 4,
ac767456 612 .audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi->wp),
4d594dff
JS
613 .ops = &hdmi_audio_ops,
614 };
615
ac767456
LP
616 hdmi->audio_pdev = platform_device_register_data(
617 &hdmi->pdev->dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO,
4d594dff
JS
618 &pdata, sizeof(pdata));
619
ac767456
LP
620 if (IS_ERR(hdmi->audio_pdev))
621 return PTR_ERR(hdmi->audio_pdev);
4d594dff
JS
622
623 return 0;
624}
625
5fc15d98
LP
626/* -----------------------------------------------------------------------------
627 * Component Bind & Unbind
628 */
629
736e60dd 630static int hdmi4_bind(struct device *dev, struct device *master, void *data)
c3198a5e 631{
7b295257 632 struct dss_device *dss = dss_get_device(master);
5fc15d98 633 struct omap_hdmi *hdmi = dev_get_drvdata(dev);
38f3daf6 634 int r;
5fc15d98
LP
635
636 hdmi->dss = dss;
637
f8523b64 638 r = hdmi_runtime_get(hdmi);
5fc15d98
LP
639 if (r)
640 return r;
641
f8523b64
LP
642 r = hdmi_pll_init(dss, hdmi->pdev, &hdmi->pll, &hdmi->wp);
643 if (r)
644 goto err_runtime_put;
645
5fc15d98
LP
646 r = hdmi4_cec_init(hdmi->pdev, &hdmi->core, &hdmi->wp);
647 if (r)
648 goto err_pll_uninit;
649
650 r = hdmi_audio_register(hdmi);
651 if (r) {
652 DSSERR("Registering HDMI audio failed\n");
653 goto err_cec_uninit;
654 }
655
656 hdmi->debugfs = dss_debugfs_create_file(dss, "hdmi", hdmi_dump_regs,
657 hdmi);
658
f8523b64
LP
659 hdmi_runtime_put(hdmi);
660
5fc15d98
LP
661 return 0;
662
663err_cec_uninit:
664 hdmi4_cec_uninit(&hdmi->core);
665err_pll_uninit:
666 hdmi_pll_uninit(&hdmi->pll);
f8523b64
LP
667err_runtime_put:
668 hdmi_runtime_put(hdmi);
5fc15d98
LP
669 return r;
670}
671
672static void hdmi4_unbind(struct device *dev, struct device *master, void *data)
673{
674 struct omap_hdmi *hdmi = dev_get_drvdata(dev);
675
676 dss_debugfs_remove_file(hdmi->debugfs);
677
678 if (hdmi->audio_pdev)
679 platform_device_unregister(hdmi->audio_pdev);
680
681 hdmi4_cec_uninit(&hdmi->core);
682 hdmi_pll_uninit(&hdmi->pll);
683}
684
685static const struct component_ops hdmi4_component_ops = {
686 .bind = hdmi4_bind,
687 .unbind = hdmi4_unbind,
688};
689
690/* -----------------------------------------------------------------------------
691 * Probe & Remove, Suspend & Resume
692 */
693
27d62452 694static int hdmi4_init_output(struct omap_hdmi *hdmi)
5fc15d98
LP
695{
696 struct omap_dss_device *out = &hdmi->output;
71316556 697 int r;
5fc15d98
LP
698
699 out->dev = &hdmi->pdev->dev;
700 out->id = OMAP_DSS_OUTPUT_HDMI;
701 out->output_type = OMAP_DISPLAY_TYPE_HDMI;
702 out->name = "hdmi.0";
703 out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
704 out->ops = &hdmi_ops;
705 out->owner = THIS_MODULE;
706 out->of_ports = BIT(0);
90279e95 707 out->ops_flags = OMAP_DSS_DEVICE_OP_EDID;
5fc15d98 708
27d62452
LP
709 out->next = omapdss_of_find_connected_device(out->dev->of_node, 0);
710 if (IS_ERR(out->next)) {
711 if (PTR_ERR(out->next) != -EPROBE_DEFER)
712 dev_err(out->dev, "failed to find video sink\n");
713 return PTR_ERR(out->next);
714 }
715
71316556
LP
716 r = omapdss_output_validate(out);
717 if (r) {
718 omapdss_device_put(out->next);
719 out->next = NULL;
720 return r;
721 }
722
5fc15d98 723 omapdss_device_register(out);
27d62452
LP
724
725 return 0;
5fc15d98
LP
726}
727
728static void hdmi4_uninit_output(struct omap_hdmi *hdmi)
729{
730 struct omap_dss_device *out = &hdmi->output;
731
27d62452
LP
732 if (out->next)
733 omapdss_device_put(out->next);
5fc15d98
LP
734 omapdss_device_unregister(out);
735}
736
737static int hdmi4_probe_of(struct omap_hdmi *hdmi)
738{
739 struct platform_device *pdev = hdmi->pdev;
740 struct device_node *node = pdev->dev.of_node;
741 struct device_node *ep;
742 int r;
743
744 ep = of_graph_get_endpoint_by_regs(node, 0, 0);
745 if (!ep)
746 return 0;
747
748 r = hdmi_parse_lanes_of(pdev, ep, &hdmi->phy);
749 of_node_put(ep);
750 return r;
751}
752
753static int hdmi4_probe(struct platform_device *pdev)
754{
755 struct omap_hdmi *hdmi;
dcf5f729 756 int irq;
5fc15d98 757 int r;
c3198a5e 758
ac767456
LP
759 hdmi = kzalloc(sizeof(*hdmi), GFP_KERNEL);
760 if (!hdmi)
761 return -ENOMEM;
762
763 hdmi->pdev = pdev;
5fc15d98 764
ac767456 765 dev_set_drvdata(&pdev->dev, hdmi);
c3198a5e 766
ac767456
LP
767 mutex_init(&hdmi->lock);
768 spin_lock_init(&hdmi->audio_playing_lock);
c3198a5e 769
5fc15d98 770 r = hdmi4_probe_of(hdmi);
1dff212c 771 if (r)
ac767456 772 goto err_free;
2f5dc676 773
ac767456 774 r = hdmi_wp_init(pdev, &hdmi->wp, 4);
f382d9eb 775 if (r)
ac767456 776 goto err_free;
c3198a5e 777
ac767456 778 r = hdmi_phy_init(pdev, &hdmi->phy, 4);
5cac5aee 779 if (r)
5fc15d98 780 goto err_free;
ddb1d5ca 781
ac767456 782 r = hdmi4_core_init(pdev, &hdmi->core);
425f02fd 783 if (r)
5fc15d98 784 goto err_free;
1897e1a3 785
dcf5f729
TV
786 irq = platform_get_irq(pdev, 0);
787 if (irq < 0) {
788 DSSERR("platform_get_irq failed\n");
c84c3a5b 789 r = -ENODEV;
5fc15d98 790 goto err_free;
dcf5f729
TV
791 }
792
793 r = devm_request_threaded_irq(&pdev->dev, irq,
794 NULL, hdmi_irq_handler,
ac767456 795 IRQF_ONESHOT, "OMAP HDMI", hdmi);
dcf5f729
TV
796 if (r) {
797 DSSERR("HDMI IRQ request failed\n");
5fc15d98 798 goto err_free;
dcf5f729
TV
799 }
800
8a36357a
LP
801 hdmi->vdda_reg = devm_regulator_get(&pdev->dev, "vdda");
802 if (IS_ERR(hdmi->vdda_reg)) {
803 r = PTR_ERR(hdmi->vdda_reg);
804 if (r != -EPROBE_DEFER)
805 DSSERR("can't get VDDA regulator\n");
806 goto err_free;
807 }
808
4fbafaf3
TV
809 pm_runtime_enable(&pdev->dev);
810
27d62452
LP
811 r = hdmi4_init_output(hdmi);
812 if (r)
813 goto err_pm_disable;
002d368d 814
5fc15d98
LP
815 r = component_add(&pdev->dev, &hdmi4_component_ops);
816 if (r)
66aacfe2 817 goto err_uninit_output;
e40402cf 818
cca35017 819 return 0;
ac767456 820
66aacfe2 821err_uninit_output:
5fc15d98 822 hdmi4_uninit_output(hdmi);
27d62452 823err_pm_disable:
66aacfe2 824 pm_runtime_disable(&pdev->dev);
ac767456
LP
825err_free:
826 kfree(hdmi);
c84c3a5b 827 return r;
cca35017
TV
828}
829
5fc15d98 830static int hdmi4_remove(struct platform_device *pdev)
c3198a5e 831{
5fc15d98 832 struct omap_hdmi *hdmi = platform_get_drvdata(pdev);
ac767456 833
5fc15d98 834 component_del(&pdev->dev, &hdmi4_component_ops);
81b87f51 835
5fc15d98 836 hdmi4_uninit_output(hdmi);
1897e1a3 837
5fc15d98 838 pm_runtime_disable(&pdev->dev);
c84c3a5b 839
ac767456 840 kfree(hdmi);
c3198a5e
M
841 return 0;
842}
843
0465616d
TV
844static const struct of_device_id hdmi_of_match[] = {
845 { .compatible = "ti,omap4-hdmi", },
846 {},
847};
848
d66c36a3 849struct platform_driver omapdss_hdmi4hw_driver = {
736e60dd
TV
850 .probe = hdmi4_probe,
851 .remove = hdmi4_remove,
c3198a5e
M
852 .driver = {
853 .name = "omapdss_hdmi",
0465616d 854 .of_match_table = hdmi_of_match,
422ccbd5 855 .suppress_bind_attrs = true,
c3198a5e
M
856 },
857};
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