[linux.git] / arch / s390 / mm / pgalloc.c

// SPDX-License-Identifier: GPL-2.0
/*
 *  Page table allocation functions
 *
 *    Copyright IBM Corp. 2016
 *    Author(s): Martin Schwidefsky <[email protected]>
 */

#include <linux/sysctl.h>
#include <linux/slab.h>
#include <linux/mm.h>
#include <asm/mmu_context.h>
#include <asm/pgalloc.h>
#include <asm/gmap.h>
#include <asm/tlb.h>
#include <asm/tlbflush.h>

#ifdef CONFIG_PGSTE

static int page_table_allocate_pgste_min = 0;
static int page_table_allocate_pgste_max = 1;
int page_table_allocate_pgste = 0;
EXPORT_SYMBOL(page_table_allocate_pgste);

static struct ctl_table page_table_sysctl[] = {
	{
		.procname	= "allocate_pgste",
		.data		= &page_table_allocate_pgste,
		.maxlen		= sizeof(int),
		.mode		= S_IRUGO | S_IWUSR,
		.proc_handler	= proc_dointvec_minmax,
		.extra1		= &page_table_allocate_pgste_min,
		.extra2		= &page_table_allocate_pgste_max,
	},
	{ }
};

static struct ctl_table page_table_sysctl_dir[] = {
	{
		.procname	= "vm",
		.maxlen		= 0,
		.mode		= 0555,
		.child		= page_table_sysctl,
	},
	{ }
};

static int __init page_table_register_sysctl(void)
{
	return register_sysctl_table(page_table_sysctl_dir) ? 0 : -ENOMEM;
}
__initcall(page_table_register_sysctl);

#endif /* CONFIG_PGSTE */

unsigned long *crst_table_alloc(struct mm_struct *mm)
{
	struct page *page = alloc_pages(GFP_KERNEL, 2);

	if (!page)
		return NULL;
	arch_set_page_dat(page, 2);
	return (unsigned long *) page_to_phys(page);
}

void crst_table_free(struct mm_struct *mm, unsigned long *table)
{
	free_pages((unsigned long) table, 2);
}

static void __crst_table_upgrade(void *arg)
{
	struct mm_struct *mm = arg;

	if (current->active_mm == mm)
		set_user_asce(mm);
	__tlb_flush_local();
}

int crst_table_upgrade(struct mm_struct *mm, unsigned long end)
{
	unsigned long *table, *pgd;
	int rc, notify;

	/* upgrade should only happen from 3 to 4, 3 to 5, or 4 to 5 levels */
	VM_BUG_ON(mm->context.asce_limit < _REGION2_SIZE);
	rc = 0;
	notify = 0;
	while (mm->context.asce_limit < end) {
		table = crst_table_alloc(mm);
		if (!table) {
			rc = -ENOMEM;
			break;
		}
		spin_lock_bh(&mm->page_table_lock);
		pgd = (unsigned long *) mm->pgd;
		if (mm->context.asce_limit == _REGION2_SIZE) {
			crst_table_init(table, _REGION2_ENTRY_EMPTY);
			p4d_populate(mm, (p4d_t *) table, (pud_t *) pgd);
			mm->pgd = (pgd_t *) table;
			mm->context.asce_limit = _REGION1_SIZE;
			mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
				_ASCE_USER_BITS | _ASCE_TYPE_REGION2;
			mm_inc_nr_puds(mm);
		} else {
			crst_table_init(table, _REGION1_ENTRY_EMPTY);
			pgd_populate(mm, (pgd_t *) table, (p4d_t *) pgd);
			mm->pgd = (pgd_t *) table;
			mm->context.asce_limit = -PAGE_SIZE;
			mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
				_ASCE_USER_BITS | _ASCE_TYPE_REGION1;
		}
		notify = 1;
		spin_unlock_bh(&mm->page_table_lock);
	}
	if (notify)
		on_each_cpu(__crst_table_upgrade, mm, 0);
	return rc;
}

void crst_table_downgrade(struct mm_struct *mm)
{
	pgd_t *pgd;

	/* downgrade should only happen from 3 to 2 levels (compat only) */
	VM_BUG_ON(mm->context.asce_limit != _REGION2_SIZE);

	if (current->active_mm == mm) {
		clear_user_asce();
		__tlb_flush_mm(mm);
	}

	pgd = mm->pgd;
	mm_dec_nr_pmds(mm);
	mm->pgd = (pgd_t *) (pgd_val(*pgd) & _REGION_ENTRY_ORIGIN);
	mm->context.asce_limit = _REGION3_SIZE;
	mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
			   _ASCE_USER_BITS | _ASCE_TYPE_SEGMENT;
	crst_table_free(mm, (unsigned long *) pgd);

	if (current->active_mm == mm)
		set_user_asce(mm);
}

static inline unsigned int atomic_xor_bits(atomic_t *v, unsigned int bits)
{
	unsigned int old, new;

	do {
		old = atomic_read(v);
		new = old ^ bits;
	} while (atomic_cmpxchg(v, old, new) != old);
	return new;
}

#ifdef CONFIG_PGSTE

struct page *page_table_alloc_pgste(struct mm_struct *mm)
{
	struct page *page;
	u64 *table;

	page = alloc_page(GFP_KERNEL);
	if (page) {
		table = (u64 *)page_to_phys(page);
		memset64(table, _PAGE_INVALID, PTRS_PER_PTE);
		memset64(table + PTRS_PER_PTE, 0, PTRS_PER_PTE);
	}
	return page;
}

void page_table_free_pgste(struct page *page)
{
	__free_page(page);
}

#endif /* CONFIG_PGSTE */

/*
 * page table entry allocation/free routines.
 */
unsigned long *page_table_alloc(struct mm_struct *mm)
{
	unsigned long *table;
	struct page *page;
	unsigned int mask, bit;

	/* Try to get a fragment of a 4K page as a 2K page table */
	if (!mm_alloc_pgste(mm)) {
		table = NULL;
		spin_lock_bh(&mm->context.lock);
		if (!list_empty(&mm->context.pgtable_list)) {
			page = list_first_entry(&mm->context.pgtable_list,
						struct page, lru);
			mask = atomic_read(&page->_refcount) >> 24;
			mask = (mask | (mask >> 4)) & 3;
			if (mask != 3) {
				table = (unsigned long *) page_to_phys(page);
				bit = mask & 1;		/* =1 -> second 2K */
				if (bit)
					table += PTRS_PER_PTE;
				atomic_xor_bits(&page->_refcount,
							1U << (bit + 24));
				list_del(&page->lru);
			}
		}
		spin_unlock_bh(&mm->context.lock);
		if (table)
			return table;
	}
	/* Allocate a fresh page */
	page = alloc_page(GFP_KERNEL);
	if (!page)
		return NULL;
	if (!pgtable_page_ctor(page)) {
		__free_page(page);
		return NULL;
	}
	arch_set_page_dat(page, 0);
	/* Initialize page table */
	table = (unsigned long *) page_to_phys(page);
	if (mm_alloc_pgste(mm)) {
		/* Return 4K page table with PGSTEs */
		atomic_xor_bits(&page->_refcount, 3 << 24);
		memset64((u64 *)table, _PAGE_INVALID, PTRS_PER_PTE);
		memset64((u64 *)table + PTRS_PER_PTE, 0, PTRS_PER_PTE);
	} else {
		/* Return the first 2K fragment of the page */
		atomic_xor_bits(&page->_refcount, 1 << 24);
		memset64((u64 *)table, _PAGE_INVALID, 2 * PTRS_PER_PTE);
		spin_lock_bh(&mm->context.lock);
		list_add(&page->lru, &mm->context.pgtable_list);
		spin_unlock_bh(&mm->context.lock);
	}
	return table;
}

void page_table_free(struct mm_struct *mm, unsigned long *table)
{
	struct page *page;
	unsigned int bit, mask;

	page = pfn_to_page(__pa(table) >> PAGE_SHIFT);
	if (!mm_alloc_pgste(mm)) {
		/* Free 2K page table fragment of a 4K page */
		bit = (__pa(table) & ~PAGE_MASK)/(PTRS_PER_PTE*sizeof(pte_t));
		spin_lock_bh(&mm->context.lock);
		mask = atomic_xor_bits(&page->_refcount, 1U << (bit + 24));
		mask >>= 24;
		if (mask & 3)
			list_add(&page->lru, &mm->context.pgtable_list);
		else
			list_del(&page->lru);
		spin_unlock_bh(&mm->context.lock);
		if (mask != 0)
			return;
	} else {
		atomic_xor_bits(&page->_refcount, 3U << 24);
	}

	pgtable_page_dtor(page);
	__free_page(page);
}

void page_table_free_rcu(struct mmu_gather *tlb, unsigned long *table,
			 unsigned long vmaddr)
{
	struct mm_struct *mm;
	struct page *page;
	unsigned int bit, mask;

	mm = tlb->mm;
	page = pfn_to_page(__pa(table) >> PAGE_SHIFT);
	if (mm_alloc_pgste(mm)) {
		gmap_unlink(mm, table, vmaddr);
		table = (unsigned long *) (__pa(table) | 3);
		tlb_remove_table(tlb, table);
		return;
	}
	bit = (__pa(table) & ~PAGE_MASK) / (PTRS_PER_PTE*sizeof(pte_t));
	spin_lock_bh(&mm->context.lock);
	mask = atomic_xor_bits(&page->_refcount, 0x11U << (bit + 24));
	mask >>= 24;
	if (mask & 3)
		list_add_tail(&page->lru, &mm->context.pgtable_list);
	else
		list_del(&page->lru);
	spin_unlock_bh(&mm->context.lock);
	table = (unsigned long *) (__pa(table) | (1U << bit));
	tlb_remove_table(tlb, table);
}

static void __tlb_remove_table(void *_table)
{
	unsigned int mask = (unsigned long) _table & 3;
	void *table = (void *)((unsigned long) _table ^ mask);
	struct page *page = pfn_to_page(__pa(table) >> PAGE_SHIFT);

	switch (mask) {
	case 0:		/* pmd, pud, or p4d */
		free_pages((unsigned long) table, 2);
		break;
	case 1:		/* lower 2K of a 4K page table */
	case 2:		/* higher 2K of a 4K page table */
		mask = atomic_xor_bits(&page->_refcount, mask << (4 + 24));
		mask >>= 24;
		if (mask != 0)
			break;
		/* fallthrough */
	case 3:		/* 4K page table with pgstes */
		if (mask & 3)
			atomic_xor_bits(&page->_refcount, 3 << 24);
		pgtable_page_dtor(page);
		__free_page(page);
		break;
	}
}

static void tlb_remove_table_smp_sync(void *arg)
{
	/* Simply deliver the interrupt */
}

static void tlb_remove_table_one(void *table)
{
	/*
	 * This isn't an RCU grace period and hence the page-tables cannot be
	 * assumed to be actually RCU-freed.
	 *
	 * It is however sufficient for software page-table walkers that rely
	 * on IRQ disabling. See the comment near struct mmu_table_batch.
	 */
	smp_call_function(tlb_remove_table_smp_sync, NULL, 1);
	__tlb_remove_table(table);
}

static void tlb_remove_table_rcu(struct rcu_head *head)
{
	struct mmu_table_batch *batch;
	int i;

	batch = container_of(head, struct mmu_table_batch, rcu);

	for (i = 0; i < batch->nr; i++)
		__tlb_remove_table(batch->tables[i]);

	free_page((unsigned long)batch);
}

void tlb_table_flush(struct mmu_gather *tlb)
{
	struct mmu_table_batch **batch = &tlb->batch;

	if (*batch) {
		call_rcu_sched(&(*batch)->rcu, tlb_remove_table_rcu);
		*batch = NULL;
	}
}

void tlb_remove_table(struct mmu_gather *tlb, void *table)
{
	struct mmu_table_batch **batch = &tlb->batch;

	tlb->mm->context.flush_mm = 1;
	if (*batch == NULL) {
		*batch = (struct mmu_table_batch *)
			__get_free_page(GFP_NOWAIT | __GFP_NOWARN);
		if (*batch == NULL) {
			__tlb_flush_mm_lazy(tlb->mm);
			tlb_remove_table_one(table);
			return;
		}
		(*batch)->nr = 0;
	}
	(*batch)->tables[(*batch)->nr++] = table;
	if ((*batch)->nr == MAX_TABLE_BATCH)
		tlb_flush_mmu(tlb);
}

/*
 * Base infrastructure required to generate basic asces, region, segment,
 * and page tables that do not make use of enhanced features like EDAT1.
 */

static struct kmem_cache *base_pgt_cache;

static unsigned long base_pgt_alloc(void)
{
	u64 *table;

	table = kmem_cache_alloc(base_pgt_cache, GFP_KERNEL);
	if (table)
		memset64(table, _PAGE_INVALID, PTRS_PER_PTE);
	return (unsigned long) table;
}

static void base_pgt_free(unsigned long table)
{
	kmem_cache_free(base_pgt_cache, (void *) table);
}

static unsigned long base_crst_alloc(unsigned long val)
{
	unsigned long table;

	table =	 __get_free_pages(GFP_KERNEL, CRST_ALLOC_ORDER);
	if (table)
		crst_table_init((unsigned long *)table, val);
	return table;
}

static void base_crst_free(unsigned long table)
{
	free_pages(table, CRST_ALLOC_ORDER);
}

#define BASE_ADDR_END_FUNC(NAME, SIZE)					\
static inline unsigned long base_##NAME##_addr_end(unsigned long addr,	\
						   unsigned long end)	\
{									\
	unsigned long next = (addr + (SIZE)) & ~((SIZE) - 1);		\
									\
	return (next - 1) < (end - 1) ? next : end;			\
}

BASE_ADDR_END_FUNC(page,    _PAGE_SIZE)
BASE_ADDR_END_FUNC(segment, _SEGMENT_SIZE)
BASE_ADDR_END_FUNC(region3, _REGION3_SIZE)
BASE_ADDR_END_FUNC(region2, _REGION2_SIZE)
BASE_ADDR_END_FUNC(region1, _REGION1_SIZE)

static inline unsigned long base_lra(unsigned long address)
{
	unsigned long real;

	asm volatile(
		"	lra	%0,0(%1)\n"
		: "=d" (real) : "a" (address) : "cc");
	return real;
}

static int base_page_walk(unsigned long origin, unsigned long addr,
			  unsigned long end, int alloc)
{
	unsigned long *pte, next;

	if (!alloc)
		return 0;
	pte = (unsigned long *) origin;
	pte += (addr & _PAGE_INDEX) >> _PAGE_SHIFT;
	do {
		next = base_page_addr_end(addr, end);
		*pte = base_lra(addr);
	} while (pte++, addr = next, addr < end);
	return 0;
}

static int base_segment_walk(unsigned long origin, unsigned long addr,
			     unsigned long end, int alloc)
{
	unsigned long *ste, next, table;
	int rc;

	ste = (unsigned long *) origin;
	ste += (addr & _SEGMENT_INDEX) >> _SEGMENT_SHIFT;
	do {
		next = base_segment_addr_end(addr, end);
		if (*ste & _SEGMENT_ENTRY_INVALID) {
			if (!alloc)
				continue;
			table = base_pgt_alloc();
			if (!table)
				return -ENOMEM;
			*ste = table | _SEGMENT_ENTRY;
		}
		table = *ste & _SEGMENT_ENTRY_ORIGIN;
		rc = base_page_walk(table, addr, next, alloc);
		if (rc)
			return rc;
		if (!alloc)
			base_pgt_free(table);
		cond_resched();
	} while (ste++, addr = next, addr < end);
	return 0;
}

static int base_region3_walk(unsigned long origin, unsigned long addr,
			     unsigned long end, int alloc)
{
	unsigned long *rtte, next, table;
	int rc;

	rtte = (unsigned long *) origin;
	rtte += (addr & _REGION3_INDEX) >> _REGION3_SHIFT;
	do {
		next = base_region3_addr_end(addr, end);
		if (*rtte & _REGION_ENTRY_INVALID) {
			if (!alloc)
				continue;
			table = base_crst_alloc(_SEGMENT_ENTRY_EMPTY);
			if (!table)
				return -ENOMEM;
			*rtte = table | _REGION3_ENTRY;
		}
		table = *rtte & _REGION_ENTRY_ORIGIN;
		rc = base_segment_walk(table, addr, next, alloc);
		if (rc)
			return rc;
		if (!alloc)
			base_crst_free(table);
	} while (rtte++, addr = next, addr < end);
	return 0;
}

static int base_region2_walk(unsigned long origin, unsigned long addr,
			     unsigned long end, int alloc)
{
	unsigned long *rste, next, table;
	int rc;

	rste = (unsigned long *) origin;
	rste += (addr & _REGION2_INDEX) >> _REGION2_SHIFT;
	do {
		next = base_region2_addr_end(addr, end);
		if (*rste & _REGION_ENTRY_INVALID) {
			if (!alloc)
				continue;
			table = base_crst_alloc(_REGION3_ENTRY_EMPTY);
			if (!table)
				return -ENOMEM;
			*rste = table | _REGION2_ENTRY;
		}
		table = *rste & _REGION_ENTRY_ORIGIN;
		rc = base_region3_walk(table, addr, next, alloc);
		if (rc)
			return rc;
		if (!alloc)
			base_crst_free(table);
	} while (rste++, addr = next, addr < end);
	return 0;
}

static int base_region1_walk(unsigned long origin, unsigned long addr,
			     unsigned long end, int alloc)
{
	unsigned long *rfte, next, table;
	int rc;

	rfte = (unsigned long *) origin;
	rfte += (addr & _REGION1_INDEX) >> _REGION1_SHIFT;
	do {
		next = base_region1_addr_end(addr, end);
		if (*rfte & _REGION_ENTRY_INVALID) {
			if (!alloc)
				continue;
			table = base_crst_alloc(_REGION2_ENTRY_EMPTY);
			if (!table)
				return -ENOMEM;
			*rfte = table | _REGION1_ENTRY;
		}
		table = *rfte & _REGION_ENTRY_ORIGIN;
		rc = base_region2_walk(table, addr, next, alloc);
		if (rc)
			return rc;
		if (!alloc)
			base_crst_free(table);
	} while (rfte++, addr = next, addr < end);
	return 0;
}

/**
 * base_asce_free - free asce and tables returned from base_asce_alloc()
 * @asce: asce to be freed
 *
 * Frees all region, segment, and page tables that were allocated with a
 * corresponding base_asce_alloc() call.
 */
void base_asce_free(unsigned long asce)
{
	unsigned long table = asce & _ASCE_ORIGIN;

	if (!asce)
		return;
	switch (asce & _ASCE_TYPE_MASK) {
	case _ASCE_TYPE_SEGMENT:
		base_segment_walk(table, 0, _REGION3_SIZE, 0);
		break;
	case _ASCE_TYPE_REGION3:
		base_region3_walk(table, 0, _REGION2_SIZE, 0);
		break;
	case _ASCE_TYPE_REGION2:
		base_region2_walk(table, 0, _REGION1_SIZE, 0);
		break;
	case _ASCE_TYPE_REGION1:
		base_region1_walk(table, 0, -_PAGE_SIZE, 0);
		break;
	}
	base_crst_free(table);
}

static int base_pgt_cache_init(void)
{
	static DEFINE_MUTEX(base_pgt_cache_mutex);
	unsigned long sz = _PAGE_TABLE_SIZE;

	if (base_pgt_cache)
		return 0;
	mutex_lock(&base_pgt_cache_mutex);
	if (!base_pgt_cache)
		base_pgt_cache = kmem_cache_create("base_pgt", sz, sz, 0, NULL);
	mutex_unlock(&base_pgt_cache_mutex);
	return base_pgt_cache ? 0 : -ENOMEM;
}

/**
 * base_asce_alloc - create kernel mapping without enhanced DAT features
 * @addr: virtual start address of kernel mapping
 * @num_pages: number of consecutive pages
 *
 * Generate an asce, including all required region, segment and page tables,
 * that can be used to access the virtual kernel mapping. The difference is
 * that the returned asce does not make use of any enhanced DAT features like
 * e.g. large pages. This is required for some I/O functions that pass an
 * asce, like e.g. some service call requests.
 *
 * Note: the returned asce may NEVER be attached to any cpu. It may only be
 *	 used for I/O requests. tlb entries that might result because the
 *	 asce was attached to a cpu won't be cleared.
 */
unsigned long base_asce_alloc(unsigned long addr, unsigned long num_pages)
{
	unsigned long asce, table, end;
	int rc;

	if (base_pgt_cache_init())
		return 0;
	end = addr + num_pages * PAGE_SIZE;
	if (end <= _REGION3_SIZE) {
		table = base_crst_alloc(_SEGMENT_ENTRY_EMPTY);
		if (!table)
			return 0;
		rc = base_segment_walk(table, addr, end, 1);
		asce = table | _ASCE_TYPE_SEGMENT | _ASCE_TABLE_LENGTH;
	} else if (end <= _REGION2_SIZE) {
		table = base_crst_alloc(_REGION3_ENTRY_EMPTY);
		if (!table)
			return 0;
		rc = base_region3_walk(table, addr, end, 1);
		asce = table | _ASCE_TYPE_REGION3 | _ASCE_TABLE_LENGTH;
	} else if (end <= _REGION1_SIZE) {
		table = base_crst_alloc(_REGION2_ENTRY_EMPTY);
		if (!table)
			return 0;
		rc = base_region2_walk(table, addr, end, 1);
		asce = table | _ASCE_TYPE_REGION2 | _ASCE_TABLE_LENGTH;
	} else {
		table = base_crst_alloc(_REGION1_ENTRY_EMPTY);
		if (!table)
			return 0;
		rc = base_region1_walk(table, addr, end, 1);
		asce = table | _ASCE_TYPE_REGION1 | _ASCE_TABLE_LENGTH;
	}
	if (rc) {
		base_asce_free(asce);
		asce = 0;
	}
	return asce;
}
Commit	Line	Data
b2441318	1	// SPDX-License-Identifier: GPL-2.0
1e133ab2 MS	2	/*
	3	* Page table allocation functions
	4	*
	5	* Copyright IBM Corp. 2016
	6	* Author(s): Martin Schwidefsky <[email protected]>
	7	*/
	8
1e133ab2	9	#include <linux/sysctl.h>
1caf170d HC	10	#include <linux/slab.h>
1caf170d HC	11	#include <linux/mm.h>
1e133ab2 MS	12	#include <asm/mmu_context.h>
	13	#include <asm/pgalloc.h>
	14	#include <asm/gmap.h>
	15	#include <asm/tlb.h>
	16	#include <asm/tlbflush.h>
	17
	18	#ifdef CONFIG_PGSTE
	19
	20	static int page_table_allocate_pgste_min = 0;
	21	static int page_table_allocate_pgste_max = 1;
	22	int page_table_allocate_pgste = 0;
	23	EXPORT_SYMBOL(page_table_allocate_pgste);
	24
	25	static struct ctl_table page_table_sysctl[] = {
	26	{
	27	.procname = "allocate_pgste",
	28	.data = &page_table_allocate_pgste,
	29	.maxlen = sizeof(int),
	30	.mode = S_IRUGO \| S_IWUSR,
5bedf8aa	31	.proc_handler = proc_dointvec_minmax,
1e133ab2 MS	32	.extra1 = &page_table_allocate_pgste_min,
	33	.extra2 = &page_table_allocate_pgste_max,
	34	},
	35	{ }
	36	};
	37
	38	static struct ctl_table page_table_sysctl_dir[] = {
	39	{
	40	.procname = "vm",
	41	.maxlen = 0,
	42	.mode = 0555,
	43	.child = page_table_sysctl,
	44	},
	45	{ }
	46	};
	47
	48	static int __init page_table_register_sysctl(void)
	49	{
	50	return register_sysctl_table(page_table_sysctl_dir) ? 0 : -ENOMEM;
	51	}
	52	__initcall(page_table_register_sysctl);
	53
	54	#endif /* CONFIG_PGSTE */
	55
	56	unsigned long crst_table_alloc(struct mm_struct mm)
	57	{
	58	struct page *page = alloc_pages(GFP_KERNEL, 2);
	59
	60	if (!page)
	61	return NULL;
c9b5ad54	62	arch_set_page_dat(page, 2);
1e133ab2 MS	63	return (unsigned long *) page_to_phys(page);
	64	}
	65
	66	void crst_table_free(struct mm_struct mm, unsigned long table)
	67	{
	68	free_pages((unsigned long) table, 2);
	69	}
	70
	71	static void __crst_table_upgrade(void *arg)
	72	{
	73	struct mm_struct *mm = arg;
	74
0aaba41b	75	if (current->active_mm == mm)
1e133ab2	76	set_user_asce(mm);
1e133ab2 MS	77	__tlb_flush_local();
	78	}
	79
1aea9b3f	80	int crst_table_upgrade(struct mm_struct *mm, unsigned long end)
1e133ab2 MS	81	{
1e133ab2 MS	82	unsigned long table, pgd;
1aea9b3f	83	int rc, notify;
1e133ab2	84
1aea9b3f	85	/* upgrade should only happen from 3 to 4, 3 to 5, or 4 to 5 levels */
2fc4876e	86	VM_BUG_ON(mm->context.asce_limit < _REGION2_SIZE);
1aea9b3f MS	87	rc = 0;
	88	notify = 0;
	89	while (mm->context.asce_limit < end) {
	90	table = crst_table_alloc(mm);
	91	if (!table) {
	92	rc = -ENOMEM;
	93	break;
	94	}
	95	spin_lock_bh(&mm->page_table_lock);
	96	pgd = (unsigned long *) mm->pgd;
f1c1174f	97	if (mm->context.asce_limit == _REGION2_SIZE) {
1aea9b3f MS	98	crst_table_init(table, _REGION2_ENTRY_EMPTY);
	99	p4d_populate(mm, (p4d_t ) table, (pud_t ) pgd);
	100	mm->pgd = (pgd_t *) table;
f1c1174f	101	mm->context.asce_limit = _REGION1_SIZE;
1aea9b3f MS	102	mm->context.asce = __pa(mm->pgd) \| _ASCE_TABLE_LENGTH \|
1aea9b3f MS	103	_ASCE_USER_BITS \| _ASCE_TYPE_REGION2;
e12e4044	104	mm_inc_nr_puds(mm);
1aea9b3f MS	105	} else {
	106	crst_table_init(table, _REGION1_ENTRY_EMPTY);
	107	pgd_populate(mm, (pgd_t ) table, (p4d_t ) pgd);
	108	mm->pgd = (pgd_t *) table;
	109	mm->context.asce_limit = -PAGE_SIZE;
	110	mm->context.asce = __pa(mm->pgd) \| _ASCE_TABLE_LENGTH \|
	111	_ASCE_USER_BITS \| _ASCE_TYPE_REGION1;
	112	}
	113	notify = 1;
	114	spin_unlock_bh(&mm->page_table_lock);
	115	}
	116	if (notify)
	117	on_each_cpu(__crst_table_upgrade, mm, 0);
	118	return rc;
1e133ab2 MS	119	}
1e133ab2 MS	120
723cacbd	121	void crst_table_downgrade(struct mm_struct *mm)
1e133ab2 MS	122	{
	123	pgd_t *pgd;
	124
723cacbd	125	/* downgrade should only happen from 3 to 2 levels (compat only) */
2fc4876e	126	VM_BUG_ON(mm->context.asce_limit != _REGION2_SIZE);
723cacbd	127
1e133ab2 MS	128	if (current->active_mm == mm) {
	129	clear_user_asce();
	130	__tlb_flush_mm(mm);
	131	}
723cacbd GS	132
723cacbd GS	133	pgd = mm->pgd;
814cedbc	134	mm_dec_nr_pmds(mm);
723cacbd	135	mm->pgd = (pgd_t ) (pgd_val(pgd) & _REGION_ENTRY_ORIGIN);
f1c1174f	136	mm->context.asce_limit = _REGION3_SIZE;
723cacbd GS	137	mm->context.asce = __pa(mm->pgd) \| _ASCE_TABLE_LENGTH \|
723cacbd GS	138	_ASCE_USER_BITS \| _ASCE_TYPE_SEGMENT;
723cacbd GS	139	crst_table_free(mm, (unsigned long *) pgd);
723cacbd GS	140
1e133ab2 MS	141	if (current->active_mm == mm)
	142	set_user_asce(mm);
	143	}
	144
	145	static inline unsigned int atomic_xor_bits(atomic_t *v, unsigned int bits)
	146	{
	147	unsigned int old, new;
	148
	149	do {
	150	old = atomic_read(v);
	151	new = old ^ bits;
	152	} while (atomic_cmpxchg(v, old, new) != old);
	153	return new;
	154	}
	155
4be130a0 MS	156	#ifdef CONFIG_PGSTE
	157
	158	struct page page_table_alloc_pgste(struct mm_struct mm)
	159	{
	160	struct page *page;
41879ff6	161	u64 *table;
4be130a0	162
faee35a5	163	page = alloc_page(GFP_KERNEL);
4be130a0	164	if (page) {
41879ff6 HC	165	table = (u64 *)page_to_phys(page);
	166	memset64(table, _PAGE_INVALID, PTRS_PER_PTE);
	167	memset64(table + PTRS_PER_PTE, 0, PTRS_PER_PTE);
4be130a0 MS	168	}
	169	return page;
	170	}
	171
	172	void page_table_free_pgste(struct page *page)
	173	{
	174	__free_page(page);
	175	}
	176
	177	#endif /* CONFIG_PGSTE */
	178
1e133ab2 MS	179	/*
	180	* page table entry allocation/free routines.
	181	*/
	182	unsigned long page_table_alloc(struct mm_struct mm)
	183	{
	184	unsigned long *table;
	185	struct page *page;
	186	unsigned int mask, bit;
	187
	188	/* Try to get a fragment of a 4K page as a 2K page table */
	189	if (!mm_alloc_pgste(mm)) {
	190	table = NULL;
f28a4b4d	191	spin_lock_bh(&mm->context.lock);
1e133ab2 MS	192	if (!list_empty(&mm->context.pgtable_list)) {
	193	page = list_first_entry(&mm->context.pgtable_list,
	194	struct page, lru);
620b4e90	195	mask = atomic_read(&page->_refcount) >> 24;
1e133ab2 MS	196	mask = (mask \| (mask >> 4)) & 3;
	197	if (mask != 3) {
	198	table = (unsigned long *) page_to_phys(page);
	199	bit = mask & 1; /* =1 -> second 2K */
	200	if (bit)
	201	table += PTRS_PER_PTE;
620b4e90 MW	202	atomic_xor_bits(&page->_refcount,
620b4e90 MW	203	1U << (bit + 24));
1e133ab2 MS	204	list_del(&page->lru);
	205	}
	206	}
f28a4b4d	207	spin_unlock_bh(&mm->context.lock);
1e133ab2 MS	208	if (table)
	209	return table;
	210	}
	211	/* Allocate a fresh page */
10d58bf2	212	page = alloc_page(GFP_KERNEL);
1e133ab2 MS	213	if (!page)
	214	return NULL;
	215	if (!pgtable_page_ctor(page)) {
	216	__free_page(page);
	217	return NULL;
	218	}
c9b5ad54	219	arch_set_page_dat(page, 0);
1e133ab2 MS	220	/* Initialize page table */
	221	table = (unsigned long *) page_to_phys(page);
	222	if (mm_alloc_pgste(mm)) {
	223	/* Return 4K page table with PGSTEs */
620b4e90	224	atomic_xor_bits(&page->_refcount, 3 << 24);
41879ff6 HC	225	memset64((u64 *)table, _PAGE_INVALID, PTRS_PER_PTE);
41879ff6 HC	226	memset64((u64 *)table + PTRS_PER_PTE, 0, PTRS_PER_PTE);
1e133ab2 MS	227	} else {
1e133ab2 MS	228	/* Return the first 2K fragment of the page */
620b4e90	229	atomic_xor_bits(&page->_refcount, 1 << 24);
41879ff6	230	memset64((u64 )table, _PAGE_INVALID, 2 PTRS_PER_PTE);
f28a4b4d	231	spin_lock_bh(&mm->context.lock);
1e133ab2	232	list_add(&page->lru, &mm->context.pgtable_list);
f28a4b4d	233	spin_unlock_bh(&mm->context.lock);
1e133ab2 MS	234	}
	235	return table;
	236	}
	237
	238	void page_table_free(struct mm_struct mm, unsigned long table)
	239	{
	240	struct page *page;
	241	unsigned int bit, mask;
	242
	243	page = pfn_to_page(__pa(table) >> PAGE_SHIFT);
	244	if (!mm_alloc_pgste(mm)) {
	245	/* Free 2K page table fragment of a 4K page */
	246	bit = (__pa(table) & ~PAGE_MASK)/(PTRS_PER_PTE*sizeof(pte_t));
f28a4b4d	247	spin_lock_bh(&mm->context.lock);
620b4e90 MW	248	mask = atomic_xor_bits(&page->_refcount, 1U << (bit + 24));
620b4e90 MW	249	mask >>= 24;
1e133ab2 MS	250	if (mask & 3)
	251	list_add(&page->lru, &mm->context.pgtable_list);
	252	else
	253	list_del(&page->lru);
f28a4b4d	254	spin_unlock_bh(&mm->context.lock);
1e133ab2 MS	255	if (mask != 0)
1e133ab2 MS	256	return;
dfa75863 EF	257	} else {
dfa75863 EF	258	atomic_xor_bits(&page->_refcount, 3U << 24);
1e133ab2 MS	259	}
	260
	261	pgtable_page_dtor(page);
1e133ab2 MS	262	__free_page(page);
	263	}
	264
	265	void page_table_free_rcu(struct mmu_gather tlb, unsigned long table,
	266	unsigned long vmaddr)
	267	{
	268	struct mm_struct *mm;
	269	struct page *page;
	270	unsigned int bit, mask;
	271
	272	mm = tlb->mm;
	273	page = pfn_to_page(__pa(table) >> PAGE_SHIFT);
	274	if (mm_alloc_pgste(mm)) {
	275	gmap_unlink(mm, table, vmaddr);
	276	table = (unsigned long *) (__pa(table) \| 3);
	277	tlb_remove_table(tlb, table);
	278	return;
	279	}
	280	bit = (__pa(table) & ~PAGE_MASK) / (PTRS_PER_PTE*sizeof(pte_t));
f28a4b4d	281	spin_lock_bh(&mm->context.lock);
620b4e90 MW	282	mask = atomic_xor_bits(&page->_refcount, 0x11U << (bit + 24));
620b4e90 MW	283	mask >>= 24;
1e133ab2 MS	284	if (mask & 3)
	285	list_add_tail(&page->lru, &mm->context.pgtable_list);
	286	else
	287	list_del(&page->lru);
f28a4b4d	288	spin_unlock_bh(&mm->context.lock);
1e133ab2 MS	289	table = (unsigned long *) (__pa(table) \| (1U << bit));
	290	tlb_remove_table(tlb, table);
	291	}
	292
	293	static void __tlb_remove_table(void *_table)
	294	{
	295	unsigned int mask = (unsigned long) _table & 3;
	296	void table = (void )((unsigned long) _table ^ mask);
	297	struct page *page = pfn_to_page(__pa(table) >> PAGE_SHIFT);
	298
	299	switch (mask) {
1aea9b3f	300	case 0: /* pmd, pud, or p4d */
1e133ab2 MS	301	free_pages((unsigned long) table, 2);
	302	break;
	303	case 1: /* lower 2K of a 4K page table */
	304	case 2: /* higher 2K of a 4K page table */
620b4e90 MW	305	mask = atomic_xor_bits(&page->_refcount, mask << (4 + 24));
	306	mask >>= 24;
	307	if (mask != 0)
1e133ab2 MS	308	break;
	309	/* fallthrough */
	310	case 3: /* 4K page table with pgstes */
dfa75863 EF	311	if (mask & 3)
dfa75863 EF	312	atomic_xor_bits(&page->_refcount, 3 << 24);
1e133ab2	313	pgtable_page_dtor(page);
1e133ab2 MS	314	__free_page(page);
	315	break;
	316	}
	317	}
	318
	319	static void tlb_remove_table_smp_sync(void *arg)
	320	{
	321	/* Simply deliver the interrupt */
	322	}
	323
	324	static void tlb_remove_table_one(void *table)
	325	{
	326	/*
	327	* This isn't an RCU grace period and hence the page-tables cannot be
	328	* assumed to be actually RCU-freed.
	329	*
	330	* It is however sufficient for software page-table walkers that rely
	331	* on IRQ disabling. See the comment near struct mmu_table_batch.
	332	*/
	333	smp_call_function(tlb_remove_table_smp_sync, NULL, 1);
	334	__tlb_remove_table(table);
	335	}
	336
	337	static void tlb_remove_table_rcu(struct rcu_head *head)
	338	{
	339	struct mmu_table_batch *batch;
	340	int i;
	341
	342	batch = container_of(head, struct mmu_table_batch, rcu);
	343
	344	for (i = 0; i < batch->nr; i++)
	345	__tlb_remove_table(batch->tables[i]);
	346
	347	free_page((unsigned long)batch);
	348	}
	349
	350	void tlb_table_flush(struct mmu_gather *tlb)
	351	{
	352	struct mmu_table_batch **batch = &tlb->batch;
	353
	354	if (*batch) {
	355	call_rcu_sched(&(*batch)->rcu, tlb_remove_table_rcu);
	356	*batch = NULL;
	357	}
	358	}
	359
	360	void tlb_remove_table(struct mmu_gather tlb, void table)
	361	{
	362	struct mmu_table_batch **batch = &tlb->batch;
	363
	364	tlb->mm->context.flush_mm = 1;
	365	if (*batch == NULL) {
	366	batch = (struct mmu_table_batch )
	367	__get_free_page(GFP_NOWAIT \| __GFP_NOWARN);
	368	if (*batch == NULL) {
	369	__tlb_flush_mm_lazy(tlb->mm);
	370	tlb_remove_table_one(table);
	371	return;
	372	}
	373	(*batch)->nr = 0;
	374	}
	375	(batch)->tables[(batch)->nr++] = table;
	376	if ((*batch)->nr == MAX_TABLE_BATCH)
	377	tlb_flush_mmu(tlb);
378	}
1caf170d HC	379
	380	/*
	381	* Base infrastructure required to generate basic asces, region, segment,
	382	* and page tables that do not make use of enhanced features like EDAT1.
	383	*/
	384
	385	static struct kmem_cache *base_pgt_cache;
	386
	387	static unsigned long base_pgt_alloc(void)
	388	{
	389	u64 *table;
	390
	391	table = kmem_cache_alloc(base_pgt_cache, GFP_KERNEL);
	392	if (table)
	393	memset64(table, _PAGE_INVALID, PTRS_PER_PTE);
	394	return (unsigned long) table;
	395	}
	396
	397	static void base_pgt_free(unsigned long table)
	398	{
	399	kmem_cache_free(base_pgt_cache, (void *) table);
	400	}
	401
	402	static unsigned long base_crst_alloc(unsigned long val)
	403	{
	404	unsigned long table;
	405
	406	table = __get_free_pages(GFP_KERNEL, CRST_ALLOC_ORDER);
	407	if (table)
	408	crst_table_init((unsigned long *)table, val);
	409	return table;
	410	}
	411
	412	static void base_crst_free(unsigned long table)
	413	{
	414	free_pages(table, CRST_ALLOC_ORDER);
	415	}
	416
	417	#define BASE_ADDR_END_FUNC(NAME, SIZE) \
	418	static inline unsigned long base_##NAME##_addr_end(unsigned long addr, \
	419	unsigned long end) \
	420	{ \
	421	unsigned long next = (addr + (SIZE)) & ~((SIZE) - 1); \
	422	\
	423	return (next - 1) < (end - 1) ? next : end; \
	424	}
	425
	426	BASE_ADDR_END_FUNC(page, _PAGE_SIZE)
	427	BASE_ADDR_END_FUNC(segment, _SEGMENT_SIZE)
	428	BASE_ADDR_END_FUNC(region3, _REGION3_SIZE)
	429	BASE_ADDR_END_FUNC(region2, _REGION2_SIZE)
	430	BASE_ADDR_END_FUNC(region1, _REGION1_SIZE)
	431
	432	static inline unsigned long base_lra(unsigned long address)
	433	{
	434	unsigned long real;
	435
	436	asm volatile(
	437	" lra %0,0(%1)\n"
	438	: "=d" (real) : "a" (address) : "cc");
	439	return real;
	440	}
	441
	442	static int base_page_walk(unsigned long origin, unsigned long addr,
443	unsigned long end, int alloc)
444	{
445	unsigned long *pte, next;
446
447	if (!alloc)
448	return 0;
449	pte = (unsigned long *) origin;
450	pte += (addr & _PAGE_INDEX) >> _PAGE_SHIFT;
451	do {
452	next = base_page_addr_end(addr, end);
453	*pte = base_lra(addr);
454	} while (pte++, addr = next, addr < end);
455	return 0;
456	}
457
458	static int base_segment_walk(unsigned long origin, unsigned long addr,
459	unsigned long end, int alloc)
460	{
461	unsigned long *ste, next, table;
462	int rc;
463
464	ste = (unsigned long *) origin;
465	ste += (addr & _SEGMENT_INDEX) >> _SEGMENT_SHIFT;
466	do {
467	next = base_segment_addr_end(addr, end);
468	if (*ste & _SEGMENT_ENTRY_INVALID) {
469	if (!alloc)
470	continue;
471	table = base_pgt_alloc();
472	if (!table)
473	return -ENOMEM;
474	*ste = table \| _SEGMENT_ENTRY;
475	}
476	table = *ste & _SEGMENT_ENTRY_ORIGIN;
477	rc = base_page_walk(table, addr, next, alloc);
478	if (rc)
479	return rc;
480	if (!alloc)
481	base_pgt_free(table);
482	cond_resched();
483	} while (ste++, addr = next, addr < end);
484	return 0;
485	}
486
487	static int base_region3_walk(unsigned long origin, unsigned long addr,
488	unsigned long end, int alloc)
489	{
490	unsigned long *rtte, next, table;
491	int rc;
492
493	rtte = (unsigned long *) origin;
494	rtte += (addr & _REGION3_INDEX) >> _REGION3_SHIFT;
495	do {
496	next = base_region3_addr_end(addr, end);
497	if (*rtte & _REGION_ENTRY_INVALID) {
498	if (!alloc)
499	continue;
500	table = base_crst_alloc(_SEGMENT_ENTRY_EMPTY);
501	if (!table)
502	return -ENOMEM;
503	*rtte = table \| _REGION3_ENTRY;
504	}
505	table = *rtte & _REGION_ENTRY_ORIGIN;
506	rc = base_segment_walk(table, addr, next, alloc);
507	if (rc)
508	return rc;
509	if (!alloc)
510	base_crst_free(table);
511	} while (rtte++, addr = next, addr < end);
512	return 0;
513	}
514
515	static int base_region2_walk(unsigned long origin, unsigned long addr,
516	unsigned long end, int alloc)
517	{
518	unsigned long *rste, next, table;
519	int rc;
520
521	rste = (unsigned long *) origin;
522	rste += (addr & _REGION2_INDEX) >> _REGION2_SHIFT;
523	do {
524	next = base_region2_addr_end(addr, end);
525	if (*rste & _REGION_ENTRY_INVALID) {
526	if (!alloc)
527	continue;
528	table = base_crst_alloc(_REGION3_ENTRY_EMPTY);
529	if (!table)
530	return -ENOMEM;
531	*rste = table \| _REGION2_ENTRY;
532	}
533	table = *rste & _REGION_ENTRY_ORIGIN;
534	rc = base_region3_walk(table, addr, next, alloc);
535	if (rc)
536	return rc;
537	if (!alloc)
538	base_crst_free(table);
539	} while (rste++, addr = next, addr < end);
540	return 0;
541	}
542
543	static int base_region1_walk(unsigned long origin, unsigned long addr,
544	unsigned long end, int alloc)
545	{
546	unsigned long *rfte, next, table;
547	int rc;
548
549	rfte = (unsigned long *) origin;
550	rfte += (addr & _REGION1_INDEX) >> _REGION1_SHIFT;
551	do {
552	next = base_region1_addr_end(addr, end);
553	if (*rfte & _REGION_ENTRY_INVALID) {
554	if (!alloc)
555	continue;
556	table = base_crst_alloc(_REGION2_ENTRY_EMPTY);
557	if (!table)
558	return -ENOMEM;
559	*rfte = table \| _REGION1_ENTRY;
560	}
561	table = *rfte & _REGION_ENTRY_ORIGIN;
562	rc = base_region2_walk(table, addr, next, alloc);
563	if (rc)
564	return rc;
565	if (!alloc)
566	base_crst_free(table);
567	} while (rfte++, addr = next, addr < end);
568	return 0;
569	}
570
571	/**
572	* base_asce_free - free asce and tables returned from base_asce_alloc()
573	* @asce: asce to be freed
574	*
575	* Frees all region, segment, and page tables that were allocated with a
576	* corresponding base_asce_alloc() call.
577	*/
578	void base_asce_free(unsigned long asce)
579	{
580	unsigned long table = asce & _ASCE_ORIGIN;
581
582	if (!asce)
583	return;
584	switch (asce & _ASCE_TYPE_MASK) {
585	case _ASCE_TYPE_SEGMENT:
586	base_segment_walk(table, 0, _REGION3_SIZE, 0);
587	break;
588	case _ASCE_TYPE_REGION3:
589	base_region3_walk(table, 0, _REGION2_SIZE, 0);
590	break;
591	case _ASCE_TYPE_REGION2:
592	base_region2_walk(table, 0, _REGION1_SIZE, 0);
593	break;
594	case _ASCE_TYPE_REGION1:
595	base_region1_walk(table, 0, -_PAGE_SIZE, 0);
596	break;
597	}
598	base_crst_free(table);
599	}
600
601	static int base_pgt_cache_init(void)
602	{
603	static DEFINE_MUTEX(base_pgt_cache_mutex);
604	unsigned long sz = _PAGE_TABLE_SIZE;
605
606	if (base_pgt_cache)
607	return 0;
608	mutex_lock(&base_pgt_cache_mutex);
609	if (!base_pgt_cache)
610	base_pgt_cache = kmem_cache_create("base_pgt", sz, sz, 0, NULL);
611	mutex_unlock(&base_pgt_cache_mutex);
612	return base_pgt_cache ? 0 : -ENOMEM;
613	}
614
615	/**
616	* base_asce_alloc - create kernel mapping without enhanced DAT features
617	* @addr: virtual start address of kernel mapping
618	* @num_pages: number of consecutive pages
619	*
620	* Generate an asce, including all required region, segment and page tables,
621	* that can be used to access the virtual kernel mapping. The difference is
622	* that the returned asce does not make use of any enhanced DAT features like
623	* e.g. large pages. This is required for some I/O functions that pass an
624	* asce, like e.g. some service call requests.
625	*
626	* Note: the returned asce may NEVER be attached to any cpu. It may only be
627	* used for I/O requests. tlb entries that might result because the
628	* asce was attached to a cpu won't be cleared.
629	*/
630	unsigned long base_asce_alloc(unsigned long addr, unsigned long num_pages)
631	{
632	unsigned long asce, table, end;
633	int rc;
634
635	if (base_pgt_cache_init())
636	return 0;
637	end = addr + num_pages * PAGE_SIZE;
638	if (end <= _REGION3_SIZE) {
639	table = base_crst_alloc(_SEGMENT_ENTRY_EMPTY);
640	if (!table)
641	return 0;
642	rc = base_segment_walk(table, addr, end, 1);
643	asce = table \| _ASCE_TYPE_SEGMENT \| _ASCE_TABLE_LENGTH;
644	} else if (end <= _REGION2_SIZE) {
645	table = base_crst_alloc(_REGION3_ENTRY_EMPTY);
646	if (!table)
647	return 0;
648	rc = base_region3_walk(table, addr, end, 1);
649	asce = table \| _ASCE_TYPE_REGION3 \| _ASCE_TABLE_LENGTH;
650	} else if (end <= _REGION1_SIZE) {
651	table = base_crst_alloc(_REGION2_ENTRY_EMPTY);
652	if (!table)
653	return 0;
654	rc = base_region2_walk(table, addr, end, 1);
655	asce = table \| _ASCE_TYPE_REGION2 \| _ASCE_TABLE_LENGTH;
656	} else {
657	table = base_crst_alloc(_REGION1_ENTRY_EMPTY);
658	if (!table)
659	return 0;
660	rc = base_region1_walk(table, addr, end, 1);
661	asce = table \| _ASCE_TYPE_REGION1 \| _ASCE_TABLE_LENGTH;
662	}
663	if (rc) {
664	base_asce_free(asce);
665	asce = 0;
666	}
667	return asce;
668	}