]> Git Repo - linux.git/blame - arch/powerpc/kvm/book3s_hv.c
projects / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[linux.git] / arch / powerpc / kvm / book3s_hv.c
CommitLineData
de56a948
PM		 1/*
2 * Copyright 2011 Paul Mackerras, IBM Corp. <[email protected]>
3 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
4 *
5 * Authors:
6 * Paul Mackerras <[email protected]>
7 * Alexander Graf <[email protected]>
8 * Kevin Wolf <[email protected]>
9 *
10 * Description: KVM functions specific to running on Book 3S
11 * processors in hypervisor mode (specifically POWER7 and later).
12 *
13 * This file is derived from arch/powerpc/kvm/book3s.c,
14 * by Alexander Graf <[email protected]>.
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License, version 2, as
18 * published by the Free Software Foundation.
19 */
20
21#include <linux/kvm_host.h>
4bb817ed 22#include <linux/kernel.h>
de56a948
PM		 23#include <linux/err.h>
24#include <linux/slab.h>
25#include <linux/preempt.h>
174cd4b1 26#include <linux/sched/signal.h>
03441a34 27#include <linux/sched/stat.h>
de56a948 28#include <linux/delay.h>
66b15db6 29#include <linux/export.h>
de56a948
PM		 30#include <linux/fs.h>
31#include <linux/anon_inodes.h>
07f8ab25 32#include <linux/cpu.h>
de56a948 33#include <linux/cpumask.h>
aa04b4cc
PM		 34#include <linux/spinlock.h>
35#include <linux/page-flags.h>
2c9097e4 36#include <linux/srcu.h>
398a76c6 37#include <linux/miscdevice.h>
e23a808b 38#include <linux/debugfs.h>
d3989143
BH		 39#include <linux/gfp.h>
40#include <linux/vmalloc.h>
41#include <linux/highmem.h>
42#include <linux/hugetlb.h>
43#include <linux/kvm_irqfd.h>
44#include <linux/irqbypass.h>
45#include <linux/module.h>
46#include <linux/compiler.h>
47#include <linux/of.h>
de56a948 48
d6ee76d3 49#include <asm/ftrace.h>
de56a948 50#include <asm/reg.h>
57900694 51#include <asm/ppc-opcode.h>
6de6638b 52#include <asm/asm-prototypes.h>
4bad7779 53#include <asm/archrandom.h>
e303c087 54#include <asm/debug.h>
57900694 55#include <asm/disassemble.h>
de56a948
PM		 56#include <asm/cputable.h>
57#include <asm/cacheflush.h>
7c0f6ba6 58#include <linux/uaccess.h>
de56a948
PM		 59#include <asm/io.h>
60#include <asm/kvm_ppc.h>
61#include <asm/kvm_book3s.h>
62#include <asm/mmu_context.h>
63#include <asm/lppaca.h>
64#include <asm/processor.h>
371fefd6 65#include <asm/cputhreads.h>
aa04b4cc 66#include <asm/page.h>
de1d9248 67#include <asm/hvcall.h>
ae3a197e 68#include <asm/switch_to.h>
512691d4 69#include <asm/smp.h>
66feed61 70#include <asm/dbell.h>
fd7bacbc 71#include <asm/hmi.h>
c57875f5 72#include <asm/pnv-pci.h>
7a84084c 73#include <asm/mmu.h>
f725758b
PM		 74#include <asm/opal.h>
75#include <asm/xics.h>
5af50993 76#include <asm/xive.h>
de56a948 77
3a167bea
AK		 78#include "book3s.h"
79
3c78f78a
SW		 80#define CREATE_TRACE_POINTS
81#include "trace_hv.h"
82
de56a948
PM		 83/* #define EXIT_DEBUG */
84/* #define EXIT_DEBUG_SIMPLE */
85/* #define EXIT_DEBUG_INT */
86
913d3ff9
PM		 87/* Used to indicate that a guest page fault needs to be handled */
88#define RESUME_PAGE_FAULT (RESUME_GUEST | RESUME_FLAG_ARCH1)
f7af5209
SW		 89/* Used to indicate that a guest passthrough interrupt needs to be handled */
90#define RESUME_PASSTHROUGH (RESUME_GUEST | RESUME_FLAG_ARCH2)
913d3ff9 91
c7b67670
PM		 92/* Used as a "null" value for timebase values */
93#define TB_NIL (~(u64)0)
94
699a0ea0
PM		 95static DECLARE_BITMAP(default_enabled_hcalls, MAX_HCALL_OPCODE/4 + 1);
96
b4deba5c 97static int dynamic_mt_modes = 6;
57ad583f 98module_param(dynamic_mt_modes, int, 0644);
b4deba5c 99MODULE_PARM_DESC(dynamic_mt_modes, "Set of allowed dynamic micro-threading modes: 0 (= none), 2, 4, or 6 (= 2 or 4)");
ec257165 100static int target_smt_mode;
57ad583f 101module_param(target_smt_mode, int, 0644);
ec257165 102MODULE_PARM_DESC(target_smt_mode, "Target threads per core (0 = max)");
9678cdaa 103
516f7898
PM		 104static bool indep_threads_mode = true;
105module_param(indep_threads_mode, bool, S_IRUGO | S_IWUSR);
106MODULE_PARM_DESC(indep_threads_mode, "Independent-threads mode (only on POWER9)");
107
aa227864
PM		 108static bool one_vm_per_core;
109module_param(one_vm_per_core, bool, S_IRUGO | S_IWUSR);
110MODULE_PARM_DESC(one_vm_per_core, "Only run vCPUs from the same VM on a core (requires indep_threads_mode=N)");
111
520fe9c6
SW		 112#ifdef CONFIG_KVM_XICS
113static struct kernel_param_ops module_param_ops = {
114 .set = param_set_int,
115 .get = param_get_int,
116};
117
57ad583f 118module_param_cb(kvm_irq_bypass, &module_param_ops, &kvm_irq_bypass, 0644);
644abbb2
SW		 119MODULE_PARM_DESC(kvm_irq_bypass, "Bypass passthrough interrupt optimization");
120
57ad583f 121module_param_cb(h_ipi_redirect, &module_param_ops, &h_ipi_redirect, 0644);
520fe9c6
SW		 122MODULE_PARM_DESC(h_ipi_redirect, "Redirect H_IPI wakeup to a free host core");
123#endif
124
aa069a99
PM		 125/* If set, guests are allowed to create and control nested guests */
126static bool nested = true;
127module_param(nested, bool, S_IRUGO | S_IWUSR);
128MODULE_PARM_DESC(nested, "Enable nested virtualization (only on POWER9)");
129
130static inline bool nesting_enabled(struct kvm *kvm)
131{
132 return kvm->arch.nested_enable && kvm_is_radix(kvm);
133}
134
00608e1f
PM		 135/* If set, the threads on each CPU core have to be in the same MMU mode */
136static bool no_mixing_hpt_and_radix;
137
19ccb76a 138static void kvmppc_end_cede(struct kvm_vcpu *vcpu);
32fad281 139static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu);
19ccb76a 140
7aa15842
PM		 141/*
142 * RWMR values for POWER8. These control the rate at which PURR
143 * and SPURR count and should be set according to the number of
144 * online threads in the vcore being run.
145 */
0abb75b7
NMG		 146#define RWMR_RPA_P8_1THREAD 0x164520C62609AECAUL
147#define RWMR_RPA_P8_2THREAD 0x7FFF2908450D8DA9UL
148#define RWMR_RPA_P8_3THREAD 0x164520C62609AECAUL
149#define RWMR_RPA_P8_4THREAD 0x199A421245058DA9UL
150#define RWMR_RPA_P8_5THREAD 0x164520C62609AECAUL
151#define RWMR_RPA_P8_6THREAD 0x164520C62609AECAUL
152#define RWMR_RPA_P8_7THREAD 0x164520C62609AECAUL
153#define RWMR_RPA_P8_8THREAD 0x164520C62609AECAUL
7aa15842
PM		 154
155static unsigned long p8_rwmr_values[MAX_SMT_THREADS + 1] = {
156 RWMR_RPA_P8_1THREAD,
157 RWMR_RPA_P8_1THREAD,
158 RWMR_RPA_P8_2THREAD,
159 RWMR_RPA_P8_3THREAD,
160 RWMR_RPA_P8_4THREAD,
161 RWMR_RPA_P8_5THREAD,
162 RWMR_RPA_P8_6THREAD,
163 RWMR_RPA_P8_7THREAD,
164 RWMR_RPA_P8_8THREAD,
165};
166
7b5f8272
SJS		 167static inline struct kvm_vcpu *next_runnable_thread(struct kvmppc_vcore *vc,
168 int *ip)
169{
170 int i = *ip;
171 struct kvm_vcpu *vcpu;
172
173 while (++i < MAX_SMT_THREADS) {
174 vcpu = READ_ONCE(vc->runnable_threads[i]);
175 if (vcpu) {
176 *ip = i;
177 return vcpu;
178 }
179 }
180 return NULL;
181}
182
183/* Used to traverse the list of runnable threads for a given vcore */
184#define for_each_runnable_thread(i, vcpu, vc) \
185 for (i = -1; (vcpu = next_runnable_thread(vc, &i)); )
186
66feed61
PM		 187static bool kvmppc_ipi_thread(int cpu)
188{
1704a81c
PM		 189 unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER);
190
f3c18e93
PM		 191 /* If we're a nested hypervisor, fall back to ordinary IPIs for now */
192 if (kvmhv_on_pseries())
193 return false;
194
1704a81c
PM		 195 /* On POWER9 we can use msgsnd to IPI any cpu */
196 if (cpu_has_feature(CPU_FTR_ARCH_300)) {
197 msg |= get_hard_smp_processor_id(cpu);
198 smp_mb();
199 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg));
200 return true;
201 }
202
66feed61
PM		 203 /* On POWER8 for IPIs to threads in the same core, use msgsnd */
204 if (cpu_has_feature(CPU_FTR_ARCH_207S)) {
205 preempt_disable();
206 if (cpu_first_thread_sibling(cpu) ==
207 cpu_first_thread_sibling(smp_processor_id())) {
66feed61
PM		 208 msg |= cpu_thread_in_core(cpu);
209 smp_mb();
210 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg));
211 preempt_enable();
212 return true;
213 }
214 preempt_enable();
215 }
216
217#if defined(CONFIG_PPC_ICP_NATIVE) && defined(CONFIG_SMP)
f725758b 218 if (cpu >= 0 && cpu < nr_cpu_ids) {
d2e60075 219 if (paca_ptrs[cpu]->kvm_hstate.xics_phys) {
f725758b
PM		 220 xics_wake_cpu(cpu);
221 return true;
222 }
223 opal_int_set_mfrr(get_hard_smp_processor_id(cpu), IPI_PRIORITY);
66feed61
PM		 224 return true;
225 }
226#endif
227
228 return false;
229}
230
3a167bea 231static void kvmppc_fast_vcpu_kick_hv(struct kvm_vcpu *vcpu)
54695c30 232{
ec257165 233 int cpu;
8577370f 234 struct swait_queue_head *wqp;
54695c30
BH		 235
236 wqp = kvm_arch_vcpu_wq(vcpu);
267ad7bc 237 if (swq_has_sleeper(wqp)) {
b3dae109 238 swake_up_one(wqp);
54695c30
BH		 239 ++vcpu->stat.halt_wakeup;
240 }
241
3deda5e5
PM		 242 cpu = READ_ONCE(vcpu->arch.thread_cpu);
243 if (cpu >= 0 && kvmppc_ipi_thread(cpu))
66feed61 244 return;
54695c30
BH		 245
246 /* CPU points to the first thread of the core */
ec257165 247 cpu = vcpu->cpu;
66feed61
PM		 248 if (cpu >= 0 && cpu < nr_cpu_ids && cpu_online(cpu))
249 smp_send_reschedule(cpu);
54695c30
BH		 250}
251
c7b67670
PM		 252/*
253 * We use the vcpu_load/put functions to measure stolen time.
254 * Stolen time is counted as time when either the vcpu is able to
255 * run as part of a virtual core, but the task running the vcore
256 * is preempted or sleeping, or when the vcpu needs something done
257 * in the kernel by the task running the vcpu, but that task is
258 * preempted or sleeping. Those two things have to be counted
259 * separately, since one of the vcpu tasks will take on the job
260 * of running the core, and the other vcpu tasks in the vcore will
261 * sleep waiting for it to do that, but that sleep shouldn't count
262 * as stolen time.
263 *
264 * Hence we accumulate stolen time when the vcpu can run as part of
265 * a vcore using vc->stolen_tb, and the stolen time when the vcpu
266 * needs its task to do other things in the kernel (for example,
267 * service a page fault) in busy_stolen. We don't accumulate
268 * stolen time for a vcore when it is inactive, or for a vcpu
269 * when it is in state RUNNING or NOTREADY. NOTREADY is a bit of
270 * a misnomer; it means that the vcpu task is not executing in
271 * the KVM_VCPU_RUN ioctl, i.e. it is in userspace or elsewhere in
272 * the kernel. We don't have any way of dividing up that time
273 * between time that the vcpu is genuinely stopped, time that
274 * the task is actively working on behalf of the vcpu, and time
275 * that the task is preempted, so we don't count any of it as
276 * stolen.
277 *
278 * Updates to busy_stolen are protected by arch.tbacct_lock;
2711e248
PM		 279 * updates to vc->stolen_tb are protected by the vcore->stoltb_lock
280 * lock. The stolen times are measured in units of timebase ticks.
281 * (Note that the != TB_NIL checks below are purely defensive;
282 * they should never fail.)
c7b67670
PM		 283 */
284
ec257165
PM		 285static void kvmppc_core_start_stolen(struct kvmppc_vcore *vc)
286{
287 unsigned long flags;
288
289 spin_lock_irqsave(&vc->stoltb_lock, flags);
290 vc->preempt_tb = mftb();
291 spin_unlock_irqrestore(&vc->stoltb_lock, flags);
292}
293
294static void kvmppc_core_end_stolen(struct kvmppc_vcore *vc)
295{
296 unsigned long flags;
297
298 spin_lock_irqsave(&vc->stoltb_lock, flags);
299 if (vc->preempt_tb != TB_NIL) {
300 vc->stolen_tb += mftb() - vc->preempt_tb;
301 vc->preempt_tb = TB_NIL;
302 }
303 spin_unlock_irqrestore(&vc->stoltb_lock, flags);
304}
305
3a167bea 306static void kvmppc_core_vcpu_load_hv(struct kvm_vcpu *vcpu, int cpu)
de56a948 307{
0456ec4f 308 struct kvmppc_vcore *vc = vcpu->arch.vcore;
bf3d32e1 309 unsigned long flags;
0456ec4f 310
2711e248
PM		 311 /*
312 * We can test vc->runner without taking the vcore lock,
313 * because only this task ever sets vc->runner to this
314 * vcpu, and once it is set to this vcpu, only this task
315 * ever sets it to NULL.
316 */
ec257165
PM		 317 if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING)
318 kvmppc_core_end_stolen(vc);
319
2711e248 320 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags);
c7b67670
PM		 321 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST &&
322 vcpu->arch.busy_preempt != TB_NIL) {
323 vcpu->arch.busy_stolen += mftb() - vcpu->arch.busy_preempt;
324 vcpu->arch.busy_preempt = TB_NIL;
325 }
bf3d32e1 326 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags);
de56a948
PM		 327}
328
3a167bea 329static void kvmppc_core_vcpu_put_hv(struct kvm_vcpu *vcpu)
de56a948 330{
0456ec4f 331 struct kvmppc_vcore *vc = vcpu->arch.vcore;
bf3d32e1 332 unsigned long flags;
0456ec4f 333
ec257165
PM		 334 if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING)
335 kvmppc_core_start_stolen(vc);
336
2711e248 337 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags);
c7b67670
PM		 338 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST)
339 vcpu->arch.busy_preempt = mftb();
bf3d32e1 340 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags);
de56a948
PM		 341}
342
3a167bea 343static void kvmppc_set_msr_hv(struct kvm_vcpu *vcpu, u64 msr)
de56a948 344{
c20875a3
PM		 345 /*
346 * Check for illegal transactional state bit combination
347 * and if we find it, force the TS field to a safe state.
348 */
349 if ((msr & MSR_TS_MASK) == MSR_TS_MASK)
350 msr &= ~MSR_TS_MASK;
de56a948 351 vcpu->arch.shregs.msr = msr;
19ccb76a 352 kvmppc_end_cede(vcpu);
de56a948
PM		 353}
354
5358a963 355static void kvmppc_set_pvr_hv(struct kvm_vcpu *vcpu, u32 pvr)
de56a948
PM		 356{
357 vcpu->arch.pvr = pvr;
358}
359
2ee13be3
SJS		 360/* Dummy value used in computing PCR value below */
361#define PCR_ARCH_300 (PCR_ARCH_207 << 1)
362
5358a963 363static int kvmppc_set_arch_compat(struct kvm_vcpu *vcpu, u32 arch_compat)
388cc6e1 364{
2ee13be3 365 unsigned long host_pcr_bit = 0, guest_pcr_bit = 0;
388cc6e1
PM		 366 struct kvmppc_vcore *vc = vcpu->arch.vcore;
367
2ee13be3
SJS		 368 /* We can (emulate) our own architecture version and anything older */
369 if (cpu_has_feature(CPU_FTR_ARCH_300))
370 host_pcr_bit = PCR_ARCH_300;
371 else if (cpu_has_feature(CPU_FTR_ARCH_207S))
372 host_pcr_bit = PCR_ARCH_207;
373 else if (cpu_has_feature(CPU_FTR_ARCH_206))
374 host_pcr_bit = PCR_ARCH_206;
375 else
376 host_pcr_bit = PCR_ARCH_205;
377
378 /* Determine lowest PCR bit needed to run guest in given PVR level */
379 guest_pcr_bit = host_pcr_bit;
388cc6e1 380 if (arch_compat) {
388cc6e1
PM		 381 switch (arch_compat) {
382 case PVR_ARCH_205:
2ee13be3 383 guest_pcr_bit = PCR_ARCH_205;
388cc6e1
PM		 384 break;
385 case PVR_ARCH_206:
386 case PVR_ARCH_206p:
2ee13be3 387 guest_pcr_bit = PCR_ARCH_206;
5557ae0e
PM		 388 break;
389 case PVR_ARCH_207:
2ee13be3
SJS		 390 guest_pcr_bit = PCR_ARCH_207;
391 break;
392 case PVR_ARCH_300:
393 guest_pcr_bit = PCR_ARCH_300;
388cc6e1
PM		 394 break;
395 default:
396 return -EINVAL;
397 }
398 }
399
2ee13be3
SJS		 400 /* Check requested PCR bits don't exceed our capabilities */
401 if (guest_pcr_bit > host_pcr_bit)
402 return -EINVAL;
403
388cc6e1
PM		 404 spin_lock(&vc->lock);
405 vc->arch_compat = arch_compat;
2ee13be3
SJS		 406 /* Set all PCR bits for which guest_pcr_bit <= bit < host_pcr_bit */
407 vc->pcr = host_pcr_bit - guest_pcr_bit;
388cc6e1
PM		 408 spin_unlock(&vc->lock);
409
410 return 0;
411}
412
5358a963 413static void kvmppc_dump_regs(struct kvm_vcpu *vcpu)
de56a948
PM		 414{
415 int r;
416
417 pr_err("vcpu %p (%d):\n", vcpu, vcpu->vcpu_id);
418 pr_err("pc = %.16lx msr = %.16llx trap = %x\n",
173c520a 419 vcpu->arch.regs.nip, vcpu->arch.shregs.msr, vcpu->arch.trap);
de56a948
PM		 420 for (r = 0; r < 16; ++r)
421 pr_err("r%2d = %.16lx r%d = %.16lx\n",
422 r, kvmppc_get_gpr(vcpu, r),
423 r+16, kvmppc_get_gpr(vcpu, r+16));
424 pr_err("ctr = %.16lx lr = %.16lx\n",
173c520a 425 vcpu->arch.regs.ctr, vcpu->arch.regs.link);
de56a948
PM		 426 pr_err("srr0 = %.16llx srr1 = %.16llx\n",
427 vcpu->arch.shregs.srr0, vcpu->arch.shregs.srr1);
428 pr_err("sprg0 = %.16llx sprg1 = %.16llx\n",
429 vcpu->arch.shregs.sprg0, vcpu->arch.shregs.sprg1);
430 pr_err("sprg2 = %.16llx sprg3 = %.16llx\n",
431 vcpu->arch.shregs.sprg2, vcpu->arch.shregs.sprg3);
fd0944ba
PM		 432 pr_err("cr = %.8lx xer = %.16lx dsisr = %.8x\n",
433 vcpu->arch.regs.ccr, vcpu->arch.regs.xer, vcpu->arch.shregs.dsisr);
de56a948
PM		 434 pr_err("dar = %.16llx\n", vcpu->arch.shregs.dar);
435 pr_err("fault dar = %.16lx dsisr = %.8x\n",
436 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr);
437 pr_err("SLB (%d entries):\n", vcpu->arch.slb_max);
438 for (r = 0; r < vcpu->arch.slb_max; ++r)
439 pr_err(" ESID = %.16llx VSID = %.16llx\n",
440 vcpu->arch.slb[r].orige, vcpu->arch.slb[r].origv);
441 pr_err("lpcr = %.16lx sdr1 = %.16lx last_inst = %.8x\n",
a0144e2a 442 vcpu->arch.vcore->lpcr, vcpu->kvm->arch.sdr1,
de56a948
PM		 443 vcpu->arch.last_inst);
444}
445
5358a963 446static struct kvm_vcpu *kvmppc_find_vcpu(struct kvm *kvm, int id)
a8606e20 447{
e09fefde 448 struct kvm_vcpu *ret;
a8606e20
PM		 449
450 mutex_lock(&kvm->lock);
e09fefde 451 ret = kvm_get_vcpu_by_id(kvm, id);
a8606e20
PM		 452 mutex_unlock(&kvm->lock);
453 return ret;
454}
455
456static void init_vpa(struct kvm_vcpu *vcpu, struct lppaca *vpa)
457{
f13c13a0 458 vpa->__old_status |= LPPACA_OLD_SHARED_PROC;
02407552 459 vpa->yield_count = cpu_to_be32(1);
a8606e20
PM		 460}
461
55b665b0
PM		 462static int set_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *v,
463 unsigned long addr, unsigned long len)
464{
465 /* check address is cacheline aligned */
466 if (addr & (L1_CACHE_BYTES - 1))
467 return -EINVAL;
468 spin_lock(&vcpu->arch.vpa_update_lock);
469 if (v->next_gpa != addr || v->len != len) {
470 v->next_gpa = addr;
471 v->len = addr ? len : 0;
472 v->update_pending = 1;
473 }
474 spin_unlock(&vcpu->arch.vpa_update_lock);
475 return 0;
476}
477
2e25aa5f
PM		 478/* Length for a per-processor buffer is passed in at offset 4 in the buffer */
479struct reg_vpa {
480 u32 dummy;
481 union {
02407552
AG		 482 __be16 hword;
483 __be32 word;
2e25aa5f
PM		 484 } length;
485};
486
487static int vpa_is_registered(struct kvmppc_vpa *vpap)
488{
489 if (vpap->update_pending)
490 return vpap->next_gpa != 0;
491 return vpap->pinned_addr != NULL;
492}
493
a8606e20
PM		 494static unsigned long do_h_register_vpa(struct kvm_vcpu *vcpu,
495 unsigned long flags,
496 unsigned long vcpuid, unsigned long vpa)
497{
498 struct kvm *kvm = vcpu->kvm;
93e60249 499 unsigned long len, nb;
a8606e20
PM		 500 void *va;
501 struct kvm_vcpu *tvcpu;
2e25aa5f
PM		 502 int err;
503 int subfunc;
504 struct kvmppc_vpa *vpap;
a8606e20
PM		 505
506 tvcpu = kvmppc_find_vcpu(kvm, vcpuid);
507 if (!tvcpu)
508 return H_PARAMETER;
509
2e25aa5f
PM		 510 subfunc = (flags >> H_VPA_FUNC_SHIFT) & H_VPA_FUNC_MASK;
511 if (subfunc == H_VPA_REG_VPA || subfunc == H_VPA_REG_DTL ||
512 subfunc == H_VPA_REG_SLB) {
513 /* Registering new area - address must be cache-line aligned */
514 if ((vpa & (L1_CACHE_BYTES - 1)) || !vpa)
a8606e20 515 return H_PARAMETER;
2e25aa5f
PM		 516
517 /* convert logical addr to kernel addr and read length */
93e60249
PM		 518 va = kvmppc_pin_guest_page(kvm, vpa, &nb);
519 if (va == NULL)
b2b2f165 520 return H_PARAMETER;
2e25aa5f 521 if (subfunc == H_VPA_REG_VPA)
02407552 522 len = be16_to_cpu(((struct reg_vpa *)va)->length.hword);
a8606e20 523 else
02407552 524 len = be32_to_cpu(((struct reg_vpa *)va)->length.word);
c35635ef 525 kvmppc_unpin_guest_page(kvm, va, vpa, false);
2e25aa5f
PM		 526
527 /* Check length */
528 if (len > nb || len < sizeof(struct reg_vpa))
529 return H_PARAMETER;
530 } else {
531 vpa = 0;
532 len = 0;
533 }
534
535 err = H_PARAMETER;
536 vpap = NULL;
537 spin_lock(&tvcpu->arch.vpa_update_lock);
538
539 switch (subfunc) {
540 case H_VPA_REG_VPA: /* register VPA */
eaac112e
NP		 541 /*
542 * The size of our lppaca is 1kB because of the way we align
543 * it for the guest to avoid crossing a 4kB boundary. We only
544 * use 640 bytes of the structure though, so we should accept
545 * clients that set a size of 640.
546 */
499dcd41
NP		 547 BUILD_BUG_ON(sizeof(struct lppaca) != 640);
548 if (len < sizeof(struct lppaca))
a8606e20 549 break;
2e25aa5f
PM		 550 vpap = &tvcpu->arch.vpa;
551 err = 0;
552 break;
553
554 case H_VPA_REG_DTL: /* register DTL */
555 if (len < sizeof(struct dtl_entry))
a8606e20 556 break;
2e25aa5f
PM		 557 len -= len % sizeof(struct dtl_entry);
558
559 /* Check that they have previously registered a VPA */
560 err = H_RESOURCE;
561 if (!vpa_is_registered(&tvcpu->arch.vpa))
a8606e20 562 break;
2e25aa5f
PM		 563
564 vpap = &tvcpu->arch.dtl;
565 err = 0;
566 break;
567
568 case H_VPA_REG_SLB: /* register SLB shadow buffer */
569 /* Check that they have previously registered a VPA */
570 err = H_RESOURCE;
571 if (!vpa_is_registered(&tvcpu->arch.vpa))
a8606e20 572 break;
2e25aa5f
PM		 573
574 vpap = &tvcpu->arch.slb_shadow;
575 err = 0;
576 break;
577
578 case H_VPA_DEREG_VPA: /* deregister VPA */
579 /* Check they don't still have a DTL or SLB buf registered */
580 err = H_RESOURCE;
581 if (vpa_is_registered(&tvcpu->arch.dtl) ||
582 vpa_is_registered(&tvcpu->arch.slb_shadow))
a8606e20 583 break;
2e25aa5f
PM		 584
585 vpap = &tvcpu->arch.vpa;
586 err = 0;
587 break;
588
589 case H_VPA_DEREG_DTL: /* deregister DTL */
590 vpap = &tvcpu->arch.dtl;
591 err = 0;
592 break;
593
594 case H_VPA_DEREG_SLB: /* deregister SLB shadow buffer */
595 vpap = &tvcpu->arch.slb_shadow;
596 err = 0;
597 break;
598 }
599
600 if (vpap) {
601 vpap->next_gpa = vpa;
602 vpap->len = len;
603 vpap->update_pending = 1;
a8606e20 604 }
93e60249 605
2e25aa5f
PM		 606 spin_unlock(&tvcpu->arch.vpa_update_lock);
607
93e60249 608 return err;
a8606e20
PM		 609}
610
081f323b 611static void kvmppc_update_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *vpap)
2e25aa5f 612{
081f323b 613 struct kvm *kvm = vcpu->kvm;
2e25aa5f
PM		 614 void *va;
615 unsigned long nb;
081f323b 616 unsigned long gpa;
2e25aa5f 617
081f323b
PM		 618 /*
619 * We need to pin the page pointed to by vpap->next_gpa,
620 * but we can't call kvmppc_pin_guest_page under the lock
621 * as it does get_user_pages() and down_read(). So we
622 * have to drop the lock, pin the page, then get the lock
623 * again and check that a new area didn't get registered
624 * in the meantime.
625 */
626 for (;;) {
627 gpa = vpap->next_gpa;
628 spin_unlock(&vcpu->arch.vpa_update_lock);
629 va = NULL;
630 nb = 0;
631 if (gpa)
c35635ef 632 va = kvmppc_pin_guest_page(kvm, gpa, &nb);
081f323b
PM		 633 spin_lock(&vcpu->arch.vpa_update_lock);
634 if (gpa == vpap->next_gpa)
635 break;
636 /* sigh... unpin that one and try again */
637 if (va)
c35635ef 638 kvmppc_unpin_guest_page(kvm, va, gpa, false);
081f323b
PM		 639 }
640
641 vpap->update_pending = 0;
642 if (va && nb < vpap->len) {
643 /*
644 * If it's now too short, it must be that userspace
645 * has changed the mappings underlying guest memory,
646 * so unregister the region.
647 */
c35635ef 648 kvmppc_unpin_guest_page(kvm, va, gpa, false);
081f323b 649 va = NULL;
2e25aa5f
PM		 650 }
651 if (vpap->pinned_addr)
c35635ef
PM		 652 kvmppc_unpin_guest_page(kvm, vpap->pinned_addr, vpap->gpa,
653 vpap->dirty);
654 vpap->gpa = gpa;
2e25aa5f 655 vpap->pinned_addr = va;
c35635ef 656 vpap->dirty = false;
2e25aa5f
PM		 657 if (va)
658 vpap->pinned_end = va + vpap->len;
659}
660
661static void kvmppc_update_vpas(struct kvm_vcpu *vcpu)
662{
2f12f034
PM		 663 if (!(vcpu->arch.vpa.update_pending ||
664 vcpu->arch.slb_shadow.update_pending ||
665 vcpu->arch.dtl.update_pending))
666 return;
667
2e25aa5f
PM		 668 spin_lock(&vcpu->arch.vpa_update_lock);
669 if (vcpu->arch.vpa.update_pending) {
081f323b 670 kvmppc_update_vpa(vcpu, &vcpu->arch.vpa);
55b665b0
PM		 671 if (vcpu->arch.vpa.pinned_addr)
672 init_vpa(vcpu, vcpu->arch.vpa.pinned_addr);
2e25aa5f
PM		 673 }
674 if (vcpu->arch.dtl.update_pending) {
081f323b 675 kvmppc_update_vpa(vcpu, &vcpu->arch.dtl);
2e25aa5f
PM		 676 vcpu->arch.dtl_ptr = vcpu->arch.dtl.pinned_addr;
677 vcpu->arch.dtl_index = 0;
678 }
679 if (vcpu->arch.slb_shadow.update_pending)
081f323b 680 kvmppc_update_vpa(vcpu, &vcpu->arch.slb_shadow);
2e25aa5f
PM		 681 spin_unlock(&vcpu->arch.vpa_update_lock);
682}
683
c7b67670
PM		 684/*
685 * Return the accumulated stolen time for the vcore up until `now'.
686 * The caller should hold the vcore lock.
687 */
688static u64 vcore_stolen_time(struct kvmppc_vcore *vc, u64 now)
689{
690 u64 p;
2711e248 691 unsigned long flags;
c7b67670 692
2711e248
PM		 693 spin_lock_irqsave(&vc->stoltb_lock, flags);
694 p = vc->stolen_tb;
c7b67670 695 if (vc->vcore_state != VCORE_INACTIVE &&
2711e248
PM		 696 vc->preempt_tb != TB_NIL)
697 p += now - vc->preempt_tb;
698 spin_unlock_irqrestore(&vc->stoltb_lock, flags);
c7b67670
PM		 699 return p;
700}
701
0456ec4f
PM		 702static void kvmppc_create_dtl_entry(struct kvm_vcpu *vcpu,
703 struct kvmppc_vcore *vc)
704{
705 struct dtl_entry *dt;
706 struct lppaca *vpa;
c7b67670
PM		 707 unsigned long stolen;
708 unsigned long core_stolen;
709 u64 now;
8b24e69f 710 unsigned long flags;
0456ec4f
PM		 711
712 dt = vcpu->arch.dtl_ptr;
713 vpa = vcpu->arch.vpa.pinned_addr;
c7b67670
PM		 714 now = mftb();
715 core_stolen = vcore_stolen_time(vc, now);
716 stolen = core_stolen - vcpu->arch.stolen_logged;
717 vcpu->arch.stolen_logged = core_stolen;
8b24e69f 718 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags);
c7b67670
PM		 719 stolen += vcpu->arch.busy_stolen;
720 vcpu->arch.busy_stolen = 0;
8b24e69f 721 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags);
0456ec4f
PM		 722 if (!dt || !vpa)
723 return;
724 memset(dt, 0, sizeof(struct dtl_entry));
725 dt->dispatch_reason = 7;
02407552
AG		 726 dt->processor_id = cpu_to_be16(vc->pcpu + vcpu->arch.ptid);
727 dt->timebase = cpu_to_be64(now + vc->tb_offset);
728 dt->enqueue_to_dispatch_time = cpu_to_be32(stolen);
729 dt->srr0 = cpu_to_be64(kvmppc_get_pc(vcpu));
730 dt->srr1 = cpu_to_be64(vcpu->arch.shregs.msr);
0456ec4f
PM		 731 ++dt;
732 if (dt == vcpu->arch.dtl.pinned_end)
733 dt = vcpu->arch.dtl.pinned_addr;
734 vcpu->arch.dtl_ptr = dt;
735 /* order writing *dt vs. writing vpa->dtl_idx */
736 smp_wmb();
02407552 737 vpa->dtl_idx = cpu_to_be64(++vcpu->arch.dtl_index);
c35635ef 738 vcpu->arch.dtl.dirty = true;
0456ec4f
PM		 739}
740
1da4e2f4
PM		 741/* See if there is a doorbell interrupt pending for a vcpu */
742static bool kvmppc_doorbell_pending(struct kvm_vcpu *vcpu)
743{
744 int thr;
745 struct kvmppc_vcore *vc;
746
57900694
PM		 747 if (vcpu->arch.doorbell_request)
748 return true;
749 /*
750 * Ensure that the read of vcore->dpdes comes after the read
751 * of vcpu->doorbell_request. This barrier matches the
f7035ce9 752 * smb_wmb() in kvmppc_guest_entry_inject().
57900694
PM		 753 */
754 smp_rmb();
1da4e2f4
PM		 755 vc = vcpu->arch.vcore;
756 thr = vcpu->vcpu_id - vc->first_vcpuid;
757 return !!(vc->dpdes & (1 << thr));
758}
759
9642382e
MN		 760static bool kvmppc_power8_compatible(struct kvm_vcpu *vcpu)
761{
762 if (vcpu->arch.vcore->arch_compat >= PVR_ARCH_207)
763 return true;
764 if ((!vcpu->arch.vcore->arch_compat) &&
765 cpu_has_feature(CPU_FTR_ARCH_207S))
766 return true;
767 return false;
768}
769
770static int kvmppc_h_set_mode(struct kvm_vcpu *vcpu, unsigned long mflags,
771 unsigned long resource, unsigned long value1,
772 unsigned long value2)
773{
774 switch (resource) {
775 case H_SET_MODE_RESOURCE_SET_CIABR:
776 if (!kvmppc_power8_compatible(vcpu))
777 return H_P2;
778 if (value2)
779 return H_P4;
780 if (mflags)
781 return H_UNSUPPORTED_FLAG_START;
782 /* Guests can't breakpoint the hypervisor */
783 if ((value1 & CIABR_PRIV) == CIABR_PRIV_HYPER)
784 return H_P3;
785 vcpu->arch.ciabr = value1;
786 return H_SUCCESS;
787 case H_SET_MODE_RESOURCE_SET_DAWR:
788 if (!kvmppc_power8_compatible(vcpu))
789 return H_P2;
398e712c
MN		 790 if (!ppc_breakpoint_available())
791 return H_P2;
9642382e
MN		 792 if (mflags)
793 return H_UNSUPPORTED_FLAG_START;
794 if (value2 & DABRX_HYP)
795 return H_P4;
796 vcpu->arch.dawr = value1;
797 vcpu->arch.dawrx = value2;
798 return H_SUCCESS;
799 default:
800 return H_TOO_HARD;
801 }
802}
803
90fd09f8
SB		 804static int kvm_arch_vcpu_yield_to(struct kvm_vcpu *target)
805{
806 struct kvmppc_vcore *vcore = target->arch.vcore;
807
808 /*
809 * We expect to have been called by the real mode handler
810 * (kvmppc_rm_h_confer()) which would have directly returned
811 * H_SUCCESS if the source vcore wasn't idle (e.g. if it may
812 * have useful work to do and should not confer) so we don't
813 * recheck that here.
814 */
815
816 spin_lock(&vcore->lock);
817 if (target->arch.state == KVMPPC_VCPU_RUNNABLE &&
ec257165
PM		 818 vcore->vcore_state != VCORE_INACTIVE &&
819 vcore->runner)
90fd09f8
SB		 820 target = vcore->runner;
821 spin_unlock(&vcore->lock);
822
823 return kvm_vcpu_yield_to(target);
824}
825
826static int kvmppc_get_yield_count(struct kvm_vcpu *vcpu)
827{
828 int yield_count = 0;
829 struct lppaca *lppaca;
830
831 spin_lock(&vcpu->arch.vpa_update_lock);
832 lppaca = (struct lppaca *)vcpu->arch.vpa.pinned_addr;
833 if (lppaca)
ecb6d618 834 yield_count = be32_to_cpu(lppaca->yield_count);
90fd09f8
SB		 835 spin_unlock(&vcpu->arch.vpa_update_lock);
836 return yield_count;
837}
838
a8606e20
PM		 839int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu)
840{
841 unsigned long req = kvmppc_get_gpr(vcpu, 3);
842 unsigned long target, ret = H_SUCCESS;
90fd09f8 843 int yield_count;
a8606e20 844 struct kvm_vcpu *tvcpu;
8e591cb7 845 int idx, rc;
a8606e20 846
699a0ea0
PM		 847 if (req <= MAX_HCALL_OPCODE &&
848 !test_bit(req/4, vcpu->kvm->arch.enabled_hcalls))
849 return RESUME_HOST;
850
a8606e20
PM		 851 switch (req) {
852 case H_CEDE:
a8606e20
PM		 853 break;
854 case H_PROD:
855 target = kvmppc_get_gpr(vcpu, 4);
856 tvcpu = kvmppc_find_vcpu(vcpu->kvm, target);
857 if (!tvcpu) {
858 ret = H_PARAMETER;
859 break;
860 }
861 tvcpu->arch.prodded = 1;
862 smp_mb();
8464c884
PM		 863 if (tvcpu->arch.ceded)
864 kvmppc_fast_vcpu_kick_hv(tvcpu);
a8606e20
PM		 865 break;
866 case H_CONFER:
42d7604d
PM		 867 target = kvmppc_get_gpr(vcpu, 4);
868 if (target == -1)
869 break;
870 tvcpu = kvmppc_find_vcpu(vcpu->kvm, target);
871 if (!tvcpu) {
872 ret = H_PARAMETER;
873 break;
874 }
90fd09f8
SB		 875 yield_count = kvmppc_get_gpr(vcpu, 5);
876 if (kvmppc_get_yield_count(tvcpu) != yield_count)
877 break;
878 kvm_arch_vcpu_yield_to(tvcpu);
a8606e20
PM		 879 break;
880 case H_REGISTER_VPA:
881 ret = do_h_register_vpa(vcpu, kvmppc_get_gpr(vcpu, 4),
882 kvmppc_get_gpr(vcpu, 5),
883 kvmppc_get_gpr(vcpu, 6));
884 break;
8e591cb7
ME		 885 case H_RTAS:
886 if (list_empty(&vcpu->kvm->arch.rtas_tokens))
887 return RESUME_HOST;
888
c9438092 889 idx = srcu_read_lock(&vcpu->kvm->srcu);
8e591cb7 890 rc = kvmppc_rtas_hcall(vcpu);
c9438092 891 srcu_read_unlock(&vcpu->kvm->srcu, idx);
8e591cb7
ME		 892
893 if (rc == -ENOENT)
894 return RESUME_HOST;
895 else if (rc == 0)
896 break;
897
898 /* Send the error out to userspace via KVM_RUN */
899 return rc;
99342cf8
DG		 900 case H_LOGICAL_CI_LOAD:
901 ret = kvmppc_h_logical_ci_load(vcpu);
902 if (ret == H_TOO_HARD)
903 return RESUME_HOST;
904 break;
905 case H_LOGICAL_CI_STORE:
906 ret = kvmppc_h_logical_ci_store(vcpu);
907 if (ret == H_TOO_HARD)
908 return RESUME_HOST;
909 break;
9642382e
MN		 910 case H_SET_MODE:
911 ret = kvmppc_h_set_mode(vcpu, kvmppc_get_gpr(vcpu, 4),
912 kvmppc_get_gpr(vcpu, 5),
913 kvmppc_get_gpr(vcpu, 6),
914 kvmppc_get_gpr(vcpu, 7));
915 if (ret == H_TOO_HARD)
916 return RESUME_HOST;
917 break;
bc5ad3f3
BH		 918 case H_XIRR:
919 case H_CPPR:
920 case H_EOI:
921 case H_IPI:
8e44ddc3
PM		 922 case H_IPOLL:
923 case H_XIRR_X:
bc5ad3f3 924 if (kvmppc_xics_enabled(vcpu)) {
5af50993
BH		 925 if (xive_enabled()) {
926 ret = H_NOT_AVAILABLE;
927 return RESUME_GUEST;
928 }
bc5ad3f3
BH		 929 ret = kvmppc_xics_hcall(vcpu, req);
930 break;
d3695aa4
AK		 931 }
932 return RESUME_HOST;
4bad7779
PM		 933 case H_SET_DABR:
934 ret = kvmppc_h_set_dabr(vcpu, kvmppc_get_gpr(vcpu, 4));
935 break;
936 case H_SET_XDABR:
937 ret = kvmppc_h_set_xdabr(vcpu, kvmppc_get_gpr(vcpu, 4),
938 kvmppc_get_gpr(vcpu, 5));
939 break;
940 case H_GET_TCE:
941 ret = kvmppc_h_get_tce(vcpu, kvmppc_get_gpr(vcpu, 4),
942 kvmppc_get_gpr(vcpu, 5));
943 if (ret == H_TOO_HARD)
944 return RESUME_HOST;
945 break;
d3695aa4
AK		 946 case H_PUT_TCE:
947 ret = kvmppc_h_put_tce(vcpu, kvmppc_get_gpr(vcpu, 4),
948 kvmppc_get_gpr(vcpu, 5),
949 kvmppc_get_gpr(vcpu, 6));
950 if (ret == H_TOO_HARD)
951 return RESUME_HOST;
952 break;
953 case H_PUT_TCE_INDIRECT:
954 ret = kvmppc_h_put_tce_indirect(vcpu, kvmppc_get_gpr(vcpu, 4),
955 kvmppc_get_gpr(vcpu, 5),
956 kvmppc_get_gpr(vcpu, 6),
957 kvmppc_get_gpr(vcpu, 7));
958 if (ret == H_TOO_HARD)
959 return RESUME_HOST;
960 break;
961 case H_STUFF_TCE:
962 ret = kvmppc_h_stuff_tce(vcpu, kvmppc_get_gpr(vcpu, 4),
963 kvmppc_get_gpr(vcpu, 5),
964 kvmppc_get_gpr(vcpu, 6),
965 kvmppc_get_gpr(vcpu, 7));
966 if (ret == H_TOO_HARD)
967 return RESUME_HOST;
968 break;
4bad7779
PM		 969 case H_RANDOM:
970 if (!powernv_get_random_long(&vcpu->arch.regs.gpr[4]))
971 ret = H_HARDWARE;
972 break;
8e3f5fc1
PM		 973
974 case H_SET_PARTITION_TABLE:
975 ret = H_FUNCTION;
aa069a99 976 if (nesting_enabled(vcpu->kvm))
8e3f5fc1
PM		 977 ret = kvmhv_set_partition_table(vcpu);
978 break;
979 case H_ENTER_NESTED:
980 ret = H_FUNCTION;
aa069a99 981 if (!nesting_enabled(vcpu->kvm))
360cae31
PM		 982 break;
983 ret = kvmhv_enter_nested_guest(vcpu);
984 if (ret == H_INTERRUPT) {
985 kvmppc_set_gpr(vcpu, 3, 0);
6c08ec12 986 vcpu->arch.hcall_needed = 0;
360cae31
PM		 987 return -EINTR;
988 }
8e3f5fc1
PM		 989 break;
990 case H_TLB_INVALIDATE:
991 ret = H_FUNCTION;
aa069a99
PM		 992 if (nesting_enabled(vcpu->kvm))
993 ret = kvmhv_do_nested_tlbie(vcpu);
8e3f5fc1
PM		 994 break;
995
a8606e20
PM		 996 default:
997 return RESUME_HOST;
998 }
999 kvmppc_set_gpr(vcpu, 3, ret);
1000 vcpu->arch.hcall_needed = 0;
1001 return RESUME_GUEST;
1002}
1003
4bad7779
PM		 1004/*
1005 * Handle H_CEDE in the nested virtualization case where we haven't
1006 * called the real-mode hcall handlers in book3s_hv_rmhandlers.S.
1007 * This has to be done early, not in kvmppc_pseries_do_hcall(), so
1008 * that the cede logic in kvmppc_run_single_vcpu() works properly.
1009 */
1010static void kvmppc_nested_cede(struct kvm_vcpu *vcpu)
1011{
1012 vcpu->arch.shregs.msr |= MSR_EE;
1013 vcpu->arch.ceded = 1;
1014 smp_mb();
1015 if (vcpu->arch.prodded) {
1016 vcpu->arch.prodded = 0;
1017 smp_mb();
1018 vcpu->arch.ceded = 0;
1019 }
1020}
1021
ae2113a4
PM		 1022static int kvmppc_hcall_impl_hv(unsigned long cmd)
1023{
1024 switch (cmd) {
1025 case H_CEDE:
1026 case H_PROD:
1027 case H_CONFER:
1028 case H_REGISTER_VPA:
9642382e 1029 case H_SET_MODE:
99342cf8
DG		 1030 case H_LOGICAL_CI_LOAD:
1031 case H_LOGICAL_CI_STORE:
ae2113a4
PM		 1032#ifdef CONFIG_KVM_XICS
1033 case H_XIRR:
1034 case H_CPPR:
1035 case H_EOI:
1036 case H_IPI:
1037 case H_IPOLL:
1038 case H_XIRR_X:
1039#endif
1040 return 1;
1041 }
1042
1043 /* See if it's in the real-mode table */
1044 return kvmppc_hcall_impl_hv_realmode(cmd);
1045}
1046
a59c1d9e
MS		 1047static int kvmppc_emulate_debug_inst(struct kvm_run *run,
1048 struct kvm_vcpu *vcpu)
1049{
1050 u32 last_inst;
1051
1052 if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst) !=
1053 EMULATE_DONE) {
1054 /*
1055 * Fetch failed, so return to guest and
1056 * try executing it again.
1057 */
1058 return RESUME_GUEST;
1059 }
1060
1061 if (last_inst == KVMPPC_INST_SW_BREAKPOINT) {
1062 run->exit_reason = KVM_EXIT_DEBUG;
1063 run->debug.arch.address = kvmppc_get_pc(vcpu);
1064 return RESUME_HOST;
1065 } else {
1066 kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
1067 return RESUME_GUEST;
1068 }
1069}
1070
57900694
PM		 1071static void do_nothing(void *x)
1072{
1073}
1074
1075static unsigned long kvmppc_read_dpdes(struct kvm_vcpu *vcpu)
1076{
1077 int thr, cpu, pcpu, nthreads;
1078 struct kvm_vcpu *v;
1079 unsigned long dpdes;
1080
1081 nthreads = vcpu->kvm->arch.emul_smt_mode;
1082 dpdes = 0;
1083 cpu = vcpu->vcpu_id & ~(nthreads - 1);
1084 for (thr = 0; thr < nthreads; ++thr, ++cpu) {
1085 v = kvmppc_find_vcpu(vcpu->kvm, cpu);
1086 if (!v)
1087 continue;
1088 /*
1089 * If the vcpu is currently running on a physical cpu thread,
1090 * interrupt it in order to pull it out of the guest briefly,
1091 * which will update its vcore->dpdes value.
1092 */
1093 pcpu = READ_ONCE(v->cpu);
1094 if (pcpu >= 0)
1095 smp_call_function_single(pcpu, do_nothing, NULL, 1);
1096 if (kvmppc_doorbell_pending(v))
1097 dpdes |= 1 << thr;
1098 }
1099 return dpdes;
1100}
1101
1102/*
1103 * On POWER9, emulate doorbell-related instructions in order to
1104 * give the guest the illusion of running on a multi-threaded core.
1105 * The instructions emulated are msgsndp, msgclrp, mfspr TIR,
1106 * and mfspr DPDES.
1107 */
1108static int kvmppc_emulate_doorbell_instr(struct kvm_vcpu *vcpu)
1109{
1110 u32 inst, rb, thr;
1111 unsigned long arg;
1112 struct kvm *kvm = vcpu->kvm;
1113 struct kvm_vcpu *tvcpu;
1114
57900694
PM		 1115 if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &inst) != EMULATE_DONE)
1116 return RESUME_GUEST;
1117 if (get_op(inst) != 31)
1118 return EMULATE_FAIL;
1119 rb = get_rb(inst);
1120 thr = vcpu->vcpu_id & (kvm->arch.emul_smt_mode - 1);
1121 switch (get_xop(inst)) {
1122 case OP_31_XOP_MSGSNDP:
1123 arg = kvmppc_get_gpr(vcpu, rb);
1124 if (((arg >> 27) & 0xf) != PPC_DBELL_SERVER)
1125 break;
1126 arg &= 0x3f;
1127 if (arg >= kvm->arch.emul_smt_mode)
1128 break;
1129 tvcpu = kvmppc_find_vcpu(kvm, vcpu->vcpu_id - thr + arg);
1130 if (!tvcpu)
1131 break;
1132 if (!tvcpu->arch.doorbell_request) {
1133 tvcpu->arch.doorbell_request = 1;
1134 kvmppc_fast_vcpu_kick_hv(tvcpu);
1135 }
1136 break;
1137 case OP_31_XOP_MSGCLRP:
1138 arg = kvmppc_get_gpr(vcpu, rb);
1139 if (((arg >> 27) & 0xf) != PPC_DBELL_SERVER)
1140 break;
1141 vcpu->arch.vcore->dpdes = 0;
1142 vcpu->arch.doorbell_request = 0;
1143 break;
1144 case OP_31_XOP_MFSPR:
1145 switch (get_sprn(inst)) {
1146 case SPRN_TIR:
1147 arg = thr;
1148 break;
1149 case SPRN_DPDES:
1150 arg = kvmppc_read_dpdes(vcpu);
1151 break;
1152 default:
1153 return EMULATE_FAIL;
1154 }
1155 kvmppc_set_gpr(vcpu, get_rt(inst), arg);
1156 break;
1157 default:
1158 return EMULATE_FAIL;
1159 }
1160 kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4);
1161 return RESUME_GUEST;
1162}
1163
3a167bea
AK		 1164static int kvmppc_handle_exit_hv(struct kvm_run *run, struct kvm_vcpu *vcpu,
1165 struct task_struct *tsk)
de56a948
PM		 1166{
1167 int r = RESUME_HOST;
1168
1169 vcpu->stat.sum_exits++;
1170
1c9e3d51
PM		 1171 /*
1172 * This can happen if an interrupt occurs in the last stages
1173 * of guest entry or the first stages of guest exit (i.e. after
1174 * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV
1175 * and before setting it to KVM_GUEST_MODE_HOST_HV).
1176 * That can happen due to a bug, or due to a machine check
1177 * occurring at just the wrong time.
1178 */
1179 if (vcpu->arch.shregs.msr & MSR_HV) {
1180 printk(KERN_EMERG "KVM trap in HV mode!\n");
1181 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n",
1182 vcpu->arch.trap, kvmppc_get_pc(vcpu),
1183 vcpu->arch.shregs.msr);
1184 kvmppc_dump_regs(vcpu);
1185 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1186 run->hw.hardware_exit_reason = vcpu->arch.trap;
1187 return RESUME_HOST;
1188 }
de56a948
PM		 1189 run->exit_reason = KVM_EXIT_UNKNOWN;
1190 run->ready_for_interrupt_injection = 1;
1191 switch (vcpu->arch.trap) {
1192 /* We're good on these - the host merely wanted to get our attention */
1193 case BOOK3S_INTERRUPT_HV_DECREMENTER:
1194 vcpu->stat.dec_exits++;
1195 r = RESUME_GUEST;
1196 break;
1197 case BOOK3S_INTERRUPT_EXTERNAL:
5d00f66b 1198 case BOOK3S_INTERRUPT_H_DOORBELL:
84f7139c 1199 case BOOK3S_INTERRUPT_H_VIRT:
de56a948
PM		 1200 vcpu->stat.ext_intr_exits++;
1201 r = RESUME_GUEST;
1202 break;
6de6638b 1203 /* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/
dee6f24c 1204 case BOOK3S_INTERRUPT_HMI:
de56a948 1205 case BOOK3S_INTERRUPT_PERFMON:
6de6638b 1206 case BOOK3S_INTERRUPT_SYSTEM_RESET:
de56a948
PM		 1207 r = RESUME_GUEST;
1208 break;
b4072df4 1209 case BOOK3S_INTERRUPT_MACHINE_CHECK:
e20bbd3d
AP		 1210 /* Exit to guest with KVM_EXIT_NMI as exit reason */
1211 run->exit_reason = KVM_EXIT_NMI;
1212 run->hw.hardware_exit_reason = vcpu->arch.trap;
1213 /* Clear out the old NMI status from run->flags */
1214 run->flags &= ~KVM_RUN_PPC_NMI_DISP_MASK;
1215 /* Now set the NMI status */
1216 if (vcpu->arch.mce_evt.disposition == MCE_DISPOSITION_RECOVERED)
1217 run->flags |= KVM_RUN_PPC_NMI_DISP_FULLY_RECOV;
1218 else
1219 run->flags |= KVM_RUN_PPC_NMI_DISP_NOT_RECOV;
1220
1221 r = RESUME_HOST;
1222 /* Print the MCE event to host console. */
1223 machine_check_print_event_info(&vcpu->arch.mce_evt, false);
b4072df4 1224 break;
de56a948
PM		 1225 case BOOK3S_INTERRUPT_PROGRAM:
1226 {
1227 ulong flags;
1228 /*
1229 * Normally program interrupts are delivered directly
1230 * to the guest by the hardware, but we can get here
1231 * as a result of a hypervisor emulation interrupt
1232 * (e40) getting turned into a 700 by BML RTAS.
1233 */
1234 flags = vcpu->arch.shregs.msr & 0x1f0000ull;
1235 kvmppc_core_queue_program(vcpu, flags);
1236 r = RESUME_GUEST;
1237 break;
1238 }
1239 case BOOK3S_INTERRUPT_SYSCALL:
1240 {
1241 /* hcall - punt to userspace */
1242 int i;
1243
27025a60
LPF		 1244 /* hypercall with MSR_PR has already been handled in rmode,
1245 * and never reaches here.
1246 */
1247
de56a948
PM		 1248 run->papr_hcall.nr = kvmppc_get_gpr(vcpu, 3);
1249 for (i = 0; i < 9; ++i)
1250 run->papr_hcall.args[i] = kvmppc_get_gpr(vcpu, 4 + i);
1251 run->exit_reason = KVM_EXIT_PAPR_HCALL;
1252 vcpu->arch.hcall_needed = 1;
1253 r = RESUME_HOST;
1254 break;
1255 }
1256 /*
342d3db7
PM		 1257 * We get these next two if the guest accesses a page which it thinks
1258 * it has mapped but which is not actually present, either because
1259 * it is for an emulated I/O device or because the corresonding
1260 * host page has been paged out. Any other HDSI/HISI interrupts
1261 * have been handled already.
de56a948
PM		 1262 */
1263 case BOOK3S_INTERRUPT_H_DATA_STORAGE:
913d3ff9 1264 r = RESUME_PAGE_FAULT;
de56a948
PM		 1265 break;
1266 case BOOK3S_INTERRUPT_H_INST_STORAGE:
913d3ff9 1267 vcpu->arch.fault_dar = kvmppc_get_pc(vcpu);
32eb150a
PM		 1268 vcpu->arch.fault_dsisr = vcpu->arch.shregs.msr &
1269 DSISR_SRR1_MATCH_64S;
1270 if (vcpu->arch.shregs.msr & HSRR1_HISI_WRITE)
1271 vcpu->arch.fault_dsisr |= DSISR_ISSTORE;
913d3ff9 1272 r = RESUME_PAGE_FAULT;
de56a948
PM		 1273 break;
1274 /*
1275 * This occurs if the guest executes an illegal instruction.
a59c1d9e
MS		 1276 * If the guest debug is disabled, generate a program interrupt
1277 * to the guest. If guest debug is enabled, we need to check
1278 * whether the instruction is a software breakpoint instruction.
1279 * Accordingly return to Guest or Host.
de56a948
PM		 1280 */
1281 case BOOK3S_INTERRUPT_H_EMUL_ASSIST:
4a157d61
PM		 1282 if (vcpu->arch.emul_inst != KVM_INST_FETCH_FAILED)
1283 vcpu->arch.last_inst = kvmppc_need_byteswap(vcpu) ?
1284 swab32(vcpu->arch.emul_inst) :
1285 vcpu->arch.emul_inst;
a59c1d9e
MS		 1286 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) {
1287 r = kvmppc_emulate_debug_inst(run, vcpu);
1288 } else {
1289 kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
1290 r = RESUME_GUEST;
1291 }
bd3048b8
ME		 1292 break;
1293 /*
1294 * This occurs if the guest (kernel or userspace), does something that
57900694
PM		 1295 * is prohibited by HFSCR.
1296 * On POWER9, this could be a doorbell instruction that we need
1297 * to emulate.
1298 * Otherwise, we just generate a program interrupt to the guest.
bd3048b8
ME		 1299 */
1300 case BOOK3S_INTERRUPT_H_FAC_UNAVAIL:
57900694 1301 r = EMULATE_FAIL;
36ee41d1 1302 if (((vcpu->arch.hfscr >> 56) == FSCR_MSGP_LG) &&
53655ddd 1303 cpu_has_feature(CPU_FTR_ARCH_300))
57900694
PM		 1304 r = kvmppc_emulate_doorbell_instr(vcpu);
1305 if (r == EMULATE_FAIL) {
1306 kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
1307 r = RESUME_GUEST;
1308 }
de56a948 1309 break;
4bb3c7a0
PM		 1310
1311#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1312 case BOOK3S_INTERRUPT_HV_SOFTPATCH:
1313 /*
1314 * This occurs for various TM-related instructions that
1315 * we need to emulate on POWER9 DD2.2. We have already
1316 * handled the cases where the guest was in real-suspend
1317 * mode and was transitioning to transactional state.
1318 */
1319 r = kvmhv_p9_tm_emulation(vcpu);
1320 break;
1321#endif
1322
f7af5209
SW		 1323 case BOOK3S_INTERRUPT_HV_RM_HARD:
1324 r = RESUME_PASSTHROUGH;
1325 break;
de56a948
PM		 1326 default:
1327 kvmppc_dump_regs(vcpu);
1328 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n",
1329 vcpu->arch.trap, kvmppc_get_pc(vcpu),
1330 vcpu->arch.shregs.msr);
f3271d4c 1331 run->hw.hardware_exit_reason = vcpu->arch.trap;
de56a948 1332 r = RESUME_HOST;
de56a948
PM		 1333 break;
1334 }
1335
de56a948
PM		 1336 return r;
1337}
1338
360cae31
PM		 1339static int kvmppc_handle_nested_exit(struct kvm_vcpu *vcpu)
1340{
1341 int r;
1342 int srcu_idx;
1343
1344 vcpu->stat.sum_exits++;
1345
1346 /*
1347 * This can happen if an interrupt occurs in the last stages
1348 * of guest entry or the first stages of guest exit (i.e. after
1349 * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV
1350 * and before setting it to KVM_GUEST_MODE_HOST_HV).
1351 * That can happen due to a bug, or due to a machine check
1352 * occurring at just the wrong time.
1353 */
1354 if (vcpu->arch.shregs.msr & MSR_HV) {
1355 pr_emerg("KVM trap in HV mode while nested!\n");
1356 pr_emerg("trap=0x%x | pc=0x%lx | msr=0x%llx\n",
1357 vcpu->arch.trap, kvmppc_get_pc(vcpu),
1358 vcpu->arch.shregs.msr);
1359 kvmppc_dump_regs(vcpu);
1360 return RESUME_HOST;
1361 }
1362 switch (vcpu->arch.trap) {
1363 /* We're good on these - the host merely wanted to get our attention */
1364 case BOOK3S_INTERRUPT_HV_DECREMENTER:
1365 vcpu->stat.dec_exits++;
1366 r = RESUME_GUEST;
1367 break;
1368 case BOOK3S_INTERRUPT_EXTERNAL:
1369 vcpu->stat.ext_intr_exits++;
1370 r = RESUME_HOST;
1371 break;
1372 case BOOK3S_INTERRUPT_H_DOORBELL:
1373 case BOOK3S_INTERRUPT_H_VIRT:
1374 vcpu->stat.ext_intr_exits++;
1375 r = RESUME_GUEST;
1376 break;
1377 /* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/
1378 case BOOK3S_INTERRUPT_HMI:
1379 case BOOK3S_INTERRUPT_PERFMON:
1380 case BOOK3S_INTERRUPT_SYSTEM_RESET:
1381 r = RESUME_GUEST;
1382 break;
1383 case BOOK3S_INTERRUPT_MACHINE_CHECK:
1384 /* Pass the machine check to the L1 guest */
1385 r = RESUME_HOST;
1386 /* Print the MCE event to host console. */
1387 machine_check_print_event_info(&vcpu->arch.mce_evt, false);
1388 break;
1389 /*
1390 * We get these next two if the guest accesses a page which it thinks
1391 * it has mapped but which is not actually present, either because
1392 * it is for an emulated I/O device or because the corresonding
1393 * host page has been paged out.
1394 */
1395 case BOOK3S_INTERRUPT_H_DATA_STORAGE:
1396 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
1397 r = kvmhv_nested_page_fault(vcpu);
1398 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
1399 break;
1400 case BOOK3S_INTERRUPT_H_INST_STORAGE:
1401 vcpu->arch.fault_dar = kvmppc_get_pc(vcpu);
1402 vcpu->arch.fault_dsisr = kvmppc_get_msr(vcpu) &
1403 DSISR_SRR1_MATCH_64S;
1404 if (vcpu->arch.shregs.msr & HSRR1_HISI_WRITE)
1405 vcpu->arch.fault_dsisr |= DSISR_ISSTORE;
1406 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
1407 r = kvmhv_nested_page_fault(vcpu);
1408 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
1409 break;
1410
1411#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1412 case BOOK3S_INTERRUPT_HV_SOFTPATCH:
1413 /*
1414 * This occurs for various TM-related instructions that
1415 * we need to emulate on POWER9 DD2.2. We have already
1416 * handled the cases where the guest was in real-suspend
1417 * mode and was transitioning to transactional state.
1418 */
1419 r = kvmhv_p9_tm_emulation(vcpu);
1420 break;
1421#endif
1422
1423 case BOOK3S_INTERRUPT_HV_RM_HARD:
1424 vcpu->arch.trap = 0;
1425 r = RESUME_GUEST;
1426 if (!xive_enabled())
1427 kvmppc_xics_rm_complete(vcpu, 0);
1428 break;
1429 default:
1430 r = RESUME_HOST;
1431 break;
1432 }
1433
1434 return r;
1435}
1436
3a167bea
AK		 1437static int kvm_arch_vcpu_ioctl_get_sregs_hv(struct kvm_vcpu *vcpu,
1438 struct kvm_sregs *sregs)
de56a948
PM		 1439{
1440 int i;
1441
de56a948 1442 memset(sregs, 0, sizeof(struct kvm_sregs));
87916442 1443 sregs->pvr = vcpu->arch.pvr;
de56a948
PM		 1444 for (i = 0; i < vcpu->arch.slb_max; i++) {
1445 sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige;
1446 sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv;
1447 }
1448
1449 return 0;
1450}
1451
3a167bea
AK		 1452static int kvm_arch_vcpu_ioctl_set_sregs_hv(struct kvm_vcpu *vcpu,
1453 struct kvm_sregs *sregs)
de56a948
PM		 1454{
1455 int i, j;
1456
9333e6c4
PM		 1457 /* Only accept the same PVR as the host's, since we can't spoof it */
1458 if (sregs->pvr != vcpu->arch.pvr)
1459 return -EINVAL;
de56a948
PM		 1460
1461 j = 0;
1462 for (i = 0; i < vcpu->arch.slb_nr; i++) {
1463 if (sregs->u.s.ppc64.slb[i].slbe & SLB_ESID_V) {
1464 vcpu->arch.slb[j].orige = sregs->u.s.ppc64.slb[i].slbe;
1465 vcpu->arch.slb[j].origv = sregs->u.s.ppc64.slb[i].slbv;
1466 ++j;
1467 }
1468 }
1469 vcpu->arch.slb_max = j;
1470
1471 return 0;
1472}
1473
a0840240
AK		 1474static void kvmppc_set_lpcr(struct kvm_vcpu *vcpu, u64 new_lpcr,
1475 bool preserve_top32)
a0144e2a 1476{
8f902b00 1477 struct kvm *kvm = vcpu->kvm;
a0144e2a
PM		 1478 struct kvmppc_vcore *vc = vcpu->arch.vcore;
1479 u64 mask;
1480
8f902b00 1481 mutex_lock(&kvm->lock);
a0144e2a 1482 spin_lock(&vc->lock);
d682916a
AB		 1483 /*
1484 * If ILE (interrupt little-endian) has changed, update the
1485 * MSR_LE bit in the intr_msr for each vcpu in this vcore.
1486 */
1487 if ((new_lpcr & LPCR_ILE) != (vc->lpcr & LPCR_ILE)) {
d682916a
AB		 1488 struct kvm_vcpu *vcpu;
1489 int i;
1490
d682916a
AB		 1491 kvm_for_each_vcpu(i, vcpu, kvm) {
1492 if (vcpu->arch.vcore != vc)
1493 continue;
1494 if (new_lpcr & LPCR_ILE)
1495 vcpu->arch.intr_msr |= MSR_LE;
1496 else
1497 vcpu->arch.intr_msr &= ~MSR_LE;
1498 }
d682916a
AB		 1499 }
1500
a0144e2a
PM		 1501 /*
1502 * Userspace can only modify DPFD (default prefetch depth),
1503 * ILE (interrupt little-endian) and TC (translation control).
8cf4ecc0 1504 * On POWER8 and POWER9 userspace can also modify AIL (alt. interrupt loc.).
a0144e2a
PM		 1505 */
1506 mask = LPCR_DPFD | LPCR_ILE | LPCR_TC;
e0622bd9
PM		 1507 if (cpu_has_feature(CPU_FTR_ARCH_207S))
1508 mask |= LPCR_AIL;
1bc3fe81
PM		 1509 /*
1510 * On POWER9, allow userspace to enable large decrementer for the
1511 * guest, whether or not the host has it enabled.
1512 */
1513 if (cpu_has_feature(CPU_FTR_ARCH_300))
1514 mask |= LPCR_LD;
a0840240
AK		 1515
1516 /* Broken 32-bit version of LPCR must not clear top bits */
1517 if (preserve_top32)
1518 mask &= 0xFFFFFFFF;
a0144e2a
PM		 1519 vc->lpcr = (vc->lpcr & ~mask) | (new_lpcr & mask);
1520 spin_unlock(&vc->lock);
8f902b00 1521 mutex_unlock(&kvm->lock);
a0144e2a
PM		 1522}
1523
3a167bea
AK		 1524static int kvmppc_get_one_reg_hv(struct kvm_vcpu *vcpu, u64 id,
1525 union kvmppc_one_reg *val)
31f3438e 1526{
a136a8bd
PM		 1527 int r = 0;
1528 long int i;
31f3438e 1529
a136a8bd 1530 switch (id) {
a59c1d9e
MS		 1531 case KVM_REG_PPC_DEBUG_INST:
1532 *val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT);
1533 break;
31f3438e 1534 case KVM_REG_PPC_HIOR:
a136a8bd
PM		 1535 *val = get_reg_val(id, 0);
1536 break;
1537 case KVM_REG_PPC_DABR:
1538 *val = get_reg_val(id, vcpu->arch.dabr);
1539 break;
8563bf52
PM		 1540 case KVM_REG_PPC_DABRX:
1541 *val = get_reg_val(id, vcpu->arch.dabrx);
1542 break;
a136a8bd
PM		 1543 case KVM_REG_PPC_DSCR:
1544 *val = get_reg_val(id, vcpu->arch.dscr);
1545 break;
1546 case KVM_REG_PPC_PURR:
1547 *val = get_reg_val(id, vcpu->arch.purr);
1548 break;
1549 case KVM_REG_PPC_SPURR:
1550 *val = get_reg_val(id, vcpu->arch.spurr);
1551 break;
1552 case KVM_REG_PPC_AMR:
1553 *val = get_reg_val(id, vcpu->arch.amr);
1554 break;
1555 case KVM_REG_PPC_UAMOR:
1556 *val = get_reg_val(id, vcpu->arch.uamor);
1557 break;
b005255e 1558 case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCRS:
a136a8bd
PM		 1559 i = id - KVM_REG_PPC_MMCR0;
1560 *val = get_reg_val(id, vcpu->arch.mmcr[i]);
1561 break;
1562 case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8:
1563 i = id - KVM_REG_PPC_PMC1;
1564 *val = get_reg_val(id, vcpu->arch.pmc[i]);
31f3438e 1565 break;
b005255e
MN		 1566 case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2:
1567 i = id - KVM_REG_PPC_SPMC1;
1568 *val = get_reg_val(id, vcpu->arch.spmc[i]);
1569 break;
14941789
PM		 1570 case KVM_REG_PPC_SIAR:
1571 *val = get_reg_val(id, vcpu->arch.siar);
1572 break;
1573 case KVM_REG_PPC_SDAR:
1574 *val = get_reg_val(id, vcpu->arch.sdar);
1575 break;
b005255e
MN		 1576 case KVM_REG_PPC_SIER:
1577 *val = get_reg_val(id, vcpu->arch.sier);
a8bd19ef 1578 break;
b005255e
MN		 1579 case KVM_REG_PPC_IAMR:
1580 *val = get_reg_val(id, vcpu->arch.iamr);
1581 break;
b005255e
MN		 1582 case KVM_REG_PPC_PSPB:
1583 *val = get_reg_val(id, vcpu->arch.pspb);
1584 break;
b005255e
MN		 1585 case KVM_REG_PPC_DPDES:
1586 *val = get_reg_val(id, vcpu->arch.vcore->dpdes);
1587 break;
88b02cf9
PM		 1588 case KVM_REG_PPC_VTB:
1589 *val = get_reg_val(id, vcpu->arch.vcore->vtb);
1590 break;
b005255e
MN		 1591 case KVM_REG_PPC_DAWR:
1592 *val = get_reg_val(id, vcpu->arch.dawr);
1593 break;
1594 case KVM_REG_PPC_DAWRX:
1595 *val = get_reg_val(id, vcpu->arch.dawrx);
1596 break;
1597 case KVM_REG_PPC_CIABR:
1598 *val = get_reg_val(id, vcpu->arch.ciabr);
1599 break;
b005255e
MN		 1600 case KVM_REG_PPC_CSIGR:
1601 *val = get_reg_val(id, vcpu->arch.csigr);
1602 break;
1603 case KVM_REG_PPC_TACR:
1604 *val = get_reg_val(id, vcpu->arch.tacr);
1605 break;
1606 case KVM_REG_PPC_TCSCR:
1607 *val = get_reg_val(id, vcpu->arch.tcscr);
1608 break;
1609 case KVM_REG_PPC_PID:
1610 *val = get_reg_val(id, vcpu->arch.pid);
1611 break;
1612 case KVM_REG_PPC_ACOP:
1613 *val = get_reg_val(id, vcpu->arch.acop);
1614 break;
1615 case KVM_REG_PPC_WORT:
1616 *val = get_reg_val(id, vcpu->arch.wort);
a8bd19ef 1617 break;
e9cf1e08
PM		 1618 case KVM_REG_PPC_TIDR:
1619 *val = get_reg_val(id, vcpu->arch.tid);
1620 break;
1621 case KVM_REG_PPC_PSSCR:
1622 *val = get_reg_val(id, vcpu->arch.psscr);
1623 break;
55b665b0
PM		 1624 case KVM_REG_PPC_VPA_ADDR:
1625 spin_lock(&vcpu->arch.vpa_update_lock);
1626 *val = get_reg_val(id, vcpu->arch.vpa.next_gpa);
1627 spin_unlock(&vcpu->arch.vpa_update_lock);
1628 break;
1629 case KVM_REG_PPC_VPA_SLB:
1630 spin_lock(&vcpu->arch.vpa_update_lock);
1631 val->vpaval.addr = vcpu->arch.slb_shadow.next_gpa;
1632 val->vpaval.length = vcpu->arch.slb_shadow.len;
1633 spin_unlock(&vcpu->arch.vpa_update_lock);
1634 break;
1635 case KVM_REG_PPC_VPA_DTL:
1636 spin_lock(&vcpu->arch.vpa_update_lock);
1637 val->vpaval.addr = vcpu->arch.dtl.next_gpa;
1638 val->vpaval.length = vcpu->arch.dtl.len;
1639 spin_unlock(&vcpu->arch.vpa_update_lock);
1640 break;
93b0f4dc
PM		 1641 case KVM_REG_PPC_TB_OFFSET:
1642 *val = get_reg_val(id, vcpu->arch.vcore->tb_offset);
1643 break;
a0144e2a 1644 case KVM_REG_PPC_LPCR:
a0840240 1645 case KVM_REG_PPC_LPCR_64:
a0144e2a
PM		 1646 *val = get_reg_val(id, vcpu->arch.vcore->lpcr);
1647 break;
4b8473c9
PM		 1648 case KVM_REG_PPC_PPR:
1649 *val = get_reg_val(id, vcpu->arch.ppr);
1650 break;
a7d80d01
MN		 1651#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1652 case KVM_REG_PPC_TFHAR:
1653 *val = get_reg_val(id, vcpu->arch.tfhar);
1654 break;
1655 case KVM_REG_PPC_TFIAR:
1656 *val = get_reg_val(id, vcpu->arch.tfiar);
1657 break;
1658 case KVM_REG_PPC_TEXASR:
1659 *val = get_reg_val(id, vcpu->arch.texasr);
1660 break;
1661 case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31:
1662 i = id - KVM_REG_PPC_TM_GPR0;
1663 *val = get_reg_val(id, vcpu->arch.gpr_tm[i]);
1664 break;
1665 case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63:
1666 {
1667 int j;
1668 i = id - KVM_REG_PPC_TM_VSR0;
1669 if (i < 32)
1670 for (j = 0; j < TS_FPRWIDTH; j++)
1671 val->vsxval[j] = vcpu->arch.fp_tm.fpr[i][j];
1672 else {
1673 if (cpu_has_feature(CPU_FTR_ALTIVEC))
1674 val->vval = vcpu->arch.vr_tm.vr[i-32];
1675 else
1676 r = -ENXIO;
1677 }
1678 break;
1679 }
1680 case KVM_REG_PPC_TM_CR:
1681 *val = get_reg_val(id, vcpu->arch.cr_tm);
1682 break;
0d808df0
PM		 1683 case KVM_REG_PPC_TM_XER:
1684 *val = get_reg_val(id, vcpu->arch.xer_tm);
1685 break;
a7d80d01
MN		 1686 case KVM_REG_PPC_TM_LR:
1687 *val = get_reg_val(id, vcpu->arch.lr_tm);
1688 break;
1689 case KVM_REG_PPC_TM_CTR:
1690 *val = get_reg_val(id, vcpu->arch.ctr_tm);
1691 break;
1692 case KVM_REG_PPC_TM_FPSCR:
1693 *val = get_reg_val(id, vcpu->arch.fp_tm.fpscr);
1694 break;
1695 case KVM_REG_PPC_TM_AMR:
1696 *val = get_reg_val(id, vcpu->arch.amr_tm);
1697 break;
1698 case KVM_REG_PPC_TM_PPR:
1699 *val = get_reg_val(id, vcpu->arch.ppr_tm);
1700 break;
1701 case KVM_REG_PPC_TM_VRSAVE:
1702 *val = get_reg_val(id, vcpu->arch.vrsave_tm);
1703 break;
1704 case KVM_REG_PPC_TM_VSCR:
1705 if (cpu_has_feature(CPU_FTR_ALTIVEC))
1706 *val = get_reg_val(id, vcpu->arch.vr_tm.vscr.u[3]);
1707 else
1708 r = -ENXIO;
1709 break;
1710 case KVM_REG_PPC_TM_DSCR:
1711 *val = get_reg_val(id, vcpu->arch.dscr_tm);
1712 break;
1713 case KVM_REG_PPC_TM_TAR:
1714 *val = get_reg_val(id, vcpu->arch.tar_tm);
1715 break;
1716#endif
388cc6e1
PM		 1717 case KVM_REG_PPC_ARCH_COMPAT:
1718 *val = get_reg_val(id, vcpu->arch.vcore->arch_compat);
1719 break;
5855564c
PM		 1720 case KVM_REG_PPC_DEC_EXPIRY:
1721 *val = get_reg_val(id, vcpu->arch.dec_expires +
1722 vcpu->arch.vcore->tb_offset);
1723 break;
a1f15826
PM		 1724 case KVM_REG_PPC_ONLINE:
1725 *val = get_reg_val(id, vcpu->arch.online);
1726 break;
30323418
PM		 1727 case KVM_REG_PPC_PTCR:
1728 *val = get_reg_val(id, vcpu->kvm->arch.l1_ptcr);
1729 break;
31f3438e 1730 default:
a136a8bd 1731 r = -EINVAL;
31f3438e
PM		 1732 break;
1733 }
1734
1735 return r;
1736}
1737
3a167bea
AK		 1738static int kvmppc_set_one_reg_hv(struct kvm_vcpu *vcpu, u64 id,
1739 union kvmppc_one_reg *val)
31f3438e 1740{
a136a8bd
PM		 1741 int r = 0;
1742 long int i;
55b665b0 1743 unsigned long addr, len;
31f3438e 1744
a136a8bd 1745 switch (id) {
31f3438e 1746 case KVM_REG_PPC_HIOR:
31f3438e 1747 /* Only allow this to be set to zero */
a136a8bd 1748 if (set_reg_val(id, *val))
31f3438e
PM		 1749 r = -EINVAL;
1750 break;
a136a8bd
PM		 1751 case KVM_REG_PPC_DABR:
1752 vcpu->arch.dabr = set_reg_val(id, *val);
1753 break;
8563bf52
PM		 1754 case KVM_REG_PPC_DABRX:
1755 vcpu->arch.dabrx = set_reg_val(id, *val) & ~DABRX_HYP;
1756 break;
a136a8bd
PM		 1757 case KVM_REG_PPC_DSCR:
1758 vcpu->arch.dscr = set_reg_val(id, *val);
1759 break;
1760 case KVM_REG_PPC_PURR:
1761 vcpu->arch.purr = set_reg_val(id, *val);
1762 break;
1763 case KVM_REG_PPC_SPURR:
1764 vcpu->arch.spurr = set_reg_val(id, *val);
1765 break;
1766 case KVM_REG_PPC_AMR:
1767 vcpu->arch.amr = set_reg_val(id, *val);
1768 break;
1769 case KVM_REG_PPC_UAMOR:
1770 vcpu->arch.uamor = set_reg_val(id, *val);
1771 break;
b005255e 1772 case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCRS:
a136a8bd
PM		 1773 i = id - KVM_REG_PPC_MMCR0;
1774 vcpu->arch.mmcr[i] = set_reg_val(id, *val);
1775 break;
1776 case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8:
1777 i = id - KVM_REG_PPC_PMC1;
1778 vcpu->arch.pmc[i] = set_reg_val(id, *val);
1779 break;
b005255e
MN		 1780 case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2:
1781 i = id - KVM_REG_PPC_SPMC1;
1782 vcpu->arch.spmc[i] = set_reg_val(id, *val);
1783 break;
14941789
PM		 1784 case KVM_REG_PPC_SIAR:
1785 vcpu->arch.siar = set_reg_val(id, *val);
1786 break;
1787 case KVM_REG_PPC_SDAR:
1788 vcpu->arch.sdar = set_reg_val(id, *val);
1789 break;
b005255e
MN		 1790 case KVM_REG_PPC_SIER:
1791 vcpu->arch.sier = set_reg_val(id, *val);
a8bd19ef 1792 break;
b005255e
MN		 1793 case KVM_REG_PPC_IAMR:
1794 vcpu->arch.iamr = set_reg_val(id, *val);
1795 break;
b005255e
MN		 1796 case KVM_REG_PPC_PSPB:
1797 vcpu->arch.pspb = set_reg_val(id, *val);
1798 break;
b005255e
MN		 1799 case KVM_REG_PPC_DPDES:
1800 vcpu->arch.vcore->dpdes = set_reg_val(id, *val);
1801 break;
88b02cf9
PM		 1802 case KVM_REG_PPC_VTB:
1803 vcpu->arch.vcore->vtb = set_reg_val(id, *val);
1804 break;
b005255e
MN		 1805 case KVM_REG_PPC_DAWR:
1806 vcpu->arch.dawr = set_reg_val(id, *val);
1807 break;
1808 case KVM_REG_PPC_DAWRX:
1809 vcpu->arch.dawrx = set_reg_val(id, *val) & ~DAWRX_HYP;
1810 break;
1811 case KVM_REG_PPC_CIABR:
1812 vcpu->arch.ciabr = set_reg_val(id, *val);
1813 /* Don't allow setting breakpoints in hypervisor code */
1814 if ((vcpu->arch.ciabr & CIABR_PRIV) == CIABR_PRIV_HYPER)
1815 vcpu->arch.ciabr &= ~CIABR_PRIV; /* disable */
1816 break;
b005255e
MN		 1817 case KVM_REG_PPC_CSIGR:
1818 vcpu->arch.csigr = set_reg_val(id, *val);
1819 break;
1820 case KVM_REG_PPC_TACR:
1821 vcpu->arch.tacr = set_reg_val(id, *val);
1822 break;
1823 case KVM_REG_PPC_TCSCR:
1824 vcpu->arch.tcscr = set_reg_val(id, *val);
1825 break;
1826 case KVM_REG_PPC_PID:
1827 vcpu->arch.pid = set_reg_val(id, *val);
1828 break;
1829 case KVM_REG_PPC_ACOP:
1830 vcpu->arch.acop = set_reg_val(id, *val);
1831 break;
1832 case KVM_REG_PPC_WORT:
1833 vcpu->arch.wort = set_reg_val(id, *val);
a8bd19ef 1834 break;
e9cf1e08
PM		 1835 case KVM_REG_PPC_TIDR:
1836 vcpu->arch.tid = set_reg_val(id, *val);
1837 break;
1838 case KVM_REG_PPC_PSSCR:
1839 vcpu->arch.psscr = set_reg_val(id, *val) & PSSCR_GUEST_VIS;
1840 break;
55b665b0
PM		 1841 case KVM_REG_PPC_VPA_ADDR:
1842 addr = set_reg_val(id, *val);
1843 r = -EINVAL;
1844 if (!addr && (vcpu->arch.slb_shadow.next_gpa ||
1845 vcpu->arch.dtl.next_gpa))
1846 break;
1847 r = set_vpa(vcpu, &vcpu->arch.vpa, addr, sizeof(struct lppaca));
1848 break;
1849 case KVM_REG_PPC_VPA_SLB:
1850 addr = val->vpaval.addr;
1851 len = val->vpaval.length;
1852 r = -EINVAL;
1853 if (addr && !vcpu->arch.vpa.next_gpa)
1854 break;
1855 r = set_vpa(vcpu, &vcpu->arch.slb_shadow, addr, len);
1856 break;
1857 case KVM_REG_PPC_VPA_DTL:
1858 addr = val->vpaval.addr;
1859 len = val->vpaval.length;
1860 r = -EINVAL;
9f8c8c78
PM		 1861 if (addr && (len < sizeof(struct dtl_entry) ||
1862 !vcpu->arch.vpa.next_gpa))
55b665b0
PM		 1863 break;
1864 len -= len % sizeof(struct dtl_entry);
1865 r = set_vpa(vcpu, &vcpu->arch.dtl, addr, len);
1866 break;
93b0f4dc
PM		 1867 case KVM_REG_PPC_TB_OFFSET:
1868 /* round up to multiple of 2^24 */
1869 vcpu->arch.vcore->tb_offset =
1870 ALIGN(set_reg_val(id, *val), 1UL << 24);
1871 break;
a0144e2a 1872 case KVM_REG_PPC_LPCR:
a0840240
AK		 1873 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), true);
1874 break;
1875 case KVM_REG_PPC_LPCR_64:
1876 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), false);
a0144e2a 1877 break;
4b8473c9
PM		 1878 case KVM_REG_PPC_PPR:
1879 vcpu->arch.ppr = set_reg_val(id, *val);
1880 break;
a7d80d01
MN		 1881#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1882 case KVM_REG_PPC_TFHAR:
1883 vcpu->arch.tfhar = set_reg_val(id, *val);
1884 break;
1885 case KVM_REG_PPC_TFIAR:
1886 vcpu->arch.tfiar = set_reg_val(id, *val);
1887 break;
1888 case KVM_REG_PPC_TEXASR:
1889 vcpu->arch.texasr = set_reg_val(id, *val);
1890 break;
1891 case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31:
1892 i = id - KVM_REG_PPC_TM_GPR0;
1893 vcpu->arch.gpr_tm[i] = set_reg_val(id, *val);
1894 break;
1895 case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63:
1896 {
1897 int j;
1898 i = id - KVM_REG_PPC_TM_VSR0;
1899 if (i < 32)
1900 for (j = 0; j < TS_FPRWIDTH; j++)
1901 vcpu->arch.fp_tm.fpr[i][j] = val->vsxval[j];
1902 else
1903 if (cpu_has_feature(CPU_FTR_ALTIVEC))
1904 vcpu->arch.vr_tm.vr[i-32] = val->vval;
1905 else
1906 r = -ENXIO;
1907 break;
1908 }
1909 case KVM_REG_PPC_TM_CR:
1910 vcpu->arch.cr_tm = set_reg_val(id, *val);
1911 break;
0d808df0
PM		 1912 case KVM_REG_PPC_TM_XER:
1913 vcpu->arch.xer_tm = set_reg_val(id, *val);
1914 break;
a7d80d01
MN		 1915 case KVM_REG_PPC_TM_LR:
1916 vcpu->arch.lr_tm = set_reg_val(id, *val);
1917 break;
1918 case KVM_REG_PPC_TM_CTR:
1919 vcpu->arch.ctr_tm = set_reg_val(id, *val);
1920 break;
1921 case KVM_REG_PPC_TM_FPSCR:
1922 vcpu->arch.fp_tm.fpscr = set_reg_val(id, *val);
1923 break;
1924 case KVM_REG_PPC_TM_AMR:
1925 vcpu->arch.amr_tm = set_reg_val(id, *val);
1926 break;
1927 case KVM_REG_PPC_TM_PPR:
1928 vcpu->arch.ppr_tm = set_reg_val(id, *val);
1929 break;
1930 case KVM_REG_PPC_TM_VRSAVE:
1931 vcpu->arch.vrsave_tm = set_reg_val(id, *val);
1932 break;
1933 case KVM_REG_PPC_TM_VSCR:
1934 if (cpu_has_feature(CPU_FTR_ALTIVEC))
1935 vcpu->arch.vr.vscr.u[3] = set_reg_val(id, *val);
1936 else
1937 r = - ENXIO;
1938 break;
1939 case KVM_REG_PPC_TM_DSCR:
1940 vcpu->arch.dscr_tm = set_reg_val(id, *val);
1941 break;
1942 case KVM_REG_PPC_TM_TAR:
1943 vcpu->arch.tar_tm = set_reg_val(id, *val);
1944 break;
1945#endif
388cc6e1
PM		 1946 case KVM_REG_PPC_ARCH_COMPAT:
1947 r = kvmppc_set_arch_compat(vcpu, set_reg_val(id, *val));
1948 break;
5855564c
PM		 1949 case KVM_REG_PPC_DEC_EXPIRY:
1950 vcpu->arch.dec_expires = set_reg_val(id, *val) -
1951 vcpu->arch.vcore->tb_offset;
1952 break;
a1f15826 1953 case KVM_REG_PPC_ONLINE:
7aa15842
PM		 1954 i = set_reg_val(id, *val);
1955 if (i && !vcpu->arch.online)
1956 atomic_inc(&vcpu->arch.vcore->online_count);
1957 else if (!i && vcpu->arch.online)
1958 atomic_dec(&vcpu->arch.vcore->online_count);
1959 vcpu->arch.online = i;
a1f15826 1960 break;
30323418
PM		 1961 case KVM_REG_PPC_PTCR:
1962 vcpu->kvm->arch.l1_ptcr = set_reg_val(id, *val);
1963 break;
31f3438e 1964 default:
a136a8bd 1965 r = -EINVAL;
31f3438e
PM		 1966 break;
1967 }
1968
1969 return r;
1970}
1971
45c940ba
PM		 1972/*
1973 * On POWER9, threads are independent and can be in different partitions.
1974 * Therefore we consider each thread to be a subcore.
1975 * There is a restriction that all threads have to be in the same
1976 * MMU mode (radix or HPT), unfortunately, but since we only support
1977 * HPT guests on a HPT host so far, that isn't an impediment yet.
1978 */
516f7898 1979static int threads_per_vcore(struct kvm *kvm)
45c940ba 1980{
516f7898 1981 if (kvm->arch.threads_indep)
45c940ba
PM		 1982 return 1;
1983 return threads_per_subcore;
1984}
1985
1e175d2e 1986static struct kvmppc_vcore *kvmppc_vcore_create(struct kvm *kvm, int id)
de9bdd1a
SS		 1987{
1988 struct kvmppc_vcore *vcore;
1989
1990 vcore = kzalloc(sizeof(struct kvmppc_vcore), GFP_KERNEL);
1991
1992 if (vcore == NULL)
1993 return NULL;
1994
de9bdd1a 1995 spin_lock_init(&vcore->lock);
2711e248 1996 spin_lock_init(&vcore->stoltb_lock);
8577370f 1997 init_swait_queue_head(&vcore->wq);
de9bdd1a
SS		 1998 vcore->preempt_tb = TB_NIL;
1999 vcore->lpcr = kvm->arch.lpcr;
1e175d2e 2000 vcore->first_vcpuid = id;
de9bdd1a 2001 vcore->kvm = kvm;
ec257165 2002 INIT_LIST_HEAD(&vcore->preempt_list);
de9bdd1a
SS		 2003
2004 return vcore;
2005}
2006
b6c295df
PM		 2007#ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING
2008static struct debugfs_timings_element {
2009 const char *name;
2010 size_t offset;
2011} timings[] = {
2012 {"rm_entry", offsetof(struct kvm_vcpu, arch.rm_entry)},
2013 {"rm_intr", offsetof(struct kvm_vcpu, arch.rm_intr)},
2014 {"rm_exit", offsetof(struct kvm_vcpu, arch.rm_exit)},
2015 {"guest", offsetof(struct kvm_vcpu, arch.guest_time)},
2016 {"cede", offsetof(struct kvm_vcpu, arch.cede_time)},
2017};
2018
4bb817ed 2019#define N_TIMINGS (ARRAY_SIZE(timings))
b6c295df
PM		 2020
2021struct debugfs_timings_state {
2022 struct kvm_vcpu *vcpu;
2023 unsigned int buflen;
2024 char buf[N_TIMINGS * 100];
2025};
2026
2027static int debugfs_timings_open(struct inode *inode, struct file *file)
2028{
2029 struct kvm_vcpu *vcpu = inode->i_private;
2030 struct debugfs_timings_state *p;
2031
2032 p = kzalloc(sizeof(*p), GFP_KERNEL);
2033 if (!p)
2034 return -ENOMEM;
2035
2036 kvm_get_kvm(vcpu->kvm);
2037 p->vcpu = vcpu;
2038 file->private_data = p;
2039
2040 return nonseekable_open(inode, file);
2041}
2042
2043static int debugfs_timings_release(struct inode *inode, struct file *file)
2044{
2045 struct debugfs_timings_state *p = file->private_data;
2046
2047 kvm_put_kvm(p->vcpu->kvm);
2048 kfree(p);
2049 return 0;
2050}
2051
2052static ssize_t debugfs_timings_read(struct file *file, char __user *buf,
2053 size_t len, loff_t *ppos)
2054{
2055 struct debugfs_timings_state *p = file->private_data;
2056 struct kvm_vcpu *vcpu = p->vcpu;
2057 char *s, *buf_end;
2058 struct kvmhv_tb_accumulator tb;
2059 u64 count;
2060 loff_t pos;
2061 ssize_t n;
2062 int i, loops;
2063 bool ok;
2064
2065 if (!p->buflen) {
2066 s = p->buf;
2067 buf_end = s + sizeof(p->buf);
2068 for (i = 0; i < N_TIMINGS; ++i) {
2069 struct kvmhv_tb_accumulator *acc;
2070
2071 acc = (struct kvmhv_tb_accumulator *)
2072 ((unsigned long)vcpu + timings[i].offset);
2073 ok = false;
2074 for (loops = 0; loops < 1000; ++loops) {
2075 count = acc->seqcount;
2076 if (!(count & 1)) {
2077 smp_rmb();
2078 tb = *acc;
2079 smp_rmb();
2080 if (count == acc->seqcount) {
2081 ok = true;
2082 break;
2083 }
2084 }
2085 udelay(1);
2086 }
2087 if (!ok)
2088 snprintf(s, buf_end - s, "%s: stuck\n",
2089 timings[i].name);
2090 else
2091 snprintf(s, buf_end - s,
2092 "%s: %llu %llu %llu %llu\n",
2093 timings[i].name, count / 2,
2094 tb_to_ns(tb.tb_total),
2095 tb_to_ns(tb.tb_min),
2096 tb_to_ns(tb.tb_max));
2097 s += strlen(s);
2098 }
2099 p->buflen = s - p->buf;
2100 }
2101
2102 pos = *ppos;
2103 if (pos >= p->buflen)
2104 return 0;
2105 if (len > p->buflen - pos)
2106 len = p->buflen - pos;
2107 n = copy_to_user(buf, p->buf + pos, len);
2108 if (n) {
2109 if (n == len)
2110 return -EFAULT;
2111 len -= n;
2112 }
2113 *ppos = pos + len;
2114 return len;
2115}
2116
2117static ssize_t debugfs_timings_write(struct file *file, const char __user *buf,
2118 size_t len, loff_t *ppos)
2119{
2120 return -EACCES;
2121}
2122
2123static const struct file_operations debugfs_timings_ops = {
2124 .owner = THIS_MODULE,
2125 .open = debugfs_timings_open,
2126 .release = debugfs_timings_release,
2127 .read = debugfs_timings_read,
2128 .write = debugfs_timings_write,
2129 .llseek = generic_file_llseek,
2130};
2131
2132/* Create a debugfs directory for the vcpu */
2133static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id)
2134{
2135 char buf[16];
2136 struct kvm *kvm = vcpu->kvm;
2137
2138 snprintf(buf, sizeof(buf), "vcpu%u", id);
2139 if (IS_ERR_OR_NULL(kvm->arch.debugfs_dir))
2140 return;
2141 vcpu->arch.debugfs_dir = debugfs_create_dir(buf, kvm->arch.debugfs_dir);
2142 if (IS_ERR_OR_NULL(vcpu->arch.debugfs_dir))
2143 return;
2144 vcpu->arch.debugfs_timings =
2145 debugfs_create_file("timings", 0444, vcpu->arch.debugfs_dir,
2146 vcpu, &debugfs_timings_ops);
2147}
2148
2149#else /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */
2150static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id)
2151{
2152}
2153#endif /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */
2154
3a167bea
AK		 2155static struct kvm_vcpu *kvmppc_core_vcpu_create_hv(struct kvm *kvm,
2156 unsigned int id)
de56a948
PM		 2157{
2158 struct kvm_vcpu *vcpu;
3c313524 2159 int err;
371fefd6
PM		 2160 int core;
2161 struct kvmppc_vcore *vcore;
de56a948 2162
371fefd6 2163 err = -ENOMEM;
6b75e6bf 2164 vcpu = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
de56a948
PM		 2165 if (!vcpu)
2166 goto out;
2167
2168 err = kvm_vcpu_init(vcpu, kvm, id);
2169 if (err)
2170 goto free_vcpu;
2171
2172 vcpu->arch.shared = &vcpu->arch.shregs;
5deb8e7a
AG		 2173#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
2174 /*
2175 * The shared struct is never shared on HV,
2176 * so we can always use host endianness
2177 */
2178#ifdef __BIG_ENDIAN__
2179 vcpu->arch.shared_big_endian = true;
2180#else
2181 vcpu->arch.shared_big_endian = false;
2182#endif
2183#endif
de56a948
PM		 2184 vcpu->arch.mmcr[0] = MMCR0_FC;
2185 vcpu->arch.ctrl = CTRL_RUNLATCH;
2186 /* default to host PVR, since we can't spoof it */
3a167bea 2187 kvmppc_set_pvr_hv(vcpu, mfspr(SPRN_PVR));
2e25aa5f 2188 spin_lock_init(&vcpu->arch.vpa_update_lock);
c7b67670
PM		 2189 spin_lock_init(&vcpu->arch.tbacct_lock);
2190 vcpu->arch.busy_preempt = TB_NIL;
d682916a 2191 vcpu->arch.intr_msr = MSR_SF | MSR_ME;
de56a948 2192
769377f7
PM		 2193 /*
2194 * Set the default HFSCR for the guest from the host value.
2195 * This value is only used on POWER9.
57900694 2196 * On POWER9, we want to virtualize the doorbell facility, so we
f3c99f97
PM		 2197 * don't set the HFSCR_MSGP bit, and that causes those instructions
2198 * to trap and then we emulate them.
769377f7 2199 */
f3c99f97
PM		 2200 vcpu->arch.hfscr = HFSCR_TAR | HFSCR_EBB | HFSCR_PM | HFSCR_BHRB |
2201 HFSCR_DSCR | HFSCR_VECVSX | HFSCR_FP;
2202 if (cpu_has_feature(CPU_FTR_HVMODE)) {
2203 vcpu->arch.hfscr &= mfspr(SPRN_HFSCR);
2204 if (cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST))
2205 vcpu->arch.hfscr |= HFSCR_TM;
2206 }
2207 if (cpu_has_feature(CPU_FTR_TM_COMP))
4bb3c7a0 2208 vcpu->arch.hfscr |= HFSCR_TM;
769377f7 2209
de56a948
PM		 2210 kvmppc_mmu_book3s_hv_init(vcpu);
2211
8455d79e 2212 vcpu->arch.state = KVMPPC_VCPU_NOTREADY;
371fefd6
PM		 2213
2214 init_waitqueue_head(&vcpu->arch.cpu_run);
2215
2216 mutex_lock(&kvm->lock);
3c313524
PM		 2217 vcore = NULL;
2218 err = -EINVAL;
1e175d2e 2219 if (cpu_has_feature(CPU_FTR_ARCH_300)) {
b5c6f760
PM		 2220 if (id >= (KVM_MAX_VCPUS * kvm->arch.emul_smt_mode)) {
2221 pr_devel("KVM: VCPU ID too high\n");
2222 core = KVM_MAX_VCORES;
2223 } else {
2224 BUG_ON(kvm->arch.smt_mode != 1);
2225 core = kvmppc_pack_vcpu_id(kvm, id);
2226 }
1e175d2e
SB		 2227 } else {
2228 core = id / kvm->arch.smt_mode;
2229 }
3c313524
PM		 2230 if (core < KVM_MAX_VCORES) {
2231 vcore = kvm->arch.vcores[core];
1e175d2e
SB		 2232 if (vcore && cpu_has_feature(CPU_FTR_ARCH_300)) {
2233 pr_devel("KVM: collision on id %u", id);
2234 vcore = NULL;
2235 } else if (!vcore) {
3c313524 2236 err = -ENOMEM;
1e175d2e
SB		 2237 vcore = kvmppc_vcore_create(kvm,
2238 id & ~(kvm->arch.smt_mode - 1));
3c313524
PM		 2239 kvm->arch.vcores[core] = vcore;
2240 kvm->arch.online_vcores++;
2241 }
371fefd6
PM		 2242 }
2243 mutex_unlock(&kvm->lock);
2244
2245 if (!vcore)
2246 goto free_vcpu;
2247
2248 spin_lock(&vcore->lock);
2249 ++vcore->num_threads;
371fefd6
PM		 2250 spin_unlock(&vcore->lock);
2251 vcpu->arch.vcore = vcore;
e0b7ec05 2252 vcpu->arch.ptid = vcpu->vcpu_id - vcore->first_vcpuid;
ec257165 2253 vcpu->arch.thread_cpu = -1;
a29ebeaf 2254 vcpu->arch.prev_cpu = -1;
371fefd6 2255
af8f38b3
AG		 2256 vcpu->arch.cpu_type = KVM_CPU_3S_64;
2257 kvmppc_sanity_check(vcpu);
2258
b6c295df
PM		 2259 debugfs_vcpu_init(vcpu, id);
2260
de56a948
PM		 2261 return vcpu;
2262
2263free_vcpu:
6b75e6bf 2264 kmem_cache_free(kvm_vcpu_cache, vcpu);
de56a948
PM		 2265out:
2266 return ERR_PTR(err);
2267}
2268
3c313524
PM		 2269static int kvmhv_set_smt_mode(struct kvm *kvm, unsigned long smt_mode,
2270 unsigned long flags)
2271{
2272 int err;
57900694 2273 int esmt = 0;
3c313524
PM		 2274
2275 if (flags)
2276 return -EINVAL;
2277 if (smt_mode > MAX_SMT_THREADS || !is_power_of_2(smt_mode))
2278 return -EINVAL;
2279 if (!cpu_has_feature(CPU_FTR_ARCH_300)) {
2280 /*
2281 * On POWER8 (or POWER7), the threading mode is "strict",
2282 * so we pack smt_mode vcpus per vcore.
2283 */
2284 if (smt_mode > threads_per_subcore)
2285 return -EINVAL;
2286 } else {
2287 /*
2288 * On POWER9, the threading mode is "loose",
2289 * so each vcpu gets its own vcore.
2290 */
57900694 2291 esmt = smt_mode;
3c313524
PM		 2292 smt_mode = 1;
2293 }
2294 mutex_lock(&kvm->lock);
2295 err = -EBUSY;
2296 if (!kvm->arch.online_vcores) {
2297 kvm->arch.smt_mode = smt_mode;
57900694 2298 kvm->arch.emul_smt_mode = esmt;
3c313524
PM		 2299 err = 0;
2300 }
2301 mutex_unlock(&kvm->lock);
2302
2303 return err;
2304}
2305
c35635ef
PM		 2306static void unpin_vpa(struct kvm *kvm, struct kvmppc_vpa *vpa)
2307{
2308 if (vpa->pinned_addr)
2309 kvmppc_unpin_guest_page(kvm, vpa->pinned_addr, vpa->gpa,
2310 vpa->dirty);
2311}
2312
3a167bea 2313static void kvmppc_core_vcpu_free_hv(struct kvm_vcpu *vcpu)
de56a948 2314{
2e25aa5f 2315 spin_lock(&vcpu->arch.vpa_update_lock);
c35635ef
PM		 2316 unpin_vpa(vcpu->kvm, &vcpu->arch.dtl);
2317 unpin_vpa(vcpu->kvm, &vcpu->arch.slb_shadow);
2318 unpin_vpa(vcpu->kvm, &vcpu->arch.vpa);
2e25aa5f 2319 spin_unlock(&vcpu->arch.vpa_update_lock);
de56a948 2320 kvm_vcpu_uninit(vcpu);
6b75e6bf 2321 kmem_cache_free(kvm_vcpu_cache, vcpu);
de56a948
PM		 2322}
2323
3a167bea
AK		 2324static int kvmppc_core_check_requests_hv(struct kvm_vcpu *vcpu)
2325{
2326 /* Indicate we want to get back into the guest */
2327 return 1;
2328}
2329
19ccb76a 2330static void kvmppc_set_timer(struct kvm_vcpu *vcpu)
371fefd6 2331{
19ccb76a 2332 unsigned long dec_nsec, now;
371fefd6 2333
19ccb76a
PM		 2334 now = get_tb();
2335 if (now > vcpu->arch.dec_expires) {
2336 /* decrementer has already gone negative */
2337 kvmppc_core_queue_dec(vcpu);
7e28e60e 2338 kvmppc_core_prepare_to_enter(vcpu);
19ccb76a 2339 return;
371fefd6 2340 }
c43befca 2341 dec_nsec = tb_to_ns(vcpu->arch.dec_expires - now);
8b0e1953 2342 hrtimer_start(&vcpu->arch.dec_timer, dec_nsec, HRTIMER_MODE_REL);
19ccb76a 2343 vcpu->arch.timer_running = 1;
371fefd6
PM		 2344}
2345
19ccb76a 2346static void kvmppc_end_cede(struct kvm_vcpu *vcpu)
371fefd6 2347{
19ccb76a
PM		 2348 vcpu->arch.ceded = 0;
2349 if (vcpu->arch.timer_running) {
2350 hrtimer_try_to_cancel(&vcpu->arch.dec_timer);
2351 vcpu->arch.timer_running = 0;
2352 }
371fefd6
PM		 2353}
2354
8b24e69f 2355extern int __kvmppc_vcore_entry(void);
de56a948 2356
371fefd6
PM		 2357static void kvmppc_remove_runnable(struct kvmppc_vcore *vc,
2358 struct kvm_vcpu *vcpu)
de56a948 2359{
c7b67670
PM		 2360 u64 now;
2361
371fefd6
PM		 2362 if (vcpu->arch.state != KVMPPC_VCPU_RUNNABLE)
2363 return;
bf3d32e1 2364 spin_lock_irq(&vcpu->arch.tbacct_lock);
c7b67670
PM		 2365 now = mftb();
2366 vcpu->arch.busy_stolen += vcore_stolen_time(vc, now) -
2367 vcpu->arch.stolen_logged;
2368 vcpu->arch.busy_preempt = now;
2369 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST;
bf3d32e1 2370 spin_unlock_irq(&vcpu->arch.tbacct_lock);
371fefd6 2371 --vc->n_runnable;
7b5f8272 2372 WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], NULL);
371fefd6
PM		 2373}
2374
f0888f70
PM		 2375static int kvmppc_grab_hwthread(int cpu)
2376{
2377 struct paca_struct *tpaca;
b754c739 2378 long timeout = 10000;
f0888f70 2379
d2e60075 2380 tpaca = paca_ptrs[cpu];
f0888f70
PM		 2381
2382 /* Ensure the thread won't go into the kernel if it wakes */
7b444c67 2383 tpaca->kvm_hstate.kvm_vcpu = NULL;
b4deba5c 2384 tpaca->kvm_hstate.kvm_vcore = NULL;
5d5b99cd
PM		 2385 tpaca->kvm_hstate.napping = 0;
2386 smp_wmb();
2387 tpaca->kvm_hstate.hwthread_req = 1;
f0888f70
PM		 2388
2389 /*
2390 * If the thread is already executing in the kernel (e.g. handling
2391 * a stray interrupt), wait for it to get back to nap mode.
2392 * The smp_mb() is to ensure that our setting of hwthread_req
2393 * is visible before we look at hwthread_state, so if this
2394 * races with the code at system_reset_pSeries and the thread
2395 * misses our setting of hwthread_req, we are sure to see its
2396 * setting of hwthread_state, and vice versa.
2397 */
2398 smp_mb();
2399 while (tpaca->kvm_hstate.hwthread_state == KVM_HWTHREAD_IN_KERNEL) {
2400 if (--timeout <= 0) {
2401 pr_err("KVM: couldn't grab cpu %d\n", cpu);
2402 return -EBUSY;
2403 }
2404 udelay(1);
2405 }
2406 return 0;
2407}
2408
2409static void kvmppc_release_hwthread(int cpu)
2410{
2411 struct paca_struct *tpaca;
2412
d2e60075 2413 tpaca = paca_ptrs[cpu];
31a4d448 2414 tpaca->kvm_hstate.hwthread_req = 0;
f0888f70 2415 tpaca->kvm_hstate.kvm_vcpu = NULL;
b4deba5c
PM		 2416 tpaca->kvm_hstate.kvm_vcore = NULL;
2417 tpaca->kvm_hstate.kvm_split_mode = NULL;
f0888f70
PM		 2418}
2419
a29ebeaf
PM		 2420static void radix_flush_cpu(struct kvm *kvm, int cpu, struct kvm_vcpu *vcpu)
2421{
9d0b048d
SJS		 2422 struct kvm_nested_guest *nested = vcpu->arch.nested;
2423 cpumask_t *cpu_in_guest;
a29ebeaf
PM		 2424 int i;
2425
2426 cpu = cpu_first_thread_sibling(cpu);
9d0b048d
SJS		 2427 if (nested) {
2428 cpumask_set_cpu(cpu, &nested->need_tlb_flush);
2429 cpu_in_guest = &nested->cpu_in_guest;
2430 } else {
2431 cpumask_set_cpu(cpu, &kvm->arch.need_tlb_flush);
2432 cpu_in_guest = &kvm->arch.cpu_in_guest;
2433 }
a29ebeaf
PM		 2434 /*
2435 * Make sure setting of bit in need_tlb_flush precedes
2436 * testing of cpu_in_guest bits. The matching barrier on
2437 * the other side is the first smp_mb() in kvmppc_run_core().
2438 */
2439 smp_mb();
2440 for (i = 0; i < threads_per_core; ++i)
9d0b048d 2441 if (cpumask_test_cpu(cpu + i, cpu_in_guest))
a29ebeaf
PM		 2442 smp_call_function_single(cpu + i, do_nothing, NULL, 1);
2443}
2444
8b24e69f
PM		 2445static void kvmppc_prepare_radix_vcpu(struct kvm_vcpu *vcpu, int pcpu)
2446{
9d0b048d 2447 struct kvm_nested_guest *nested = vcpu->arch.nested;
8b24e69f 2448 struct kvm *kvm = vcpu->kvm;
9d0b048d
SJS		 2449 int prev_cpu;
2450
2451 if (!cpu_has_feature(CPU_FTR_HVMODE))
2452 return;
2453
2454 if (nested)
2455 prev_cpu = nested->prev_cpu[vcpu->arch.nested_vcpu_id];
2456 else
2457 prev_cpu = vcpu->arch.prev_cpu;
8b24e69f
PM		 2458
2459 /*
2460 * With radix, the guest can do TLB invalidations itself,
2461 * and it could choose to use the local form (tlbiel) if
2462 * it is invalidating a translation that has only ever been
2463 * used on one vcpu. However, that doesn't mean it has
2464 * only ever been used on one physical cpu, since vcpus
2465 * can move around between pcpus. To cope with this, when
2466 * a vcpu moves from one pcpu to another, we need to tell
2467 * any vcpus running on the same core as this vcpu previously
2468 * ran to flush the TLB. The TLB is shared between threads,
2469 * so we use a single bit in .need_tlb_flush for all 4 threads.
2470 */
9d0b048d
SJS		 2471 if (prev_cpu != pcpu) {
2472 if (prev_cpu >= 0 &&
2473 cpu_first_thread_sibling(prev_cpu) !=
8b24e69f 2474 cpu_first_thread_sibling(pcpu))
9d0b048d
SJS		 2475 radix_flush_cpu(kvm, prev_cpu, vcpu);
2476 if (nested)
2477 nested->prev_cpu[vcpu->arch.nested_vcpu_id] = pcpu;
2478 else
2479 vcpu->arch.prev_cpu = pcpu;
2480 }
2481}
2482
2483static void kvmppc_radix_check_need_tlb_flush(struct kvm *kvm, int pcpu,
2484 struct kvm_nested_guest *nested)
2485{
2486 cpumask_t *need_tlb_flush;
2487 int lpid;
2488
2489 if (!cpu_has_feature(CPU_FTR_HVMODE))
2490 return;
2491
2492 if (cpu_has_feature(CPU_FTR_ARCH_300))
2493 pcpu &= ~0x3UL;
2494
2495 if (nested) {
2496 lpid = nested->shadow_lpid;
2497 need_tlb_flush = &nested->need_tlb_flush;
2498 } else {
2499 lpid = kvm->arch.lpid;
2500 need_tlb_flush = &kvm->arch.need_tlb_flush;
2501 }
2502
2503 mtspr(SPRN_LPID, lpid);
2504 isync();
2505 smp_mb();
2506
2507 if (cpumask_test_cpu(pcpu, need_tlb_flush)) {
2508 radix__local_flush_tlb_lpid_guest(lpid);
2509 /* Clear the bit after the TLB flush */
2510 cpumask_clear_cpu(pcpu, need_tlb_flush);
8b24e69f
PM		 2511 }
2512}
2513
b4deba5c 2514static void kvmppc_start_thread(struct kvm_vcpu *vcpu, struct kvmppc_vcore *vc)
371fefd6
PM		 2515{
2516 int cpu;
2517 struct paca_struct *tpaca;
a29ebeaf 2518 struct kvm *kvm = vc->kvm;
371fefd6 2519
b4deba5c
PM		 2520 cpu = vc->pcpu;
2521 if (vcpu) {
2522 if (vcpu->arch.timer_running) {
2523 hrtimer_try_to_cancel(&vcpu->arch.dec_timer);
2524 vcpu->arch.timer_running = 0;
2525 }
2526 cpu += vcpu->arch.ptid;
898b25b2 2527 vcpu->cpu = vc->pcpu;
b4deba5c 2528 vcpu->arch.thread_cpu = cpu;
a29ebeaf 2529 cpumask_set_cpu(cpu, &kvm->arch.cpu_in_guest);
19ccb76a 2530 }
d2e60075 2531 tpaca = paca_ptrs[cpu];
5d5b99cd 2532 tpaca->kvm_hstate.kvm_vcpu = vcpu;
898b25b2 2533 tpaca->kvm_hstate.ptid = cpu - vc->pcpu;
4bb3c7a0 2534 tpaca->kvm_hstate.fake_suspend = 0;
ec257165 2535 /* Order stores to hstate.kvm_vcpu etc. before store to kvm_vcore */
371fefd6 2536 smp_wmb();
898b25b2 2537 tpaca->kvm_hstate.kvm_vcore = vc;
5d5b99cd 2538 if (cpu != smp_processor_id())
66feed61 2539 kvmppc_ipi_thread(cpu);
371fefd6 2540}
de56a948 2541
516f7898 2542static void kvmppc_wait_for_nap(int n_threads)
371fefd6 2543{
5d5b99cd
PM		 2544 int cpu = smp_processor_id();
2545 int i, loops;
371fefd6 2546
45c940ba
PM		 2547 if (n_threads <= 1)
2548 return;
5d5b99cd
PM		 2549 for (loops = 0; loops < 1000000; ++loops) {
2550 /*
2551 * Check if all threads are finished.
b4deba5c 2552 * We set the vcore pointer when starting a thread
5d5b99cd 2553 * and the thread clears it when finished, so we look
b4deba5c 2554 * for any threads that still have a non-NULL vcore ptr.
5d5b99cd 2555 */
45c940ba 2556 for (i = 1; i < n_threads; ++i)
d2e60075 2557 if (paca_ptrs[cpu + i]->kvm_hstate.kvm_vcore)
5d5b99cd 2558 break;
45c940ba 2559 if (i == n_threads) {
5d5b99cd
PM		 2560 HMT_medium();
2561 return;
371fefd6 2562 }
5d5b99cd 2563 HMT_low();
371fefd6
PM		 2564 }
2565 HMT_medium();
45c940ba 2566 for (i = 1; i < n_threads; ++i)
d2e60075 2567 if (paca_ptrs[cpu + i]->kvm_hstate.kvm_vcore)
5d5b99cd 2568 pr_err("KVM: CPU %d seems to be stuck\n", cpu + i);
371fefd6
PM		 2569}
2570
2571/*
2572 * Check that we are on thread 0 and that any other threads in
7b444c67
PM		 2573 * this core are off-line. Then grab the threads so they can't
2574 * enter the kernel.
371fefd6
PM		 2575 */
2576static int on_primary_thread(void)
2577{
2578 int cpu = smp_processor_id();
3102f784 2579 int thr;
371fefd6 2580
3102f784
ME		 2581 /* Are we on a primary subcore? */
2582 if (cpu_thread_in_subcore(cpu))
371fefd6 2583 return 0;
3102f784
ME		 2584
2585 thr = 0;
2586 while (++thr < threads_per_subcore)
371fefd6
PM		 2587 if (cpu_online(cpu + thr))
2588 return 0;
7b444c67
PM		 2589
2590 /* Grab all hw threads so they can't go into the kernel */
3102f784 2591 for (thr = 1; thr < threads_per_subcore; ++thr) {
7b444c67
PM		 2592 if (kvmppc_grab_hwthread(cpu + thr)) {
2593 /* Couldn't grab one; let the others go */
2594 do {
2595 kvmppc_release_hwthread(cpu + thr);
2596 } while (--thr > 0);
2597 return 0;
2598 }
2599 }
371fefd6
PM		 2600 return 1;
2601}
2602
ec257165
PM		 2603/*
2604 * A list of virtual cores for each physical CPU.
2605 * These are vcores that could run but their runner VCPU tasks are
2606 * (or may be) preempted.
2607 */
2608struct preempted_vcore_list {
2609 struct list_head list;
2610 spinlock_t lock;
2611};
2612
2613static DEFINE_PER_CPU(struct preempted_vcore_list, preempted_vcores);
2614
2615static void init_vcore_lists(void)
2616{
2617 int cpu;
2618
2619 for_each_possible_cpu(cpu) {
2620 struct preempted_vcore_list *lp = &per_cpu(preempted_vcores, cpu);
2621 spin_lock_init(&lp->lock);
2622 INIT_LIST_HEAD(&lp->list);
2623 }
2624}
2625
2626static void kvmppc_vcore_preempt(struct kvmppc_vcore *vc)
2627{
2628 struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores);
2629
2630 vc->vcore_state = VCORE_PREEMPT;
2631 vc->pcpu = smp_processor_id();
516f7898 2632 if (vc->num_threads < threads_per_vcore(vc->kvm)) {
ec257165
PM		 2633 spin_lock(&lp->lock);
2634 list_add_tail(&vc->preempt_list, &lp->list);
2635 spin_unlock(&lp->lock);
2636 }
2637
2638 /* Start accumulating stolen time */
2639 kvmppc_core_start_stolen(vc);
2640}
2641
2642static void kvmppc_vcore_end_preempt(struct kvmppc_vcore *vc)
2643{
402813fe 2644 struct preempted_vcore_list *lp;
ec257165
PM		 2645
2646 kvmppc_core_end_stolen(vc);
2647 if (!list_empty(&vc->preempt_list)) {
402813fe 2648 lp = &per_cpu(preempted_vcores, vc->pcpu);
ec257165
PM		 2649 spin_lock(&lp->lock);
2650 list_del_init(&vc->preempt_list);
2651 spin_unlock(&lp->lock);
2652 }
2653 vc->vcore_state = VCORE_INACTIVE;
2654}
2655
b4deba5c
PM		 2656/*
2657 * This stores information about the virtual cores currently
2658 * assigned to a physical core.
2659 */
ec257165 2660struct core_info {
b4deba5c
PM		 2661 int n_subcores;
2662 int max_subcore_threads;
ec257165 2663 int total_threads;
b4deba5c 2664 int subcore_threads[MAX_SUBCORES];
898b25b2 2665 struct kvmppc_vcore *vc[MAX_SUBCORES];
ec257165
PM		 2666};
2667
b4deba5c
PM		 2668/*
2669 * This mapping means subcores 0 and 1 can use threads 0-3 and 4-7
516f7898 2670 * respectively in 2-way micro-threading (split-core) mode on POWER8.
b4deba5c
PM		 2671 */
2672static int subcore_thread_map[MAX_SUBCORES] = { 0, 4, 2, 6 };
2673
ec257165
PM		 2674static void init_core_info(struct core_info *cip, struct kvmppc_vcore *vc)
2675{
2676 memset(cip, 0, sizeof(*cip));
b4deba5c
PM		 2677 cip->n_subcores = 1;
2678 cip->max_subcore_threads = vc->num_threads;
ec257165 2679 cip->total_threads = vc->num_threads;
b4deba5c 2680 cip->subcore_threads[0] = vc->num_threads;
898b25b2 2681 cip->vc[0] = vc;
b4deba5c
PM		 2682}
2683
2684static bool subcore_config_ok(int n_subcores, int n_threads)
2685{
516f7898 2686 /*
00608e1f
PM		 2687 * POWER9 "SMT4" cores are permanently in what is effectively a 4-way
2688 * split-core mode, with one thread per subcore.
516f7898
PM		 2689 */
2690 if (cpu_has_feature(CPU_FTR_ARCH_300))
2691 return n_subcores <= 4 && n_threads == 1;
2692
2693 /* On POWER8, can only dynamically split if unsplit to begin with */
b4deba5c
PM		 2694 if (n_subcores > 1 && threads_per_subcore < MAX_SMT_THREADS)
2695 return false;
2696 if (n_subcores > MAX_SUBCORES)
2697 return false;
2698 if (n_subcores > 1) {
2699 if (!(dynamic_mt_modes & 2))
2700 n_subcores = 4;
2701 if (n_subcores > 2 && !(dynamic_mt_modes & 4))
2702 return false;
2703 }
2704
2705 return n_subcores * roundup_pow_of_two(n_threads) <= MAX_SMT_THREADS;
ec257165
PM		 2706}
2707
898b25b2 2708static void init_vcore_to_run(struct kvmppc_vcore *vc)
ec257165 2709{
ec257165
PM		 2710 vc->entry_exit_map = 0;
2711 vc->in_guest = 0;
2712 vc->napping_threads = 0;
2713 vc->conferring_threads = 0;
57b8daa7 2714 vc->tb_offset_applied = 0;
ec257165
PM		 2715}
2716
b4deba5c
PM		 2717static bool can_dynamic_split(struct kvmppc_vcore *vc, struct core_info *cip)
2718{
2719 int n_threads = vc->num_threads;
2720 int sub;
2721
2722 if (!cpu_has_feature(CPU_FTR_ARCH_207S))
2723 return false;
2724
aa227864
PM		 2725 /* In one_vm_per_core mode, require all vcores to be from the same vm */
2726 if (one_vm_per_core && vc->kvm != cip->vc[0]->kvm)
2727 return false;
2728
00608e1f
PM		 2729 /* Some POWER9 chips require all threads to be in the same MMU mode */
2730 if (no_mixing_hpt_and_radix &&
c0101509
PM		 2731 kvm_is_radix(vc->kvm) != kvm_is_radix(cip->vc[0]->kvm))
2732 return false;
2733
b4deba5c
PM		 2734 if (n_threads < cip->max_subcore_threads)
2735 n_threads = cip->max_subcore_threads;
b009031f 2736 if (!subcore_config_ok(cip->n_subcores + 1, n_threads))
b4deba5c 2737 return false;
b009031f 2738 cip->max_subcore_threads = n_threads;
b4deba5c
PM		 2739
2740 sub = cip->n_subcores;
2741 ++cip->n_subcores;
2742 cip->total_threads += vc->num_threads;
2743 cip->subcore_threads[sub] = vc->num_threads;
898b25b2
PM		 2744 cip->vc[sub] = vc;
2745 init_vcore_to_run(vc);
2746 list_del_init(&vc->preempt_list);
b4deba5c
PM		 2747
2748 return true;
2749}
2750
b4deba5c
PM		 2751/*
2752 * Work out whether it is possible to piggyback the execution of
2753 * vcore *pvc onto the execution of the other vcores described in *cip.
2754 */
2755static bool can_piggyback(struct kvmppc_vcore *pvc, struct core_info *cip,
2756 int target_threads)
2757{
b4deba5c
PM		 2758 if (cip->total_threads + pvc->num_threads > target_threads)
2759 return false;
b4deba5c 2760
b009031f 2761 return can_dynamic_split(pvc, cip);
b4deba5c
PM		 2762}
2763
d911f0be
PM		 2764static void prepare_threads(struct kvmppc_vcore *vc)
2765{
7b5f8272
SJS		 2766 int i;
2767 struct kvm_vcpu *vcpu;
d911f0be 2768
7b5f8272 2769 for_each_runnable_thread(i, vcpu, vc) {
d911f0be
PM		 2770 if (signal_pending(vcpu->arch.run_task))
2771 vcpu->arch.ret = -EINTR;
2772 else if (vcpu->arch.vpa.update_pending ||
2773 vcpu->arch.slb_shadow.update_pending ||
2774 vcpu->arch.dtl.update_pending)
2775 vcpu->arch.ret = RESUME_GUEST;
2776 else
2777 continue;
2778 kvmppc_remove_runnable(vc, vcpu);
2779 wake_up(&vcpu->arch.cpu_run);
2780 }
2781}
2782
ec257165
PM		 2783static void collect_piggybacks(struct core_info *cip, int target_threads)
2784{
2785 struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores);
2786 struct kvmppc_vcore *pvc, *vcnext;
2787
2788 spin_lock(&lp->lock);
2789 list_for_each_entry_safe(pvc, vcnext, &lp->list, preempt_list) {
2790 if (!spin_trylock(&pvc->lock))
2791 continue;
2792 prepare_threads(pvc);
2793 if (!pvc->n_runnable) {
2794 list_del_init(&pvc->preempt_list);
2795 if (pvc->runner == NULL) {
2796 pvc->vcore_state = VCORE_INACTIVE;
2797 kvmppc_core_end_stolen(pvc);
2798 }
2799 spin_unlock(&pvc->lock);
2800 continue;
2801 }
2802 if (!can_piggyback(pvc, cip, target_threads)) {
2803 spin_unlock(&pvc->lock);
2804 continue;
2805 }
2806 kvmppc_core_end_stolen(pvc);
2807 pvc->vcore_state = VCORE_PIGGYBACK;
2808 if (cip->total_threads >= target_threads)
2809 break;
2810 }
2811 spin_unlock(&lp->lock);
2812}
2813
8b24e69f
PM		 2814static bool recheck_signals(struct core_info *cip)
2815{
2816 int sub, i;
2817 struct kvm_vcpu *vcpu;
2818
2819 for (sub = 0; sub < cip->n_subcores; ++sub)
2820 for_each_runnable_thread(i, vcpu, cip->vc[sub])
2821 if (signal_pending(vcpu->arch.run_task))
2822 return true;
2823 return false;
2824}
2825
ec257165 2826static void post_guest_process(struct kvmppc_vcore *vc, bool is_master)
25fedfca 2827{
7b5f8272 2828 int still_running = 0, i;
25fedfca
PM		 2829 u64 now;
2830 long ret;
7b5f8272 2831 struct kvm_vcpu *vcpu;
25fedfca 2832
ec257165 2833 spin_lock(&vc->lock);
25fedfca 2834 now = get_tb();
7b5f8272 2835 for_each_runnable_thread(i, vcpu, vc) {
53655ddd
PM		 2836 /*
2837 * It's safe to unlock the vcore in the loop here, because
2838 * for_each_runnable_thread() is safe against removal of
2839 * the vcpu, and the vcore state is VCORE_EXITING here,
2840 * so any vcpus becoming runnable will have their arch.trap
2841 * set to zero and can't actually run in the guest.
2842 */
2843 spin_unlock(&vc->lock);
25fedfca
PM		 2844 /* cancel pending dec exception if dec is positive */
2845 if (now < vcpu->arch.dec_expires &&
2846 kvmppc_core_pending_dec(vcpu))
2847 kvmppc_core_dequeue_dec(vcpu);
2848
2849 trace_kvm_guest_exit(vcpu);
2850
2851 ret = RESUME_GUEST;
2852 if (vcpu->arch.trap)
2853 ret = kvmppc_handle_exit_hv(vcpu->arch.kvm_run, vcpu,
2854 vcpu->arch.run_task);
2855
2856 vcpu->arch.ret = ret;
2857 vcpu->arch.trap = 0;
2858
53655ddd 2859 spin_lock(&vc->lock);
ec257165
PM		 2860 if (is_kvmppc_resume_guest(vcpu->arch.ret)) {
2861 if (vcpu->arch.pending_exceptions)
2862 kvmppc_core_prepare_to_enter(vcpu);
2863 if (vcpu->arch.ceded)
25fedfca 2864 kvmppc_set_timer(vcpu);
ec257165
PM		 2865 else
2866 ++still_running;
2867 } else {
25fedfca
PM		 2868 kvmppc_remove_runnable(vc, vcpu);
2869 wake_up(&vcpu->arch.cpu_run);
2870 }
2871 }
ec257165 2872 if (!is_master) {
563a1e93 2873 if (still_running > 0) {
ec257165 2874 kvmppc_vcore_preempt(vc);
563a1e93
PM		 2875 } else if (vc->runner) {
2876 vc->vcore_state = VCORE_PREEMPT;
2877 kvmppc_core_start_stolen(vc);
2878 } else {
2879 vc->vcore_state = VCORE_INACTIVE;
2880 }
ec257165
PM		 2881 if (vc->n_runnable > 0 && vc->runner == NULL) {
2882 /* make sure there's a candidate runner awake */
7b5f8272
SJS		 2883 i = -1;
2884 vcpu = next_runnable_thread(vc, &i);
ec257165
PM		 2885 wake_up(&vcpu->arch.cpu_run);
2886 }
2887 }
2888 spin_unlock(&vc->lock);
25fedfca
PM		 2889}
2890
b8e6a87c
SW		 2891/*
2892 * Clear core from the list of active host cores as we are about to
2893 * enter the guest. Only do this if it is the primary thread of the
2894 * core (not if a subcore) that is entering the guest.
2895 */
3f7cd919 2896static inline int kvmppc_clear_host_core(unsigned int cpu)
b8e6a87c
SW		 2897{
2898 int core;
2899
2900 if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu))
3f7cd919 2901 return 0;
b8e6a87c
SW		 2902 /*
2903 * Memory barrier can be omitted here as we will do a smp_wmb()
2904 * later in kvmppc_start_thread and we need ensure that state is
2905 * visible to other CPUs only after we enter guest.
2906 */
2907 core = cpu >> threads_shift;
2908 kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 0;
3f7cd919 2909 return 0;
b8e6a87c
SW		 2910}
2911
2912/*
2913 * Advertise this core as an active host core since we exited the guest
2914 * Only need to do this if it is the primary thread of the core that is
2915 * exiting.
2916 */
3f7cd919 2917static inline int kvmppc_set_host_core(unsigned int cpu)
b8e6a87c
SW		 2918{
2919 int core;
2920
2921 if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu))
3f7cd919 2922 return 0;
b8e6a87c
SW		 2923
2924 /*
2925 * Memory barrier can be omitted here because we do a spin_unlock
2926 * immediately after this which provides the memory barrier.
2927 */
2928 core = cpu >> threads_shift;
2929 kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 1;
3f7cd919 2930 return 0;
b8e6a87c
SW		 2931}
2932
8b24e69f
PM		 2933static void set_irq_happened(int trap)
2934{
2935 switch (trap) {
2936 case BOOK3S_INTERRUPT_EXTERNAL:
2937 local_paca->irq_happened |= PACA_IRQ_EE;
2938 break;
2939 case BOOK3S_INTERRUPT_H_DOORBELL:
2940 local_paca->irq_happened |= PACA_IRQ_DBELL;
2941 break;
2942 case BOOK3S_INTERRUPT_HMI:
2943 local_paca->irq_happened |= PACA_IRQ_HMI;
2944 break;
6de6638b
NP		 2945 case BOOK3S_INTERRUPT_SYSTEM_RESET:
2946 replay_system_reset();
2947 break;
8b24e69f
PM		 2948 }
2949}
2950
371fefd6
PM		 2951/*
2952 * Run a set of guest threads on a physical core.
2953 * Called with vc->lock held.
2954 */
66feed61 2955static noinline void kvmppc_run_core(struct kvmppc_vcore *vc)
371fefd6 2956{
7b5f8272 2957 struct kvm_vcpu *vcpu;
d911f0be 2958 int i;
2c9097e4 2959 int srcu_idx;
ec257165 2960 struct core_info core_info;
898b25b2 2961 struct kvmppc_vcore *pvc;
b4deba5c
PM		 2962 struct kvm_split_mode split_info, *sip;
2963 int split, subcore_size, active;
2964 int sub;
2965 bool thr0_done;
2966 unsigned long cmd_bit, stat_bit;
ec257165
PM		 2967 int pcpu, thr;
2968 int target_threads;
45c940ba 2969 int controlled_threads;
8b24e69f 2970 int trap;
516f7898 2971 bool is_power8;
c0101509 2972 bool hpt_on_radix;
371fefd6 2973
d911f0be
PM		 2974 /*
2975 * Remove from the list any threads that have a signal pending
2976 * or need a VPA update done
2977 */
2978 prepare_threads(vc);
2979
2980 /* if the runner is no longer runnable, let the caller pick a new one */
2981 if (vc->runner->arch.state != KVMPPC_VCPU_RUNNABLE)
2982 return;
081f323b
PM		 2983
2984 /*
d911f0be 2985 * Initialize *vc.
081f323b 2986 */
898b25b2 2987 init_vcore_to_run(vc);
2711e248 2988 vc->preempt_tb = TB_NIL;
081f323b 2989
45c940ba
PM		 2990 /*
2991 * Number of threads that we will be controlling: the same as
2992 * the number of threads per subcore, except on POWER9,
2993 * where it's 1 because the threads are (mostly) independent.
2994 */
516f7898 2995 controlled_threads = threads_per_vcore(vc->kvm);
45c940ba 2996
7b444c67 2997 /*
3102f784
ME		 2998 * Make sure we are running on primary threads, and that secondary
2999 * threads are offline. Also check if the number of threads in this
3000 * guest are greater than the current system threads per guest.
c0101509 3001 * On POWER9, we need to be not in independent-threads mode if
00608e1f
PM		 3002 * this is a HPT guest on a radix host machine where the
3003 * CPU threads may not be in different MMU modes.
7b444c67 3004 */
00608e1f
PM		 3005 hpt_on_radix = no_mixing_hpt_and_radix && radix_enabled() &&
3006 !kvm_is_radix(vc->kvm);
c0101509
PM		 3007 if (((controlled_threads > 1) &&
3008 ((vc->num_threads > threads_per_subcore) || !on_primary_thread())) ||
3009 (hpt_on_radix && vc->kvm->arch.threads_indep)) {
7b5f8272 3010 for_each_runnable_thread(i, vcpu, vc) {
7b444c67 3011 vcpu->arch.ret = -EBUSY;
25fedfca
PM		 3012 kvmppc_remove_runnable(vc, vcpu);
3013 wake_up(&vcpu->arch.cpu_run);
3014 }
7b444c67
PM		 3015 goto out;
3016 }
3017
ec257165
PM		 3018 /*
3019 * See if we could run any other vcores on the physical core
3020 * along with this one.
3021 */
3022 init_core_info(&core_info, vc);
3023 pcpu = smp_processor_id();
45c940ba 3024 target_threads = controlled_threads;
ec257165
PM		 3025 if (target_smt_mode && target_smt_mode < target_threads)
3026 target_threads = target_smt_mode;
3027 if (vc->num_threads < target_threads)
3028 collect_piggybacks(&core_info, target_threads);
3102f784 3029
8b24e69f
PM		 3030 /*
3031 * On radix, arrange for TLB flushing if necessary.
3032 * This has to be done before disabling interrupts since
3033 * it uses smp_call_function().
3034 */
3035 pcpu = smp_processor_id();
3036 if (kvm_is_radix(vc->kvm)) {
3037 for (sub = 0; sub < core_info.n_subcores; ++sub)
3038 for_each_runnable_thread(i, vcpu, core_info.vc[sub])
3039 kvmppc_prepare_radix_vcpu(vcpu, pcpu);
3040 }
3041
3042 /*
3043 * Hard-disable interrupts, and check resched flag and signals.
3044 * If we need to reschedule or deliver a signal, clean up
3045 * and return without going into the guest(s).
072df813 3046 * If the mmu_ready flag has been cleared, don't go into the
38c53af8 3047 * guest because that means a HPT resize operation is in progress.
8b24e69f
PM		 3048 */
3049 local_irq_disable();
3050 hard_irq_disable();
3051 if (lazy_irq_pending() || need_resched() ||
072df813 3052 recheck_signals(&core_info) || !vc->kvm->arch.mmu_ready) {
8b24e69f
PM		 3053 local_irq_enable();
3054 vc->vcore_state = VCORE_INACTIVE;
3055 /* Unlock all except the primary vcore */
3056 for (sub = 1; sub < core_info.n_subcores; ++sub) {
3057 pvc = core_info.vc[sub];
3058 /* Put back on to the preempted vcores list */
3059 kvmppc_vcore_preempt(pvc);
3060 spin_unlock(&pvc->lock);
3061 }
3062 for (i = 0; i < controlled_threads; ++i)
3063 kvmppc_release_hwthread(pcpu + i);
3064 return;
3065 }
3066
3067 kvmppc_clear_host_core(pcpu);
3068
b4deba5c
PM		 3069 /* Decide on micro-threading (split-core) mode */
3070 subcore_size = threads_per_subcore;
3071 cmd_bit = stat_bit = 0;
3072 split = core_info.n_subcores;
3073 sip = NULL;
516f7898
PM		 3074 is_power8 = cpu_has_feature(CPU_FTR_ARCH_207S)
3075 && !cpu_has_feature(CPU_FTR_ARCH_300);
3076
c0101509 3077 if (split > 1 || hpt_on_radix) {
b4deba5c
PM		 3078 sip = &split_info;
3079 memset(&split_info, 0, sizeof(split_info));
b4deba5c 3080 for (sub = 0; sub < core_info.n_subcores; ++sub)
898b25b2 3081 split_info.vc[sub] = core_info.vc[sub];
516f7898
PM		 3082
3083 if (is_power8) {
3084 if (split == 2 && (dynamic_mt_modes & 2)) {
3085 cmd_bit = HID0_POWER8_1TO2LPAR;
3086 stat_bit = HID0_POWER8_2LPARMODE;
3087 } else {
3088 split = 4;
3089 cmd_bit = HID0_POWER8_1TO4LPAR;
3090 stat_bit = HID0_POWER8_4LPARMODE;
3091 }
3092 subcore_size = MAX_SMT_THREADS / split;
3093 split_info.rpr = mfspr(SPRN_RPR);
3094 split_info.pmmar = mfspr(SPRN_PMMAR);
3095 split_info.ldbar = mfspr(SPRN_LDBAR);
3096 split_info.subcore_size = subcore_size;
3097 } else {
3098 split_info.subcore_size = 1;
c0101509
PM		 3099 if (hpt_on_radix) {
3100 /* Use the split_info for LPCR/LPIDR changes */
3101 split_info.lpcr_req = vc->lpcr;
3102 split_info.lpidr_req = vc->kvm->arch.lpid;
3103 split_info.host_lpcr = vc->kvm->arch.host_lpcr;
3104 split_info.do_set = 1;
3105 }
516f7898
PM		 3106 }
3107
b4deba5c
PM		 3108 /* order writes to split_info before kvm_split_mode pointer */
3109 smp_wmb();
3110 }
c0101509
PM		 3111
3112 for (thr = 0; thr < controlled_threads; ++thr) {
d2e60075
NP		 3113 struct paca_struct *paca = paca_ptrs[pcpu + thr];
3114
3115 paca->kvm_hstate.tid = thr;
3116 paca->kvm_hstate.napping = 0;
3117 paca->kvm_hstate.kvm_split_mode = sip;
c0101509 3118 }
b4deba5c 3119
516f7898 3120 /* Initiate micro-threading (split-core) on POWER8 if required */
b4deba5c
PM		 3121 if (cmd_bit) {
3122 unsigned long hid0 = mfspr(SPRN_HID0);
3123
3124 hid0 |= cmd_bit | HID0_POWER8_DYNLPARDIS;
3125 mb();
3126 mtspr(SPRN_HID0, hid0);
3127 isync();
3128 for (;;) {
3129 hid0 = mfspr(SPRN_HID0);
3130 if (hid0 & stat_bit)
3131 break;
3132 cpu_relax();
ec257165 3133 }
2e25aa5f 3134 }
3102f784 3135
7aa15842
PM		 3136 /*
3137 * On POWER8, set RWMR register.
3138 * Since it only affects PURR and SPURR, it doesn't affect
3139 * the host, so we don't save/restore the host value.
3140 */
3141 if (is_power8) {
3142 unsigned long rwmr_val = RWMR_RPA_P8_8THREAD;
3143 int n_online = atomic_read(&vc->online_count);
3144
3145 /*
3146 * Use the 8-thread value if we're doing split-core
3147 * or if the vcore's online count looks bogus.
3148 */
3149 if (split == 1 && threads_per_subcore == MAX_SMT_THREADS &&
3150 n_online >= 1 && n_online <= MAX_SMT_THREADS)
3151 rwmr_val = p8_rwmr_values[n_online];
3152 mtspr(SPRN_RWMR, rwmr_val);
3153 }
3154
b4deba5c
PM		 3155 /* Start all the threads */
3156 active = 0;
3157 for (sub = 0; sub < core_info.n_subcores; ++sub) {
516f7898 3158 thr = is_power8 ? subcore_thread_map[sub] : sub;
b4deba5c
PM		 3159 thr0_done = false;
3160 active |= 1 << thr;
898b25b2
PM		 3161 pvc = core_info.vc[sub];
3162 pvc->pcpu = pcpu + thr;
3163 for_each_runnable_thread(i, vcpu, pvc) {
3164 kvmppc_start_thread(vcpu, pvc);
3165 kvmppc_create_dtl_entry(vcpu, pvc);
3166 trace_kvm_guest_enter(vcpu);
3167 if (!vcpu->arch.ptid)
3168 thr0_done = true;
3169 active |= 1 << (thr + vcpu->arch.ptid);
b4deba5c 3170 }
898b25b2
PM		 3171 /*
3172 * We need to start the first thread of each subcore
3173 * even if it doesn't have a vcpu.
3174 */
3175 if (!thr0_done)
3176 kvmppc_start_thread(NULL, pvc);
2e25aa5f 3177 }
371fefd6 3178
7f235328
GS		 3179 /*
3180 * Ensure that split_info.do_nap is set after setting
3181 * the vcore pointer in the PACA of the secondaries.
3182 */
3183 smp_mb();
7f235328 3184
b4deba5c
PM		 3185 /*
3186 * When doing micro-threading, poke the inactive threads as well.
3187 * This gets them to the nap instruction after kvm_do_nap,
3188 * which reduces the time taken to unsplit later.
c0101509
PM		 3189 * For POWER9 HPT guest on radix host, we need all the secondary
3190 * threads woken up so they can do the LPCR/LPIDR change.
b4deba5c 3191 */
c0101509 3192 if (cmd_bit || hpt_on_radix) {
516f7898 3193 split_info.do_nap = 1; /* ask secondaries to nap when done */
b4deba5c
PM		 3194 for (thr = 1; thr < threads_per_subcore; ++thr)
3195 if (!(active & (1 << thr)))
3196 kvmppc_ipi_thread(pcpu + thr);
516f7898 3197 }
e0b7ec05 3198
2f12f034 3199 vc->vcore_state = VCORE_RUNNING;
19ccb76a 3200 preempt_disable();
3c78f78a
SW		 3201
3202 trace_kvmppc_run_core(vc, 0);
3203
b4deba5c 3204 for (sub = 0; sub < core_info.n_subcores; ++sub)
898b25b2 3205 spin_unlock(&core_info.vc[sub]->lock);
de56a948 3206
9a4506e1 3207 if (kvm_is_radix(vc->kvm)) {
9a4506e1
NP		 3208 /*
3209 * Do we need to flush the process scoped TLB for the LPAR?
3210 *
3211 * On POWER9, individual threads can come in here, but the
3212 * TLB is shared between the 4 threads in a core, hence
3213 * invalidating on one thread invalidates for all.
3214 * Thus we make all 4 threads use the same bit here.
3215 *
3216 * Hash must be flushed in realmode in order to use tlbiel.
3217 */
9d0b048d 3218 kvmppc_radix_check_need_tlb_flush(vc->kvm, pcpu, NULL);
9a4506e1
NP		 3219 }
3220
8b24e69f
PM		 3221 /*
3222 * Interrupts will be enabled once we get into the guest,
3223 * so tell lockdep that we're about to enable interrupts.
3224 */
3225 trace_hardirqs_on();
de56a948 3226
61bd0f66 3227 guest_enter_irqoff();
2c9097e4 3228
e0b7ec05 3229 srcu_idx = srcu_read_lock(&vc->kvm->srcu);
2c9097e4 3230
a4bc64d3
NR		 3231 this_cpu_disable_ftrace();
3232
8b24e69f 3233 trap = __kvmppc_vcore_entry();
de56a948 3234
a4bc64d3
NR		 3235 this_cpu_enable_ftrace();
3236
ec257165
PM		 3237 srcu_read_unlock(&vc->kvm->srcu, srcu_idx);
3238
8b24e69f
PM		 3239 trace_hardirqs_off();
3240 set_irq_happened(trap);
3241
ec257165 3242 spin_lock(&vc->lock);
371fefd6 3243 /* prevent other vcpu threads from doing kvmppc_start_thread() now */
19ccb76a 3244 vc->vcore_state = VCORE_EXITING;
371fefd6 3245
19ccb76a 3246 /* wait for secondary threads to finish writing their state to memory */
516f7898 3247 kvmppc_wait_for_nap(controlled_threads);
b4deba5c
PM		 3248
3249 /* Return to whole-core mode if we split the core earlier */
516f7898 3250 if (cmd_bit) {
b4deba5c
PM		 3251 unsigned long hid0 = mfspr(SPRN_HID0);
3252 unsigned long loops = 0;
3253
3254 hid0 &= ~HID0_POWER8_DYNLPARDIS;
3255 stat_bit = HID0_POWER8_2LPARMODE | HID0_POWER8_4LPARMODE;
3256 mb();
3257 mtspr(SPRN_HID0, hid0);
3258 isync();
3259 for (;;) {
3260 hid0 = mfspr(SPRN_HID0);
3261 if (!(hid0 & stat_bit))
3262 break;
3263 cpu_relax();
3264 ++loops;
3265 }
c0101509
PM		 3266 } else if (hpt_on_radix) {
3267 /* Wait for all threads to have seen final sync */
3268 for (thr = 1; thr < controlled_threads; ++thr) {
d2e60075
NP		 3269 struct paca_struct *paca = paca_ptrs[pcpu + thr];
3270
3271 while (paca->kvm_hstate.kvm_split_mode) {
c0101509
PM		 3272 HMT_low();
3273 barrier();
3274 }
3275 HMT_medium();
3276 }
b4deba5c 3277 }
c0101509 3278 split_info.do_nap = 0;
b4deba5c 3279
8b24e69f
PM		 3280 kvmppc_set_host_core(pcpu);
3281
3282 local_irq_enable();
61bd0f66 3283 guest_exit();
8b24e69f 3284
b4deba5c 3285 /* Let secondaries go back to the offline loop */
45c940ba 3286 for (i = 0; i < controlled_threads; ++i) {
b4deba5c
PM		 3287 kvmppc_release_hwthread(pcpu + i);
3288 if (sip && sip->napped[i])
3289 kvmppc_ipi_thread(pcpu + i);
a29ebeaf 3290 cpumask_clear_cpu(pcpu + i, &vc->kvm->arch.cpu_in_guest);
b4deba5c
PM		 3291 }
3292
371fefd6 3293 spin_unlock(&vc->lock);
2c9097e4 3294
371fefd6
PM		 3295 /* make sure updates to secondary vcpu structs are visible now */
3296 smp_mb();
de56a948 3297
36ee41d1
PM		 3298 preempt_enable();
3299
898b25b2
PM		 3300 for (sub = 0; sub < core_info.n_subcores; ++sub) {
3301 pvc = core_info.vc[sub];
3302 post_guest_process(pvc, pvc == vc);
3303 }
de56a948 3304
913d3ff9 3305 spin_lock(&vc->lock);
de56a948
PM		 3306
3307 out:
19ccb76a 3308 vc->vcore_state = VCORE_INACTIVE;
3c78f78a 3309 trace_kvmppc_run_core(vc, 1);
371fefd6
PM		 3310}
3311
95a6432c
PM		 3312/*
3313 * Load up hypervisor-mode registers on P9.
3314 */
360cae31
PM		 3315static int kvmhv_load_hv_regs_and_go(struct kvm_vcpu *vcpu, u64 time_limit,
3316 unsigned long lpcr)
95a6432c
PM		 3317{
3318 struct kvmppc_vcore *vc = vcpu->arch.vcore;
3319 s64 hdec;
3320 u64 tb, purr, spurr;
3321 int trap;
3322 unsigned long host_hfscr = mfspr(SPRN_HFSCR);
3323 unsigned long host_ciabr = mfspr(SPRN_CIABR);
3324 unsigned long host_dawr = mfspr(SPRN_DAWR);
3325 unsigned long host_dawrx = mfspr(SPRN_DAWRX);
3326 unsigned long host_psscr = mfspr(SPRN_PSSCR);
3327 unsigned long host_pidr = mfspr(SPRN_PID);
3328
3329 hdec = time_limit - mftb();
3330 if (hdec < 0)
3331 return BOOK3S_INTERRUPT_HV_DECREMENTER;
3332 mtspr(SPRN_HDEC, hdec);
3333
3334 if (vc->tb_offset) {
3335 u64 new_tb = mftb() + vc->tb_offset;
3336 mtspr(SPRN_TBU40, new_tb);
3337 tb = mftb();
3338 if ((tb & 0xffffff) < (new_tb & 0xffffff))
3339 mtspr(SPRN_TBU40, new_tb + 0x1000000);
3340 vc->tb_offset_applied = vc->tb_offset;
3341 }
3342
3343 if (vc->pcr)
3344 mtspr(SPRN_PCR, vc->pcr);
3345 mtspr(SPRN_DPDES, vc->dpdes);
3346 mtspr(SPRN_VTB, vc->vtb);
3347
3348 local_paca->kvm_hstate.host_purr = mfspr(SPRN_PURR);
3349 local_paca->kvm_hstate.host_spurr = mfspr(SPRN_SPURR);
3350 mtspr(SPRN_PURR, vcpu->arch.purr);
3351 mtspr(SPRN_SPURR, vcpu->arch.spurr);
3352
3353 if (cpu_has_feature(CPU_FTR_DAWR)) {
3354 mtspr(SPRN_DAWR, vcpu->arch.dawr);
3355 mtspr(SPRN_DAWRX, vcpu->arch.dawrx);
3356 }
3357 mtspr(SPRN_CIABR, vcpu->arch.ciabr);
3358 mtspr(SPRN_IC, vcpu->arch.ic);
3359 mtspr(SPRN_PID, vcpu->arch.pid);
3360
3361 mtspr(SPRN_PSSCR, vcpu->arch.psscr | PSSCR_EC |
3362 (local_paca->kvm_hstate.fake_suspend << PSSCR_FAKE_SUSPEND_LG));
3363
3364 mtspr(SPRN_HFSCR, vcpu->arch.hfscr);
3365
3366 mtspr(SPRN_SPRG0, vcpu->arch.shregs.sprg0);
3367 mtspr(SPRN_SPRG1, vcpu->arch.shregs.sprg1);
3368 mtspr(SPRN_SPRG2, vcpu->arch.shregs.sprg2);
3369 mtspr(SPRN_SPRG3, vcpu->arch.shregs.sprg3);
3370
3371 mtspr(SPRN_AMOR, ~0UL);
3372
360cae31 3373 mtspr(SPRN_LPCR, lpcr);
95a6432c
PM		 3374 isync();
3375
3376 kvmppc_xive_push_vcpu(vcpu);
3377
3378 mtspr(SPRN_SRR0, vcpu->arch.shregs.srr0);
3379 mtspr(SPRN_SRR1, vcpu->arch.shregs.srr1);
3380
3381 trap = __kvmhv_vcpu_entry_p9(vcpu);
3382
3383 /* Advance host PURR/SPURR by the amount used by guest */
3384 purr = mfspr(SPRN_PURR);
3385 spurr = mfspr(SPRN_SPURR);
3386 mtspr(SPRN_PURR, local_paca->kvm_hstate.host_purr +
3387 purr - vcpu->arch.purr);
3388 mtspr(SPRN_SPURR, local_paca->kvm_hstate.host_spurr +
3389 spurr - vcpu->arch.spurr);
3390 vcpu->arch.purr = purr;
3391 vcpu->arch.spurr = spurr;
3392
3393 vcpu->arch.ic = mfspr(SPRN_IC);
3394 vcpu->arch.pid = mfspr(SPRN_PID);
3395 vcpu->arch.psscr = mfspr(SPRN_PSSCR) & PSSCR_GUEST_VIS;
3396
3397 vcpu->arch.shregs.sprg0 = mfspr(SPRN_SPRG0);
3398 vcpu->arch.shregs.sprg1 = mfspr(SPRN_SPRG1);
3399 vcpu->arch.shregs.sprg2 = mfspr(SPRN_SPRG2);
3400 vcpu->arch.shregs.sprg3 = mfspr(SPRN_SPRG3);
3401
3402 mtspr(SPRN_PSSCR, host_psscr);
3403 mtspr(SPRN_HFSCR, host_hfscr);
3404 mtspr(SPRN_CIABR, host_ciabr);
3405 mtspr(SPRN_DAWR, host_dawr);
3406 mtspr(SPRN_DAWRX, host_dawrx);
3407 mtspr(SPRN_PID, host_pidr);
3408
3409 /*
3410 * Since this is radix, do a eieio; tlbsync; ptesync sequence in
3411 * case we interrupted the guest between a tlbie and a ptesync.
3412 */
3413 asm volatile("eieio; tlbsync; ptesync");
3414
3415 mtspr(SPRN_LPID, vcpu->kvm->arch.host_lpid); /* restore host LPID */
3416 isync();
3417
3418 vc->dpdes = mfspr(SPRN_DPDES);
3419 vc->vtb = mfspr(SPRN_VTB);
3420 mtspr(SPRN_DPDES, 0);
3421 if (vc->pcr)
3422 mtspr(SPRN_PCR, 0);
3423
3424 if (vc->tb_offset_applied) {
3425 u64 new_tb = mftb() - vc->tb_offset_applied;
3426 mtspr(SPRN_TBU40, new_tb);
3427 tb = mftb();
3428 if ((tb & 0xffffff) < (new_tb & 0xffffff))
3429 mtspr(SPRN_TBU40, new_tb + 0x1000000);
3430 vc->tb_offset_applied = 0;
3431 }
3432
3433 mtspr(SPRN_HDEC, 0x7fffffff);
3434 mtspr(SPRN_LPCR, vcpu->kvm->arch.host_lpcr);
3435
3436 return trap;
3437}
3438
3439/*
3440 * Virtual-mode guest entry for POWER9 and later when the host and
3441 * guest are both using the radix MMU. The LPIDR has already been set.
3442 */
360cae31
PM		 3443int kvmhv_p9_guest_entry(struct kvm_vcpu *vcpu, u64 time_limit,
3444 unsigned long lpcr)
95a6432c
PM		 3445{
3446 struct kvmppc_vcore *vc = vcpu->arch.vcore;
3447 unsigned long host_dscr = mfspr(SPRN_DSCR);
3448 unsigned long host_tidr = mfspr(SPRN_TIDR);
3449 unsigned long host_iamr = mfspr(SPRN_IAMR);
3450 s64 dec;
3451 u64 tb;
3452 int trap, save_pmu;
3453
3454 dec = mfspr(SPRN_DEC);
3455 tb = mftb();
3456 if (dec < 512)
3457 return BOOK3S_INTERRUPT_HV_DECREMENTER;
3458 local_paca->kvm_hstate.dec_expires = dec + tb;
3459 if (local_paca->kvm_hstate.dec_expires < time_limit)
3460 time_limit = local_paca->kvm_hstate.dec_expires;
3461
3462 vcpu->arch.ceded = 0;
3463
3464 kvmhv_save_host_pmu(); /* saves it to PACA kvm_hstate */
3465
3466 kvmppc_subcore_enter_guest();
3467
3468 vc->entry_exit_map = 1;
3469 vc->in_guest = 1;
3470
3471 if (vcpu->arch.vpa.pinned_addr) {
3472 struct lppaca *lp = vcpu->arch.vpa.pinned_addr;
3473 u32 yield_count = be32_to_cpu(lp->yield_count) + 1;
3474 lp->yield_count = cpu_to_be32(yield_count);
3475 vcpu->arch.vpa.dirty = 1;
3476 }
3477
3478 if (cpu_has_feature(CPU_FTR_TM) ||
3479 cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST))
3480 kvmppc_restore_tm_hv(vcpu, vcpu->arch.shregs.msr, true);
3481
3482 kvmhv_load_guest_pmu(vcpu);
3483
3484 msr_check_and_set(MSR_FP | MSR_VEC | MSR_VSX);
3485 load_fp_state(&vcpu->arch.fp);
3486#ifdef CONFIG_ALTIVEC
3487 load_vr_state(&vcpu->arch.vr);
3488#endif
3489
3490 mtspr(SPRN_DSCR, vcpu->arch.dscr);
3491 mtspr(SPRN_IAMR, vcpu->arch.iamr);
3492 mtspr(SPRN_PSPB, vcpu->arch.pspb);
3493 mtspr(SPRN_FSCR, vcpu->arch.fscr);
3494 mtspr(SPRN_TAR, vcpu->arch.tar);
3495 mtspr(SPRN_EBBHR, vcpu->arch.ebbhr);
3496 mtspr(SPRN_EBBRR, vcpu->arch.ebbrr);
3497 mtspr(SPRN_BESCR, vcpu->arch.bescr);
3498 mtspr(SPRN_WORT, vcpu->arch.wort);
3499 mtspr(SPRN_TIDR, vcpu->arch.tid);
3500 mtspr(SPRN_DAR, vcpu->arch.shregs.dar);
3501 mtspr(SPRN_DSISR, vcpu->arch.shregs.dsisr);
3502 mtspr(SPRN_AMR, vcpu->arch.amr);
3503 mtspr(SPRN_UAMOR, vcpu->arch.uamor);
3504
3505 if (!(vcpu->arch.ctrl & 1))
3506 mtspr(SPRN_CTRLT, mfspr(SPRN_CTRLF) & ~1);
3507
3508 mtspr(SPRN_DEC, vcpu->arch.dec_expires - mftb());
3509
360cae31
PM		 3510 if (kvmhv_on_pseries()) {
3511 /* call our hypervisor to load up HV regs and go */
3512 struct hv_guest_state hvregs;
3513
3514 kvmhv_save_hv_regs(vcpu, &hvregs);
3515 hvregs.lpcr = lpcr;
3516 vcpu->arch.regs.msr = vcpu->arch.shregs.msr;
3517 hvregs.version = HV_GUEST_STATE_VERSION;
3518 if (vcpu->arch.nested) {
3519 hvregs.lpid = vcpu->arch.nested->shadow_lpid;
3520 hvregs.vcpu_token = vcpu->arch.nested_vcpu_id;
3521 } else {
3522 hvregs.lpid = vcpu->kvm->arch.lpid;
3523 hvregs.vcpu_token = vcpu->vcpu_id;
3524 }
3525 hvregs.hdec_expiry = time_limit;
3526 trap = plpar_hcall_norets(H_ENTER_NESTED, __pa(&hvregs),
3527 __pa(&vcpu->arch.regs));
3528 kvmhv_restore_hv_return_state(vcpu, &hvregs);
3529 vcpu->arch.shregs.msr = vcpu->arch.regs.msr;
3530 vcpu->arch.shregs.dar = mfspr(SPRN_DAR);
3531 vcpu->arch.shregs.dsisr = mfspr(SPRN_DSISR);
4bad7779
PM		 3532
3533 /* H_CEDE has to be handled now, not later */
3534 if (trap == BOOK3S_INTERRUPT_SYSCALL && !vcpu->arch.nested &&
3535 kvmppc_get_gpr(vcpu, 3) == H_CEDE) {
3536 kvmppc_nested_cede(vcpu);
3537 trap = 0;
3538 }
360cae31
PM		 3539 } else {
3540 trap = kvmhv_load_hv_regs_and_go(vcpu, time_limit, lpcr);
95a6432c
PM		 3541 }
3542
95a6432c
PM		 3543 vcpu->arch.slb_max = 0;
3544 dec = mfspr(SPRN_DEC);
3545 tb = mftb();
3546 vcpu->arch.dec_expires = dec + tb;
3547 vcpu->cpu = -1;
3548 vcpu->arch.thread_cpu = -1;
3549 vcpu->arch.ctrl = mfspr(SPRN_CTRLF);
3550
3551 vcpu->arch.iamr = mfspr(SPRN_IAMR);
3552 vcpu->arch.pspb = mfspr(SPRN_PSPB);
3553 vcpu->arch.fscr = mfspr(SPRN_FSCR);
3554 vcpu->arch.tar = mfspr(SPRN_TAR);
3555 vcpu->arch.ebbhr = mfspr(SPRN_EBBHR);
3556 vcpu->arch.ebbrr = mfspr(SPRN_EBBRR);
3557 vcpu->arch.bescr = mfspr(SPRN_BESCR);
3558 vcpu->arch.wort = mfspr(SPRN_WORT);
3559 vcpu->arch.tid = mfspr(SPRN_TIDR);
3560 vcpu->arch.amr = mfspr(SPRN_AMR);
3561 vcpu->arch.uamor = mfspr(SPRN_UAMOR);
3562 vcpu->arch.dscr = mfspr(SPRN_DSCR);
3563
3564 mtspr(SPRN_PSPB, 0);
3565 mtspr(SPRN_WORT, 0);
3566 mtspr(SPRN_AMR, 0);
3567 mtspr(SPRN_UAMOR, 0);
3568 mtspr(SPRN_DSCR, host_dscr);
3569 mtspr(SPRN_TIDR, host_tidr);
3570 mtspr(SPRN_IAMR, host_iamr);
3571 mtspr(SPRN_PSPB, 0);
3572
3573 msr_check_and_set(MSR_FP | MSR_VEC | MSR_VSX);
3574 store_fp_state(&vcpu->arch.fp);
3575#ifdef CONFIG_ALTIVEC
3576 store_vr_state(&vcpu->arch.vr);
3577#endif
3578
3579 if (cpu_has_feature(CPU_FTR_TM) ||
3580 cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST))
3581 kvmppc_save_tm_hv(vcpu, vcpu->arch.shregs.msr, true);
3582
3583 save_pmu = 1;
3584 if (vcpu->arch.vpa.pinned_addr) {
3585 struct lppaca *lp = vcpu->arch.vpa.pinned_addr;
3586 u32 yield_count = be32_to_cpu(lp->yield_count) + 1;
3587 lp->yield_count = cpu_to_be32(yield_count);
3588 vcpu->arch.vpa.dirty = 1;
3589 save_pmu = lp->pmcregs_in_use;
3590 }
3591
3592 kvmhv_save_guest_pmu(vcpu, save_pmu);
3593
3594 vc->entry_exit_map = 0x101;
3595 vc->in_guest = 0;
3596
3597 mtspr(SPRN_DEC, local_paca->kvm_hstate.dec_expires - mftb());
3598
3599 kvmhv_load_host_pmu();
3600
3601 kvmppc_subcore_exit_guest();
3602
3603 return trap;
3604}
3605
19ccb76a
PM		 3606/*
3607 * Wait for some other vcpu thread to execute us, and
3608 * wake us up when we need to handle something in the host.
3609 */
ec257165
PM		 3610static void kvmppc_wait_for_exec(struct kvmppc_vcore *vc,
3611 struct kvm_vcpu *vcpu, int wait_state)
371fefd6 3612{
371fefd6
PM		 3613 DEFINE_WAIT(wait);
3614
19ccb76a 3615 prepare_to_wait(&vcpu->arch.cpu_run, &wait, wait_state);
ec257165
PM		 3616 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) {
3617 spin_unlock(&vc->lock);
19ccb76a 3618 schedule();
ec257165
PM		 3619 spin_lock(&vc->lock);
3620 }
19ccb76a
PM		 3621 finish_wait(&vcpu->arch.cpu_run, &wait);
3622}
3623
0cda69dd
SJS		 3624static void grow_halt_poll_ns(struct kvmppc_vcore *vc)
3625{
3626 /* 10us base */
3627 if (vc->halt_poll_ns == 0 && halt_poll_ns_grow)
3628 vc->halt_poll_ns = 10000;
3629 else
3630 vc->halt_poll_ns *= halt_poll_ns_grow;
0cda69dd
SJS		 3631}
3632
3633static void shrink_halt_poll_ns(struct kvmppc_vcore *vc)
3634{
3635 if (halt_poll_ns_shrink == 0)
3636 vc->halt_poll_ns = 0;
3637 else
3638 vc->halt_poll_ns /= halt_poll_ns_shrink;
3639}
3640
ee3308a2
PM		 3641#ifdef CONFIG_KVM_XICS
3642static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu)
3643{
3644 if (!xive_enabled())
3645 return false;
2267ea76 3646 return vcpu->arch.irq_pending || vcpu->arch.xive_saved_state.pipr <
ee3308a2
PM		 3647 vcpu->arch.xive_saved_state.cppr;
3648}
3649#else
3650static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu)
3651{
3652 return false;
3653}
3654#endif /* CONFIG_KVM_XICS */
3655
1da4e2f4
PM		 3656static bool kvmppc_vcpu_woken(struct kvm_vcpu *vcpu)
3657{
3658 if (vcpu->arch.pending_exceptions || vcpu->arch.prodded ||
ee3308a2 3659 kvmppc_doorbell_pending(vcpu) || xive_interrupt_pending(vcpu))
1da4e2f4
PM		 3660 return true;
3661
3662 return false;
3663}
3664
908a0935
SJS		 3665/*
3666 * Check to see if any of the runnable vcpus on the vcore have pending
0cda69dd
SJS		 3667 * exceptions or are no longer ceded
3668 */
3669static int kvmppc_vcore_check_block(struct kvmppc_vcore *vc)
3670{
3671 struct kvm_vcpu *vcpu;
3672 int i;
3673
3674 for_each_runnable_thread(i, vcpu, vc) {
1da4e2f4 3675 if (!vcpu->arch.ceded || kvmppc_vcpu_woken(vcpu))
0cda69dd
SJS		 3676 return 1;
3677 }
3678
3679 return 0;
3680}
3681
19ccb76a
PM		 3682/*
3683 * All the vcpus in this vcore are idle, so wait for a decrementer
3684 * or external interrupt to one of the vcpus. vc->lock is held.
3685 */
3686static void kvmppc_vcore_blocked(struct kvmppc_vcore *vc)
3687{
2a27f514 3688 ktime_t cur, start_poll, start_wait;
0cda69dd 3689 int do_sleep = 1;
0cda69dd 3690 u64 block_ns;
8577370f 3691 DECLARE_SWAITQUEUE(wait);
1bc5d59c 3692
0cda69dd 3693 /* Poll for pending exceptions and ceded state */
2a27f514 3694 cur = start_poll = ktime_get();
0cda69dd 3695 if (vc->halt_poll_ns) {
2a27f514
SJS		 3696 ktime_t stop = ktime_add_ns(start_poll, vc->halt_poll_ns);
3697 ++vc->runner->stat.halt_attempted_poll;
1bc5d59c 3698
0cda69dd
SJS		 3699 vc->vcore_state = VCORE_POLLING;
3700 spin_unlock(&vc->lock);
3701
3702 do {
3703 if (kvmppc_vcore_check_block(vc)) {
3704 do_sleep = 0;
3705 break;
3706 }
3707 cur = ktime_get();
3708 } while (single_task_running() && ktime_before(cur, stop));
3709
3710 spin_lock(&vc->lock);
3711 vc->vcore_state = VCORE_INACTIVE;
3712
2a27f514
SJS		 3713 if (!do_sleep) {
3714 ++vc->runner->stat.halt_successful_poll;
0cda69dd 3715 goto out;
2a27f514 3716 }
1bc5d59c
SW		 3717 }
3718
b3dae109 3719 prepare_to_swait_exclusive(&vc->wq, &wait, TASK_INTERRUPTIBLE);
0cda69dd
SJS		 3720
3721 if (kvmppc_vcore_check_block(vc)) {
8577370f 3722 finish_swait(&vc->wq, &wait);
0cda69dd 3723 do_sleep = 0;
2a27f514
SJS		 3724 /* If we polled, count this as a successful poll */
3725 if (vc->halt_poll_ns)
3726 ++vc->runner->stat.halt_successful_poll;
0cda69dd 3727 goto out;
1bc5d59c
SW		 3728 }
3729
2a27f514
SJS		 3730 start_wait = ktime_get();
3731
19ccb76a 3732 vc->vcore_state = VCORE_SLEEPING;
3c78f78a 3733 trace_kvmppc_vcore_blocked(vc, 0);
19ccb76a 3734 spin_unlock(&vc->lock);
913d3ff9 3735 schedule();
8577370f 3736 finish_swait(&vc->wq, &wait);
19ccb76a
PM		 3737 spin_lock(&vc->lock);
3738 vc->vcore_state = VCORE_INACTIVE;
3c78f78a 3739 trace_kvmppc_vcore_blocked(vc, 1);
2a27f514 3740 ++vc->runner->stat.halt_successful_wait;
0cda69dd
SJS		 3741
3742 cur = ktime_get();
3743
3744out:
2a27f514
SJS		 3745 block_ns = ktime_to_ns(cur) - ktime_to_ns(start_poll);
3746
3747 /* Attribute wait time */
3748 if (do_sleep) {
3749 vc->runner->stat.halt_wait_ns +=
3750 ktime_to_ns(cur) - ktime_to_ns(start_wait);
3751 /* Attribute failed poll time */
3752 if (vc->halt_poll_ns)
3753 vc->runner->stat.halt_poll_fail_ns +=
3754 ktime_to_ns(start_wait) -
3755 ktime_to_ns(start_poll);
3756 } else {
3757 /* Attribute successful poll time */
3758 if (vc->halt_poll_ns)
3759 vc->runner->stat.halt_poll_success_ns +=
3760 ktime_to_ns(cur) -
3761 ktime_to_ns(start_poll);
3762 }
0cda69dd
SJS		 3763
3764 /* Adjust poll time */
307d93e4 3765 if (halt_poll_ns) {
0cda69dd
SJS		 3766 if (block_ns <= vc->halt_poll_ns)
3767 ;
3768 /* We slept and blocked for longer than the max halt time */
307d93e4 3769 else if (vc->halt_poll_ns && block_ns > halt_poll_ns)
0cda69dd
SJS		 3770 shrink_halt_poll_ns(vc);
3771 /* We slept and our poll time is too small */
307d93e4
SJS		 3772 else if (vc->halt_poll_ns < halt_poll_ns &&
3773 block_ns < halt_poll_ns)
0cda69dd 3774 grow_halt_poll_ns(vc);
e03f3921
SJS		 3775 if (vc->halt_poll_ns > halt_poll_ns)
3776 vc->halt_poll_ns = halt_poll_ns;
0cda69dd
SJS		 3777 } else
3778 vc->halt_poll_ns = 0;
3779
3780 trace_kvmppc_vcore_wakeup(do_sleep, block_ns);
19ccb76a 3781}
371fefd6 3782
360cae31
PM		 3783/*
3784 * This never fails for a radix guest, as none of the operations it does
3785 * for a radix guest can fail or have a way to report failure.
3786 * kvmhv_run_single_vcpu() relies on this fact.
3787 */
432953b4
PM		 3788static int kvmhv_setup_mmu(struct kvm_vcpu *vcpu)
3789{
3790 int r = 0;
3791 struct kvm *kvm = vcpu->kvm;
3792
3793 mutex_lock(&kvm->lock);
3794 if (!kvm->arch.mmu_ready) {
3795 if (!kvm_is_radix(kvm))
3796 r = kvmppc_hv_setup_htab_rma(vcpu);
3797 if (!r) {
3798 if (cpu_has_feature(CPU_FTR_ARCH_300))
3799 kvmppc_setup_partition_table(kvm);
3800 kvm->arch.mmu_ready = 1;
3801 }
3802 }
3803 mutex_unlock(&kvm->lock);
3804 return r;
3805}
3806
19ccb76a
PM		 3807static int kvmppc_run_vcpu(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
3808{
38c53af8 3809 int n_ceded, i, r;
19ccb76a 3810 struct kvmppc_vcore *vc;
7b5f8272 3811 struct kvm_vcpu *v;
9e368f29 3812
3c78f78a
SW		 3813 trace_kvmppc_run_vcpu_enter(vcpu);
3814
371fefd6
PM		 3815 kvm_run->exit_reason = 0;
3816 vcpu->arch.ret = RESUME_GUEST;
3817 vcpu->arch.trap = 0;
2f12f034 3818 kvmppc_update_vpas(vcpu);
371fefd6 3819
371fefd6
PM		 3820 /*
3821 * Synchronize with other threads in this virtual core
3822 */
3823 vc = vcpu->arch.vcore;
3824 spin_lock(&vc->lock);
19ccb76a 3825 vcpu->arch.ceded = 0;
371fefd6
PM		 3826 vcpu->arch.run_task = current;
3827 vcpu->arch.kvm_run = kvm_run;
c7b67670 3828 vcpu->arch.stolen_logged = vcore_stolen_time(vc, mftb());
19ccb76a 3829 vcpu->arch.state = KVMPPC_VCPU_RUNNABLE;
c7b67670 3830 vcpu->arch.busy_preempt = TB_NIL;
7b5f8272 3831 WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], vcpu);
371fefd6
PM		 3832 ++vc->n_runnable;
3833
19ccb76a
PM		 3834 /*
3835 * This happens the first time this is called for a vcpu.
3836 * If the vcore is already running, we may be able to start
3837 * this thread straight away and have it join in.
3838 */
8455d79e 3839 if (!signal_pending(current)) {
c0093f1a
PM		 3840 if ((vc->vcore_state == VCORE_PIGGYBACK ||
3841 vc->vcore_state == VCORE_RUNNING) &&
ec257165 3842 !VCORE_IS_EXITING(vc)) {
2f12f034 3843 kvmppc_create_dtl_entry(vcpu, vc);
b4deba5c 3844 kvmppc_start_thread(vcpu, vc);
3c78f78a 3845 trace_kvm_guest_enter(vcpu);
8455d79e 3846 } else if (vc->vcore_state == VCORE_SLEEPING) {
b3dae109 3847 swake_up_one(&vc->wq);
371fefd6
PM		 3848 }
3849
8455d79e 3850 }
371fefd6 3851
19ccb76a
PM		 3852 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE &&
3853 !signal_pending(current)) {
072df813
PM		 3854 /* See if the MMU is ready to go */
3855 if (!vcpu->kvm->arch.mmu_ready) {
38c53af8 3856 spin_unlock(&vc->lock);
432953b4 3857 r = kvmhv_setup_mmu(vcpu);
38c53af8
PM		 3858 spin_lock(&vc->lock);
3859 if (r) {
3860 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
432953b4
PM		 3861 kvm_run->fail_entry.
3862 hardware_entry_failure_reason = 0;
38c53af8
PM		 3863 vcpu->arch.ret = r;
3864 break;
3865 }
3866 }
3867
ec257165
PM		 3868 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL)
3869 kvmppc_vcore_end_preempt(vc);
3870
8455d79e 3871 if (vc->vcore_state != VCORE_INACTIVE) {
ec257165 3872 kvmppc_wait_for_exec(vc, vcpu, TASK_INTERRUPTIBLE);
19ccb76a
PM		 3873 continue;
3874 }
7b5f8272 3875 for_each_runnable_thread(i, v, vc) {
7e28e60e 3876 kvmppc_core_prepare_to_enter(v);
19ccb76a
PM		 3877 if (signal_pending(v->arch.run_task)) {
3878 kvmppc_remove_runnable(vc, v);
3879 v->stat.signal_exits++;
3880 v->arch.kvm_run->exit_reason = KVM_EXIT_INTR;
3881 v->arch.ret = -EINTR;
3882 wake_up(&v->arch.cpu_run);
3883 }
3884 }
8455d79e
PM		 3885 if (!vc->n_runnable || vcpu->arch.state != KVMPPC_VCPU_RUNNABLE)
3886 break;
8455d79e 3887 n_ceded = 0;
7b5f8272 3888 for_each_runnable_thread(i, v, vc) {
1da4e2f4 3889 if (!kvmppc_vcpu_woken(v))
8455d79e 3890 n_ceded += v->arch.ceded;
4619ac88
PM		 3891 else
3892 v->arch.ceded = 0;
3893 }
25fedfca
PM		 3894 vc->runner = vcpu;
3895 if (n_ceded == vc->n_runnable) {
8455d79e 3896 kvmppc_vcore_blocked(vc);
c56dadf3 3897 } else if (need_resched()) {
ec257165 3898 kvmppc_vcore_preempt(vc);
25fedfca
PM		 3899 /* Let something else run */
3900 cond_resched_lock(&vc->lock);
ec257165
PM		 3901 if (vc->vcore_state == VCORE_PREEMPT)
3902 kvmppc_vcore_end_preempt(vc);
25fedfca 3903 } else {
8455d79e 3904 kvmppc_run_core(vc);
25fedfca 3905 }
0456ec4f 3906 vc->runner = NULL;
19ccb76a 3907 }
371fefd6 3908
8455d79e
PM		 3909 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE &&
3910 (vc->vcore_state == VCORE_RUNNING ||
5fc3e64f
PM		 3911 vc->vcore_state == VCORE_EXITING ||
3912 vc->vcore_state == VCORE_PIGGYBACK))
ec257165 3913 kvmppc_wait_for_exec(vc, vcpu, TASK_UNINTERRUPTIBLE);
8455d79e 3914
5fc3e64f
PM		 3915 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL)
3916 kvmppc_vcore_end_preempt(vc);
3917
8455d79e
PM		 3918 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) {
3919 kvmppc_remove_runnable(vc, vcpu);
3920 vcpu->stat.signal_exits++;
3921 kvm_run->exit_reason = KVM_EXIT_INTR;
3922 vcpu->arch.ret = -EINTR;
3923 }
3924
3925 if (vc->n_runnable && vc->vcore_state == VCORE_INACTIVE) {
3926 /* Wake up some vcpu to run the core */
7b5f8272
SJS		 3927 i = -1;
3928 v = next_runnable_thread(vc, &i);
8455d79e 3929 wake_up(&v->arch.cpu_run);
371fefd6
PM		 3930 }
3931
3c78f78a 3932 trace_kvmppc_run_vcpu_exit(vcpu, kvm_run);
371fefd6 3933 spin_unlock(&vc->lock);
371fefd6 3934 return vcpu->arch.ret;
de56a948
PM		 3935}
3936
360cae31
PM		 3937int kvmhv_run_single_vcpu(struct kvm_run *kvm_run,
3938 struct kvm_vcpu *vcpu, u64 time_limit,
3939 unsigned long lpcr)
95a6432c 3940{
9d0b048d 3941 int trap, r, pcpu;
95a6432c
PM		 3942 int srcu_idx;
3943 struct kvmppc_vcore *vc;
3944 struct kvm *kvm = vcpu->kvm;
360cae31 3945 struct kvm_nested_guest *nested = vcpu->arch.nested;
95a6432c
PM		 3946
3947 trace_kvmppc_run_vcpu_enter(vcpu);
3948
3949 kvm_run->exit_reason = 0;
3950 vcpu->arch.ret = RESUME_GUEST;
3951 vcpu->arch.trap = 0;
3952
3953 vc = vcpu->arch.vcore;
3954 vcpu->arch.ceded = 0;
3955 vcpu->arch.run_task = current;
3956 vcpu->arch.kvm_run = kvm_run;
3957 vcpu->arch.stolen_logged = vcore_stolen_time(vc, mftb());
3958 vcpu->arch.state = KVMPPC_VCPU_RUNNABLE;
3959 vcpu->arch.busy_preempt = TB_NIL;
3960 vcpu->arch.last_inst = KVM_INST_FETCH_FAILED;
3961 vc->runnable_threads[0] = vcpu;
3962 vc->n_runnable = 1;
3963 vc->runner = vcpu;
3964
3965 /* See if the MMU is ready to go */
360cae31
PM		 3966 if (!kvm->arch.mmu_ready)
3967 kvmhv_setup_mmu(vcpu);
95a6432c
PM		 3968
3969 if (need_resched())
3970 cond_resched();
3971
3972 kvmppc_update_vpas(vcpu);
3973
3974 init_vcore_to_run(vc);
3975 vc->preempt_tb = TB_NIL;
3976
3977 preempt_disable();
3978 pcpu = smp_processor_id();
3979 vc->pcpu = pcpu;
3980 kvmppc_prepare_radix_vcpu(vcpu, pcpu);
3981
3982 local_irq_disable();
3983 hard_irq_disable();
3984 if (signal_pending(current))
3985 goto sigpend;
3986 if (lazy_irq_pending() || need_resched() || !kvm->arch.mmu_ready)
3987 goto out;
3988
360cae31
PM		 3989 if (!nested) {
3990 kvmppc_core_prepare_to_enter(vcpu);
3991 if (vcpu->arch.doorbell_request) {
3992 vc->dpdes = 1;
3993 smp_wmb();
3994 vcpu->arch.doorbell_request = 0;
3995 }
3996 if (test_bit(BOOK3S_IRQPRIO_EXTERNAL,
3997 &vcpu->arch.pending_exceptions))
3998 lpcr |= LPCR_MER;
3999 } else if (vcpu->arch.pending_exceptions ||
4000 vcpu->arch.doorbell_request ||
4001 xive_interrupt_pending(vcpu)) {
4002 vcpu->arch.ret = RESUME_HOST;
4003 goto out;
4004 }
95a6432c
PM		 4005
4006 kvmppc_clear_host_core(pcpu);
4007
4008 local_paca->kvm_hstate.tid = 0;
4009 local_paca->kvm_hstate.napping = 0;
4010 local_paca->kvm_hstate.kvm_split_mode = NULL;
4011 kvmppc_start_thread(vcpu, vc);
4012 kvmppc_create_dtl_entry(vcpu, vc);
4013 trace_kvm_guest_enter(vcpu);
4014
4015 vc->vcore_state = VCORE_RUNNING;
4016 trace_kvmppc_run_core(vc, 0);
4017
9d0b048d
SJS		 4018 if (cpu_has_feature(CPU_FTR_HVMODE))
4019 kvmppc_radix_check_need_tlb_flush(kvm, pcpu, nested);
95a6432c
PM		 4020
4021 trace_hardirqs_on();
4022 guest_enter_irqoff();
4023
4024 srcu_idx = srcu_read_lock(&kvm->srcu);
4025
4026 this_cpu_disable_ftrace();
4027
360cae31 4028 trap = kvmhv_p9_guest_entry(vcpu, time_limit, lpcr);
95a6432c
PM		 4029 vcpu->arch.trap = trap;
4030
4031 this_cpu_enable_ftrace();
4032
4033 srcu_read_unlock(&kvm->srcu, srcu_idx);
4034
f3c99f97
PM		 4035 if (cpu_has_feature(CPU_FTR_HVMODE)) {
4036 mtspr(SPRN_LPID, kvm->arch.host_lpid);
4037 isync();
4038 }
95a6432c
PM		 4039
4040 trace_hardirqs_off();
4041 set_irq_happened(trap);
4042
4043 kvmppc_set_host_core(pcpu);
4044
4045 local_irq_enable();
4046 guest_exit();
4047
4048 cpumask_clear_cpu(pcpu, &kvm->arch.cpu_in_guest);
4049
4050 preempt_enable();
4051
4052 /* cancel pending decrementer exception if DEC is now positive */
4053 if (get_tb() < vcpu->arch.dec_expires && kvmppc_core_pending_dec(vcpu))
4054 kvmppc_core_dequeue_dec(vcpu);
4055
4056 trace_kvm_guest_exit(vcpu);
4057 r = RESUME_GUEST;
360cae31
PM		 4058 if (trap) {
4059 if (!nested)
4060 r = kvmppc_handle_exit_hv(kvm_run, vcpu, current);
4061 else
4062 r = kvmppc_handle_nested_exit(vcpu);
4063 }
95a6432c
PM		 4064 vcpu->arch.ret = r;
4065
4066 if (is_kvmppc_resume_guest(r) && vcpu->arch.ceded &&
4067 !kvmppc_vcpu_woken(vcpu)) {
4068 kvmppc_set_timer(vcpu);
4069 while (vcpu->arch.ceded && !kvmppc_vcpu_woken(vcpu)) {
4070 if (signal_pending(current)) {
4071 vcpu->stat.signal_exits++;
4072 kvm_run->exit_reason = KVM_EXIT_INTR;
4073 vcpu->arch.ret = -EINTR;
4074 break;
4075 }
4076 spin_lock(&vc->lock);
4077 kvmppc_vcore_blocked(vc);
4078 spin_unlock(&vc->lock);
4079 }
4080 }
4081 vcpu->arch.ceded = 0;
4082
4083 vc->vcore_state = VCORE_INACTIVE;
4084 trace_kvmppc_run_core(vc, 1);
4085
4086 done:
4087 kvmppc_remove_runnable(vc, vcpu);
4088 trace_kvmppc_run_vcpu_exit(vcpu, kvm_run);
4089
4090 return vcpu->arch.ret;
4091
4092 sigpend:
4093 vcpu->stat.signal_exits++;
4094 kvm_run->exit_reason = KVM_EXIT_INTR;
4095 vcpu->arch.ret = -EINTR;
4096 out:
4097 local_irq_enable();
4098 preempt_enable();
4099 goto done;
4100}
4101
3a167bea 4102static int kvmppc_vcpu_run_hv(struct kvm_run *run, struct kvm_vcpu *vcpu)
a8606e20
PM		 4103{
4104 int r;
913d3ff9 4105 int srcu_idx;
ca8efa1d 4106 unsigned long ebb_regs[3] = {}; /* shut up GCC */
4c3bb4cc
PM		 4107 unsigned long user_tar = 0;
4108 unsigned int user_vrsave;
1b151ce4 4109 struct kvm *kvm;
a8606e20 4110
af8f38b3
AG		 4111 if (!vcpu->arch.sane) {
4112 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4113 return -EINVAL;
4114 }
4115
46a704f8
PM		 4116 /*
4117 * Don't allow entry with a suspended transaction, because
4118 * the guest entry/exit code will lose it.
4119 * If the guest has TM enabled, save away their TM-related SPRs
4120 * (they will get restored by the TM unavailable interrupt).
4121 */
4122#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
4123 if (cpu_has_feature(CPU_FTR_TM) && current->thread.regs &&
4124 (current->thread.regs->msr & MSR_TM)) {
4125 if (MSR_TM_ACTIVE(current->thread.regs->msr)) {
4126 run->exit_reason = KVM_EXIT_FAIL_ENTRY;
4127 run->fail_entry.hardware_entry_failure_reason = 0;
4128 return -EINVAL;
4129 }
e4705715
PM		 4130 /* Enable TM so we can read the TM SPRs */
4131 mtmsr(mfmsr() | MSR_TM);
46a704f8
PM		 4132 current->thread.tm_tfhar = mfspr(SPRN_TFHAR);
4133 current->thread.tm_tfiar = mfspr(SPRN_TFIAR);
4134 current->thread.tm_texasr = mfspr(SPRN_TEXASR);
4135 current->thread.regs->msr &= ~MSR_TM;
4136 }
4137#endif
4138
7aa15842
PM		 4139 /*
4140 * Force online to 1 for the sake of old userspace which doesn't
4141 * set it.
4142 */
4143 if (!vcpu->arch.online) {
4144 atomic_inc(&vcpu->arch.vcore->online_count);
4145 vcpu->arch.online = 1;
4146 }
4147
25051b5a
SW		 4148 kvmppc_core_prepare_to_enter(vcpu);
4149
19ccb76a
PM		 4150 /* No need to go into the guest when all we'll do is come back out */
4151 if (signal_pending(current)) {
4152 run->exit_reason = KVM_EXIT_INTR;
4153 return -EINTR;
4154 }
4155
1b151ce4
PM		 4156 kvm = vcpu->kvm;
4157 atomic_inc(&kvm->arch.vcpus_running);
4158 /* Order vcpus_running vs. mmu_ready, see kvmppc_alloc_reset_hpt */
32fad281
PM		 4159 smp_mb();
4160
579e633e
AB		 4161 flush_all_to_thread(current);
4162
4c3bb4cc 4163 /* Save userspace EBB and other register values */
ca8efa1d
PM		 4164 if (cpu_has_feature(CPU_FTR_ARCH_207S)) {
4165 ebb_regs[0] = mfspr(SPRN_EBBHR);
4166 ebb_regs[1] = mfspr(SPRN_EBBRR);
4167 ebb_regs[2] = mfspr(SPRN_BESCR);
4c3bb4cc 4168 user_tar = mfspr(SPRN_TAR);
ca8efa1d 4169 }
4c3bb4cc 4170 user_vrsave = mfspr(SPRN_VRSAVE);
ca8efa1d 4171
19ccb76a 4172 vcpu->arch.wqp = &vcpu->arch.vcore->wq;
342d3db7 4173 vcpu->arch.pgdir = current->mm->pgd;
c7b67670 4174 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST;
19ccb76a 4175
a8606e20 4176 do {
8d9fcacf
PM		 4177 /*
4178 * The early POWER9 chips that can't mix radix and HPT threads
4179 * on the same core also need the workaround for the problem
4180 * where the TLB would prefetch entries in the guest exit path
4181 * for radix guests using the guest PIDR value and LPID 0.
4182 * The workaround is in the old path (kvmppc_run_vcpu())
4183 * but not the new path (kvmhv_run_single_vcpu()).
4184 */
4185 if (kvm->arch.threads_indep && kvm_is_radix(kvm) &&
4186 !no_mixing_hpt_and_radix)
360cae31
PM		 4187 r = kvmhv_run_single_vcpu(run, vcpu, ~(u64)0,
4188 vcpu->arch.vcore->lpcr);
95a6432c
PM		 4189 else
4190 r = kvmppc_run_vcpu(run, vcpu);
a8606e20
PM		 4191
4192 if (run->exit_reason == KVM_EXIT_PAPR_HCALL &&
4193 !(vcpu->arch.shregs.msr & MSR_PR)) {
3c78f78a 4194 trace_kvm_hcall_enter(vcpu);
a8606e20 4195 r = kvmppc_pseries_do_hcall(vcpu);
3c78f78a 4196 trace_kvm_hcall_exit(vcpu, r);
7e28e60e 4197 kvmppc_core_prepare_to_enter(vcpu);
913d3ff9 4198 } else if (r == RESUME_PAGE_FAULT) {
432953b4 4199 srcu_idx = srcu_read_lock(&kvm->srcu);
913d3ff9
PM		 4200 r = kvmppc_book3s_hv_page_fault(run, vcpu,
4201 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr);
432953b4 4202 srcu_read_unlock(&kvm->srcu, srcu_idx);
5af50993
BH		 4203 } else if (r == RESUME_PASSTHROUGH) {
4204 if (WARN_ON(xive_enabled()))
4205 r = H_SUCCESS;
4206 else
4207 r = kvmppc_xics_rm_complete(vcpu, 0);
4208 }
e59d24e6 4209 } while (is_kvmppc_resume_guest(r));
32fad281 4210
4c3bb4cc 4211 /* Restore userspace EBB and other register values */
ca8efa1d
PM		 4212 if (cpu_has_feature(CPU_FTR_ARCH_207S)) {
4213 mtspr(SPRN_EBBHR, ebb_regs[0]);
4214 mtspr(SPRN_EBBRR, ebb_regs[1]);
4215 mtspr(SPRN_BESCR, ebb_regs[2]);
4c3bb4cc
PM		 4216 mtspr(SPRN_TAR, user_tar);
4217 mtspr(SPRN_FSCR, current->thread.fscr);
ca8efa1d 4218 }
4c3bb4cc 4219 mtspr(SPRN_VRSAVE, user_vrsave);
ca8efa1d 4220
c7b67670 4221 vcpu->arch.state = KVMPPC_VCPU_NOTREADY;
432953b4 4222 atomic_dec(&kvm->arch.vcpus_running);
a8606e20
PM		 4223 return r;
4224}
4225
5b74716e 4226static void kvmppc_add_seg_page_size(struct kvm_ppc_one_seg_page_size **sps,
8dc6cca5 4227 int shift, int sllp)
5b74716e 4228{
8dc6cca5
PM		 4229 (*sps)->page_shift = shift;
4230 (*sps)->slb_enc = sllp;
4231 (*sps)->enc[0].page_shift = shift;
4232 (*sps)->enc[0].pte_enc = kvmppc_pgsize_lp_encoding(shift, shift);
1f365bb0 4233 /*
8dc6cca5 4234 * Add 16MB MPSS support (may get filtered out by userspace)
1f365bb0 4235 */
8dc6cca5
PM		 4236 if (shift != 24) {
4237 int penc = kvmppc_pgsize_lp_encoding(shift, 24);
4238 if (penc != -1) {
4239 (*sps)->enc[1].page_shift = 24;
4240 (*sps)->enc[1].pte_enc = penc;
4241 }
1f365bb0 4242 }
5b74716e
BH		 4243 (*sps)++;
4244}
4245
3a167bea
AK		 4246static int kvm_vm_ioctl_get_smmu_info_hv(struct kvm *kvm,
4247 struct kvm_ppc_smmu_info *info)
5b74716e
BH		 4248{
4249 struct kvm_ppc_one_seg_page_size *sps;
4250
e3bfed1d
PM		 4251 /*
4252 * POWER7, POWER8 and POWER9 all support 32 storage keys for data.
4253 * POWER7 doesn't support keys for instruction accesses,
4254 * POWER8 and POWER9 do.
4255 */
4256 info->data_keys = 32;
4257 info->instr_keys = cpu_has_feature(CPU_FTR_ARCH_207S) ? 32 : 0;
4258
8dc6cca5
PM		 4259 /* POWER7, 8 and 9 all have 1T segments and 32-entry SLB */
4260 info->flags = KVM_PPC_PAGE_SIZES_REAL | KVM_PPC_1T_SEGMENTS;
4261 info->slb_size = 32;
5b74716e
BH		 4262
4263 /* We only support these sizes for now, and no muti-size segments */
4264 sps = &info->sps[0];
8dc6cca5
PM		 4265 kvmppc_add_seg_page_size(&sps, 12, 0);
4266 kvmppc_add_seg_page_size(&sps, 16, SLB_VSID_L | SLB_VSID_LP_01);
4267 kvmppc_add_seg_page_size(&sps, 24, SLB_VSID_L);
5b74716e 4268
901f8c3f
PM		 4269 /* If running as a nested hypervisor, we don't support HPT guests */
4270 if (kvmhv_on_pseries())
4271 info->flags |= KVM_PPC_NO_HASH;
4272
5b74716e
BH		 4273 return 0;
4274}
4275
82ed3616
PM		 4276/*
4277 * Get (and clear) the dirty memory log for a memory slot.
4278 */
3a167bea
AK		 4279static int kvm_vm_ioctl_get_dirty_log_hv(struct kvm *kvm,
4280 struct kvm_dirty_log *log)
82ed3616 4281{
9f6b8029 4282 struct kvm_memslots *slots;
82ed3616 4283 struct kvm_memory_slot *memslot;
8f7b79b8 4284 int i, r;
82ed3616 4285 unsigned long n;
e641a317 4286 unsigned long *buf, *p;
8f7b79b8 4287 struct kvm_vcpu *vcpu;
82ed3616
PM		 4288
4289 mutex_lock(&kvm->slots_lock);
4290
4291 r = -EINVAL;
bbacc0c1 4292 if (log->slot >= KVM_USER_MEM_SLOTS)
82ed3616
PM		 4293 goto out;
4294
9f6b8029
PB		 4295 slots = kvm_memslots(kvm);
4296 memslot = id_to_memslot(slots, log->slot);
82ed3616
PM		 4297 r = -ENOENT;
4298 if (!memslot->dirty_bitmap)
4299 goto out;
4300
8f7b79b8 4301 /*
e641a317
PM		 4302 * Use second half of bitmap area because both HPT and radix
4303 * accumulate bits in the first half.
8f7b79b8 4304 */
82ed3616 4305 n = kvm_dirty_bitmap_bytes(memslot);
8f7b79b8
PM		 4306 buf = memslot->dirty_bitmap + n / sizeof(long);
4307 memset(buf, 0, n);
82ed3616 4308
8f7b79b8
PM		 4309 if (kvm_is_radix(kvm))
4310 r = kvmppc_hv_get_dirty_log_radix(kvm, memslot, buf);
4311 else
4312 r = kvmppc_hv_get_dirty_log_hpt(kvm, memslot, buf);
82ed3616
PM		 4313 if (r)
4314 goto out;
4315
e641a317
PM		 4316 /*
4317 * We accumulate dirty bits in the first half of the
4318 * memslot's dirty_bitmap area, for when pages are paged
4319 * out or modified by the host directly. Pick up these
4320 * bits and add them to the map.
4321 */
4322 p = memslot->dirty_bitmap;
4323 for (i = 0; i < n / sizeof(long); ++i)
4324 buf[i] |= xchg(&p[i], 0);
4325
8f7b79b8
PM		 4326 /* Harvest dirty bits from VPA and DTL updates */
4327 /* Note: we never modify the SLB shadow buffer areas */
4328 kvm_for_each_vcpu(i, vcpu, kvm) {
4329 spin_lock(&vcpu->arch.vpa_update_lock);
4330 kvmppc_harvest_vpa_dirty(&vcpu->arch.vpa, memslot, buf);
4331 kvmppc_harvest_vpa_dirty(&vcpu->arch.dtl, memslot, buf);
4332 spin_unlock(&vcpu->arch.vpa_update_lock);
4333 }
4334
82ed3616 4335 r = -EFAULT;
8f7b79b8 4336 if (copy_to_user(log->dirty_bitmap, buf, n))
82ed3616
PM		 4337 goto out;
4338
4339 r = 0;
4340out:
4341 mutex_unlock(&kvm->slots_lock);
4342 return r;
4343}
4344
3a167bea
AK		 4345static void kvmppc_core_free_memslot_hv(struct kvm_memory_slot *free,
4346 struct kvm_memory_slot *dont)
a66b48c3
PM		 4347{
4348 if (!dont || free->arch.rmap != dont->arch.rmap) {
4349 vfree(free->arch.rmap);
4350 free->arch.rmap = NULL;
b2b2f165 4351 }
a66b48c3
PM		 4352}
4353
3a167bea
AK		 4354static int kvmppc_core_create_memslot_hv(struct kvm_memory_slot *slot,
4355 unsigned long npages)
a66b48c3 4356{
fad953ce 4357 slot->arch.rmap = vzalloc(array_size(npages, sizeof(*slot->arch.rmap)));
a66b48c3
PM		 4358 if (!slot->arch.rmap)
4359 return -ENOMEM;
aa04b4cc 4360
c77162de
PM		 4361 return 0;
4362}
aa04b4cc 4363
3a167bea
AK		 4364static int kvmppc_core_prepare_memory_region_hv(struct kvm *kvm,
4365 struct kvm_memory_slot *memslot,
09170a49 4366 const struct kvm_userspace_memory_region *mem)
c77162de 4367{
a66b48c3 4368 return 0;
c77162de
PM		 4369}
4370
3a167bea 4371static void kvmppc_core_commit_memory_region_hv(struct kvm *kvm,
09170a49 4372 const struct kvm_userspace_memory_region *mem,
f36f3f28
PB		 4373 const struct kvm_memory_slot *old,
4374 const struct kvm_memory_slot *new)
c77162de 4375{
dfe49dbd 4376 unsigned long npages = mem->memory_size >> PAGE_SHIFT;
dfe49dbd 4377
a56ee9f8
YX		 4378 /*
4379 * If we are making a new memslot, it might make
4380 * some address that was previously cached as emulated
4381 * MMIO be no longer emulated MMIO, so invalidate
4382 * all the caches of emulated MMIO translations.
4383 */
4384 if (npages)
4385 atomic64_inc(&kvm->arch.mmio_update);
c77162de
PM		 4386}
4387
a0144e2a
PM		 4388/*
4389 * Update LPCR values in kvm->arch and in vcores.
4390 * Caller must hold kvm->lock.
4391 */
4392void kvmppc_update_lpcr(struct kvm *kvm, unsigned long lpcr, unsigned long mask)
4393{
4394 long int i;
4395 u32 cores_done = 0;
4396
4397 if ((kvm->arch.lpcr & mask) == lpcr)
4398 return;
4399
4400 kvm->arch.lpcr = (kvm->arch.lpcr & ~mask) | lpcr;
4401
4402 for (i = 0; i < KVM_MAX_VCORES; ++i) {
4403 struct kvmppc_vcore *vc = kvm->arch.vcores[i];
4404 if (!vc)
4405 continue;
4406 spin_lock(&vc->lock);
4407 vc->lpcr = (vc->lpcr & ~mask) | lpcr;
4408 spin_unlock(&vc->lock);
4409 if (++cores_done >= kvm->arch.online_vcores)
4410 break;
4411 }
4412}
4413
3a167bea
AK		 4414static void kvmppc_mmu_destroy_hv(struct kvm_vcpu *vcpu)
4415{
4416 return;
4417}
4418
ded13fc1 4419void kvmppc_setup_partition_table(struct kvm *kvm)
7a84084c
PM		 4420{
4421 unsigned long dw0, dw1;
4422
8cf4ecc0
PM		 4423 if (!kvm_is_radix(kvm)) {
4424 /* PS field - page size for VRMA */
4425 dw0 = ((kvm->arch.vrma_slb_v & SLB_VSID_L) >> 1) |
4426 ((kvm->arch.vrma_slb_v & SLB_VSID_LP) << 1);
4427 /* HTABSIZE and HTABORG fields */
4428 dw0 |= kvm->arch.sdr1;
7a84084c 4429
8cf4ecc0
PM		 4430 /* Second dword as set by userspace */
4431 dw1 = kvm->arch.process_table;
4432 } else {
4433 dw0 = PATB_HR | radix__get_tree_size() |
4434 __pa(kvm->arch.pgtable) | RADIX_PGD_INDEX_SIZE;
4435 dw1 = PATB_GR | kvm->arch.process_table;
4436 }
8e3f5fc1 4437 kvmhv_set_ptbl_entry(kvm->arch.lpid, dw0, dw1);
7a84084c
PM		 4438}
4439
1b151ce4
PM		 4440/*
4441 * Set up HPT (hashed page table) and RMA (real-mode area).
4442 * Must be called with kvm->lock held.
4443 */
32fad281 4444static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu)
c77162de
PM		 4445{
4446 int err = 0;
4447 struct kvm *kvm = vcpu->kvm;
c77162de
PM		 4448 unsigned long hva;
4449 struct kvm_memory_slot *memslot;
4450 struct vm_area_struct *vma;
a0144e2a 4451 unsigned long lpcr = 0, senc;
c77162de 4452 unsigned long psize, porder;
2c9097e4 4453 int srcu_idx;
c77162de 4454
32fad281 4455 /* Allocate hashed page table (if not done already) and reset it */
3f9d4f5a 4456 if (!kvm->arch.hpt.virt) {
aae0777f
DG		 4457 int order = KVM_DEFAULT_HPT_ORDER;
4458 struct kvm_hpt_info info;
4459
4460 err = kvmppc_allocate_hpt(&info, order);
4461 /* If we get here, it means userspace didn't specify a
4462 * size explicitly. So, try successively smaller
4463 * sizes if the default failed. */
4464 while ((err == -ENOMEM) && --order >= PPC_MIN_HPT_ORDER)
4465 err = kvmppc_allocate_hpt(&info, order);
4466
4467 if (err < 0) {
32fad281
PM		 4468 pr_err("KVM: Couldn't alloc HPT\n");
4469 goto out;
4470 }
aae0777f
DG		 4471
4472 kvmppc_set_hpt(kvm, &info);
32fad281
PM		 4473 }
4474
c77162de 4475 /* Look up the memslot for guest physical address 0 */
2c9097e4 4476 srcu_idx = srcu_read_lock(&kvm->srcu);
c77162de 4477 memslot = gfn_to_memslot(kvm, 0);
aa04b4cc 4478
c77162de
PM		 4479 /* We must have some memory at 0 by now */
4480 err = -EINVAL;
4481 if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID))
2c9097e4 4482 goto out_srcu;
c77162de
PM		 4483
4484 /* Look up the VMA for the start of this memory slot */
4485 hva = memslot->userspace_addr;
4486 down_read(&current->mm->mmap_sem);
4487 vma = find_vma(current->mm, hva);
4488 if (!vma || vma->vm_start > hva || (vma->vm_flags & VM_IO))
4489 goto up_out;
4490
4491 psize = vma_kernel_pagesize(vma);
c77162de 4492
c77162de
PM		 4493 up_read(&current->mm->mmap_sem);
4494
c17b98cf 4495 /* We can handle 4k, 64k or 16M pages in the VRMA */
debd574f
PM		 4496 if (psize >= 0x1000000)
4497 psize = 0x1000000;
4498 else if (psize >= 0x10000)
4499 psize = 0x10000;
4500 else
4501 psize = 0x1000;
4502 porder = __ilog2(psize);
c77162de 4503
c17b98cf
PM		 4504 senc = slb_pgsize_encoding(psize);
4505 kvm->arch.vrma_slb_v = senc | SLB_VSID_B_1T |
4506 (VRMA_VSID << SLB_VSID_SHIFT_1T);
c17b98cf
PM		 4507 /* Create HPTEs in the hash page table for the VRMA */
4508 kvmppc_map_vrma(vcpu, memslot, porder);
aa04b4cc 4509
7a84084c
PM		 4510 /* Update VRMASD field in the LPCR */
4511 if (!cpu_has_feature(CPU_FTR_ARCH_300)) {
4512 /* the -4 is to account for senc values starting at 0x10 */
4513 lpcr = senc << (LPCR_VRMASD_SH - 4);
4514 kvmppc_update_lpcr(kvm, lpcr, LPCR_VRMASD);
7a84084c 4515 }
a0144e2a 4516
1b151ce4 4517 /* Order updates to kvm->arch.lpcr etc. vs. mmu_ready */
c77162de 4518 smp_wmb();
c77162de 4519 err = 0;
2c9097e4
PM		 4520 out_srcu:
4521 srcu_read_unlock(&kvm->srcu, srcu_idx);
c77162de 4522 out:
c77162de 4523 return err;
b2b2f165 4524
c77162de
PM		 4525 up_out:
4526 up_read(&current->mm->mmap_sem);
505d6421 4527 goto out_srcu;
de56a948
PM		 4528}
4529
18c3640c
PM		 4530/* Must be called with kvm->lock held and mmu_ready = 0 and no vcpus running */
4531int kvmppc_switch_mmu_to_hpt(struct kvm *kvm)
4532{
aa069a99 4533 if (nesting_enabled(kvm))
8e3f5fc1 4534 kvmhv_release_all_nested(kvm);
18c3640c
PM		 4535 kvmppc_free_radix(kvm);
4536 kvmppc_update_lpcr(kvm, LPCR_VPM1,
4537 LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR);
4538 kvmppc_rmap_reset(kvm);
4539 kvm->arch.radix = 0;
4540 kvm->arch.process_table = 0;
4541 return 0;
4542}
4543
4544/* Must be called with kvm->lock held and mmu_ready = 0 and no vcpus running */
4545int kvmppc_switch_mmu_to_radix(struct kvm *kvm)
4546{
4547 int err;
4548
4549 err = kvmppc_init_vm_radix(kvm);
4550 if (err)
4551 return err;
4552
4553 kvmppc_free_hpt(&kvm->arch.hpt);
4554 kvmppc_update_lpcr(kvm, LPCR_UPRT | LPCR_GTSE | LPCR_HR,
4555 LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR);
8cf531ed 4556 kvmppc_rmap_reset(kvm);
18c3640c
PM		 4557 kvm->arch.radix = 1;
4558 return 0;
4559}
4560
79b6c247
SW		 4561#ifdef CONFIG_KVM_XICS
4562/*
4563 * Allocate a per-core structure for managing state about which cores are
4564 * running in the host versus the guest and for exchanging data between
4565 * real mode KVM and CPU running in the host.
4566 * This is only done for the first VM.
4567 * The allocated structure stays even if all VMs have stopped.
4568 * It is only freed when the kvm-hv module is unloaded.
4569 * It's OK for this routine to fail, we just don't support host
4570 * core operations like redirecting H_IPI wakeups.
4571 */
4572void kvmppc_alloc_host_rm_ops(void)
4573{
4574 struct kvmppc_host_rm_ops *ops;
4575 unsigned long l_ops;
4576 int cpu, core;
4577 int size;
4578
4579 /* Not the first time here ? */
4580 if (kvmppc_host_rm_ops_hv != NULL)
4581 return;
4582
4583 ops = kzalloc(sizeof(struct kvmppc_host_rm_ops), GFP_KERNEL);
4584 if (!ops)
4585 return;
4586
4587 size = cpu_nr_cores() * sizeof(struct kvmppc_host_rm_core);
4588 ops->rm_core = kzalloc(size, GFP_KERNEL);
4589
4590 if (!ops->rm_core) {
4591 kfree(ops);
4592 return;
4593 }
4594
419af25f 4595 cpus_read_lock();
6f3bb809 4596
79b6c247
SW		 4597 for (cpu = 0; cpu < nr_cpu_ids; cpu += threads_per_core) {
4598 if (!cpu_online(cpu))
4599 continue;
4600
4601 core = cpu >> threads_shift;
4602 ops->rm_core[core].rm_state.in_host = 1;
4603 }
4604
0c2a6606
SW		 4605 ops->vcpu_kick = kvmppc_fast_vcpu_kick_hv;
4606
79b6c247
SW		 4607 /*
4608 * Make the contents of the kvmppc_host_rm_ops structure visible
4609 * to other CPUs before we assign it to the global variable.
4610 * Do an atomic assignment (no locks used here), but if someone
4611 * beats us to it, just free our copy and return.
4612 */
4613 smp_wmb();
4614 l_ops = (unsigned long) ops;
4615
4616 if (cmpxchg64((unsigned long *)&kvmppc_host_rm_ops_hv, 0, l_ops)) {
419af25f 4617 cpus_read_unlock();
79b6c247
SW		 4618 kfree(ops->rm_core);
4619 kfree(ops);
6f3bb809 4620 return;
79b6c247 4621 }
6f3bb809 4622
419af25f
SAS		 4623 cpuhp_setup_state_nocalls_cpuslocked(CPUHP_KVM_PPC_BOOK3S_PREPARE,
4624 "ppc/kvm_book3s:prepare",
4625 kvmppc_set_host_core,
4626 kvmppc_clear_host_core);
4627 cpus_read_unlock();
79b6c247
SW		 4628}
4629
4630void kvmppc_free_host_rm_ops(void)
4631{
4632 if (kvmppc_host_rm_ops_hv) {
3f7cd919 4633 cpuhp_remove_state_nocalls(CPUHP_KVM_PPC_BOOK3S_PREPARE);
79b6c247
SW		 4634 kfree(kvmppc_host_rm_ops_hv->rm_core);
4635 kfree(kvmppc_host_rm_ops_hv);
4636 kvmppc_host_rm_ops_hv = NULL;
4637 }
4638}
4639#endif
4640
3a167bea 4641static int kvmppc_core_init_vm_hv(struct kvm *kvm)
de56a948 4642{
32fad281 4643 unsigned long lpcr, lpid;
e23a808b 4644 char buf[32];
8cf4ecc0 4645 int ret;
de56a948 4646
32fad281
PM		 4647 /* Allocate the guest's logical partition ID */
4648
4649 lpid = kvmppc_alloc_lpid();
5d226ae5 4650 if ((long)lpid < 0)
32fad281
PM		 4651 return -ENOMEM;
4652 kvm->arch.lpid = lpid;
de56a948 4653
79b6c247
SW		 4654 kvmppc_alloc_host_rm_ops();
4655
8e3f5fc1
PM		 4656 kvmhv_vm_nested_init(kvm);
4657
1b400ba0
PM		 4658 /*
4659 * Since we don't flush the TLB when tearing down a VM,
4660 * and this lpid might have previously been used,
4661 * make sure we flush on each core before running the new VM.
7c5b06ca
PM		 4662 * On POWER9, the tlbie in mmu_partition_table_set_entry()
4663 * does this flush for us.
1b400ba0 4664 */
7c5b06ca
PM		 4665 if (!cpu_has_feature(CPU_FTR_ARCH_300))
4666 cpumask_setall(&kvm->arch.need_tlb_flush);
1b400ba0 4667
699a0ea0
PM		 4668 /* Start out with the default set of hcalls enabled */
4669 memcpy(kvm->arch.enabled_hcalls, default_enabled_hcalls,
4670 sizeof(kvm->arch.enabled_hcalls));
4671
7a84084c
PM		 4672 if (!cpu_has_feature(CPU_FTR_ARCH_300))
4673 kvm->arch.host_sdr1 = mfspr(SPRN_SDR1);
aa04b4cc 4674
c17b98cf 4675 /* Init LPCR for virtual RMA mode */
f3c99f97
PM		 4676 if (cpu_has_feature(CPU_FTR_HVMODE)) {
4677 kvm->arch.host_lpid = mfspr(SPRN_LPID);
4678 kvm->arch.host_lpcr = lpcr = mfspr(SPRN_LPCR);
4679 lpcr &= LPCR_PECE | LPCR_LPES;
4680 } else {
4681 lpcr = 0;
4682 }
c17b98cf
PM		 4683 lpcr |= (4UL << LPCR_DPFD_SH) | LPCR_HDICE |
4684 LPCR_VPM0 | LPCR_VPM1;
4685 kvm->arch.vrma_slb_v = SLB_VSID_B_1T |
4686 (VRMA_VSID << SLB_VSID_SHIFT_1T);
4687 /* On POWER8 turn on online bit to enable PURR/SPURR */
4688 if (cpu_has_feature(CPU_FTR_ARCH_207S))
4689 lpcr |= LPCR_ONL;
84f7139c
PM		 4690 /*
4691 * On POWER9, VPM0 bit is reserved (VPM0=1 behaviour is assumed)
4692 * Set HVICE bit to enable hypervisor virtualization interrupts.
5af50993
BH		 4693 * Set HEIC to prevent OS interrupts to go to hypervisor (should
4694 * be unnecessary but better safe than sorry in case we re-enable
4695 * EE in HV mode with this LPCR still set)
84f7139c
PM		 4696 */
4697 if (cpu_has_feature(CPU_FTR_ARCH_300)) {
7a84084c 4698 lpcr &= ~LPCR_VPM0;
5af50993
BH		 4699 lpcr |= LPCR_HVICE | LPCR_HEIC;
4700
4701 /*
4702 * If xive is enabled, we route 0x500 interrupts directly
4703 * to the guest.
4704 */
4705 if (xive_enabled())
4706 lpcr |= LPCR_LPES;
84f7139c
PM		 4707 }
4708
8cf4ecc0 4709 /*
18c3640c 4710 * If the host uses radix, the guest starts out as radix.
8cf4ecc0
PM		 4711 */
4712 if (radix_enabled()) {
4713 kvm->arch.radix = 1;
1b151ce4 4714 kvm->arch.mmu_ready = 1;
8cf4ecc0
PM		 4715 lpcr &= ~LPCR_VPM1;
4716 lpcr |= LPCR_UPRT | LPCR_GTSE | LPCR_HR;
4717 ret = kvmppc_init_vm_radix(kvm);
4718 if (ret) {
4719 kvmppc_free_lpid(kvm->arch.lpid);
4720 return ret;
4721 }
4722 kvmppc_setup_partition_table(kvm);
4723 }
4724
9e368f29 4725 kvm->arch.lpcr = lpcr;
aa04b4cc 4726
5e985969
DG		 4727 /* Initialization for future HPT resizes */
4728 kvm->arch.resize_hpt = NULL;
4729
7c5b06ca
PM		 4730 /*
4731 * Work out how many sets the TLB has, for the use of
4732 * the TLB invalidation loop in book3s_hv_rmhandlers.S.
4733 */
18c3640c 4734 if (radix_enabled())
8cf4ecc0
PM		 4735 kvm->arch.tlb_sets = POWER9_TLB_SETS_RADIX; /* 128 */
4736 else if (cpu_has_feature(CPU_FTR_ARCH_300))
7c5b06ca
PM		 4737 kvm->arch.tlb_sets = POWER9_TLB_SETS_HASH; /* 256 */
4738 else if (cpu_has_feature(CPU_FTR_ARCH_207S))
4739 kvm->arch.tlb_sets = POWER8_TLB_SETS; /* 512 */
4740 else
4741 kvm->arch.tlb_sets = POWER7_TLB_SETS; /* 128 */
4742
512691d4 4743 /*
441c19c8
ME		 4744 * Track that we now have a HV mode VM active. This blocks secondary
4745 * CPU threads from coming online.
516f7898
PM		 4746 * On POWER9, we only need to do this if the "indep_threads_mode"
4747 * module parameter has been set to N.
512691d4 4748 */
360cae31
PM		 4749 if (cpu_has_feature(CPU_FTR_ARCH_300)) {
4750 if (!indep_threads_mode && !cpu_has_feature(CPU_FTR_HVMODE)) {
4751 pr_warn("KVM: Ignoring indep_threads_mode=N in nested hypervisor\n");
4752 kvm->arch.threads_indep = true;
4753 } else {
4754 kvm->arch.threads_indep = indep_threads_mode;
4755 }
4756 }
516f7898 4757 if (!kvm->arch.threads_indep)
8cf4ecc0 4758 kvm_hv_vm_activated();
512691d4 4759
3c313524
PM		 4760 /*
4761 * Initialize smt_mode depending on processor.
4762 * POWER8 and earlier have to use "strict" threading, where
4763 * all vCPUs in a vcore have to run on the same (sub)core,
4764 * whereas on POWER9 the threads can each run a different
4765 * guest.
4766 */
4767 if (!cpu_has_feature(CPU_FTR_ARCH_300))
4768 kvm->arch.smt_mode = threads_per_subcore;
4769 else
4770 kvm->arch.smt_mode = 1;
57900694 4771 kvm->arch.emul_smt_mode = 1;
3c313524 4772
e23a808b
PM		 4773 /*
4774 * Create a debugfs directory for the VM
4775 */
4776 snprintf(buf, sizeof(buf), "vm%d", current->pid);
4777 kvm->arch.debugfs_dir = debugfs_create_dir(buf, kvm_debugfs_dir);
929f45e3 4778 kvmppc_mmu_debugfs_init(kvm);
9a94d3ee
PM		 4779 if (radix_enabled())
4780 kvmhv_radix_debugfs_init(kvm);
e23a808b 4781
54738c09 4782 return 0;
de56a948
PM		 4783}
4784
f1378b1c
PM		 4785static void kvmppc_free_vcores(struct kvm *kvm)
4786{
4787 long int i;
4788
23316316 4789 for (i = 0; i < KVM_MAX_VCORES; ++i)
f1378b1c
PM		 4790 kfree(kvm->arch.vcores[i]);
4791 kvm->arch.online_vcores = 0;
4792}
4793
3a167bea 4794static void kvmppc_core_destroy_vm_hv(struct kvm *kvm)
de56a948 4795{
e23a808b
PM		 4796 debugfs_remove_recursive(kvm->arch.debugfs_dir);
4797
516f7898 4798 if (!kvm->arch.threads_indep)
8cf4ecc0 4799 kvm_hv_vm_deactivated();
512691d4 4800
f1378b1c 4801 kvmppc_free_vcores(kvm);
aa04b4cc 4802
8cf4ecc0 4803
5a319350
PM		 4804 if (kvm_is_radix(kvm))
4805 kvmppc_free_radix(kvm);
4806 else
aae0777f 4807 kvmppc_free_hpt(&kvm->arch.hpt);
c57875f5 4808
89329c0b
SJS		 4809 /* Perform global invalidation and return lpid to the pool */
4810 if (cpu_has_feature(CPU_FTR_ARCH_300)) {
aa069a99 4811 if (nesting_enabled(kvm))
8e3f5fc1 4812 kvmhv_release_all_nested(kvm);
89329c0b 4813 kvm->arch.process_table = 0;
8e3f5fc1 4814 kvmhv_set_ptbl_entry(kvm->arch.lpid, 0, 0);
89329c0b
SJS		 4815 }
4816 kvmppc_free_lpid(kvm->arch.lpid);
4817
c57875f5 4818 kvmppc_free_pimap(kvm);
de56a948
PM		 4819}
4820
3a167bea
AK		 4821/* We don't need to emulate any privileged instructions or dcbz */
4822static int kvmppc_core_emulate_op_hv(struct kvm_run *run, struct kvm_vcpu *vcpu,
4823 unsigned int inst, int *advance)
de56a948 4824{
3a167bea 4825 return EMULATE_FAIL;
de56a948
PM		 4826}
4827
3a167bea
AK		 4828static int kvmppc_core_emulate_mtspr_hv(struct kvm_vcpu *vcpu, int sprn,
4829 ulong spr_val)
de56a948
PM		 4830{
4831 return EMULATE_FAIL;
4832}
4833
3a167bea
AK		 4834static int kvmppc_core_emulate_mfspr_hv(struct kvm_vcpu *vcpu, int sprn,
4835 ulong *spr_val)
de56a948
PM		 4836{
4837 return EMULATE_FAIL;
4838}
4839
3a167bea 4840static int kvmppc_core_check_processor_compat_hv(void)
de56a948 4841{
de760db4
PM		 4842 if (cpu_has_feature(CPU_FTR_HVMODE) &&
4843 cpu_has_feature(CPU_FTR_ARCH_206))
4844 return 0;
50de596d 4845
de760db4
PM		 4846 /* POWER9 in radix mode is capable of being a nested hypervisor. */
4847 if (cpu_has_feature(CPU_FTR_ARCH_300) && radix_enabled())
4848 return 0;
4849
4850 return -EIO;
de56a948
PM		 4851}
4852
8daaafc8
SW		 4853#ifdef CONFIG_KVM_XICS
4854
4855void kvmppc_free_pimap(struct kvm *kvm)
4856{
4857 kfree(kvm->arch.pimap);
4858}
4859
c57875f5 4860static struct kvmppc_passthru_irqmap *kvmppc_alloc_pimap(void)
8daaafc8
SW		 4861{
4862 return kzalloc(sizeof(struct kvmppc_passthru_irqmap), GFP_KERNEL);
4863}
c57875f5
SW		 4864
4865static int kvmppc_set_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi)
4866{
4867 struct irq_desc *desc;
4868 struct kvmppc_irq_map *irq_map;
4869 struct kvmppc_passthru_irqmap *pimap;
4870 struct irq_chip *chip;
5af50993 4871 int i, rc = 0;
c57875f5 4872
644abbb2
SW		 4873 if (!kvm_irq_bypass)
4874 return 1;
4875
c57875f5
SW		 4876 desc = irq_to_desc(host_irq);
4877 if (!desc)
4878 return -EIO;
4879
4880 mutex_lock(&kvm->lock);
4881
4882 pimap = kvm->arch.pimap;
4883 if (pimap == NULL) {
4884 /* First call, allocate structure to hold IRQ map */
4885 pimap = kvmppc_alloc_pimap();
4886 if (pimap == NULL) {
4887 mutex_unlock(&kvm->lock);
4888 return -ENOMEM;
4889 }
4890 kvm->arch.pimap = pimap;
4891 }
4892
4893 /*
4894 * For now, we only support interrupts for which the EOI operation
4895 * is an OPAL call followed by a write to XIRR, since that's
5af50993 4896 * what our real-mode EOI code does, or a XIVE interrupt
c57875f5
SW		 4897 */
4898 chip = irq_data_get_irq_chip(&desc->irq_data);
5af50993 4899 if (!chip || !(is_pnv_opal_msi(chip) || is_xive_irq(chip))) {
c57875f5
SW		 4900 pr_warn("kvmppc_set_passthru_irq_hv: Could not assign IRQ map for (%d,%d)\n",
4901 host_irq, guest_gsi);
4902 mutex_unlock(&kvm->lock);
4903 return -ENOENT;
4904 }
4905
4906 /*
4907 * See if we already have an entry for this guest IRQ number.
4908 * If it's mapped to a hardware IRQ number, that's an error,
4909 * otherwise re-use this entry.
4910 */
4911 for (i = 0; i < pimap->n_mapped; i++) {
4912 if (guest_gsi == pimap->mapped[i].v_hwirq) {
4913 if (pimap->mapped[i].r_hwirq) {
4914 mutex_unlock(&kvm->lock);
4915 return -EINVAL;
4916 }
4917 break;
4918 }
4919 }
4920
4921 if (i == KVMPPC_PIRQ_MAPPED) {
4922 mutex_unlock(&kvm->lock);
4923 return -EAGAIN; /* table is full */
4924 }
4925
4926 irq_map = &pimap->mapped[i];
4927
4928 irq_map->v_hwirq = guest_gsi;
c57875f5
SW		 4929 irq_map->desc = desc;
4930
e3c13e56
SW		 4931 /*
4932 * Order the above two stores before the next to serialize with
4933 * the KVM real mode handler.
4934 */
4935 smp_wmb();
4936 irq_map->r_hwirq = desc->irq_data.hwirq;
4937
c57875f5
SW		 4938 if (i == pimap->n_mapped)
4939 pimap->n_mapped++;
4940
5af50993
BH		 4941 if (xive_enabled())
4942 rc = kvmppc_xive_set_mapped(kvm, guest_gsi, desc);
4943 else
4944 kvmppc_xics_set_mapped(kvm, guest_gsi, desc->irq_data.hwirq);
4945 if (rc)
4946 irq_map->r_hwirq = 0;
5d375199 4947
c57875f5
SW		 4948 mutex_unlock(&kvm->lock);
4949
4950 return 0;
4951}
4952
4953static int kvmppc_clr_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi)
4954{
4955 struct irq_desc *desc;
4956 struct kvmppc_passthru_irqmap *pimap;
5af50993 4957 int i, rc = 0;
c57875f5 4958
644abbb2
SW		 4959 if (!kvm_irq_bypass)
4960 return 0;
4961
c57875f5
SW		 4962 desc = irq_to_desc(host_irq);
4963 if (!desc)
4964 return -EIO;
4965
4966 mutex_lock(&kvm->lock);
a1c52e1c
ME		 4967 if (!kvm->arch.pimap)
4968 goto unlock;
c57875f5 4969
c57875f5
SW		 4970 pimap = kvm->arch.pimap;
4971
4972 for (i = 0; i < pimap->n_mapped; i++) {
4973 if (guest_gsi == pimap->mapped[i].v_hwirq)
4974 break;
4975 }
4976
4977 if (i == pimap->n_mapped) {
4978 mutex_unlock(&kvm->lock);
4979 return -ENODEV;
4980 }
4981
5af50993
BH		 4982 if (xive_enabled())
4983 rc = kvmppc_xive_clr_mapped(kvm, guest_gsi, pimap->mapped[i].desc);
4984 else
4985 kvmppc_xics_clr_mapped(kvm, guest_gsi, pimap->mapped[i].r_hwirq);
5d375199 4986
5af50993 4987 /* invalidate the entry (what do do on error from the above ?) */
c57875f5
SW		 4988 pimap->mapped[i].r_hwirq = 0;
4989
4990 /*
4991 * We don't free this structure even when the count goes to
4992 * zero. The structure is freed when we destroy the VM.
4993 */
a1c52e1c 4994 unlock:
c57875f5 4995 mutex_unlock(&kvm->lock);
5af50993 4996 return rc;
c57875f5
SW		 4997}
4998
4999static int kvmppc_irq_bypass_add_producer_hv(struct irq_bypass_consumer *cons,
5000 struct irq_bypass_producer *prod)
5001{
5002 int ret = 0;
5003 struct kvm_kernel_irqfd *irqfd =
5004 container_of(cons, struct kvm_kernel_irqfd, consumer);
5005
5006 irqfd->producer = prod;
5007
5008 ret = kvmppc_set_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi);
5009 if (ret)
5010 pr_info("kvmppc_set_passthru_irq (irq %d, gsi %d) fails: %d\n",
5011 prod->irq, irqfd->gsi, ret);
5012
5013 return ret;
5014}
5015
5016static void kvmppc_irq_bypass_del_producer_hv(struct irq_bypass_consumer *cons,
5017 struct irq_bypass_producer *prod)
5018{
5019 int ret;
5020 struct kvm_kernel_irqfd *irqfd =
5021 container_of(cons, struct kvm_kernel_irqfd, consumer);
5022
5023 irqfd->producer = NULL;
5024
5025 /*
5026 * When producer of consumer is unregistered, we change back to
5027 * default external interrupt handling mode - KVM real mode
5028 * will switch back to host.
5029 */
5030 ret = kvmppc_clr_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi);
5031 if (ret)
5032 pr_warn("kvmppc_clr_passthru_irq (irq %d, gsi %d) fails: %d\n",
5033 prod->irq, irqfd->gsi, ret);
5034}
8daaafc8
SW		 5035#endif
5036
3a167bea
AK		 5037static long kvm_arch_vm_ioctl_hv(struct file *filp,
5038 unsigned int ioctl, unsigned long arg)
5039{
5040 struct kvm *kvm __maybe_unused = filp->private_data;
5041 void __user *argp = (void __user *)arg;
5042 long r;
5043
5044 switch (ioctl) {
5045
3a167bea
AK		 5046 case KVM_PPC_ALLOCATE_HTAB: {
5047 u32 htab_order;
5048
5049 r = -EFAULT;
5050 if (get_user(htab_order, (u32 __user *)argp))
5051 break;
f98a8bf9 5052 r = kvmppc_alloc_reset_hpt(kvm, htab_order);
3a167bea
AK		 5053 if (r)
5054 break;
3a167bea
AK		 5055 r = 0;
5056 break;
5057 }
5058
5059 case KVM_PPC_GET_HTAB_FD: {
5060 struct kvm_get_htab_fd ghf;
5061
5062 r = -EFAULT;
5063 if (copy_from_user(&ghf, argp, sizeof(ghf)))
5064 break;
5065 r = kvm_vm_ioctl_get_htab_fd(kvm, &ghf);
5066 break;
5067 }
5068
5e985969
DG		 5069 case KVM_PPC_RESIZE_HPT_PREPARE: {
5070 struct kvm_ppc_resize_hpt rhpt;
5071
5072 r = -EFAULT;
5073 if (copy_from_user(&rhpt, argp, sizeof(rhpt)))
5074 break;
5075
5076 r = kvm_vm_ioctl_resize_hpt_prepare(kvm, &rhpt);
5077 break;
5078 }
5079
5080 case KVM_PPC_RESIZE_HPT_COMMIT: {
5081 struct kvm_ppc_resize_hpt rhpt;
5082
5083 r = -EFAULT;
5084 if (copy_from_user(&rhpt, argp, sizeof(rhpt)))
5085 break;
5086
5087 r = kvm_vm_ioctl_resize_hpt_commit(kvm, &rhpt);
5088 break;
5089 }
5090
3a167bea
AK		 5091 default:
5092 r = -ENOTTY;
5093 }
5094
5095 return r;
5096}
5097
699a0ea0
PM		 5098/*
5099 * List of hcall numbers to enable by default.
5100 * For compatibility with old userspace, we enable by default
5101 * all hcalls that were implemented before the hcall-enabling
5102 * facility was added. Note this list should not include H_RTAS.
5103 */
5104static unsigned int default_hcall_list[] = {
5105 H_REMOVE,
5106 H_ENTER,
5107 H_READ,
5108 H_PROTECT,
5109 H_BULK_REMOVE,
5110 H_GET_TCE,
5111 H_PUT_TCE,
5112 H_SET_DABR,
5113 H_SET_XDABR,
5114 H_CEDE,
5115 H_PROD,
5116 H_CONFER,
5117 H_REGISTER_VPA,
5118#ifdef CONFIG_KVM_XICS
5119 H_EOI,
5120 H_CPPR,
5121 H_IPI,
5122 H_IPOLL,
5123 H_XIRR,
5124 H_XIRR_X,
5125#endif
5126 0
5127};
5128
5129static void init_default_hcalls(void)
5130{
5131 int i;
ae2113a4 5132 unsigned int hcall;
699a0ea0 5133
ae2113a4
PM		 5134 for (i = 0; default_hcall_list[i]; ++i) {
5135 hcall = default_hcall_list[i];
5136 WARN_ON(!kvmppc_hcall_impl_hv(hcall));
5137 __set_bit(hcall / 4, default_enabled_hcalls);
5138 }
699a0ea0
PM		 5139}
5140
c9270132
PM		 5141static int kvmhv_configure_mmu(struct kvm *kvm, struct kvm_ppc_mmuv3_cfg *cfg)
5142{
468808bd 5143 unsigned long lpcr;
8cf4ecc0 5144 int radix;
18c3640c 5145 int err;
468808bd
PM		 5146
5147 /* If not on a POWER9, reject it */
5148 if (!cpu_has_feature(CPU_FTR_ARCH_300))
5149 return -ENODEV;
5150
5151 /* If any unknown flags set, reject it */
5152 if (cfg->flags & ~(KVM_PPC_MMUV3_RADIX | KVM_PPC_MMUV3_GTSE))
5153 return -EINVAL;
5154
468808bd 5155 /* GR (guest radix) bit in process_table field must match */
18c3640c 5156 radix = !!(cfg->flags & KVM_PPC_MMUV3_RADIX);
8cf4ecc0 5157 if (!!(cfg->process_table & PATB_GR) != radix)
468808bd
PM		 5158 return -EINVAL;
5159
5160 /* Process table size field must be reasonable, i.e. <= 24 */
5161 if ((cfg->process_table & PRTS_MASK) > 24)
5162 return -EINVAL;
5163
18c3640c
PM		 5164 /* We can change a guest to/from radix now, if the host is radix */
5165 if (radix && !radix_enabled())
5166 return -EINVAL;
5167
de760db4
PM		 5168 /* If we're a nested hypervisor, we currently only support radix */
5169 if (kvmhv_on_pseries() && !radix)
5170 return -EINVAL;
5171
cf5f6f31 5172 mutex_lock(&kvm->lock);
18c3640c
PM		 5173 if (radix != kvm_is_radix(kvm)) {
5174 if (kvm->arch.mmu_ready) {
5175 kvm->arch.mmu_ready = 0;
5176 /* order mmu_ready vs. vcpus_running */
5177 smp_mb();
5178 if (atomic_read(&kvm->arch.vcpus_running)) {
5179 kvm->arch.mmu_ready = 1;
5180 err = -EBUSY;
5181 goto out_unlock;
5182 }
5183 }
5184 if (radix)
5185 err = kvmppc_switch_mmu_to_radix(kvm);
5186 else
5187 err = kvmppc_switch_mmu_to_hpt(kvm);
5188 if (err)
5189 goto out_unlock;
5190 }
5191
468808bd
PM		 5192 kvm->arch.process_table = cfg->process_table;
5193 kvmppc_setup_partition_table(kvm);
5194
5195 lpcr = (cfg->flags & KVM_PPC_MMUV3_GTSE) ? LPCR_GTSE : 0;
5196 kvmppc_update_lpcr(kvm, lpcr, LPCR_GTSE);
18c3640c 5197 err = 0;
468808bd 5198
18c3640c
PM		 5199 out_unlock:
5200 mutex_unlock(&kvm->lock);
5201 return err;
c9270132
PM		 5202}
5203
aa069a99
PM		 5204static int kvmhv_enable_nested(struct kvm *kvm)
5205{
5206 if (!nested)
5207 return -EPERM;
8d9fcacf 5208 if (!cpu_has_feature(CPU_FTR_ARCH_300) || no_mixing_hpt_and_radix)
aa069a99
PM		 5209 return -ENODEV;
5210
5211 /* kvm == NULL means the caller is testing if the capability exists */
5212 if (kvm)
5213 kvm->arch.nested_enable = true;
5214 return 0;
5215}
5216
cbbc58d4 5217static struct kvmppc_ops kvm_ops_hv = {
3a167bea
AK		 5218 .get_sregs = kvm_arch_vcpu_ioctl_get_sregs_hv,
5219 .set_sregs = kvm_arch_vcpu_ioctl_set_sregs_hv,
5220 .get_one_reg = kvmppc_get_one_reg_hv,
5221 .set_one_reg = kvmppc_set_one_reg_hv,
5222 .vcpu_load = kvmppc_core_vcpu_load_hv,
5223 .vcpu_put = kvmppc_core_vcpu_put_hv,
5224 .set_msr = kvmppc_set_msr_hv,
5225 .vcpu_run = kvmppc_vcpu_run_hv,
5226 .vcpu_create = kvmppc_core_vcpu_create_hv,
5227 .vcpu_free = kvmppc_core_vcpu_free_hv,
5228 .check_requests = kvmppc_core_check_requests_hv,
5229 .get_dirty_log = kvm_vm_ioctl_get_dirty_log_hv,
5230 .flush_memslot = kvmppc_core_flush_memslot_hv,
5231 .prepare_memory_region = kvmppc_core_prepare_memory_region_hv,
5232 .commit_memory_region = kvmppc_core_commit_memory_region_hv,
3a167bea
AK		 5233 .unmap_hva_range = kvm_unmap_hva_range_hv,
5234 .age_hva = kvm_age_hva_hv,
5235 .test_age_hva = kvm_test_age_hva_hv,
5236 .set_spte_hva = kvm_set_spte_hva_hv,
5237 .mmu_destroy = kvmppc_mmu_destroy_hv,
5238 .free_memslot = kvmppc_core_free_memslot_hv,
5239 .create_memslot = kvmppc_core_create_memslot_hv,
5240 .init_vm = kvmppc_core_init_vm_hv,
5241 .destroy_vm = kvmppc_core_destroy_vm_hv,
3a167bea
AK		 5242 .get_smmu_info = kvm_vm_ioctl_get_smmu_info_hv,
5243 .emulate_op = kvmppc_core_emulate_op_hv,
5244 .emulate_mtspr = kvmppc_core_emulate_mtspr_hv,
5245 .emulate_mfspr = kvmppc_core_emulate_mfspr_hv,
5246 .fast_vcpu_kick = kvmppc_fast_vcpu_kick_hv,
5247 .arch_vm_ioctl = kvm_arch_vm_ioctl_hv,
ae2113a4 5248 .hcall_implemented = kvmppc_hcall_impl_hv,
c57875f5
SW		 5249#ifdef CONFIG_KVM_XICS
5250 .irq_bypass_add_producer = kvmppc_irq_bypass_add_producer_hv,
5251 .irq_bypass_del_producer = kvmppc_irq_bypass_del_producer_hv,
5252#endif
c9270132
PM		 5253 .configure_mmu = kvmhv_configure_mmu,
5254 .get_rmmu_info = kvmhv_get_rmmu_info,
3c313524 5255 .set_smt_mode = kvmhv_set_smt_mode,
aa069a99 5256 .enable_nested = kvmhv_enable_nested,
3a167bea
AK		 5257};
5258
fd7bacbc
MS		 5259static int kvm_init_subcore_bitmap(void)
5260{
5261 int i, j;
5262 int nr_cores = cpu_nr_cores();
5263 struct sibling_subcore_state *sibling_subcore_state;
5264
5265 for (i = 0; i < nr_cores; i++) {
5266 int first_cpu = i * threads_per_core;
5267 int node = cpu_to_node(first_cpu);
5268
5269 /* Ignore if it is already allocated. */
d2e60075 5270 if (paca_ptrs[first_cpu]->sibling_subcore_state)
fd7bacbc
MS		 5271 continue;
5272
5273 sibling_subcore_state =
5274 kmalloc_node(sizeof(struct sibling_subcore_state),
5275 GFP_KERNEL, node);
5276 if (!sibling_subcore_state)
5277 return -ENOMEM;
5278
5279 memset(sibling_subcore_state, 0,
5280 sizeof(struct sibling_subcore_state));
5281
5282 for (j = 0; j < threads_per_core; j++) {
5283 int cpu = first_cpu + j;
5284
d2e60075
NP		 5285 paca_ptrs[cpu]->sibling_subcore_state =
5286 sibling_subcore_state;
fd7bacbc
MS		 5287 }
5288 }
5289 return 0;
5290}
5291
5a319350
PM		 5292static int kvmppc_radix_possible(void)
5293{
5294 return cpu_has_feature(CPU_FTR_ARCH_300) && radix_enabled();
5295}
5296
3a167bea 5297static int kvmppc_book3s_init_hv(void)
de56a948
PM		 5298{
5299 int r;
cbbc58d4
AK		 5300 /*
5301 * FIXME!! Do we need to check on all cpus ?
5302 */
5303 r = kvmppc_core_check_processor_compat_hv();
5304 if (r < 0)
739e2425 5305 return -ENODEV;
de56a948 5306
8e3f5fc1
PM		 5307 r = kvmhv_nested_init();
5308 if (r)
5309 return r;
5310
fd7bacbc
MS		 5311 r = kvm_init_subcore_bitmap();
5312 if (r)
5313 return r;
5314
f725758b
PM		 5315 /*
5316 * We need a way of accessing the XICS interrupt controller,
d2e60075 5317 * either directly, via paca_ptrs[cpu]->kvm_hstate.xics_phys, or
f725758b
PM		 5318 * indirectly, via OPAL.
5319 */
5320#ifdef CONFIG_SMP
f3c18e93
PM		 5321 if (!xive_enabled() && !kvmhv_on_pseries() &&
5322 !local_paca->kvm_hstate.xics_phys) {
f725758b
PM		 5323 struct device_node *np;
5324
5325 np = of_find_compatible_node(NULL, NULL, "ibm,opal-intc");
5326 if (!np) {
5327 pr_err("KVM-HV: Cannot determine method for accessing XICS\n");
5328 return -ENODEV;
5329 }
51eaa08f
NMG		 5330 /* presence of intc confirmed - node can be dropped again */
5331 of_node_put(np);
f725758b
PM		 5332 }
5333#endif
5334
cbbc58d4
AK		 5335 kvm_ops_hv.owner = THIS_MODULE;
5336 kvmppc_hv_ops = &kvm_ops_hv;
de56a948 5337
699a0ea0
PM		 5338 init_default_hcalls();
5339
ec257165
PM		 5340 init_vcore_lists();
5341
cbbc58d4 5342 r = kvmppc_mmu_hv_init();
5a319350
PM		 5343 if (r)
5344 return r;
5345
5346 if (kvmppc_radix_possible())
5347 r = kvmppc_radix_init();
00608e1f
PM		 5348
5349 /*
5350 * POWER9 chips before version 2.02 can't have some threads in
5351 * HPT mode and some in radix mode on the same core.
5352 */
5353 if (cpu_has_feature(CPU_FTR_ARCH_300)) {
5354 unsigned int pvr = mfspr(SPRN_PVR);
5355 if ((pvr >> 16) == PVR_POWER9 &&
5356 (((pvr & 0xe000) == 0 && (pvr & 0xfff) < 0x202) ||
5357 ((pvr & 0xe000) == 0x2000 && (pvr & 0xfff) < 0x101)))
5358 no_mixing_hpt_and_radix = true;
5359 }
5360
de56a948
PM		 5361 return r;
5362}
5363
3a167bea 5364static void kvmppc_book3s_exit_hv(void)
de56a948 5365{
79b6c247 5366 kvmppc_free_host_rm_ops();
5a319350
PM		 5367 if (kvmppc_radix_possible())
5368 kvmppc_radix_exit();
cbbc58d4 5369 kvmppc_hv_ops = NULL;
8e3f5fc1 5370 kvmhv_nested_exit();
de56a948
PM		 5371}
5372
3a167bea
AK		 5373module_init(kvmppc_book3s_init_hv);
5374module_exit(kvmppc_book3s_exit_hv);
2ba9f0d8 5375MODULE_LICENSE("GPL");
398a76c6
AG		 5376MODULE_ALIAS_MISCDEV(KVM_MINOR);
5377MODULE_ALIAS("devname:kvm");
Empty description
This page took 1.248283 seconds and 4 git commands to generate.