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d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
0cbdf7bc MS |
2 | /* |
3 | * Regulator driver for National Semiconductors LP3971 PMIC chip | |
4 | * | |
5 | * Copyright (C) 2009 Samsung Electronics | |
6 | * Author: Marek Szyprowski <[email protected]> | |
7 | * | |
8 | * Based on wm8350.c | |
0cbdf7bc MS |
9 | */ |
10 | ||
11 | #include <linux/bug.h> | |
12 | #include <linux/err.h> | |
13 | #include <linux/i2c.h> | |
14 | #include <linux/kernel.h> | |
65602c32 | 15 | #include <linux/module.h> |
0cbdf7bc MS |
16 | #include <linux/regulator/driver.h> |
17 | #include <linux/regulator/lp3971.h> | |
5a0e3ad6 | 18 | #include <linux/slab.h> |
0cbdf7bc MS |
19 | |
20 | struct lp3971 { | |
21 | struct device *dev; | |
22 | struct mutex io_lock; | |
23 | struct i2c_client *i2c; | |
0cbdf7bc MS |
24 | }; |
25 | ||
26 | static u8 lp3971_reg_read(struct lp3971 *lp3971, u8 reg); | |
27 | static int lp3971_set_bits(struct lp3971 *lp3971, u8 reg, u16 mask, u16 val); | |
28 | ||
29 | #define LP3971_SYS_CONTROL1_REG 0x07 | |
30 | ||
31 | /* System control register 1 initial value, | |
32 | bits 4 and 5 are EPROM programmable */ | |
33 | #define SYS_CONTROL1_INIT_VAL 0x40 | |
34 | #define SYS_CONTROL1_INIT_MASK 0xCF | |
35 | ||
36 | #define LP3971_BUCK_VOL_ENABLE_REG 0x10 | |
37 | #define LP3971_BUCK_VOL_CHANGE_REG 0x20 | |
38 | ||
39 | /* Voltage control registers shift: | |
40 | LP3971_BUCK1 -> 0 | |
41 | LP3971_BUCK2 -> 4 | |
42 | LP3971_BUCK3 -> 6 | |
43 | */ | |
451a73cd | 44 | #define BUCK_VOL_CHANGE_SHIFT(x) (((!!x) << 2) | (x & ~0x01)) |
0cbdf7bc MS |
45 | #define BUCK_VOL_CHANGE_FLAG_GO 0x01 |
46 | #define BUCK_VOL_CHANGE_FLAG_TARGET 0x02 | |
47 | #define BUCK_VOL_CHANGE_FLAG_MASK 0x03 | |
48 | ||
49 | #define LP3971_BUCK1_BASE 0x23 | |
50 | #define LP3971_BUCK2_BASE 0x29 | |
51 | #define LP3971_BUCK3_BASE 0x32 | |
52 | ||
6faa7e0a | 53 | static const int buck_base_addr[] = { |
0cbdf7bc MS |
54 | LP3971_BUCK1_BASE, |
55 | LP3971_BUCK2_BASE, | |
56 | LP3971_BUCK3_BASE, | |
57 | }; | |
58 | ||
59 | #define LP3971_BUCK_TARGET_VOL1_REG(x) (buck_base_addr[x]) | |
60 | #define LP3971_BUCK_TARGET_VOL2_REG(x) (buck_base_addr[x]+1) | |
61 | ||
cad8d76e AL |
62 | static const unsigned int buck_voltage_map[] = { |
63 | 0, 800000, 850000, 900000, 950000, 1000000, 1050000, 1100000, | |
64 | 1150000, 1200000, 1250000, 1300000, 1350000, 1400000, 1450000, 1500000, | |
65 | 1550000, 1600000, 1650000, 1700000, 1800000, 1900000, 2500000, 2800000, | |
66 | 3000000, 3300000, | |
0cbdf7bc MS |
67 | }; |
68 | ||
69 | #define BUCK_TARGET_VOL_MASK 0x3f | |
0cbdf7bc MS |
70 | |
71 | #define LP3971_BUCK_RAMP_REG(x) (buck_base_addr[x]+2) | |
72 | ||
73 | #define LP3971_LDO_ENABLE_REG 0x12 | |
74 | #define LP3971_LDO_VOL_CONTR_BASE 0x39 | |
75 | ||
76 | /* Voltage control registers: | |
77 | LP3971_LDO1 -> LP3971_LDO_VOL_CONTR_BASE + 0 | |
78 | LP3971_LDO2 -> LP3971_LDO_VOL_CONTR_BASE + 0 | |
79 | LP3971_LDO3 -> LP3971_LDO_VOL_CONTR_BASE + 1 | |
80 | LP3971_LDO4 -> LP3971_LDO_VOL_CONTR_BASE + 1 | |
81 | LP3971_LDO5 -> LP3971_LDO_VOL_CONTR_BASE + 2 | |
82 | */ | |
83 | #define LP3971_LDO_VOL_CONTR_REG(x) (LP3971_LDO_VOL_CONTR_BASE + (x >> 1)) | |
84 | ||
85 | /* Voltage control registers shift: | |
86 | LP3971_LDO1 -> 0, LP3971_LDO2 -> 4 | |
87 | LP3971_LDO3 -> 0, LP3971_LDO4 -> 4 | |
88 | LP3971_LDO5 -> 0 | |
89 | */ | |
90 | #define LDO_VOL_CONTR_SHIFT(x) ((x & 1) << 2) | |
91 | #define LDO_VOL_CONTR_MASK 0x0f | |
92 | ||
cad8d76e AL |
93 | static const unsigned int ldo45_voltage_map[] = { |
94 | 1000000, 1050000, 1100000, 1150000, 1200000, 1250000, 1300000, 1350000, | |
95 | 1400000, 1500000, 1800000, 1900000, 2500000, 2800000, 3000000, 3300000, | |
0cbdf7bc MS |
96 | }; |
97 | ||
cad8d76e AL |
98 | static const unsigned int ldo123_voltage_map[] = { |
99 | 1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000, | |
100 | 2600000, 2700000, 2800000, 2900000, 3000000, 3100000, 3200000, 3300000, | |
0cbdf7bc MS |
101 | }; |
102 | ||
0cbdf7bc MS |
103 | #define LDO_VOL_MIN_IDX 0x00 |
104 | #define LDO_VOL_MAX_IDX 0x0f | |
105 | ||
0cbdf7bc MS |
106 | static int lp3971_ldo_is_enabled(struct regulator_dev *dev) |
107 | { | |
108 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); | |
109 | int ldo = rdev_get_id(dev) - LP3971_LDO1; | |
110 | u16 mask = 1 << (1 + ldo); | |
111 | u16 val; | |
112 | ||
113 | val = lp3971_reg_read(lp3971, LP3971_LDO_ENABLE_REG); | |
114 | return (val & mask) != 0; | |
115 | } | |
116 | ||
117 | static int lp3971_ldo_enable(struct regulator_dev *dev) | |
118 | { | |
119 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); | |
120 | int ldo = rdev_get_id(dev) - LP3971_LDO1; | |
121 | u16 mask = 1 << (1 + ldo); | |
122 | ||
123 | return lp3971_set_bits(lp3971, LP3971_LDO_ENABLE_REG, mask, mask); | |
124 | } | |
125 | ||
126 | static int lp3971_ldo_disable(struct regulator_dev *dev) | |
127 | { | |
128 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); | |
129 | int ldo = rdev_get_id(dev) - LP3971_LDO1; | |
130 | u16 mask = 1 << (1 + ldo); | |
131 | ||
132 | return lp3971_set_bits(lp3971, LP3971_LDO_ENABLE_REG, mask, 0); | |
133 | } | |
134 | ||
f38482fa | 135 | static int lp3971_ldo_get_voltage_sel(struct regulator_dev *dev) |
0cbdf7bc MS |
136 | { |
137 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); | |
138 | int ldo = rdev_get_id(dev) - LP3971_LDO1; | |
139 | u16 val, reg; | |
140 | ||
141 | reg = lp3971_reg_read(lp3971, LP3971_LDO_VOL_CONTR_REG(ldo)); | |
142 | val = (reg >> LDO_VOL_CONTR_SHIFT(ldo)) & LDO_VOL_CONTR_MASK; | |
143 | ||
f38482fa | 144 | return val; |
0cbdf7bc MS |
145 | } |
146 | ||
dd8e2314 AL |
147 | static int lp3971_ldo_set_voltage_sel(struct regulator_dev *dev, |
148 | unsigned int selector) | |
0cbdf7bc MS |
149 | { |
150 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); | |
151 | int ldo = rdev_get_id(dev) - LP3971_LDO1; | |
3a93f2a9 | 152 | |
0cbdf7bc | 153 | return lp3971_set_bits(lp3971, LP3971_LDO_VOL_CONTR_REG(ldo), |
cdb868f5 | 154 | LDO_VOL_CONTR_MASK << LDO_VOL_CONTR_SHIFT(ldo), |
dd8e2314 | 155 | selector << LDO_VOL_CONTR_SHIFT(ldo)); |
0cbdf7bc MS |
156 | } |
157 | ||
93b84ea5 | 158 | static const struct regulator_ops lp3971_ldo_ops = { |
cad8d76e | 159 | .list_voltage = regulator_list_voltage_table, |
3e655618 | 160 | .map_voltage = regulator_map_voltage_ascend, |
0cbdf7bc MS |
161 | .is_enabled = lp3971_ldo_is_enabled, |
162 | .enable = lp3971_ldo_enable, | |
163 | .disable = lp3971_ldo_disable, | |
f38482fa | 164 | .get_voltage_sel = lp3971_ldo_get_voltage_sel, |
dd8e2314 | 165 | .set_voltage_sel = lp3971_ldo_set_voltage_sel, |
0cbdf7bc MS |
166 | }; |
167 | ||
0cbdf7bc MS |
168 | static int lp3971_dcdc_is_enabled(struct regulator_dev *dev) |
169 | { | |
170 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); | |
171 | int buck = rdev_get_id(dev) - LP3971_DCDC1; | |
172 | u16 mask = 1 << (buck * 2); | |
173 | u16 val; | |
174 | ||
175 | val = lp3971_reg_read(lp3971, LP3971_BUCK_VOL_ENABLE_REG); | |
176 | return (val & mask) != 0; | |
177 | } | |
178 | ||
179 | static int lp3971_dcdc_enable(struct regulator_dev *dev) | |
180 | { | |
181 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); | |
182 | int buck = rdev_get_id(dev) - LP3971_DCDC1; | |
183 | u16 mask = 1 << (buck * 2); | |
184 | ||
185 | return lp3971_set_bits(lp3971, LP3971_BUCK_VOL_ENABLE_REG, mask, mask); | |
186 | } | |
187 | ||
188 | static int lp3971_dcdc_disable(struct regulator_dev *dev) | |
189 | { | |
190 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); | |
191 | int buck = rdev_get_id(dev) - LP3971_DCDC1; | |
192 | u16 mask = 1 << (buck * 2); | |
193 | ||
194 | return lp3971_set_bits(lp3971, LP3971_BUCK_VOL_ENABLE_REG, mask, 0); | |
195 | } | |
196 | ||
f38482fa | 197 | static int lp3971_dcdc_get_voltage_sel(struct regulator_dev *dev) |
0cbdf7bc MS |
198 | { |
199 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); | |
200 | int buck = rdev_get_id(dev) - LP3971_DCDC1; | |
201 | u16 reg; | |
0cbdf7bc MS |
202 | |
203 | reg = lp3971_reg_read(lp3971, LP3971_BUCK_TARGET_VOL1_REG(buck)); | |
204 | reg &= BUCK_TARGET_VOL_MASK; | |
205 | ||
f38482fa | 206 | return reg; |
0cbdf7bc MS |
207 | } |
208 | ||
dd8e2314 AL |
209 | static int lp3971_dcdc_set_voltage_sel(struct regulator_dev *dev, |
210 | unsigned int selector) | |
0cbdf7bc MS |
211 | { |
212 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); | |
213 | int buck = rdev_get_id(dev) - LP3971_DCDC1; | |
0cbdf7bc MS |
214 | int ret; |
215 | ||
0cbdf7bc | 216 | ret = lp3971_set_bits(lp3971, LP3971_BUCK_TARGET_VOL1_REG(buck), |
dd8e2314 | 217 | BUCK_TARGET_VOL_MASK, selector); |
0cbdf7bc MS |
218 | if (ret) |
219 | return ret; | |
220 | ||
221 | ret = lp3971_set_bits(lp3971, LP3971_BUCK_VOL_CHANGE_REG, | |
222 | BUCK_VOL_CHANGE_FLAG_MASK << BUCK_VOL_CHANGE_SHIFT(buck), | |
223 | BUCK_VOL_CHANGE_FLAG_GO << BUCK_VOL_CHANGE_SHIFT(buck)); | |
224 | if (ret) | |
225 | return ret; | |
226 | ||
227 | return lp3971_set_bits(lp3971, LP3971_BUCK_VOL_CHANGE_REG, | |
228 | BUCK_VOL_CHANGE_FLAG_MASK << BUCK_VOL_CHANGE_SHIFT(buck), | |
229 | 0 << BUCK_VOL_CHANGE_SHIFT(buck)); | |
230 | } | |
231 | ||
93b84ea5 | 232 | static const struct regulator_ops lp3971_dcdc_ops = { |
cad8d76e | 233 | .list_voltage = regulator_list_voltage_table, |
3e655618 | 234 | .map_voltage = regulator_map_voltage_ascend, |
0cbdf7bc MS |
235 | .is_enabled = lp3971_dcdc_is_enabled, |
236 | .enable = lp3971_dcdc_enable, | |
237 | .disable = lp3971_dcdc_disable, | |
f38482fa | 238 | .get_voltage_sel = lp3971_dcdc_get_voltage_sel, |
dd8e2314 | 239 | .set_voltage_sel = lp3971_dcdc_set_voltage_sel, |
0cbdf7bc MS |
240 | }; |
241 | ||
14add4ff | 242 | static const struct regulator_desc regulators[] = { |
0cbdf7bc MS |
243 | { |
244 | .name = "LDO1", | |
245 | .id = LP3971_LDO1, | |
246 | .ops = &lp3971_ldo_ops, | |
247 | .n_voltages = ARRAY_SIZE(ldo123_voltage_map), | |
cad8d76e | 248 | .volt_table = ldo123_voltage_map, |
0cbdf7bc MS |
249 | .type = REGULATOR_VOLTAGE, |
250 | .owner = THIS_MODULE, | |
251 | }, | |
252 | { | |
253 | .name = "LDO2", | |
254 | .id = LP3971_LDO2, | |
255 | .ops = &lp3971_ldo_ops, | |
256 | .n_voltages = ARRAY_SIZE(ldo123_voltage_map), | |
cad8d76e | 257 | .volt_table = ldo123_voltage_map, |
0cbdf7bc MS |
258 | .type = REGULATOR_VOLTAGE, |
259 | .owner = THIS_MODULE, | |
260 | }, | |
261 | { | |
262 | .name = "LDO3", | |
263 | .id = LP3971_LDO3, | |
264 | .ops = &lp3971_ldo_ops, | |
265 | .n_voltages = ARRAY_SIZE(ldo123_voltage_map), | |
cad8d76e | 266 | .volt_table = ldo123_voltage_map, |
0cbdf7bc MS |
267 | .type = REGULATOR_VOLTAGE, |
268 | .owner = THIS_MODULE, | |
269 | }, | |
270 | { | |
271 | .name = "LDO4", | |
272 | .id = LP3971_LDO4, | |
273 | .ops = &lp3971_ldo_ops, | |
274 | .n_voltages = ARRAY_SIZE(ldo45_voltage_map), | |
cad8d76e | 275 | .volt_table = ldo45_voltage_map, |
0cbdf7bc MS |
276 | .type = REGULATOR_VOLTAGE, |
277 | .owner = THIS_MODULE, | |
278 | }, | |
279 | { | |
280 | .name = "LDO5", | |
281 | .id = LP3971_LDO5, | |
282 | .ops = &lp3971_ldo_ops, | |
283 | .n_voltages = ARRAY_SIZE(ldo45_voltage_map), | |
cad8d76e | 284 | .volt_table = ldo45_voltage_map, |
0cbdf7bc MS |
285 | .type = REGULATOR_VOLTAGE, |
286 | .owner = THIS_MODULE, | |
287 | }, | |
288 | { | |
289 | .name = "DCDC1", | |
290 | .id = LP3971_DCDC1, | |
291 | .ops = &lp3971_dcdc_ops, | |
292 | .n_voltages = ARRAY_SIZE(buck_voltage_map), | |
cad8d76e | 293 | .volt_table = buck_voltage_map, |
0cbdf7bc MS |
294 | .type = REGULATOR_VOLTAGE, |
295 | .owner = THIS_MODULE, | |
296 | }, | |
297 | { | |
298 | .name = "DCDC2", | |
299 | .id = LP3971_DCDC2, | |
300 | .ops = &lp3971_dcdc_ops, | |
301 | .n_voltages = ARRAY_SIZE(buck_voltage_map), | |
cad8d76e | 302 | .volt_table = buck_voltage_map, |
0cbdf7bc MS |
303 | .type = REGULATOR_VOLTAGE, |
304 | .owner = THIS_MODULE, | |
305 | }, | |
306 | { | |
307 | .name = "DCDC3", | |
308 | .id = LP3971_DCDC3, | |
309 | .ops = &lp3971_dcdc_ops, | |
310 | .n_voltages = ARRAY_SIZE(buck_voltage_map), | |
cad8d76e | 311 | .volt_table = buck_voltage_map, |
0cbdf7bc MS |
312 | .type = REGULATOR_VOLTAGE, |
313 | .owner = THIS_MODULE, | |
314 | }, | |
315 | }; | |
316 | ||
317 | static int lp3971_i2c_read(struct i2c_client *i2c, char reg, int count, | |
318 | u16 *dest) | |
319 | { | |
320 | int ret; | |
321 | ||
322 | if (count != 1) | |
323 | return -EIO; | |
324 | ret = i2c_smbus_read_byte_data(i2c, reg); | |
27ef7f00 | 325 | if (ret < 0) |
a1985d46 | 326 | return ret; |
0cbdf7bc MS |
327 | |
328 | *dest = ret; | |
329 | return 0; | |
330 | } | |
331 | ||
332 | static int lp3971_i2c_write(struct i2c_client *i2c, char reg, int count, | |
333 | const u16 *src) | |
334 | { | |
0cbdf7bc MS |
335 | if (count != 1) |
336 | return -EIO; | |
1bddc2f5 | 337 | return i2c_smbus_write_byte_data(i2c, reg, *src); |
0cbdf7bc MS |
338 | } |
339 | ||
340 | static u8 lp3971_reg_read(struct lp3971 *lp3971, u8 reg) | |
341 | { | |
342 | u16 val = 0; | |
343 | ||
344 | mutex_lock(&lp3971->io_lock); | |
345 | ||
346 | lp3971_i2c_read(lp3971->i2c, reg, 1, &val); | |
347 | ||
348 | dev_dbg(lp3971->dev, "reg read 0x%02x -> 0x%02x\n", (int)reg, | |
349 | (unsigned)val&0xff); | |
350 | ||
351 | mutex_unlock(&lp3971->io_lock); | |
352 | ||
353 | return val & 0xff; | |
354 | } | |
355 | ||
356 | static int lp3971_set_bits(struct lp3971 *lp3971, u8 reg, u16 mask, u16 val) | |
357 | { | |
358 | u16 tmp; | |
359 | int ret; | |
360 | ||
361 | mutex_lock(&lp3971->io_lock); | |
362 | ||
363 | ret = lp3971_i2c_read(lp3971->i2c, reg, 1, &tmp); | |
0cbdf7bc | 364 | if (ret == 0) { |
40e1d79e | 365 | tmp = (tmp & ~mask) | val; |
0cbdf7bc MS |
366 | ret = lp3971_i2c_write(lp3971->i2c, reg, 1, &tmp); |
367 | dev_dbg(lp3971->dev, "reg write 0x%02x -> 0x%02x\n", (int)reg, | |
368 | (unsigned)val&0xff); | |
369 | } | |
370 | mutex_unlock(&lp3971->io_lock); | |
371 | ||
372 | return ret; | |
373 | } | |
374 | ||
a5023574 | 375 | static int setup_regulators(struct lp3971 *lp3971, |
ebbed04f | 376 | struct lp3971_platform_data *pdata) |
0cbdf7bc MS |
377 | { |
378 | int i, err; | |
ebbed04f | 379 | |
0cbdf7bc | 380 | /* Instantiate the regulators */ |
ebbed04f | 381 | for (i = 0; i < pdata->num_regulators; i++) { |
c172708d | 382 | struct regulator_config config = { }; |
ebbed04f | 383 | struct lp3971_regulator_subdev *reg = &pdata->regulators[i]; |
56dde80a | 384 | struct regulator_dev *rdev; |
0cbdf7bc | 385 | |
c172708d MB |
386 | config.dev = lp3971->dev; |
387 | config.init_data = reg->initdata; | |
388 | config.driver_data = lp3971; | |
389 | ||
56dde80a AL |
390 | rdev = devm_regulator_register(lp3971->dev, |
391 | ®ulators[reg->id], &config); | |
392 | if (IS_ERR(rdev)) { | |
393 | err = PTR_ERR(rdev); | |
0cbdf7bc MS |
394 | dev_err(lp3971->dev, "regulator init failed: %d\n", |
395 | err); | |
56dde80a | 396 | return err; |
0cbdf7bc MS |
397 | } |
398 | } | |
399 | ||
400 | return 0; | |
0cbdf7bc MS |
401 | } |
402 | ||
77e29598 | 403 | static int lp3971_i2c_probe(struct i2c_client *i2c) |
0cbdf7bc MS |
404 | { |
405 | struct lp3971 *lp3971; | |
dff91d0b | 406 | struct lp3971_platform_data *pdata = dev_get_platdata(&i2c->dev); |
0cbdf7bc MS |
407 | int ret; |
408 | u16 val; | |
409 | ||
ebbed04f DT |
410 | if (!pdata) { |
411 | dev_dbg(&i2c->dev, "No platform init data supplied\n"); | |
412 | return -ENODEV; | |
0cbdf7bc MS |
413 | } |
414 | ||
2af0af67 | 415 | lp3971 = devm_kzalloc(&i2c->dev, sizeof(struct lp3971), GFP_KERNEL); |
ebbed04f DT |
416 | if (lp3971 == NULL) |
417 | return -ENOMEM; | |
418 | ||
0cbdf7bc MS |
419 | lp3971->i2c = i2c; |
420 | lp3971->dev = &i2c->dev; | |
0cbdf7bc MS |
421 | |
422 | mutex_init(&lp3971->io_lock); | |
423 | ||
424 | /* Detect LP3971 */ | |
425 | ret = lp3971_i2c_read(i2c, LP3971_SYS_CONTROL1_REG, 1, &val); | |
426 | if (ret == 0 && (val & SYS_CONTROL1_INIT_MASK) != SYS_CONTROL1_INIT_VAL) | |
427 | ret = -ENODEV; | |
428 | if (ret < 0) { | |
429 | dev_err(&i2c->dev, "failed to detect device\n"); | |
2af0af67 | 430 | return ret; |
0cbdf7bc MS |
431 | } |
432 | ||
ebbed04f DT |
433 | ret = setup_regulators(lp3971, pdata); |
434 | if (ret < 0) | |
2af0af67 | 435 | return ret; |
0cbdf7bc | 436 | |
ebbed04f | 437 | i2c_set_clientdata(i2c, lp3971); |
0cbdf7bc | 438 | return 0; |
0cbdf7bc MS |
439 | } |
440 | ||
0cbdf7bc | 441 | static const struct i2c_device_id lp3971_i2c_id[] = { |
aea07a98 | 442 | { "lp3971" }, |
0a3ee93a | 443 | { } |
0cbdf7bc MS |
444 | }; |
445 | MODULE_DEVICE_TABLE(i2c, lp3971_i2c_id); | |
446 | ||
447 | static struct i2c_driver lp3971_i2c_driver = { | |
448 | .driver = { | |
449 | .name = "LP3971", | |
259b93b2 | 450 | .probe_type = PROBE_PREFER_ASYNCHRONOUS, |
0cbdf7bc | 451 | }, |
964e1865 | 452 | .probe = lp3971_i2c_probe, |
0cbdf7bc MS |
453 | .id_table = lp3971_i2c_id, |
454 | }; | |
455 | ||
5af34e60 | 456 | module_i2c_driver(lp3971_i2c_driver); |
0cbdf7bc MS |
457 | |
458 | MODULE_LICENSE("GPL"); | |
459 | MODULE_AUTHOR("Marek Szyprowski <[email protected]>"); | |
460 | MODULE_DESCRIPTION("LP3971 PMIC driver"); |