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1da177e4 LT |
1 | /* |
2 | * bt87x.c - Brooktree Bt878/Bt879 driver for ALSA | |
3 | * | |
4 | * Copyright (c) Clemens Ladisch <[email protected]> | |
5 | * | |
6 | * based on btaudio.c by Gerd Knorr <[email protected]> | |
7 | * | |
8 | * | |
9 | * This driver is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This driver is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | */ | |
23 | ||
1da177e4 LT |
24 | #include <linux/init.h> |
25 | #include <linux/interrupt.h> | |
26 | #include <linux/pci.h> | |
27 | #include <linux/slab.h> | |
65a77217 | 28 | #include <linux/module.h> |
1da177e4 | 29 | #include <linux/bitops.h> |
6cbbfe1c | 30 | #include <linux/io.h> |
1da177e4 LT |
31 | #include <sound/core.h> |
32 | #include <sound/pcm.h> | |
33 | #include <sound/pcm_params.h> | |
34 | #include <sound/control.h> | |
35 | #include <sound/initval.h> | |
36 | ||
37 | MODULE_AUTHOR("Clemens Ladisch <[email protected]>"); | |
38 | MODULE_DESCRIPTION("Brooktree Bt87x audio driver"); | |
39 | MODULE_LICENSE("GPL"); | |
40 | MODULE_SUPPORTED_DEVICE("{{Brooktree,Bt878}," | |
41 | "{Brooktree,Bt879}}"); | |
42 | ||
43 | static int index[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -2}; /* Exclude the first card */ | |
44 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ | |
a67ff6a5 | 45 | static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ |
6581f4e7 | 46 | static int digital_rate[SNDRV_CARDS]; /* digital input rate */ |
a67ff6a5 | 47 | static bool load_all; /* allow to load the non-whitelisted cards */ |
1da177e4 LT |
48 | |
49 | module_param_array(index, int, NULL, 0444); | |
50 | MODULE_PARM_DESC(index, "Index value for Bt87x soundcard"); | |
51 | module_param_array(id, charp, NULL, 0444); | |
52 | MODULE_PARM_DESC(id, "ID string for Bt87x soundcard"); | |
53 | module_param_array(enable, bool, NULL, 0444); | |
54 | MODULE_PARM_DESC(enable, "Enable Bt87x soundcard"); | |
55 | module_param_array(digital_rate, int, NULL, 0444); | |
56 | MODULE_PARM_DESC(digital_rate, "Digital input rate for Bt87x soundcard"); | |
57 | module_param(load_all, bool, 0444); | |
58 | MODULE_PARM_DESC(load_all, "Allow to load the non-whitelisted cards"); | |
59 | ||
60 | ||
1da177e4 LT |
61 | /* register offsets */ |
62 | #define REG_INT_STAT 0x100 /* interrupt status */ | |
63 | #define REG_INT_MASK 0x104 /* interrupt mask */ | |
64 | #define REG_GPIO_DMA_CTL 0x10c /* audio control */ | |
65 | #define REG_PACKET_LEN 0x110 /* audio packet lengths */ | |
66 | #define REG_RISC_STRT_ADD 0x114 /* RISC program start address */ | |
67 | #define REG_RISC_COUNT 0x120 /* RISC program counter */ | |
68 | ||
69 | /* interrupt bits */ | |
70 | #define INT_OFLOW (1 << 3) /* audio A/D overflow */ | |
71 | #define INT_RISCI (1 << 11) /* RISC instruction IRQ bit set */ | |
72 | #define INT_FBUS (1 << 12) /* FIFO overrun due to bus access latency */ | |
73 | #define INT_FTRGT (1 << 13) /* FIFO overrun due to target latency */ | |
74 | #define INT_FDSR (1 << 14) /* FIFO data stream resynchronization */ | |
75 | #define INT_PPERR (1 << 15) /* PCI parity error */ | |
76 | #define INT_RIPERR (1 << 16) /* RISC instruction parity error */ | |
77 | #define INT_PABORT (1 << 17) /* PCI master or target abort */ | |
78 | #define INT_OCERR (1 << 18) /* invalid opcode */ | |
79 | #define INT_SCERR (1 << 19) /* sync counter overflow */ | |
80 | #define INT_RISC_EN (1 << 27) /* DMA controller running */ | |
81 | #define INT_RISCS_SHIFT 28 /* RISC status bits */ | |
82 | ||
83 | /* audio control bits */ | |
84 | #define CTL_FIFO_ENABLE (1 << 0) /* enable audio data FIFO */ | |
85 | #define CTL_RISC_ENABLE (1 << 1) /* enable audio DMA controller */ | |
86 | #define CTL_PKTP_4 (0 << 2) /* packet mode FIFO trigger point - 4 DWORDs */ | |
87 | #define CTL_PKTP_8 (1 << 2) /* 8 DWORDs */ | |
88 | #define CTL_PKTP_16 (2 << 2) /* 16 DWORDs */ | |
89 | #define CTL_ACAP_EN (1 << 4) /* enable audio capture */ | |
90 | #define CTL_DA_APP (1 << 5) /* GPIO input */ | |
91 | #define CTL_DA_IOM_AFE (0 << 6) /* audio A/D input */ | |
92 | #define CTL_DA_IOM_DA (1 << 6) /* digital audio input */ | |
93 | #define CTL_DA_SDR_SHIFT 8 /* DDF first stage decimation rate */ | |
94 | #define CTL_DA_SDR_MASK (0xf<< 8) | |
95 | #define CTL_DA_LMT (1 << 12) /* limit audio data values */ | |
96 | #define CTL_DA_ES2 (1 << 13) /* enable DDF stage 2 */ | |
97 | #define CTL_DA_SBR (1 << 14) /* samples rounded to 8 bits */ | |
98 | #define CTL_DA_DPM (1 << 15) /* data packet mode */ | |
99 | #define CTL_DA_LRD_SHIFT 16 /* ALRCK delay */ | |
100 | #define CTL_DA_MLB (1 << 21) /* MSB/LSB format */ | |
101 | #define CTL_DA_LRI (1 << 22) /* left/right indication */ | |
102 | #define CTL_DA_SCE (1 << 23) /* sample clock edge */ | |
103 | #define CTL_A_SEL_STV (0 << 24) /* TV tuner audio input */ | |
104 | #define CTL_A_SEL_SFM (1 << 24) /* FM audio input */ | |
105 | #define CTL_A_SEL_SML (2 << 24) /* mic/line audio input */ | |
106 | #define CTL_A_SEL_SMXC (3 << 24) /* MUX bypass */ | |
107 | #define CTL_A_SEL_SHIFT 24 | |
108 | #define CTL_A_SEL_MASK (3 << 24) | |
109 | #define CTL_A_PWRDN (1 << 26) /* analog audio power-down */ | |
110 | #define CTL_A_G2X (1 << 27) /* audio gain boost */ | |
111 | #define CTL_A_GAIN_SHIFT 28 /* audio input gain */ | |
112 | #define CTL_A_GAIN_MASK (0xf<<28) | |
113 | ||
114 | /* RISC instruction opcodes */ | |
115 | #define RISC_WRITE (0x1 << 28) /* write FIFO data to memory at address */ | |
116 | #define RISC_WRITEC (0x5 << 28) /* write FIFO data to memory at current address */ | |
117 | #define RISC_SKIP (0x2 << 28) /* skip FIFO data */ | |
118 | #define RISC_JUMP (0x7 << 28) /* jump to address */ | |
119 | #define RISC_SYNC (0x8 << 28) /* synchronize with FIFO */ | |
120 | ||
121 | /* RISC instruction bits */ | |
122 | #define RISC_BYTES_ENABLE (0xf << 12) /* byte enable bits */ | |
123 | #define RISC_RESYNC ( 1 << 15) /* disable FDSR errors */ | |
124 | #define RISC_SET_STATUS_SHIFT 16 /* set status bits */ | |
125 | #define RISC_RESET_STATUS_SHIFT 20 /* clear status bits */ | |
126 | #define RISC_IRQ ( 1 << 24) /* interrupt */ | |
127 | #define RISC_EOL ( 1 << 26) /* end of line */ | |
128 | #define RISC_SOL ( 1 << 27) /* start of line */ | |
129 | ||
130 | /* SYNC status bits values */ | |
131 | #define RISC_SYNC_FM1 0x6 | |
132 | #define RISC_SYNC_VRO 0xc | |
133 | ||
134 | #define ANALOG_CLOCK 1792000 | |
135 | #ifdef CONFIG_SND_BT87X_OVERCLOCK | |
136 | #define CLOCK_DIV_MIN 1 | |
137 | #else | |
138 | #define CLOCK_DIV_MIN 4 | |
139 | #endif | |
140 | #define CLOCK_DIV_MAX 15 | |
141 | ||
142 | #define ERROR_INTERRUPTS (INT_FBUS | INT_FTRGT | INT_PPERR | \ | |
143 | INT_RIPERR | INT_PABORT | INT_OCERR) | |
144 | #define MY_INTERRUPTS (INT_RISCI | ERROR_INTERRUPTS) | |
145 | ||
146 | /* SYNC, one WRITE per line, one extra WRITE per page boundary, SYNC, JUMP */ | |
147 | #define MAX_RISC_SIZE ((1 + 255 + (PAGE_ALIGN(255 * 4092) / PAGE_SIZE - 1) + 1 + 1) * 8) | |
148 | ||
dcfb4140 TP |
149 | /* Cards with configuration information */ |
150 | enum snd_bt87x_boardid { | |
c818e0a1 | 151 | SND_BT87X_BOARD_UNKNOWN, |
dcfb4140 TP |
152 | SND_BT87X_BOARD_GENERIC, /* both an & dig interfaces, 32kHz */ |
153 | SND_BT87X_BOARD_ANALOG, /* board with no external A/D */ | |
154 | SND_BT87X_BOARD_OSPREY2x0, | |
155 | SND_BT87X_BOARD_OSPREY440, | |
156 | SND_BT87X_BOARD_AVPHONE98, | |
157 | }; | |
158 | ||
159 | /* Card configuration */ | |
160 | struct snd_bt87x_board { | |
161 | int dig_rate; /* Digital input sampling rate */ | |
162 | u32 digital_fmt; /* Register settings for digital input */ | |
163 | unsigned no_analog:1; /* No analog input */ | |
164 | unsigned no_digital:1; /* No digital input */ | |
165 | }; | |
166 | ||
3dd06763 | 167 | static struct snd_bt87x_board snd_bt87x_boards[] = { |
c818e0a1 CL |
168 | [SND_BT87X_BOARD_UNKNOWN] = { |
169 | .dig_rate = 32000, /* just a guess */ | |
170 | }, | |
dcfb4140 TP |
171 | [SND_BT87X_BOARD_GENERIC] = { |
172 | .dig_rate = 32000, | |
173 | }, | |
174 | [SND_BT87X_BOARD_ANALOG] = { | |
175 | .no_digital = 1, | |
176 | }, | |
177 | [SND_BT87X_BOARD_OSPREY2x0] = { | |
178 | .dig_rate = 44100, | |
179 | .digital_fmt = CTL_DA_LRI | (1 << CTL_DA_LRD_SHIFT), | |
180 | }, | |
181 | [SND_BT87X_BOARD_OSPREY440] = { | |
182 | .dig_rate = 32000, | |
183 | .digital_fmt = CTL_DA_LRI | (1 << CTL_DA_LRD_SHIFT), | |
184 | .no_analog = 1, | |
185 | }, | |
186 | [SND_BT87X_BOARD_AVPHONE98] = { | |
187 | .dig_rate = 48000, | |
188 | }, | |
189 | }; | |
190 | ||
1da177e4 | 191 | struct snd_bt87x { |
9f362dce | 192 | struct snd_card *card; |
1da177e4 | 193 | struct pci_dev *pci; |
dcfb4140 | 194 | struct snd_bt87x_board board; |
1da177e4 LT |
195 | |
196 | void __iomem *mmio; | |
197 | int irq; | |
198 | ||
1da177e4 | 199 | spinlock_t reg_lock; |
64b33619 | 200 | unsigned long opened; |
9f362dce | 201 | struct snd_pcm_substream *substream; |
1da177e4 LT |
202 | |
203 | struct snd_dma_buffer dma_risc; | |
204 | unsigned int line_bytes; | |
205 | unsigned int lines; | |
206 | ||
207 | u32 reg_control; | |
208 | u32 interrupt_mask; | |
209 | ||
210 | int current_line; | |
211 | ||
212 | int pci_parity_errors; | |
213 | }; | |
214 | ||
215 | enum { DEVICE_DIGITAL, DEVICE_ANALOG }; | |
216 | ||
9f362dce | 217 | static inline u32 snd_bt87x_readl(struct snd_bt87x *chip, u32 reg) |
1da177e4 LT |
218 | { |
219 | return readl(chip->mmio + reg); | |
220 | } | |
221 | ||
9f362dce | 222 | static inline void snd_bt87x_writel(struct snd_bt87x *chip, u32 reg, u32 value) |
1da177e4 LT |
223 | { |
224 | writel(value, chip->mmio + reg); | |
225 | } | |
226 | ||
9f362dce | 227 | static int snd_bt87x_create_risc(struct snd_bt87x *chip, struct snd_pcm_substream *substream, |
1da177e4 LT |
228 | unsigned int periods, unsigned int period_bytes) |
229 | { | |
1da177e4 LT |
230 | unsigned int i, offset; |
231 | u32 *risc; | |
232 | ||
233 | if (chip->dma_risc.area == NULL) { | |
234 | if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), | |
235 | PAGE_ALIGN(MAX_RISC_SIZE), &chip->dma_risc) < 0) | |
236 | return -ENOMEM; | |
237 | } | |
238 | risc = (u32 *)chip->dma_risc.area; | |
239 | offset = 0; | |
240 | *risc++ = cpu_to_le32(RISC_SYNC | RISC_SYNC_FM1); | |
241 | *risc++ = cpu_to_le32(0); | |
242 | for (i = 0; i < periods; ++i) { | |
243 | u32 rest; | |
244 | ||
245 | rest = period_bytes; | |
246 | do { | |
247 | u32 cmd, len; | |
77a23f26 | 248 | unsigned int addr; |
1da177e4 LT |
249 | |
250 | len = PAGE_SIZE - (offset % PAGE_SIZE); | |
251 | if (len > rest) | |
252 | len = rest; | |
253 | cmd = RISC_WRITE | len; | |
254 | if (rest == period_bytes) { | |
255 | u32 block = i * 16 / periods; | |
256 | cmd |= RISC_SOL; | |
257 | cmd |= block << RISC_SET_STATUS_SHIFT; | |
258 | cmd |= (~block & 0xf) << RISC_RESET_STATUS_SHIFT; | |
259 | } | |
260 | if (len == rest) | |
261 | cmd |= RISC_EOL | RISC_IRQ; | |
262 | *risc++ = cpu_to_le32(cmd); | |
77a23f26 TI |
263 | addr = snd_pcm_sgbuf_get_addr(substream, offset); |
264 | *risc++ = cpu_to_le32(addr); | |
1da177e4 LT |
265 | offset += len; |
266 | rest -= len; | |
267 | } while (rest > 0); | |
268 | } | |
269 | *risc++ = cpu_to_le32(RISC_SYNC | RISC_SYNC_VRO); | |
270 | *risc++ = cpu_to_le32(0); | |
271 | *risc++ = cpu_to_le32(RISC_JUMP); | |
272 | *risc++ = cpu_to_le32(chip->dma_risc.addr); | |
273 | chip->line_bytes = period_bytes; | |
274 | chip->lines = periods; | |
275 | return 0; | |
276 | } | |
277 | ||
9f362dce | 278 | static void snd_bt87x_free_risc(struct snd_bt87x *chip) |
1da177e4 LT |
279 | { |
280 | if (chip->dma_risc.area) { | |
281 | snd_dma_free_pages(&chip->dma_risc); | |
282 | chip->dma_risc.area = NULL; | |
283 | } | |
284 | } | |
285 | ||
9f362dce | 286 | static void snd_bt87x_pci_error(struct snd_bt87x *chip, unsigned int status) |
1da177e4 LT |
287 | { |
288 | u16 pci_status; | |
289 | ||
290 | pci_read_config_word(chip->pci, PCI_STATUS, &pci_status); | |
291 | pci_status &= PCI_STATUS_PARITY | PCI_STATUS_SIG_TARGET_ABORT | | |
292 | PCI_STATUS_REC_TARGET_ABORT | PCI_STATUS_REC_MASTER_ABORT | | |
293 | PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_DETECTED_PARITY; | |
294 | pci_write_config_word(chip->pci, PCI_STATUS, pci_status); | |
295 | if (pci_status != PCI_STATUS_DETECTED_PARITY) | |
02c33520 TI |
296 | dev_err(chip->card->dev, |
297 | "Aieee - PCI error! status %#08x, PCI status %#04x\n", | |
1da177e4 LT |
298 | status & ERROR_INTERRUPTS, pci_status); |
299 | else { | |
02c33520 TI |
300 | dev_err(chip->card->dev, |
301 | "Aieee - PCI parity error detected!\n"); | |
1da177e4 LT |
302 | /* error 'handling' similar to aic7xxx_pci.c: */ |
303 | chip->pci_parity_errors++; | |
304 | if (chip->pci_parity_errors > 20) { | |
02c33520 TI |
305 | dev_err(chip->card->dev, |
306 | "Too many PCI parity errors observed.\n"); | |
307 | dev_err(chip->card->dev, | |
308 | "Some device on this bus is generating bad parity.\n"); | |
309 | dev_err(chip->card->dev, | |
310 | "This is an error *observed by*, not *generated by*, this card.\n"); | |
311 | dev_err(chip->card->dev, | |
312 | "PCI parity error checking has been disabled.\n"); | |
1da177e4 LT |
313 | chip->interrupt_mask &= ~(INT_PPERR | INT_RIPERR); |
314 | snd_bt87x_writel(chip, REG_INT_MASK, chip->interrupt_mask); | |
315 | } | |
316 | } | |
317 | } | |
318 | ||
7d12e780 | 319 | static irqreturn_t snd_bt87x_interrupt(int irq, void *dev_id) |
1da177e4 | 320 | { |
9f362dce | 321 | struct snd_bt87x *chip = dev_id; |
1da177e4 LT |
322 | unsigned int status, irq_status; |
323 | ||
324 | status = snd_bt87x_readl(chip, REG_INT_STAT); | |
325 | irq_status = status & chip->interrupt_mask; | |
326 | if (!irq_status) | |
327 | return IRQ_NONE; | |
328 | snd_bt87x_writel(chip, REG_INT_STAT, irq_status); | |
329 | ||
330 | if (irq_status & ERROR_INTERRUPTS) { | |
331 | if (irq_status & (INT_FBUS | INT_FTRGT)) | |
02c33520 TI |
332 | dev_warn(chip->card->dev, |
333 | "FIFO overrun, status %#08x\n", status); | |
1da177e4 | 334 | if (irq_status & INT_OCERR) |
02c33520 TI |
335 | dev_err(chip->card->dev, |
336 | "internal RISC error, status %#08x\n", status); | |
1da177e4 LT |
337 | if (irq_status & (INT_PPERR | INT_RIPERR | INT_PABORT)) |
338 | snd_bt87x_pci_error(chip, irq_status); | |
339 | } | |
340 | if ((irq_status & INT_RISCI) && (chip->reg_control & CTL_ACAP_EN)) { | |
341 | int current_block, irq_block; | |
342 | ||
343 | /* assume that exactly one line has been recorded */ | |
344 | chip->current_line = (chip->current_line + 1) % chip->lines; | |
345 | /* but check if some interrupts have been skipped */ | |
346 | current_block = chip->current_line * 16 / chip->lines; | |
347 | irq_block = status >> INT_RISCS_SHIFT; | |
348 | if (current_block != irq_block) | |
349 | chip->current_line = (irq_block * chip->lines + 15) / 16; | |
350 | ||
351 | snd_pcm_period_elapsed(chip->substream); | |
352 | } | |
353 | return IRQ_HANDLED; | |
354 | } | |
355 | ||
9f362dce | 356 | static struct snd_pcm_hardware snd_bt87x_digital_hw = { |
1da177e4 LT |
357 | .info = SNDRV_PCM_INFO_MMAP | |
358 | SNDRV_PCM_INFO_INTERLEAVED | | |
359 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
2008f137 TI |
360 | SNDRV_PCM_INFO_MMAP_VALID | |
361 | SNDRV_PCM_INFO_BATCH, | |
1da177e4 LT |
362 | .formats = SNDRV_PCM_FMTBIT_S16_LE, |
363 | .rates = 0, /* set at runtime */ | |
364 | .channels_min = 2, | |
365 | .channels_max = 2, | |
366 | .buffer_bytes_max = 255 * 4092, | |
367 | .period_bytes_min = 32, | |
368 | .period_bytes_max = 4092, | |
369 | .periods_min = 2, | |
370 | .periods_max = 255, | |
371 | }; | |
372 | ||
9f362dce | 373 | static struct snd_pcm_hardware snd_bt87x_analog_hw = { |
1da177e4 LT |
374 | .info = SNDRV_PCM_INFO_MMAP | |
375 | SNDRV_PCM_INFO_INTERLEAVED | | |
376 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
2008f137 TI |
377 | SNDRV_PCM_INFO_MMAP_VALID | |
378 | SNDRV_PCM_INFO_BATCH, | |
1da177e4 LT |
379 | .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8, |
380 | .rates = SNDRV_PCM_RATE_KNOT, | |
381 | .rate_min = ANALOG_CLOCK / CLOCK_DIV_MAX, | |
382 | .rate_max = ANALOG_CLOCK / CLOCK_DIV_MIN, | |
383 | .channels_min = 1, | |
384 | .channels_max = 1, | |
385 | .buffer_bytes_max = 255 * 4092, | |
386 | .period_bytes_min = 32, | |
387 | .period_bytes_max = 4092, | |
388 | .periods_min = 2, | |
389 | .periods_max = 255, | |
390 | }; | |
391 | ||
9f362dce | 392 | static int snd_bt87x_set_digital_hw(struct snd_bt87x *chip, struct snd_pcm_runtime *runtime) |
1da177e4 | 393 | { |
950fb626 | 394 | chip->reg_control |= CTL_DA_IOM_DA | CTL_A_PWRDN; |
1da177e4 | 395 | runtime->hw = snd_bt87x_digital_hw; |
dcfb4140 TP |
396 | runtime->hw.rates = snd_pcm_rate_to_rate_bit(chip->board.dig_rate); |
397 | runtime->hw.rate_min = chip->board.dig_rate; | |
398 | runtime->hw.rate_max = chip->board.dig_rate; | |
1da177e4 LT |
399 | return 0; |
400 | } | |
401 | ||
9f362dce | 402 | static int snd_bt87x_set_analog_hw(struct snd_bt87x *chip, struct snd_pcm_runtime *runtime) |
1da177e4 | 403 | { |
9f362dce | 404 | static struct snd_ratnum analog_clock = { |
1da177e4 LT |
405 | .num = ANALOG_CLOCK, |
406 | .den_min = CLOCK_DIV_MIN, | |
407 | .den_max = CLOCK_DIV_MAX, | |
408 | .den_step = 1 | |
409 | }; | |
9f362dce | 410 | static struct snd_pcm_hw_constraint_ratnums constraint_rates = { |
1da177e4 LT |
411 | .nrats = 1, |
412 | .rats = &analog_clock | |
413 | }; | |
414 | ||
950fb626 | 415 | chip->reg_control &= ~(CTL_DA_IOM_DA | CTL_A_PWRDN); |
1da177e4 LT |
416 | runtime->hw = snd_bt87x_analog_hw; |
417 | return snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, | |
418 | &constraint_rates); | |
419 | } | |
420 | ||
9f362dce | 421 | static int snd_bt87x_pcm_open(struct snd_pcm_substream *substream) |
1da177e4 | 422 | { |
9f362dce TI |
423 | struct snd_bt87x *chip = snd_pcm_substream_chip(substream); |
424 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
425 | int err; |
426 | ||
427 | if (test_and_set_bit(0, &chip->opened)) | |
428 | return -EBUSY; | |
429 | ||
430 | if (substream->pcm->device == DEVICE_DIGITAL) | |
431 | err = snd_bt87x_set_digital_hw(chip, runtime); | |
432 | else | |
433 | err = snd_bt87x_set_analog_hw(chip, runtime); | |
434 | if (err < 0) | |
435 | goto _error; | |
436 | ||
437 | err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); | |
438 | if (err < 0) | |
439 | goto _error; | |
440 | ||
441 | chip->substream = substream; | |
442 | return 0; | |
443 | ||
444 | _error: | |
445 | clear_bit(0, &chip->opened); | |
4e857c58 | 446 | smp_mb__after_atomic(); |
1da177e4 LT |
447 | return err; |
448 | } | |
449 | ||
9f362dce | 450 | static int snd_bt87x_close(struct snd_pcm_substream *substream) |
1da177e4 | 451 | { |
9f362dce | 452 | struct snd_bt87x *chip = snd_pcm_substream_chip(substream); |
1da177e4 | 453 | |
950fb626 TP |
454 | spin_lock_irq(&chip->reg_lock); |
455 | chip->reg_control |= CTL_A_PWRDN; | |
456 | snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control); | |
457 | spin_unlock_irq(&chip->reg_lock); | |
458 | ||
1da177e4 LT |
459 | chip->substream = NULL; |
460 | clear_bit(0, &chip->opened); | |
4e857c58 | 461 | smp_mb__after_atomic(); |
1da177e4 LT |
462 | return 0; |
463 | } | |
464 | ||
9f362dce TI |
465 | static int snd_bt87x_hw_params(struct snd_pcm_substream *substream, |
466 | struct snd_pcm_hw_params *hw_params) | |
1da177e4 | 467 | { |
9f362dce | 468 | struct snd_bt87x *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
469 | int err; |
470 | ||
471 | err = snd_pcm_lib_malloc_pages(substream, | |
472 | params_buffer_bytes(hw_params)); | |
473 | if (err < 0) | |
474 | return err; | |
475 | return snd_bt87x_create_risc(chip, substream, | |
476 | params_periods(hw_params), | |
477 | params_period_bytes(hw_params)); | |
478 | } | |
479 | ||
9f362dce | 480 | static int snd_bt87x_hw_free(struct snd_pcm_substream *substream) |
1da177e4 | 481 | { |
9f362dce | 482 | struct snd_bt87x *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
483 | |
484 | snd_bt87x_free_risc(chip); | |
485 | snd_pcm_lib_free_pages(substream); | |
486 | return 0; | |
487 | } | |
488 | ||
9f362dce | 489 | static int snd_bt87x_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 490 | { |
9f362dce TI |
491 | struct snd_bt87x *chip = snd_pcm_substream_chip(substream); |
492 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
493 | int decimation; |
494 | ||
495 | spin_lock_irq(&chip->reg_lock); | |
496 | chip->reg_control &= ~(CTL_DA_SDR_MASK | CTL_DA_SBR); | |
497 | decimation = (ANALOG_CLOCK + runtime->rate / 4) / runtime->rate; | |
498 | chip->reg_control |= decimation << CTL_DA_SDR_SHIFT; | |
499 | if (runtime->format == SNDRV_PCM_FORMAT_S8) | |
500 | chip->reg_control |= CTL_DA_SBR; | |
501 | snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control); | |
502 | spin_unlock_irq(&chip->reg_lock); | |
503 | return 0; | |
504 | } | |
505 | ||
9f362dce | 506 | static int snd_bt87x_start(struct snd_bt87x *chip) |
1da177e4 LT |
507 | { |
508 | spin_lock(&chip->reg_lock); | |
509 | chip->current_line = 0; | |
510 | chip->reg_control |= CTL_FIFO_ENABLE | CTL_RISC_ENABLE | CTL_ACAP_EN; | |
511 | snd_bt87x_writel(chip, REG_RISC_STRT_ADD, chip->dma_risc.addr); | |
512 | snd_bt87x_writel(chip, REG_PACKET_LEN, | |
513 | chip->line_bytes | (chip->lines << 16)); | |
514 | snd_bt87x_writel(chip, REG_INT_MASK, chip->interrupt_mask); | |
515 | snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control); | |
516 | spin_unlock(&chip->reg_lock); | |
517 | return 0; | |
518 | } | |
519 | ||
9f362dce | 520 | static int snd_bt87x_stop(struct snd_bt87x *chip) |
1da177e4 LT |
521 | { |
522 | spin_lock(&chip->reg_lock); | |
523 | chip->reg_control &= ~(CTL_FIFO_ENABLE | CTL_RISC_ENABLE | CTL_ACAP_EN); | |
524 | snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control); | |
525 | snd_bt87x_writel(chip, REG_INT_MASK, 0); | |
526 | snd_bt87x_writel(chip, REG_INT_STAT, MY_INTERRUPTS); | |
527 | spin_unlock(&chip->reg_lock); | |
528 | return 0; | |
529 | } | |
530 | ||
9f362dce | 531 | static int snd_bt87x_trigger(struct snd_pcm_substream *substream, int cmd) |
1da177e4 | 532 | { |
9f362dce | 533 | struct snd_bt87x *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
534 | |
535 | switch (cmd) { | |
536 | case SNDRV_PCM_TRIGGER_START: | |
537 | return snd_bt87x_start(chip); | |
538 | case SNDRV_PCM_TRIGGER_STOP: | |
539 | return snd_bt87x_stop(chip); | |
540 | default: | |
541 | return -EINVAL; | |
542 | } | |
543 | } | |
544 | ||
9f362dce | 545 | static snd_pcm_uframes_t snd_bt87x_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 546 | { |
9f362dce TI |
547 | struct snd_bt87x *chip = snd_pcm_substream_chip(substream); |
548 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
549 | |
550 | return (snd_pcm_uframes_t)bytes_to_frames(runtime, chip->current_line * chip->line_bytes); | |
551 | } | |
552 | ||
9f362dce | 553 | static struct snd_pcm_ops snd_bt87x_pcm_ops = { |
1da177e4 LT |
554 | .open = snd_bt87x_pcm_open, |
555 | .close = snd_bt87x_close, | |
556 | .ioctl = snd_pcm_lib_ioctl, | |
557 | .hw_params = snd_bt87x_hw_params, | |
558 | .hw_free = snd_bt87x_hw_free, | |
559 | .prepare = snd_bt87x_prepare, | |
560 | .trigger = snd_bt87x_trigger, | |
561 | .pointer = snd_bt87x_pointer, | |
562 | .page = snd_pcm_sgbuf_ops_page, | |
563 | }; | |
564 | ||
9f362dce TI |
565 | static int snd_bt87x_capture_volume_info(struct snd_kcontrol *kcontrol, |
566 | struct snd_ctl_elem_info *info) | |
1da177e4 LT |
567 | { |
568 | info->type = SNDRV_CTL_ELEM_TYPE_INTEGER; | |
569 | info->count = 1; | |
570 | info->value.integer.min = 0; | |
571 | info->value.integer.max = 15; | |
572 | return 0; | |
573 | } | |
574 | ||
9f362dce TI |
575 | static int snd_bt87x_capture_volume_get(struct snd_kcontrol *kcontrol, |
576 | struct snd_ctl_elem_value *value) | |
1da177e4 | 577 | { |
9f362dce | 578 | struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
579 | |
580 | value->value.integer.value[0] = (chip->reg_control & CTL_A_GAIN_MASK) >> CTL_A_GAIN_SHIFT; | |
581 | return 0; | |
582 | } | |
583 | ||
9f362dce TI |
584 | static int snd_bt87x_capture_volume_put(struct snd_kcontrol *kcontrol, |
585 | struct snd_ctl_elem_value *value) | |
1da177e4 | 586 | { |
9f362dce | 587 | struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
588 | u32 old_control; |
589 | int changed; | |
590 | ||
591 | spin_lock_irq(&chip->reg_lock); | |
592 | old_control = chip->reg_control; | |
593 | chip->reg_control = (chip->reg_control & ~CTL_A_GAIN_MASK) | |
594 | | (value->value.integer.value[0] << CTL_A_GAIN_SHIFT); | |
595 | snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control); | |
596 | changed = old_control != chip->reg_control; | |
597 | spin_unlock_irq(&chip->reg_lock); | |
598 | return changed; | |
599 | } | |
600 | ||
9f362dce | 601 | static struct snd_kcontrol_new snd_bt87x_capture_volume = { |
1da177e4 LT |
602 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
603 | .name = "Capture Volume", | |
604 | .info = snd_bt87x_capture_volume_info, | |
605 | .get = snd_bt87x_capture_volume_get, | |
606 | .put = snd_bt87x_capture_volume_put, | |
607 | }; | |
608 | ||
a5ce8890 | 609 | #define snd_bt87x_capture_boost_info snd_ctl_boolean_mono_info |
1da177e4 | 610 | |
9f362dce TI |
611 | static int snd_bt87x_capture_boost_get(struct snd_kcontrol *kcontrol, |
612 | struct snd_ctl_elem_value *value) | |
1da177e4 | 613 | { |
9f362dce | 614 | struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
615 | |
616 | value->value.integer.value[0] = !! (chip->reg_control & CTL_A_G2X); | |
617 | return 0; | |
618 | } | |
619 | ||
9f362dce TI |
620 | static int snd_bt87x_capture_boost_put(struct snd_kcontrol *kcontrol, |
621 | struct snd_ctl_elem_value *value) | |
1da177e4 | 622 | { |
9f362dce | 623 | struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
624 | u32 old_control; |
625 | int changed; | |
626 | ||
627 | spin_lock_irq(&chip->reg_lock); | |
628 | old_control = chip->reg_control; | |
629 | chip->reg_control = (chip->reg_control & ~CTL_A_G2X) | |
630 | | (value->value.integer.value[0] ? CTL_A_G2X : 0); | |
631 | snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control); | |
632 | changed = chip->reg_control != old_control; | |
633 | spin_unlock_irq(&chip->reg_lock); | |
634 | return changed; | |
635 | } | |
636 | ||
9f362dce | 637 | static struct snd_kcontrol_new snd_bt87x_capture_boost = { |
1da177e4 LT |
638 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
639 | .name = "Capture Boost", | |
640 | .info = snd_bt87x_capture_boost_info, | |
641 | .get = snd_bt87x_capture_boost_get, | |
642 | .put = snd_bt87x_capture_boost_put, | |
643 | }; | |
644 | ||
9f362dce TI |
645 | static int snd_bt87x_capture_source_info(struct snd_kcontrol *kcontrol, |
646 | struct snd_ctl_elem_info *info) | |
1da177e4 | 647 | { |
dd1224aa | 648 | static const char *const texts[3] = {"TV Tuner", "FM", "Mic/Line"}; |
1da177e4 | 649 | |
dd1224aa | 650 | return snd_ctl_enum_info(info, 1, 3, texts); |
1da177e4 LT |
651 | } |
652 | ||
9f362dce TI |
653 | static int snd_bt87x_capture_source_get(struct snd_kcontrol *kcontrol, |
654 | struct snd_ctl_elem_value *value) | |
1da177e4 | 655 | { |
9f362dce | 656 | struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
657 | |
658 | value->value.enumerated.item[0] = (chip->reg_control & CTL_A_SEL_MASK) >> CTL_A_SEL_SHIFT; | |
659 | return 0; | |
660 | } | |
661 | ||
9f362dce TI |
662 | static int snd_bt87x_capture_source_put(struct snd_kcontrol *kcontrol, |
663 | struct snd_ctl_elem_value *value) | |
1da177e4 | 664 | { |
9f362dce | 665 | struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
666 | u32 old_control; |
667 | int changed; | |
668 | ||
669 | spin_lock_irq(&chip->reg_lock); | |
670 | old_control = chip->reg_control; | |
671 | chip->reg_control = (chip->reg_control & ~CTL_A_SEL_MASK) | |
672 | | (value->value.enumerated.item[0] << CTL_A_SEL_SHIFT); | |
673 | snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control); | |
674 | changed = chip->reg_control != old_control; | |
675 | spin_unlock_irq(&chip->reg_lock); | |
676 | return changed; | |
677 | } | |
678 | ||
9f362dce | 679 | static struct snd_kcontrol_new snd_bt87x_capture_source = { |
1da177e4 LT |
680 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
681 | .name = "Capture Source", | |
682 | .info = snd_bt87x_capture_source_info, | |
683 | .get = snd_bt87x_capture_source_get, | |
684 | .put = snd_bt87x_capture_source_put, | |
685 | }; | |
686 | ||
9f362dce | 687 | static int snd_bt87x_free(struct snd_bt87x *chip) |
1da177e4 | 688 | { |
2f93d797 | 689 | if (chip->mmio) |
1da177e4 | 690 | snd_bt87x_stop(chip); |
1da177e4 LT |
691 | if (chip->irq >= 0) |
692 | free_irq(chip->irq, chip); | |
ff6defa6 | 693 | iounmap(chip->mmio); |
1da177e4 LT |
694 | pci_release_regions(chip->pci); |
695 | pci_disable_device(chip->pci); | |
696 | kfree(chip); | |
697 | return 0; | |
698 | } | |
699 | ||
9f362dce | 700 | static int snd_bt87x_dev_free(struct snd_device *device) |
1da177e4 | 701 | { |
9f362dce | 702 | struct snd_bt87x *chip = device->device_data; |
1da177e4 LT |
703 | return snd_bt87x_free(chip); |
704 | } | |
705 | ||
3dd06763 | 706 | static int snd_bt87x_pcm(struct snd_bt87x *chip, int device, char *name) |
1da177e4 LT |
707 | { |
708 | int err; | |
9f362dce | 709 | struct snd_pcm *pcm; |
1da177e4 LT |
710 | |
711 | err = snd_pcm_new(chip->card, name, device, 0, 1, &pcm); | |
712 | if (err < 0) | |
713 | return err; | |
714 | pcm->private_data = chip; | |
715 | strcpy(pcm->name, name); | |
716 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_bt87x_pcm_ops); | |
717 | return snd_pcm_lib_preallocate_pages_for_all(pcm, | |
718 | SNDRV_DMA_TYPE_DEV_SG, | |
719 | snd_dma_pci_data(chip->pci), | |
720 | 128 * 1024, | |
7ab39926 | 721 | ALIGN(255 * 4092, 1024)); |
1da177e4 LT |
722 | } |
723 | ||
3dd06763 BP |
724 | static int snd_bt87x_create(struct snd_card *card, |
725 | struct pci_dev *pci, | |
726 | struct snd_bt87x **rchip) | |
1da177e4 | 727 | { |
9f362dce | 728 | struct snd_bt87x *chip; |
1da177e4 | 729 | int err; |
9f362dce | 730 | static struct snd_device_ops ops = { |
1da177e4 LT |
731 | .dev_free = snd_bt87x_dev_free |
732 | }; | |
733 | ||
734 | *rchip = NULL; | |
735 | ||
736 | err = pci_enable_device(pci); | |
737 | if (err < 0) | |
738 | return err; | |
739 | ||
e560d8d8 | 740 | chip = kzalloc(sizeof(*chip), GFP_KERNEL); |
1da177e4 LT |
741 | if (!chip) { |
742 | pci_disable_device(pci); | |
743 | return -ENOMEM; | |
744 | } | |
745 | chip->card = card; | |
746 | chip->pci = pci; | |
747 | chip->irq = -1; | |
748 | spin_lock_init(&chip->reg_lock); | |
749 | ||
750 | if ((err = pci_request_regions(pci, "Bt87x audio")) < 0) { | |
751 | kfree(chip); | |
752 | pci_disable_device(pci); | |
753 | return err; | |
754 | } | |
2f5ad54e | 755 | chip->mmio = pci_ioremap_bar(pci, 0); |
1da177e4 | 756 | if (!chip->mmio) { |
02c33520 | 757 | dev_err(card->dev, "cannot remap io memory\n"); |
dcfb4140 TP |
758 | err = -ENOMEM; |
759 | goto fail; | |
1da177e4 LT |
760 | } |
761 | ||
950fb626 TP |
762 | chip->reg_control = CTL_A_PWRDN | CTL_DA_ES2 | |
763 | CTL_PKTP_16 | (15 << CTL_DA_SDR_SHIFT); | |
1da177e4 LT |
764 | chip->interrupt_mask = MY_INTERRUPTS; |
765 | snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control); | |
766 | snd_bt87x_writel(chip, REG_INT_MASK, 0); | |
767 | snd_bt87x_writel(chip, REG_INT_STAT, MY_INTERRUPTS); | |
768 | ||
dcfb4140 | 769 | err = request_irq(pci->irq, snd_bt87x_interrupt, IRQF_SHARED, |
934c2b6d | 770 | KBUILD_MODNAME, chip); |
dcfb4140 | 771 | if (err < 0) { |
02c33520 | 772 | dev_err(card->dev, "cannot grab irq %d\n", pci->irq); |
dcfb4140 | 773 | goto fail; |
1da177e4 LT |
774 | } |
775 | chip->irq = pci->irq; | |
776 | pci_set_master(pci); | |
777 | synchronize_irq(chip->irq); | |
778 | ||
779 | err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); | |
dcfb4140 TP |
780 | if (err < 0) |
781 | goto fail; | |
782 | ||
1da177e4 LT |
783 | *rchip = chip; |
784 | return 0; | |
dcfb4140 TP |
785 | |
786 | fail: | |
787 | snd_bt87x_free(chip); | |
788 | return err; | |
1da177e4 LT |
789 | } |
790 | ||
dcfb4140 | 791 | #define BT_DEVICE(chip, subvend, subdev, id) \ |
1da177e4 | 792 | { .vendor = PCI_VENDOR_ID_BROOKTREE, \ |
4153812f | 793 | .device = chip, \ |
1da177e4 | 794 | .subvendor = subvend, .subdevice = subdev, \ |
dcfb4140 TP |
795 | .driver_data = SND_BT87X_BOARD_ ## id } |
796 | /* driver_data is the card id for that device */ | |
1da177e4 | 797 | |
9baa3c34 | 798 | static const struct pci_device_id snd_bt87x_ids[] = { |
4153812f | 799 | /* Hauppauge WinTV series */ |
dcfb4140 | 800 | BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x0070, 0x13eb, GENERIC), |
4153812f | 801 | /* Hauppauge WinTV series */ |
dcfb4140 | 802 | BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_879, 0x0070, 0x13eb, GENERIC), |
4153812f | 803 | /* Viewcast Osprey 200 */ |
dcfb4140 | 804 | BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x0070, 0xff01, OSPREY2x0), |
cf784d55 | 805 | /* Viewcast Osprey 440 (rate is configurable via gpio) */ |
dcfb4140 | 806 | BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x0070, 0xff07, OSPREY440), |
76e63067 | 807 | /* ATI TV-Wonder */ |
dcfb4140 | 808 | BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x1002, 0x0001, GENERIC), |
abf58f09 | 809 | /* Leadtek Winfast tv 2000xp delux */ |
dcfb4140 | 810 | BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x107d, 0x6606, GENERIC), |
9c6b8dce TI |
811 | /* Pinnacle PCTV */ |
812 | BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x11bd, 0x0012, GENERIC), | |
29463dfe | 813 | /* Voodoo TV 200 */ |
dcfb4140 | 814 | BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x121a, 0x3000, GENERIC), |
3f08a0e4 TI |
815 | /* Askey Computer Corp. MagicTView'99 */ |
816 | BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x144f, 0x3000, GENERIC), | |
29463dfe | 817 | /* AVerMedia Studio No. 103, 203, ...? */ |
dcfb4140 | 818 | BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x1461, 0x0003, AVPHONE98), |
abaeeb59 | 819 | /* Prolink PixelView PV-M4900 */ |
dcfb4140 | 820 | BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x1554, 0x4011, GENERIC), |
abaeeb59 | 821 | /* Pinnacle Studio PCTV rave */ |
dcfb4140 | 822 | BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0xbd11, 0x1200, GENERIC), |
1da177e4 LT |
823 | { } |
824 | }; | |
825 | MODULE_DEVICE_TABLE(pci, snd_bt87x_ids); | |
826 | ||
827 | /* cards known not to have audio | |
828 | * (DVB cards use the audio function to transfer MPEG data) */ | |
829 | static struct { | |
830 | unsigned short subvendor, subdevice; | |
3dd06763 | 831 | } blacklist[] = { |
1da177e4 | 832 | {0x0071, 0x0101}, /* Nebula Electronics DigiTV */ |
0110f50b | 833 | {0x11bd, 0x001c}, /* Pinnacle PCTV Sat */ |
1da177e4 LT |
834 | {0x11bd, 0x0026}, /* Pinnacle PCTV SAT CI */ |
835 | {0x1461, 0x0761}, /* AVermedia AverTV DVB-T */ | |
836 | {0x1461, 0x0771}, /* AVermedia DVB-T 771 */ | |
837 | {0x1822, 0x0001}, /* Twinhan VisionPlus DVB-T */ | |
0110f50b | 838 | {0x18ac, 0xd500}, /* DVICO FusionHDTV 5 Lite */ |
1da177e4 | 839 | {0x18ac, 0xdb10}, /* DVICO FusionHDTV DVB-T Lite */ |
19790db0 | 840 | {0x18ac, 0xdb11}, /* Ultraview DVB-T Lite */ |
1da177e4 | 841 | {0x270f, 0xfc00}, /* Chaintech Digitop DST-1000 DVB-S */ |
0110f50b | 842 | {0x7063, 0x2000}, /* pcHDTV HD-2000 TV */ |
1da177e4 LT |
843 | }; |
844 | ||
aacfddfd TI |
845 | static struct pci_driver driver; |
846 | ||
dcfb4140 | 847 | /* return the id of the card, or a negative value if it's blacklisted */ |
3dd06763 | 848 | static int snd_bt87x_detect_card(struct pci_dev *pci) |
1da177e4 LT |
849 | { |
850 | int i; | |
851 | const struct pci_device_id *supported; | |
852 | ||
8e84c641 | 853 | supported = pci_match_id(snd_bt87x_ids, pci); |
54c63cfc | 854 | if (supported && supported->driver_data > 0) |
1da177e4 LT |
855 | return supported->driver_data; |
856 | ||
857 | for (i = 0; i < ARRAY_SIZE(blacklist); ++i) | |
858 | if (blacklist[i].subvendor == pci->subsystem_vendor && | |
859 | blacklist[i].subdevice == pci->subsystem_device) { | |
02c33520 TI |
860 | dev_dbg(&pci->dev, |
861 | "card %#04x-%#04x:%#04x has no audio\n", | |
abf58f09 | 862 | pci->device, pci->subsystem_vendor, pci->subsystem_device); |
1da177e4 LT |
863 | return -EBUSY; |
864 | } | |
865 | ||
02c33520 | 866 | dev_info(&pci->dev, "unknown card %#04x-%#04x:%#04x\n", |
dcfb4140 | 867 | pci->device, pci->subsystem_vendor, pci->subsystem_device); |
02c33520 | 868 | dev_info(&pci->dev, "please mail id, board name, and, " |
1da177e4 | 869 | "if it works, the correct digital_rate option to " |
4505179c | 870 | "<[email protected]>\n"); |
c818e0a1 | 871 | return SND_BT87X_BOARD_UNKNOWN; |
1da177e4 LT |
872 | } |
873 | ||
3dd06763 BP |
874 | static int snd_bt87x_probe(struct pci_dev *pci, |
875 | const struct pci_device_id *pci_id) | |
1da177e4 LT |
876 | { |
877 | static int dev; | |
9f362dce TI |
878 | struct snd_card *card; |
879 | struct snd_bt87x *chip; | |
dcfb4140 TP |
880 | int err; |
881 | enum snd_bt87x_boardid boardid; | |
1da177e4 | 882 | |
dcfb4140 TP |
883 | if (!pci_id->driver_data) { |
884 | err = snd_bt87x_detect_card(pci); | |
885 | if (err < 0) | |
1da177e4 | 886 | return -ENODEV; |
dcfb4140 TP |
887 | boardid = err; |
888 | } else | |
889 | boardid = pci_id->driver_data; | |
1da177e4 LT |
890 | |
891 | if (dev >= SNDRV_CARDS) | |
892 | return -ENODEV; | |
893 | if (!enable[dev]) { | |
894 | ++dev; | |
895 | return -ENOENT; | |
896 | } | |
897 | ||
60c5772b TI |
898 | err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE, |
899 | 0, &card); | |
e58de7ba TI |
900 | if (err < 0) |
901 | return err; | |
1da177e4 LT |
902 | |
903 | err = snd_bt87x_create(card, pci, &chip); | |
904 | if (err < 0) | |
905 | goto _error; | |
906 | ||
dcfb4140 | 907 | memcpy(&chip->board, &snd_bt87x_boards[boardid], sizeof(chip->board)); |
1da177e4 | 908 | |
dcfb4140 TP |
909 | if (!chip->board.no_digital) { |
910 | if (digital_rate[dev] > 0) | |
911 | chip->board.dig_rate = digital_rate[dev]; | |
1da177e4 | 912 | |
dcfb4140 TP |
913 | chip->reg_control |= chip->board.digital_fmt; |
914 | ||
915 | err = snd_bt87x_pcm(chip, DEVICE_DIGITAL, "Bt87x Digital"); | |
916 | if (err < 0) | |
917 | goto _error; | |
918 | } | |
919 | if (!chip->board.no_analog) { | |
920 | err = snd_bt87x_pcm(chip, DEVICE_ANALOG, "Bt87x Analog"); | |
921 | if (err < 0) | |
922 | goto _error; | |
923 | err = snd_ctl_add(card, snd_ctl_new1( | |
924 | &snd_bt87x_capture_volume, chip)); | |
925 | if (err < 0) | |
926 | goto _error; | |
927 | err = snd_ctl_add(card, snd_ctl_new1( | |
928 | &snd_bt87x_capture_boost, chip)); | |
929 | if (err < 0) | |
930 | goto _error; | |
931 | err = snd_ctl_add(card, snd_ctl_new1( | |
932 | &snd_bt87x_capture_source, chip)); | |
933 | if (err < 0) | |
934 | goto _error; | |
935 | } | |
02c33520 | 936 | dev_info(card->dev, "bt87x%d: Using board %d, %sanalog, %sdigital " |
dcfb4140 TP |
937 | "(rate %d Hz)\n", dev, boardid, |
938 | chip->board.no_analog ? "no " : "", | |
939 | chip->board.no_digital ? "no " : "", chip->board.dig_rate); | |
1da177e4 LT |
940 | |
941 | strcpy(card->driver, "Bt87x"); | |
942 | sprintf(card->shortname, "Brooktree Bt%x", pci->device); | |
aa0a2ddc GKH |
943 | sprintf(card->longname, "%s at %#llx, irq %i", |
944 | card->shortname, (unsigned long long)pci_resource_start(pci, 0), | |
945 | chip->irq); | |
1da177e4 LT |
946 | strcpy(card->mixername, "Bt87x"); |
947 | ||
948 | err = snd_card_register(card); | |
949 | if (err < 0) | |
950 | goto _error; | |
951 | ||
952 | pci_set_drvdata(pci, card); | |
953 | ++dev; | |
954 | return 0; | |
955 | ||
956 | _error: | |
957 | snd_card_free(card); | |
958 | return err; | |
959 | } | |
960 | ||
3dd06763 | 961 | static void snd_bt87x_remove(struct pci_dev *pci) |
1da177e4 LT |
962 | { |
963 | snd_card_free(pci_get_drvdata(pci)); | |
1da177e4 LT |
964 | } |
965 | ||
966 | /* default entries for all Bt87x cards - it's not exported */ | |
967 | /* driver_data is set to 0 to call detection */ | |
9baa3c34 | 968 | static const struct pci_device_id snd_bt87x_default_ids[] = { |
c818e0a1 CL |
969 | BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, PCI_ANY_ID, PCI_ANY_ID, UNKNOWN), |
970 | BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_879, PCI_ANY_ID, PCI_ANY_ID, UNKNOWN), | |
1da177e4 LT |
971 | { } |
972 | }; | |
973 | ||
aacfddfd | 974 | static struct pci_driver driver = { |
3733e424 | 975 | .name = KBUILD_MODNAME, |
1da177e4 LT |
976 | .id_table = snd_bt87x_ids, |
977 | .probe = snd_bt87x_probe, | |
3dd06763 | 978 | .remove = snd_bt87x_remove, |
1da177e4 LT |
979 | }; |
980 | ||
aacfddfd TI |
981 | static int __init alsa_card_bt87x_init(void) |
982 | { | |
983 | if (load_all) | |
984 | driver.id_table = snd_bt87x_default_ids; | |
985 | return pci_register_driver(&driver); | |
986 | } | |
987 | ||
988 | static void __exit alsa_card_bt87x_exit(void) | |
989 | { | |
990 | pci_unregister_driver(&driver); | |
991 | } | |
992 | ||
993 | module_init(alsa_card_bt87x_init) | |
994 | module_exit(alsa_card_bt87x_exit) |