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2874c5fd | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
69190e67 MV |
2 | /* |
3 | * include/linux/micrel_phy.h | |
4 | * | |
5 | * Micrel PHY IDs | |
69190e67 MV |
6 | */ |
7 | ||
d606ef3f BS |
8 | #ifndef _MICREL_PHY_H |
9 | #define _MICREL_PHY_H | |
10 | ||
34865933 AL |
11 | #define MICREL_OUI 0x0885 |
12 | ||
d606ef3f BS |
13 | #define MICREL_PHY_ID_MASK 0x00fffff0 |
14 | ||
93272e07 | 15 | #define PHY_ID_KSZ8873MLL 0x000e7237 |
35c57907 | 16 | #define PHY_ID_KSZ9021 0x00221610 |
dc76a1ad | 17 | #define PHY_ID_KSZ9021RLRN 0x00221611 |
d606ef3f | 18 | #define PHY_ID_KS8737 0x00221720 |
212ea99a | 19 | #define PHY_ID_KSZ8021 0x00221555 |
b818d1a7 | 20 | #define PHY_ID_KSZ8031 0x00221556 |
510d573f | 21 | #define PHY_ID_KSZ8041 0x00221510 |
4bd7b512 SS |
22 | /* undocumented */ |
23 | #define PHY_ID_KSZ8041RNLI 0x00221537 | |
510d573f | 24 | #define PHY_ID_KSZ8051 0x00221550 |
7ab59dc1 | 25 | /* same id: ks8001 Rev. A/B, and ks8721 Rev 3. */ |
510d573f | 26 | #define PHY_ID_KSZ8001 0x0022161A |
7ab59dc1 DC |
27 | /* same id: KS8081, KS8091 */ |
28 | #define PHY_ID_KSZ8081 0x00221560 | |
29 | #define PHY_ID_KSZ8061 0x00221570 | |
30 | #define PHY_ID_KSZ9031 0x00221620 | |
bff5b4b3 | 31 | #define PHY_ID_KSZ9131 0x00221640 |
1623ad8e | 32 | #define PHY_ID_LAN8814 0x00221660 |
7c2dcfa2 | 33 | #define PHY_ID_LAN8804 0x00221670 |
a8f1a19d | 34 | #define PHY_ID_LAN8841 0x00221650 |
7ab59dc1 DC |
35 | |
36 | #define PHY_ID_KSZ886X 0x00221430 | |
37 | #define PHY_ID_KSZ8863 0x00221435 | |
d606ef3f | 38 | |
1d951ba3 | 39 | #define PHY_ID_KSZ87XX 0x00221550 |
9d162ed6 | 40 | |
fc3973a1 WH |
41 | #define PHY_ID_KSZ9477 0x00221631 |
42 | ||
d606ef3f | 43 | /* struct phy_device dev_flags definitions */ |
719c5e37 OR |
44 | #define MICREL_PHY_50MHZ_CLK BIT(0) |
45 | #define MICREL_PHY_FXEN BIT(1) | |
46 | #define MICREL_KSZ8_P1_ERRATA BIT(2) | |
08c6d8ba | 47 | #define MICREL_NO_EEE BIT(3) |
d606ef3f | 48 | |
dc76a1ad DN |
49 | #define MICREL_KSZ9021_EXTREG_CTRL 0xB |
50 | #define MICREL_KSZ9021_EXTREG_DATA_WRITE 0xC | |
51 | #define MICREL_KSZ9021_RGMII_CLK_CTRL_PAD_SCEW 0x104 | |
52 | #define MICREL_KSZ9021_RGMII_RX_DATA_PAD_SCEW 0x105 | |
53 | ||
ec4b94f9 MG |
54 | /* Device specific MII_BMCR (Reg 0) bits */ |
55 | /* 1 = HP Auto MDI/MDI-X mode, 0 = Microchip Auto MDI/MDI-X mode */ | |
56 | #define KSZ886X_BMCR_HP_MDIX BIT(5) | |
57 | /* 1 = Force MDI (transmit on RXP/RXM pins), 0 = Normal operation | |
58 | * (transmit on TXP/TXM pins) | |
59 | */ | |
60 | #define KSZ886X_BMCR_FORCE_MDI BIT(4) | |
61 | /* 1 = Disable auto MDI-X */ | |
62 | #define KSZ886X_BMCR_DISABLE_AUTO_MDIX BIT(3) | |
63 | #define KSZ886X_BMCR_DISABLE_FAR_END_FAULT BIT(2) | |
64 | #define KSZ886X_BMCR_DISABLE_TRANSMIT BIT(1) | |
65 | #define KSZ886X_BMCR_DISABLE_LED BIT(0) | |
66 | ||
52939393 OR |
67 | #define KSZ886X_CTRL_MDIX_STAT BIT(4) |
68 | ||
d606ef3f | 69 | #endif /* _MICREL_PHY_H */ |