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1da177e4 LT |
1 | /* |
2 | * linux/drivers/pcmcia/soc_common.h | |
3 | * | |
4 | * Copyright (C) 2000 John G Dorsey <[email protected]> | |
5 | * | |
6 | * This file contains definitions for the PCMCIA support code common to | |
7 | * integrated SOCs like the SA-11x0 and PXA2xx microprocessors. | |
8 | */ | |
9 | #ifndef _ASM_ARCH_PCMCIA | |
10 | #define _ASM_ARCH_PCMCIA | |
11 | ||
12 | /* include the world */ | |
13 | #include <linux/cpufreq.h> | |
14 | #include <pcmcia/version.h> | |
15 | #include <pcmcia/cs_types.h> | |
16 | #include <pcmcia/cs.h> | |
17 | #include <pcmcia/ss.h> | |
18 | #include <pcmcia/bulkmem.h> | |
19 | #include <pcmcia/cistpl.h> | |
20 | #include "cs_internal.h" | |
21 | ||
22 | ||
23 | struct device; | |
24 | struct pcmcia_low_level; | |
25 | ||
26 | /* | |
27 | * This structure encapsulates per-socket state which we might need to | |
28 | * use when responding to a Card Services query of some kind. | |
29 | */ | |
30 | struct soc_pcmcia_socket { | |
31 | struct pcmcia_socket socket; | |
32 | ||
33 | /* | |
34 | * Info from low level handler | |
35 | */ | |
36 | struct device *dev; | |
37 | unsigned int nr; | |
38 | unsigned int irq; | |
39 | ||
40 | /* | |
41 | * Core PCMCIA state | |
42 | */ | |
43 | struct pcmcia_low_level *ops; | |
44 | ||
45 | unsigned int status; | |
46 | socket_state_t cs_state; | |
47 | ||
48 | unsigned short spd_io[MAX_IO_WIN]; | |
49 | unsigned short spd_mem[MAX_WIN]; | |
50 | unsigned short spd_attr[MAX_WIN]; | |
51 | ||
52 | struct resource res_skt; | |
53 | struct resource res_io; | |
54 | struct resource res_mem; | |
55 | struct resource res_attr; | |
56 | void __iomem *virt_io; | |
57 | ||
58 | unsigned int irq_state; | |
59 | ||
60 | struct timer_list poll_timer; | |
61 | struct list_head node; | |
62 | }; | |
63 | ||
64 | struct pcmcia_state { | |
65 | unsigned detect: 1, | |
66 | ready: 1, | |
67 | bvd1: 1, | |
68 | bvd2: 1, | |
69 | wrprot: 1, | |
70 | vs_3v: 1, | |
71 | vs_Xv: 1; | |
72 | }; | |
73 | ||
74 | struct pcmcia_low_level { | |
75 | struct module *owner; | |
76 | ||
77 | /* first socket in system */ | |
78 | int first; | |
79 | /* nr of sockets */ | |
80 | int nr; | |
81 | ||
82 | int (*hw_init)(struct soc_pcmcia_socket *); | |
83 | void (*hw_shutdown)(struct soc_pcmcia_socket *); | |
84 | ||
85 | void (*socket_state)(struct soc_pcmcia_socket *, struct pcmcia_state *); | |
86 | int (*configure_socket)(struct soc_pcmcia_socket *, const socket_state_t *); | |
87 | ||
88 | /* | |
89 | * Enable card status IRQs on (re-)initialisation. This can | |
90 | * be called at initialisation, power management event, or | |
91 | * pcmcia event. | |
92 | */ | |
93 | void (*socket_init)(struct soc_pcmcia_socket *); | |
94 | ||
95 | /* | |
96 | * Disable card status IRQs and PCMCIA bus on suspend. | |
97 | */ | |
98 | void (*socket_suspend)(struct soc_pcmcia_socket *); | |
99 | ||
100 | /* | |
101 | * Hardware specific timing routines. | |
102 | * If provided, the get_timing routine overrides the SOC default. | |
103 | */ | |
104 | unsigned int (*get_timing)(struct soc_pcmcia_socket *, unsigned int, unsigned int); | |
105 | int (*set_timing)(struct soc_pcmcia_socket *); | |
106 | int (*show_timing)(struct soc_pcmcia_socket *, char *); | |
107 | ||
108 | #ifdef CONFIG_CPU_FREQ | |
109 | /* | |
110 | * CPUFREQ support. | |
111 | */ | |
112 | int (*frequency_change)(struct soc_pcmcia_socket *, unsigned long, struct cpufreq_freqs *); | |
113 | #endif | |
114 | }; | |
115 | ||
116 | ||
117 | struct pcmcia_irqs { | |
118 | int sock; | |
119 | int irq; | |
120 | const char *str; | |
121 | }; | |
122 | ||
123 | struct soc_pcmcia_timing { | |
124 | unsigned short io; | |
125 | unsigned short mem; | |
126 | unsigned short attr; | |
127 | }; | |
128 | ||
129 | extern int soc_pcmcia_request_irqs(struct soc_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr); | |
130 | extern void soc_pcmcia_free_irqs(struct soc_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr); | |
131 | extern void soc_pcmcia_disable_irqs(struct soc_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr); | |
132 | extern void soc_pcmcia_enable_irqs(struct soc_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr); | |
133 | extern void soc_common_pcmcia_get_timing(struct soc_pcmcia_socket *, struct soc_pcmcia_timing *); | |
134 | ||
135 | ||
136 | extern struct list_head soc_pcmcia_sockets; | |
137 | extern struct semaphore soc_pcmcia_sockets_lock; | |
138 | ||
139 | extern int soc_common_drv_pcmcia_probe(struct device *dev, struct pcmcia_low_level *ops, int first, int nr); | |
140 | extern int soc_common_drv_pcmcia_remove(struct device *dev); | |
141 | ||
142 | ||
143 | #ifdef DEBUG | |
144 | ||
145 | extern void soc_pcmcia_debug(struct soc_pcmcia_socket *skt, const char *func, | |
146 | int lvl, const char *fmt, ...); | |
147 | ||
148 | #define debug(skt, lvl, fmt, arg...) \ | |
149 | soc_pcmcia_debug(skt, __func__, lvl, fmt , ## arg) | |
150 | ||
151 | #else | |
152 | #define debug(skt, lvl, fmt, arg...) do { } while (0) | |
153 | #endif | |
154 | ||
155 | ||
156 | /* | |
157 | * The PC Card Standard, Release 7, section 4.13.4, says that twIORD | |
158 | * has a minimum value of 165ns. Section 4.13.5 says that twIOWR has | |
159 | * a minimum value of 165ns, as well. Section 4.7.2 (describing | |
160 | * common and attribute memory write timing) says that twWE has a | |
161 | * minimum value of 150ns for a 250ns cycle time (for 5V operation; | |
162 | * see section 4.7.4), or 300ns for a 600ns cycle time (for 3.3V | |
163 | * operation, also section 4.7.4). Section 4.7.3 says that taOE | |
164 | * has a maximum value of 150ns for a 300ns cycle time (for 5V | |
165 | * operation), or 300ns for a 600ns cycle time (for 3.3V operation). | |
166 | * | |
167 | * When configuring memory maps, Card Services appears to adopt the policy | |
168 | * that a memory access time of "0" means "use the default." The default | |
169 | * PCMCIA I/O command width time is 165ns. The default PCMCIA 5V attribute | |
170 | * and memory command width time is 150ns; the PCMCIA 3.3V attribute and | |
171 | * memory command width time is 300ns. | |
172 | */ | |
173 | #define SOC_PCMCIA_IO_ACCESS (165) | |
174 | #define SOC_PCMCIA_5V_MEM_ACCESS (150) | |
175 | #define SOC_PCMCIA_3V_MEM_ACCESS (300) | |
176 | #define SOC_PCMCIA_ATTR_MEM_ACCESS (300) | |
177 | ||
178 | /* | |
179 | * The socket driver actually works nicely in interrupt-driven form, | |
180 | * so the (relatively infrequent) polling is "just to be sure." | |
181 | */ | |
182 | #define SOC_PCMCIA_POLL_PERIOD (2*HZ) | |
183 | ||
184 | ||
185 | /* I/O pins replacing memory pins | |
186 | * (PCMCIA System Architecture, 2nd ed., by Don Anderson, p.75) | |
187 | * | |
188 | * These signals change meaning when going from memory-only to | |
189 | * memory-or-I/O interface: | |
190 | */ | |
191 | #define iostschg bvd1 | |
192 | #define iospkr bvd2 | |
193 | ||
194 | #endif |