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| Commit | Line | Data |
|---|---|---|
| 61f135b9 | 1 | /* |
| 2b9277ad | 2 | * Copyright (C) 2007-2013 ST-Ericsson |
| 61f135b9 LW |
3 | * License terms: GNU General Public License (GPL) version 2 |
| 4 | * DMA driver for COH 901 318 | |
| 5 | * Author: Per Friden <[email protected]> | |
| 6 | */ | |
| 7 | ||
| 8 | #ifndef COH901318_H | |
| 9 | #define COH901318_H | |
| 10 | ||
| 61f135b9 LW |
11 | #define MAX_DMA_PACKET_SIZE_SHIFT 11 |
| 12 | #define MAX_DMA_PACKET_SIZE (1 << MAX_DMA_PACKET_SIZE_SHIFT) | |
| 13 | ||
| d70a8ed3 LW |
14 | struct device; |
| 15 | ||
| 16 | struct coh901318_pool { | |
| 17 | spinlock_t lock; | |
| 18 | struct dma_pool *dmapool; | |
| 19 | struct device *dev; | |
| 20 | ||
| 21 | #ifdef CONFIG_DEBUG_FS | |
| 22 | int debugfs_pool_counter; | |
| 23 | #endif | |
| 24 | }; | |
| 25 | ||
| 61f135b9 LW |
26 | /** |
| 27 | * struct coh901318_lli - linked list item for DMAC | |
| 28 | * @control: control settings for DMAC | |
| 29 | * @src_addr: transfer source address | |
| 30 | * @dst_addr: transfer destination address | |
| 31 | * @link_addr: physical address to next lli | |
| b595076a | 32 | * @virt_link_addr: virtual address of next lli (only used by pool_free) |
| 61f135b9 LW |
33 | * @phy_this: physical address of current lli (only used by pool_free) |
| 34 | */ | |
| 35 | struct coh901318_lli { | |
| 36 | u32 control; | |
| 37 | dma_addr_t src_addr; | |
| 38 | dma_addr_t dst_addr; | |
| 39 | dma_addr_t link_addr; | |
| 40 | ||
| 41 | void *virt_link_addr; | |
| 42 | dma_addr_t phy_this; | |
| 43 | }; | |
| 61f135b9 | 44 | |
| d70a8ed3 LW |
45 | /** |
| 46 | * coh901318_pool_create() - Creates an dma pool for lli:s | |
| 47 | * @pool: pool handle | |
| 48 | * @dev: dma device | |
| 49 | * @lli_nbr: number of lli:s in the pool | |
| 50 | * @algin: address alignemtn of lli:s | |
| 51 | * returns 0 on success otherwise none zero | |
| 52 | */ | |
| 53 | int coh901318_pool_create(struct coh901318_pool *pool, | |
| 54 | struct device *dev, | |
| 55 | size_t lli_nbr, size_t align); | |
| 56 | ||
| 57 | /** | |
| 58 | * coh901318_pool_destroy() - Destroys the dma pool | |
| 59 | * @pool: pool handle | |
| 60 | * returns 0 on success otherwise none zero | |
| 61 | */ | |
| 62 | int coh901318_pool_destroy(struct coh901318_pool *pool); | |
| 63 | ||
| 64 | /** | |
| 65 | * coh901318_lli_alloc() - Allocates a linked list | |
| 66 | * | |
| 67 | * @pool: pool handle | |
| 68 | * @len: length to list | |
| 69 | * return: none NULL if success otherwise NULL | |
| 70 | */ | |
| 71 | struct coh901318_lli * | |
| 72 | coh901318_lli_alloc(struct coh901318_pool *pool, | |
| 73 | unsigned int len); | |
| 74 | ||
| 75 | /** | |
| 76 | * coh901318_lli_free() - Returns the linked list items to the pool | |
| 77 | * @pool: pool handle | |
| 78 | * @lli: reference to lli pointer to be freed | |
| 79 | */ | |
| 80 | void coh901318_lli_free(struct coh901318_pool *pool, | |
| 81 | struct coh901318_lli **lli); | |
| 82 | ||
| 83 | /** | |
| 84 | * coh901318_lli_fill_memcpy() - Prepares the lli:s for dma memcpy | |
| 85 | * @pool: pool handle | |
| 86 | * @lli: allocated lli | |
| 87 | * @src: src address | |
| 88 | * @size: transfer size | |
| 89 | * @dst: destination address | |
| 90 | * @ctrl_chained: ctrl for chained lli | |
| 91 | * @ctrl_last: ctrl for the last lli | |
| 92 | * returns number of CPU interrupts for the lli, negative on error. | |
| 93 | */ | |
| 94 | int | |
| 95 | coh901318_lli_fill_memcpy(struct coh901318_pool *pool, | |
| 96 | struct coh901318_lli *lli, | |
| 97 | dma_addr_t src, unsigned int size, | |
| 98 | dma_addr_t dst, u32 ctrl_chained, u32 ctrl_last); | |
| 99 | ||
| 100 | /** | |
| 101 | * coh901318_lli_fill_single() - Prepares the lli:s for dma single transfer | |
| 102 | * @pool: pool handle | |
| 103 | * @lli: allocated lli | |
| 104 | * @buf: transfer buffer | |
| 105 | * @size: transfer size | |
| 106 | * @dev_addr: address of periphal | |
| 107 | * @ctrl_chained: ctrl for chained lli | |
| 108 | * @ctrl_last: ctrl for the last lli | |
| 109 | * @dir: direction of transfer (to or from device) | |
| 110 | * returns number of CPU interrupts for the lli, negative on error. | |
| 111 | */ | |
| 112 | int | |
| 113 | coh901318_lli_fill_single(struct coh901318_pool *pool, | |
| 114 | struct coh901318_lli *lli, | |
| 115 | dma_addr_t buf, unsigned int size, | |
| 116 | dma_addr_t dev_addr, u32 ctrl_chained, u32 ctrl_last, | |
| 117 | enum dma_transfer_direction dir); | |
| 118 | ||
| 119 | /** | |
| 120 | * coh901318_lli_fill_single() - Prepares the lli:s for dma scatter list transfer | |
| 121 | * @pool: pool handle | |
| 122 | * @lli: allocated lli | |
| 123 | * @sg: scatter gather list | |
| 124 | * @nents: number of entries in sg | |
| 125 | * @dev_addr: address of periphal | |
| 126 | * @ctrl_chained: ctrl for chained lli | |
| 127 | * @ctrl: ctrl of middle lli | |
| 128 | * @ctrl_last: ctrl for the last lli | |
| 129 | * @dir: direction of transfer (to or from device) | |
| 130 | * @ctrl_irq_mask: ctrl mask for CPU interrupt | |
| 131 | * returns number of CPU interrupts for the lli, negative on error. | |
| 132 | */ | |
| 133 | int | |
| 134 | coh901318_lli_fill_sg(struct coh901318_pool *pool, | |
| 135 | struct coh901318_lli *lli, | |
| 136 | struct scatterlist *sg, unsigned int nents, | |
| 137 | dma_addr_t dev_addr, u32 ctrl_chained, | |
| 138 | u32 ctrl, u32 ctrl_last, | |
| 139 | enum dma_transfer_direction dir, u32 ctrl_irq_mask); | |
| 140 | ||
| 61f135b9 | 141 | #endif /* COH901318_H */ |