[linux.git] / drivers / ata / ahci_mvebu.c

/*
 * AHCI glue platform driver for Marvell EBU SOCs
 *
 * Copyright (C) 2014 Marvell
 *
 * Thomas Petazzoni <[email protected]>
 * Marcin Wojtas <[email protected]>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */

#include <linux/ahci_platform.h>
#include <linux/kernel.h>
#include <linux/mbus.h>
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include "ahci.h"

#define DRV_NAME "ahci-mvebu"

#define AHCI_VENDOR_SPECIFIC_0_ADDR  0xa0
#define AHCI_VENDOR_SPECIFIC_0_DATA  0xa4

#define AHCI_WINDOW_CTRL(win)	(0x60 + ((win) << 4))
#define AHCI_WINDOW_BASE(win)	(0x64 + ((win) << 4))
#define AHCI_WINDOW_SIZE(win)	(0x68 + ((win) << 4))

static void ahci_mvebu_mbus_config(struct ahci_host_priv *hpriv,
				   const struct mbus_dram_target_info *dram)
{
	int i;

	for (i = 0; i < 4; i++) {
		writel(0, hpriv->mmio + AHCI_WINDOW_CTRL(i));
		writel(0, hpriv->mmio + AHCI_WINDOW_BASE(i));
		writel(0, hpriv->mmio + AHCI_WINDOW_SIZE(i));
	}

	for (i = 0; i < dram->num_cs; i++) {
		const struct mbus_dram_window *cs = dram->cs + i;

		writel((cs->mbus_attr << 8) |
		       (dram->mbus_dram_target_id << 4) | 1,
		       hpriv->mmio + AHCI_WINDOW_CTRL(i));
		writel(cs->base >> 16, hpriv->mmio + AHCI_WINDOW_BASE(i));
		writel(((cs->size - 1) & 0xffff0000),
		       hpriv->mmio + AHCI_WINDOW_SIZE(i));
	}
}

static void ahci_mvebu_regret_option(struct ahci_host_priv *hpriv)
{
	/*
	 * Enable the regret bit to allow the SATA unit to regret a
	 * request that didn't receive an acknowlegde and avoid a
	 * deadlock
	 */
	writel(0x4, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_ADDR);
	writel(0x80, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_DATA);
}

#ifdef CONFIG_PM_SLEEP
static int ahci_mvebu_suspend(struct platform_device *pdev, pm_message_t state)
{
	return ahci_platform_suspend_host(&pdev->dev);
}

static int ahci_mvebu_resume(struct platform_device *pdev)
{
	struct ata_host *host = platform_get_drvdata(pdev);
	struct ahci_host_priv *hpriv = host->private_data;
	const struct mbus_dram_target_info *dram;

	dram = mv_mbus_dram_info();
	if (dram)
		ahci_mvebu_mbus_config(hpriv, dram);

	ahci_mvebu_regret_option(hpriv);

	return ahci_platform_resume_host(&pdev->dev);
}
#else
#define ahci_mvebu_suspend NULL
#define ahci_mvebu_resume NULL
#endif

static const struct ata_port_info ahci_mvebu_port_info = {
	.flags	   = AHCI_FLAG_COMMON,
	.pio_mask  = ATA_PIO4,
	.udma_mask = ATA_UDMA6,
	.port_ops  = &ahci_platform_ops,
};

static struct scsi_host_template ahci_platform_sht = {
	AHCI_SHT(DRV_NAME),
};

static int ahci_mvebu_probe(struct platform_device *pdev)
{
	struct ahci_host_priv *hpriv;
	const struct mbus_dram_target_info *dram;
	int rc;

	hpriv = ahci_platform_get_resources(pdev);
	if (IS_ERR(hpriv))
		return PTR_ERR(hpriv);

	rc = ahci_platform_enable_resources(hpriv);
	if (rc)
		return rc;

	if (of_device_is_compatible(pdev->dev.of_node,
				    "marvell,armada-380-ahci")) {
		dram = mv_mbus_dram_info();
		if (!dram)
			return -ENODEV;

		ahci_mvebu_mbus_config(hpriv, dram);
		ahci_mvebu_regret_option(hpriv);
	}

	rc = ahci_platform_init_host(pdev, hpriv, &ahci_mvebu_port_info,
				     &ahci_platform_sht);
	if (rc)
		goto disable_resources;

	return 0;

disable_resources:
	ahci_platform_disable_resources(hpriv);
	return rc;
}

static const struct of_device_id ahci_mvebu_of_match[] = {
	{ .compatible = "marvell,armada-380-ahci", },
	{ .compatible = "marvell,armada-3700-ahci", },
	{ },
};
MODULE_DEVICE_TABLE(of, ahci_mvebu_of_match);

/*
 * We currently don't provide power management related operations,
 * since there is no suspend/resume support at the platform level for
 * Armada 38x for the moment.
 */
static struct platform_driver ahci_mvebu_driver = {
	.probe = ahci_mvebu_probe,
	.remove = ata_platform_remove_one,
	.suspend = ahci_mvebu_suspend,
	.resume = ahci_mvebu_resume,
	.driver = {
		.name = DRV_NAME,
		.of_match_table = ahci_mvebu_of_match,
	},
};
module_platform_driver(ahci_mvebu_driver);

MODULE_DESCRIPTION("Marvell EBU AHCI SATA driver");
MODULE_AUTHOR("Thomas Petazzoni <[email protected]>, Marcin Wojtas <[email protected]>");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:ahci_mvebu");
Commit	Line	Data
a3464ed2 TP	1	/*
	2	* AHCI glue platform driver for Marvell EBU SOCs
	3	*
	4	* Copyright (C) 2014 Marvell
	5	*
	6	* Thomas Petazzoni <[email protected]>
	7	* Marcin Wojtas <[email protected]>
	8	*
	9	* This file is licensed under the terms of the GNU General Public
	10	* License version 2. This program is licensed "as is" without any
	11	* warranty of any kind, whether express or implied.
	12	*/
	13
	14	#include <linux/ahci_platform.h>
	15	#include <linux/kernel.h>
	16	#include <linux/mbus.h>
	17	#include <linux/module.h>
	18	#include <linux/of_device.h>
	19	#include <linux/platform_device.h>
	20	#include "ahci.h"
	21
018d5ef2 AM	22	#define DRV_NAME "ahci-mvebu"
018d5ef2 AM	23
a3464ed2 TP	24	#define AHCI_VENDOR_SPECIFIC_0_ADDR 0xa0
	25	#define AHCI_VENDOR_SPECIFIC_0_DATA 0xa4
	26
	27	#define AHCI_WINDOW_CTRL(win) (0x60 + ((win) << 4))
	28	#define AHCI_WINDOW_BASE(win) (0x64 + ((win) << 4))
	29	#define AHCI_WINDOW_SIZE(win) (0x68 + ((win) << 4))
	30
	31	static void ahci_mvebu_mbus_config(struct ahci_host_priv *hpriv,
	32	const struct mbus_dram_target_info *dram)
	33	{
	34	int i;
	35
	36	for (i = 0; i < 4; i++) {
	37	writel(0, hpriv->mmio + AHCI_WINDOW_CTRL(i));
	38	writel(0, hpriv->mmio + AHCI_WINDOW_BASE(i));
	39	writel(0, hpriv->mmio + AHCI_WINDOW_SIZE(i));
	40	}
	41
	42	for (i = 0; i < dram->num_cs; i++) {
	43	const struct mbus_dram_window *cs = dram->cs + i;
	44
	45	writel((cs->mbus_attr << 8) \|
	46	(dram->mbus_dram_target_id << 4) \| 1,
	47	hpriv->mmio + AHCI_WINDOW_CTRL(i));
e96998fc	48	writel(cs->base >> 16, hpriv->mmio + AHCI_WINDOW_BASE(i));
a3464ed2 TP	49	writel(((cs->size - 1) & 0xffff0000),
	50	hpriv->mmio + AHCI_WINDOW_SIZE(i));
	51	}
	52	}
	53
	54	static void ahci_mvebu_regret_option(struct ahci_host_priv *hpriv)
	55	{
	56	/*
	57	* Enable the regret bit to allow the SATA unit to regret a
	58	* request that didn't receive an acknowlegde and avoid a
	59	* deadlock
	60	*/
	61	writel(0x4, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_ADDR);
	62	writel(0x80, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_DATA);
	63	}
	64
4f1dd973	65	#ifdef CONFIG_PM_SLEEP
d6ecf158 TP	66	static int ahci_mvebu_suspend(struct platform_device *pdev, pm_message_t state)
	67	{
	68	return ahci_platform_suspend_host(&pdev->dev);
	69	}
	70
	71	static int ahci_mvebu_resume(struct platform_device *pdev)
	72	{
	73	struct ata_host *host = platform_get_drvdata(pdev);
	74	struct ahci_host_priv *hpriv = host->private_data;
	75	const struct mbus_dram_target_info *dram;
	76
	77	dram = mv_mbus_dram_info();
	78	if (dram)
	79	ahci_mvebu_mbus_config(hpriv, dram);
	80
	81	ahci_mvebu_regret_option(hpriv);
	82
	83	return ahci_platform_resume_host(&pdev->dev);
	84	}
4f1dd973 AB	85	#else
	86	#define ahci_mvebu_suspend NULL
	87	#define ahci_mvebu_resume NULL
	88	#endif
d6ecf158	89
a3464ed2 TP	90	static const struct ata_port_info ahci_mvebu_port_info = {
	91	.flags = AHCI_FLAG_COMMON,
	92	.pio_mask = ATA_PIO4,
	93	.udma_mask = ATA_UDMA6,
	94	.port_ops = &ahci_platform_ops,
	95	};
	96
018d5ef2 AM	97	static struct scsi_host_template ahci_platform_sht = {
	98	AHCI_SHT(DRV_NAME),
	99	};
	100
a3464ed2 TP	101	static int ahci_mvebu_probe(struct platform_device *pdev)
	102	{
	103	struct ahci_host_priv *hpriv;
	104	const struct mbus_dram_target_info *dram;
	105	int rc;
	106
	107	hpriv = ahci_platform_get_resources(pdev);
	108	if (IS_ERR(hpriv))
	109	return PTR_ERR(hpriv);
	110
	111	rc = ahci_platform_enable_resources(hpriv);
	112	if (rc)
	113	return rc;
	114
15d3ce7b LA	115	if (of_device_is_compatible(pdev->dev.of_node,
	116	"marvell,armada-380-ahci")) {
	117	dram = mv_mbus_dram_info();
	118	if (!dram)
	119	return -ENODEV;
a3464ed2	120
15d3ce7b LA	121	ahci_mvebu_mbus_config(hpriv, dram);
	122	ahci_mvebu_regret_option(hpriv);
	123	}
a3464ed2	124
018d5ef2 AM	125	rc = ahci_platform_init_host(pdev, hpriv, &ahci_mvebu_port_info,
018d5ef2 AM	126	&ahci_platform_sht);
a3464ed2 TP	127	if (rc)
	128	goto disable_resources;
	129
	130	return 0;
	131
	132	disable_resources:
	133	ahci_platform_disable_resources(hpriv);
	134	return rc;
	135	}
	136
	137	static const struct of_device_id ahci_mvebu_of_match[] = {
	138	{ .compatible = "marvell,armada-380-ahci", },
15d3ce7b	139	{ .compatible = "marvell,armada-3700-ahci", },
a3464ed2 TP	140	{ },
	141	};
	142	MODULE_DEVICE_TABLE(of, ahci_mvebu_of_match);
	143
	144	/*
	145	* We currently don't provide power management related operations,
	146	* since there is no suspend/resume support at the platform level for
	147	* Armada 38x for the moment.
	148	*/
	149	static struct platform_driver ahci_mvebu_driver = {
	150	.probe = ahci_mvebu_probe,
	151	.remove = ata_platform_remove_one,
d6ecf158 TP	152	.suspend = ahci_mvebu_suspend,
d6ecf158 TP	153	.resume = ahci_mvebu_resume,
a3464ed2	154	.driver = {
018d5ef2	155	.name = DRV_NAME,
a3464ed2 TP	156	.of_match_table = ahci_mvebu_of_match,
	157	},
	158	};
	159	module_platform_driver(ahci_mvebu_driver);
	160
	161	MODULE_DESCRIPTION("Marvell EBU AHCI SATA driver");
	162	MODULE_AUTHOR("Thomas Petazzoni <[email protected]>, Marcin Wojtas <[email protected]>");
	163	MODULE_LICENSE("GPL");
	164	MODULE_ALIAS("platform:ahci_mvebu");