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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
[linux.git] / drivers / scsi / mvsas / mv_sas.c
CommitLineData
873e65bc 1// SPDX-License-Identifier: GPL-2.0-only
b5762948 2/*
20b09c29
AY		 3 * Marvell 88SE64xx/88SE94xx main function
4 *
5 * Copyright 2007 Red Hat, Inc.
6 * Copyright 2008 Marvell. <[email protected]>
0b15fb1f 7 * Copyright 2009-2011 Marvell. <[email protected]>
20b09c29 8*/
b5762948 9
dd4969a8 10#include "mv_sas.h"
b5762948 11
dd4969a8
JG		 12static int mvs_find_tag(struct mvs_info *mvi, struct sas_task *task, u32 *tag)
13{
14 if (task->lldd_task) {
15 struct mvs_slot_info *slot;
f9da3be5 16 slot = task->lldd_task;
20b09c29 17 *tag = slot->slot_tag;
dd4969a8
JG		 18 return 1;
19 }
20 return 0;
21}
8f261aaf 22
20b09c29 23void mvs_tag_clear(struct mvs_info *mvi, u32 tag)
dd4969a8 24{
b89e8f53 25 void *bitmap = mvi->tags;
dd4969a8
JG		 26 clear_bit(tag, bitmap);
27}
8f261aaf 28
20b09c29 29void mvs_tag_free(struct mvs_info *mvi, u32 tag)
dd4969a8
JG		 30{
31 mvs_tag_clear(mvi, tag);
32}
8f261aaf 33
20b09c29 34void mvs_tag_set(struct mvs_info *mvi, unsigned int tag)
dd4969a8 35{
b89e8f53 36 void *bitmap = mvi->tags;
dd4969a8
JG		 37 set_bit(tag, bitmap);
38}
8f261aaf 39
20b09c29 40inline int mvs_tag_alloc(struct mvs_info *mvi, u32 *tag_out)
dd4969a8
JG		 41{
42 unsigned int index, tag;
b89e8f53 43 void *bitmap = mvi->tags;
b5762948 44
20b09c29 45 index = find_first_zero_bit(bitmap, mvi->tags_num);
dd4969a8 46 tag = index;
20b09c29 47 if (tag >= mvi->tags_num)
dd4969a8
JG		 48 return -SAS_QUEUE_FULL;
49 mvs_tag_set(mvi, tag);
50 *tag_out = tag;
51 return 0;
52}
b5762948 53
dd4969a8
JG		 54void mvs_tag_init(struct mvs_info *mvi)
55{
56 int i;
20b09c29 57 for (i = 0; i < mvi->tags_num; ++i)
dd4969a8
JG		 58 mvs_tag_clear(mvi, i);
59}
b5762948 60
14bf41dc 61static struct mvs_info *mvs_find_dev_mvi(struct domain_device *dev)
20b09c29
AY		 62{
63 unsigned long i = 0, j = 0, hi = 0;
64 struct sas_ha_struct *sha = dev->port->ha;
65 struct mvs_info *mvi = NULL;
66 struct asd_sas_phy *phy;
67
68 while (sha->sas_port[i]) {
69 if (sha->sas_port[i] == dev->port) {
70 phy = container_of(sha->sas_port[i]->phy_list.next,
71 struct asd_sas_phy, port_phy_el);
72 j = 0;
73 while (sha->sas_phy[j]) {
74 if (sha->sas_phy[j] == phy)
75 break;
76 j++;
77 }
78 break;
79 }
80 i++;
81 }
82 hi = j/((struct mvs_prv_info *)sha->lldd_ha)->n_phy;
83 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi];
8f261aaf 84
20b09c29 85 return mvi;
8f261aaf 86
20b09c29 87}
8f261aaf 88
14bf41dc 89static int mvs_find_dev_phyno(struct domain_device *dev, int *phyno)
20b09c29
AY		 90{
91 unsigned long i = 0, j = 0, n = 0, num = 0;
9870d9a2
AY		 92 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
93 struct mvs_info *mvi = mvi_dev->mvi_info;
20b09c29
AY		 94 struct sas_ha_struct *sha = dev->port->ha;
95
96 while (sha->sas_port[i]) {
97 if (sha->sas_port[i] == dev->port) {
98 struct asd_sas_phy *phy;
99 list_for_each_entry(phy,
100 &sha->sas_port[i]->phy_list, port_phy_el) {
101 j = 0;
102 while (sha->sas_phy[j]) {
103 if (sha->sas_phy[j] == phy)
104 break;
105 j++;
106 }
107 phyno[n] = (j >= mvi->chip->n_phy) ?
108 (j - mvi->chip->n_phy) : j;
109 num++;
110 n++;
dd4969a8 111 }
dd4969a8
JG		 112 break;
113 }
20b09c29
AY		 114 i++;
115 }
116 return num;
117}
118
534ff101
XY		 119struct mvs_device *mvs_find_dev_by_reg_set(struct mvs_info *mvi,
120 u8 reg_set)
121{
122 u32 dev_no;
123 for (dev_no = 0; dev_no < MVS_MAX_DEVICES; dev_no++) {
124 if (mvi->devices[dev_no].taskfileset == MVS_ID_NOT_MAPPED)
125 continue;
126
127 if (mvi->devices[dev_no].taskfileset == reg_set)
128 return &mvi->devices[dev_no];
129 }
130 return NULL;
131}
132
20b09c29
AY		 133static inline void mvs_free_reg_set(struct mvs_info *mvi,
134 struct mvs_device *dev)
135{
136 if (!dev) {
137 mv_printk("device has been free.\n");
138 return;
139 }
20b09c29
AY		 140 if (dev->taskfileset == MVS_ID_NOT_MAPPED)
141 return;
142 MVS_CHIP_DISP->free_reg_set(mvi, &dev->taskfileset);
143}
144
145static inline u8 mvs_assign_reg_set(struct mvs_info *mvi,
146 struct mvs_device *dev)
147{
148 if (dev->taskfileset != MVS_ID_NOT_MAPPED)
149 return 0;
150 return MVS_CHIP_DISP->assign_reg_set(mvi, &dev->taskfileset);
151}
152
153void mvs_phys_reset(struct mvs_info *mvi, u32 phy_mask, int hard)
154{
155 u32 no;
156 for_each_phy(phy_mask, phy_mask, no) {
157 if (!(phy_mask & 1))
158 continue;
159 MVS_CHIP_DISP->phy_reset(mvi, no, hard);
160 }
161}
162
20b09c29
AY		 163int mvs_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func,
164 void *funcdata)
165{
166 int rc = 0, phy_id = sas_phy->id;
167 u32 tmp, i = 0, hi;
168 struct sas_ha_struct *sha = sas_phy->ha;
169 struct mvs_info *mvi = NULL;
170
171 while (sha->sas_phy[i]) {
172 if (sha->sas_phy[i] == sas_phy)
173 break;
174 i++;
175 }
176 hi = i/((struct mvs_prv_info *)sha->lldd_ha)->n_phy;
177 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi];
178
179 switch (func) {
180 case PHY_FUNC_SET_LINK_RATE:
181 MVS_CHIP_DISP->phy_set_link_rate(mvi, phy_id, funcdata);
182 break;
8f261aaf 183
dd4969a8 184 case PHY_FUNC_HARD_RESET:
20b09c29 185 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_id);
dd4969a8
JG		 186 if (tmp & PHY_RST_HARD)
187 break;
a4632aae 188 MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_HARD_RESET);
dd4969a8 189 break;
b5762948 190
dd4969a8 191 case PHY_FUNC_LINK_RESET:
20b09c29 192 MVS_CHIP_DISP->phy_enable(mvi, phy_id);
a4632aae 193 MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_SOFT_RESET);
dd4969a8 194 break;
b5762948 195
dd4969a8 196 case PHY_FUNC_DISABLE:
20b09c29
AY		 197 MVS_CHIP_DISP->phy_disable(mvi, phy_id);
198 break;
dd4969a8
JG		 199 case PHY_FUNC_RELEASE_SPINUP_HOLD:
200 default:
ac013ed1 201 rc = -ENOSYS;
b5762948 202 }
20b09c29 203 msleep(200);
b5762948
JG		 204 return rc;
205}
206
6f039790
GKH		 207void mvs_set_sas_addr(struct mvs_info *mvi, int port_id, u32 off_lo,
208 u32 off_hi, u64 sas_addr)
20b09c29
AY		 209{
210 u32 lo = (u32)sas_addr;
211 u32 hi = (u32)(sas_addr>>32);
212
213 MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_lo);
214 MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, lo);
215 MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_hi);
216 MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, hi);
217}
218
dd4969a8 219static void mvs_bytes_dmaed(struct mvs_info *mvi, int i)
ee1f1c2e 220{
dd4969a8 221 struct mvs_phy *phy = &mvi->phy[i];
20b09c29
AY		 222 struct asd_sas_phy *sas_phy = &phy->sas_phy;
223 struct sas_ha_struct *sas_ha;
dd4969a8
JG		 224 if (!phy->phy_attached)
225 return;
226
20b09c29
AY		 227 if (!(phy->att_dev_info & PORT_DEV_TRGT_MASK)
228 && phy->phy_type & PORT_TYPE_SAS) {
229 return;
230 }
231
232 sas_ha = mvi->sas;
233 sas_ha->notify_phy_event(sas_phy, PHYE_OOB_DONE);
234
dd4969a8
JG		 235 if (sas_phy->phy) {
236 struct sas_phy *sphy = sas_phy->phy;
237
238 sphy->negotiated_linkrate = sas_phy->linkrate;
239 sphy->minimum_linkrate = phy->minimum_linkrate;
240 sphy->minimum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS;
241 sphy->maximum_linkrate = phy->maximum_linkrate;
20b09c29 242 sphy->maximum_linkrate_hw = MVS_CHIP_DISP->phy_max_link_rate();
ee1f1c2e 243 }
ee1f1c2e 244
dd4969a8
JG		 245 if (phy->phy_type & PORT_TYPE_SAS) {
246 struct sas_identify_frame *id;
b5762948 247
dd4969a8
JG		 248 id = (struct sas_identify_frame *)phy->frame_rcvd;
249 id->dev_type = phy->identify.device_type;
250 id->initiator_bits = SAS_PROTOCOL_ALL;
251 id->target_bits = phy->identify.target_port_protocols;
477f6d19
XY		 252
253 /* direct attached SAS device */
254 if (phy->att_dev_info & PORT_SSP_TRGT_MASK) {
255 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_PHY_STAT);
256 MVS_CHIP_DISP->write_port_cfg_data(mvi, i, 0x00);
257 }
dd4969a8 258 } else if (phy->phy_type & PORT_TYPE_SATA) {
20b09c29 259 /*Nothing*/
dd4969a8 260 }
20b09c29
AY		 261 mv_dprintk("phy %d byte dmaded.\n", i + mvi->id * mvi->chip->n_phy);
262
263 sas_phy->frame_rcvd_size = phy->frame_rcvd_size;
264
265 mvi->sas->notify_port_event(sas_phy,
dd4969a8 266 PORTE_BYTES_DMAED);
ee1f1c2e
KW		 267}
268
dd4969a8 269void mvs_scan_start(struct Scsi_Host *shost)
b5762948 270{
20b09c29
AY		 271 int i, j;
272 unsigned short core_nr;
273 struct mvs_info *mvi;
274 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
84fbd0ce 275 struct mvs_prv_info *mvs_prv = sha->lldd_ha;
20b09c29
AY		 276
277 core_nr = ((struct mvs_prv_info *)sha->lldd_ha)->n_host;
dd4969a8 278
20b09c29
AY		 279 for (j = 0; j < core_nr; j++) {
280 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[j];
281 for (i = 0; i < mvi->chip->n_phy; ++i)
282 mvs_bytes_dmaed(mvi, i);
dd4969a8 283 }
84fbd0ce 284 mvs_prv->scan_finished = 1;
b5762948
JG		 285}
286
dd4969a8 287int mvs_scan_finished(struct Scsi_Host *shost, unsigned long time)
b5762948 288{
84fbd0ce
XY		 289 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
290 struct mvs_prv_info *mvs_prv = sha->lldd_ha;
291
292 if (mvs_prv->scan_finished == 0)
dd4969a8 293 return 0;
84fbd0ce 294
b1124cd3 295 sas_drain_work(sha);
dd4969a8 296 return 1;
b5762948
JG		 297}
298
dd4969a8
JG		 299static int mvs_task_prep_smp(struct mvs_info *mvi,
300 struct mvs_task_exec_info *tei)
b5762948 301{
dd4969a8 302 int elem, rc, i;
7c237c5f 303 struct sas_ha_struct *sha = mvi->sas;
dd4969a8
JG		 304 struct sas_task *task = tei->task;
305 struct mvs_cmd_hdr *hdr = tei->hdr;
20b09c29
AY		 306 struct domain_device *dev = task->dev;
307 struct asd_sas_port *sas_port = dev->port;
7c237c5f
XY		 308 struct sas_phy *sphy = dev->phy;
309 struct asd_sas_phy *sas_phy = sha->sas_phy[sphy->number];
dd4969a8
JG		 310 struct scatterlist *sg_req, *sg_resp;
311 u32 req_len, resp_len, tag = tei->tag;
312 void *buf_tmp;
313 u8 *buf_oaf;
314 dma_addr_t buf_tmp_dma;
20b09c29 315 void *buf_prd;
dd4969a8 316 struct mvs_slot_info *slot = &mvi->slot_info[tag];
dd4969a8 317 u32 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT);
b89e8f53 318
dd4969a8
JG		 319 /*
320 * DMA-map SMP request, response buffers
321 */
322 sg_req = &task->smp_task.smp_req;
4179a061 323 elem = dma_map_sg(mvi->dev, sg_req, 1, DMA_TO_DEVICE);
dd4969a8
JG		 324 if (!elem)
325 return -ENOMEM;
326 req_len = sg_dma_len(sg_req);
b5762948 327
dd4969a8 328 sg_resp = &task->smp_task.smp_resp;
4179a061 329 elem = dma_map_sg(mvi->dev, sg_resp, 1, DMA_FROM_DEVICE);
dd4969a8
JG		 330 if (!elem) {
331 rc = -ENOMEM;
332 goto err_out;
333 }
20b09c29 334 resp_len = SB_RFB_MAX;
b5762948 335
dd4969a8
JG		 336 /* must be in dwords */
337 if ((req_len & 0x3) || (resp_len & 0x3)) {
338 rc = -EINVAL;
339 goto err_out_2;
b5762948
JG		 340 }
341
dd4969a8
JG		 342 /*
343 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
344 */
b5762948 345
20b09c29 346 /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ***** */
dd4969a8
JG		 347 buf_tmp = slot->buf;
348 buf_tmp_dma = slot->buf_dma;
b5762948 349
dd4969a8 350 hdr->cmd_tbl = cpu_to_le64(sg_dma_address(sg_req));
b5762948 351
dd4969a8
JG		 352 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
353 buf_oaf = buf_tmp;
354 hdr->open_frame = cpu_to_le64(buf_tmp_dma);
b5762948 355
dd4969a8
JG		 356 buf_tmp += MVS_OAF_SZ;
357 buf_tmp_dma += MVS_OAF_SZ;
b5762948 358
20b09c29 359 /* region 3: PRD table *********************************** */
dd4969a8
JG		 360 buf_prd = buf_tmp;
361 if (tei->n_elem)
362 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
363 else
364 hdr->prd_tbl = 0;
b5762948 365
20b09c29 366 i = MVS_CHIP_DISP->prd_size() * tei->n_elem;
dd4969a8
JG		 367 buf_tmp += i;
368 buf_tmp_dma += i;
b5762948 369
dd4969a8
JG		 370 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */
371 slot->response = buf_tmp;
372 hdr->status_buf = cpu_to_le64(buf_tmp_dma);
20b09c29
AY		 373 if (mvi->flags & MVF_FLAG_SOC)
374 hdr->reserved[0] = 0;
b5762948 375
dd4969a8
JG		 376 /*
377 * Fill in TX ring and command slot header
378 */
379 slot->tx = mvi->tx_prod;
380 mvi->tx[mvi->tx_prod] = cpu_to_le32((TXQ_CMD_SMP << TXQ_CMD_SHIFT) |
381 TXQ_MODE_I | tag |
7c237c5f 382 (MVS_PHY_ID << TXQ_PHY_SHIFT));
b5762948 383
dd4969a8
JG		 384 hdr->flags |= flags;
385 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | ((req_len - 4) / 4));
386 hdr->tags = cpu_to_le32(tag);
387 hdr->data_len = 0;
b5762948 388
dd4969a8 389 /* generate open address frame hdr (first 12 bytes) */
20b09c29
AY		 390 /* initiator, SMP, ftype 1h */
391 buf_oaf[0] = (1 << 7) | (PROTOCOL_SMP << 4) | 0x01;
6ceae7c6 392 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;
dd4969a8 393 *(u16 *)(buf_oaf + 2) = 0xFFFF; /* SAS SPEC */
20b09c29 394 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
dd4969a8
JG		 395
396 /* fill in PRD (scatter/gather) table, if any */
20b09c29 397 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
b5762948
JG		 398
399 return 0;
400
dd4969a8 401err_out_2:
20b09c29 402 dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_resp, 1,
4179a061 403 DMA_FROM_DEVICE);
b5762948 404err_out:
20b09c29 405 dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_req, 1,
4179a061 406 DMA_TO_DEVICE);
8f261aaf 407 return rc;
8f261aaf
KW		 408}
409
dd4969a8 410static u32 mvs_get_ncq_tag(struct sas_task *task, u32 *tag)
8f261aaf 411{
dd4969a8 412 struct ata_queued_cmd *qc = task->uldd_task;
8f261aaf 413
dd4969a8
JG		 414 if (qc) {
415 if (qc->tf.command == ATA_CMD_FPDMA_WRITE ||
ef026b18
HR		 416 qc->tf.command == ATA_CMD_FPDMA_READ ||
417 qc->tf.command == ATA_CMD_FPDMA_RECV ||
661ce1f0
HR		 418 qc->tf.command == ATA_CMD_FPDMA_SEND ||
419 qc->tf.command == ATA_CMD_NCQ_NON_DATA) {
dd4969a8
JG		 420 *tag = qc->tag;
421 return 1;
422 }
8f261aaf 423 }
8f261aaf 424
dd4969a8 425 return 0;
8f261aaf
KW		 426}
427
dd4969a8
JG		 428static int mvs_task_prep_ata(struct mvs_info *mvi,
429 struct mvs_task_exec_info *tei)
b5762948
JG		 430{
431 struct sas_task *task = tei->task;
432 struct domain_device *dev = task->dev;
f9da3be5 433 struct mvs_device *mvi_dev = dev->lldd_dev;
b5762948
JG		 434 struct mvs_cmd_hdr *hdr = tei->hdr;
435 struct asd_sas_port *sas_port = dev->port;
8f261aaf 436 struct mvs_slot_info *slot;
20b09c29
AY		 437 void *buf_prd;
438 u32 tag = tei->tag, hdr_tag;
439 u32 flags, del_q;
b5762948
JG		 440 void *buf_tmp;
441 u8 *buf_cmd, *buf_oaf;
442 dma_addr_t buf_tmp_dma;
8f261aaf
KW		 443 u32 i, req_len, resp_len;
444 const u32 max_resp_len = SB_RFB_MAX;
445
20b09c29
AY		 446 if (mvs_assign_reg_set(mvi, mvi_dev) == MVS_ID_NOT_MAPPED) {
447 mv_dprintk("Have not enough regiset for dev %d.\n",
448 mvi_dev->device_id);
8f261aaf 449 return -EBUSY;
20b09c29 450 }
8f261aaf
KW		 451 slot = &mvi->slot_info[tag];
452 slot->tx = mvi->tx_prod;
20b09c29
AY		 453 del_q = TXQ_MODE_I | tag |
454 (TXQ_CMD_STP << TXQ_CMD_SHIFT) |
56cbd0cc 455 ((sas_port->phy_mask & TXQ_PHY_MASK) << TXQ_PHY_SHIFT) |
20b09c29
AY		 456 (mvi_dev->taskfileset << TXQ_SRS_SHIFT);
457 mvi->tx[mvi->tx_prod] = cpu_to_le32(del_q);
458
20b09c29
AY		 459 if (task->data_dir == DMA_FROM_DEVICE)
460 flags = (MVS_CHIP_DISP->prd_count() << MCH_PRD_LEN_SHIFT);
461 else
462 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT);
8882f081 463
b5762948
JG		 464 if (task->ata_task.use_ncq)
465 flags |= MCH_FPDMA;
1cbd772d 466 if (dev->sata_dev.class == ATA_DEV_ATAPI) {
8f261aaf
KW		 467 if (task->ata_task.fis.command != ATA_CMD_ID_ATAPI)
468 flags |= MCH_ATAPI;
469 }
470
b5762948 471 hdr->flags = cpu_to_le32(flags);
8f261aaf 472
20b09c29
AY		 473 if (task->ata_task.use_ncq && mvs_get_ncq_tag(task, &hdr_tag))
474 task->ata_task.fis.sector_count |= (u8) (hdr_tag << 3);
4e52fc0a 475 else
20b09c29
AY		 476 hdr_tag = tag;
477
478 hdr->tags = cpu_to_le32(hdr_tag);
479
b5762948
JG		 480 hdr->data_len = cpu_to_le32(task->total_xfer_len);
481
482 /*
483 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
484 */
b5762948 485
8f261aaf
KW		 486 /* region 1: command table area (MVS_ATA_CMD_SZ bytes) ************** */
487 buf_cmd = buf_tmp = slot->buf;
b5762948
JG		 488 buf_tmp_dma = slot->buf_dma;
489
490 hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);
491
492 buf_tmp += MVS_ATA_CMD_SZ;
493 buf_tmp_dma += MVS_ATA_CMD_SZ;
494
8f261aaf 495 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
b5762948
JG		 496 /* used for STP. unused for SATA? */
497 buf_oaf = buf_tmp;
498 hdr->open_frame = cpu_to_le64(buf_tmp_dma);
499
500 buf_tmp += MVS_OAF_SZ;
501 buf_tmp_dma += MVS_OAF_SZ;
502
8f261aaf 503 /* region 3: PRD table ********************************************* */
b5762948 504 buf_prd = buf_tmp;
20b09c29 505
8f261aaf
KW		 506 if (tei->n_elem)
507 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
508 else
509 hdr->prd_tbl = 0;
20b09c29 510 i = MVS_CHIP_DISP->prd_size() * MVS_CHIP_DISP->prd_count();
b5762948 511
b5762948
JG		 512 buf_tmp += i;
513 buf_tmp_dma += i;
514
8f261aaf 515 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */
b5762948
JG		 516 slot->response = buf_tmp;
517 hdr->status_buf = cpu_to_le64(buf_tmp_dma);
20b09c29
AY		 518 if (mvi->flags & MVF_FLAG_SOC)
519 hdr->reserved[0] = 0;
b5762948 520
8f261aaf 521 req_len = sizeof(struct host_to_dev_fis);
b5762948 522 resp_len = MVS_SLOT_BUF_SZ - MVS_ATA_CMD_SZ -
8f261aaf 523 sizeof(struct mvs_err_info) - i;
b5762948
JG		 524
525 /* request, response lengths */
8f261aaf 526 resp_len = min(resp_len, max_resp_len);
b5762948
JG		 527 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4));
528
20b09c29
AY		 529 if (likely(!task->ata_task.device_control_reg_update))
530 task->ata_task.fis.flags |= 0x80; /* C=1: update ATA cmd reg */
b5762948 531 /* fill in command FIS and ATAPI CDB */
8f261aaf 532 memcpy(buf_cmd, &task->ata_task.fis, sizeof(struct host_to_dev_fis));
1cbd772d 533 if (dev->sata_dev.class == ATA_DEV_ATAPI)
8f261aaf
KW		 534 memcpy(buf_cmd + STP_ATAPI_CMD,
535 task->ata_task.atapi_packet, 16);
536
537 /* generate open address frame hdr (first 12 bytes) */
20b09c29
AY		 538 /* initiator, STP, ftype 1h */
539 buf_oaf[0] = (1 << 7) | (PROTOCOL_STP << 4) | 0x1;
6ceae7c6 540 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;
20b09c29
AY		 541 *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1);
542 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
b5762948
JG		 543
544 /* fill in PRD (scatter/gather) table, if any */
20b09c29 545 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
8882f081 546
20b09c29 547 if (task->data_dir == DMA_FROM_DEVICE)
8882f081 548 MVS_CHIP_DISP->dma_fix(mvi, sas_port->phy_mask,
20b09c29 549 TRASH_BUCKET_SIZE, tei->n_elem, buf_prd);
8882f081 550
b5762948
JG		 551 return 0;
552}
553
554static int mvs_task_prep_ssp(struct mvs_info *mvi,
20b09c29
AY		 555 struct mvs_task_exec_info *tei, int is_tmf,
556 struct mvs_tmf_task *tmf)
b5762948
JG		 557{
558 struct sas_task *task = tei->task;
b5762948 559 struct mvs_cmd_hdr *hdr = tei->hdr;
8f261aaf 560 struct mvs_port *port = tei->port;
20b09c29 561 struct domain_device *dev = task->dev;
f9da3be5 562 struct mvs_device *mvi_dev = dev->lldd_dev;
20b09c29 563 struct asd_sas_port *sas_port = dev->port;
b5762948 564 struct mvs_slot_info *slot;
20b09c29 565 void *buf_prd;
b5762948
JG		 566 struct ssp_frame_hdr *ssp_hdr;
567 void *buf_tmp;
568 u8 *buf_cmd, *buf_oaf, fburst = 0;
569 dma_addr_t buf_tmp_dma;
570 u32 flags;
8f261aaf
KW		 571 u32 resp_len, req_len, i, tag = tei->tag;
572 const u32 max_resp_len = SB_RFB_MAX;
20b09c29 573 u32 phy_mask;
b5762948
JG		 574
575 slot = &mvi->slot_info[tag];
576
20b09c29
AY		 577 phy_mask = ((port->wide_port_phymap) ? port->wide_port_phymap :
578 sas_port->phy_mask) & TXQ_PHY_MASK;
579
8f261aaf
KW		 580 slot->tx = mvi->tx_prod;
581 mvi->tx[mvi->tx_prod] = cpu_to_le32(TXQ_MODE_I | tag |
582 (TXQ_CMD_SSP << TXQ_CMD_SHIFT) |
4e52fc0a 583 (phy_mask << TXQ_PHY_SHIFT));
b5762948
JG		 584
585 flags = MCH_RETRY;
586 if (task->ssp_task.enable_first_burst) {
587 flags |= MCH_FBURST;
588 fburst = (1 << 7);
589 }
2b288133
AY		 590 if (is_tmf)
591 flags |= (MCH_SSP_FR_TASK << MCH_SSP_FR_TYPE_SHIFT);
84fbd0ce
XY		 592 else
593 flags |= (MCH_SSP_FR_CMD << MCH_SSP_FR_TYPE_SHIFT);
594
2b288133 595 hdr->flags = cpu_to_le32(flags | (tei->n_elem << MCH_PRD_LEN_SHIFT));
b5762948
JG		 596 hdr->tags = cpu_to_le32(tag);
597 hdr->data_len = cpu_to_le32(task->total_xfer_len);
598
599 /*
600 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
601 */
b5762948 602
8f261aaf
KW		 603 /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ************** */
604 buf_cmd = buf_tmp = slot->buf;
b5762948
JG		 605 buf_tmp_dma = slot->buf_dma;
606
607 hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);
608
609 buf_tmp += MVS_SSP_CMD_SZ;
610 buf_tmp_dma += MVS_SSP_CMD_SZ;
611
8f261aaf 612 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
b5762948
JG		 613 buf_oaf = buf_tmp;
614 hdr->open_frame = cpu_to_le64(buf_tmp_dma);
615
616 buf_tmp += MVS_OAF_SZ;
617 buf_tmp_dma += MVS_OAF_SZ;
618
8f261aaf 619 /* region 3: PRD table ********************************************* */
b5762948 620 buf_prd = buf_tmp;
8f261aaf
KW		 621 if (tei->n_elem)
622 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
623 else
624 hdr->prd_tbl = 0;
b5762948 625
20b09c29 626 i = MVS_CHIP_DISP->prd_size() * tei->n_elem;
b5762948
JG		 627 buf_tmp += i;
628 buf_tmp_dma += i;
629
8f261aaf 630 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */
b5762948
JG		 631 slot->response = buf_tmp;
632 hdr->status_buf = cpu_to_le64(buf_tmp_dma);
20b09c29
AY		 633 if (mvi->flags & MVF_FLAG_SOC)
634 hdr->reserved[0] = 0;
b5762948 635
b5762948 636 resp_len = MVS_SLOT_BUF_SZ - MVS_SSP_CMD_SZ - MVS_OAF_SZ -
8f261aaf
KW		 637 sizeof(struct mvs_err_info) - i;
638 resp_len = min(resp_len, max_resp_len);
639
640 req_len = sizeof(struct ssp_frame_hdr) + 28;
b5762948
JG		 641
642 /* request, response lengths */
643 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4));
644
645 /* generate open address frame hdr (first 12 bytes) */
20b09c29
AY		 646 /* initiator, SSP, ftype 1h */
647 buf_oaf[0] = (1 << 7) | (PROTOCOL_SSP << 4) | 0x1;
6ceae7c6 648 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;
20b09c29
AY		 649 *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1);
650 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
b5762948 651
8f261aaf
KW		 652 /* fill in SSP frame header (Command Table.SSP frame header) */
653 ssp_hdr = (struct ssp_frame_hdr *)buf_cmd;
20b09c29
AY		 654
655 if (is_tmf)
656 ssp_hdr->frame_type = SSP_TASK;
657 else
658 ssp_hdr->frame_type = SSP_COMMAND;
659
660 memcpy(ssp_hdr->hashed_dest_addr, dev->hashed_sas_addr,
b5762948
JG		 661 HASHED_SAS_ADDR_SIZE);
662 memcpy(ssp_hdr->hashed_src_addr,
20b09c29 663 dev->hashed_sas_addr, HASHED_SAS_ADDR_SIZE);
b5762948
JG		 664 ssp_hdr->tag = cpu_to_be16(tag);
665
20b09c29 666 /* fill in IU for TASK and Command Frame */
b5762948
JG		 667 buf_cmd += sizeof(*ssp_hdr);
668 memcpy(buf_cmd, &task->ssp_task.LUN, 8);
b5762948 669
20b09c29
AY		 670 if (ssp_hdr->frame_type != SSP_TASK) {
671 buf_cmd[9] = fburst | task->ssp_task.task_attr |
672 (task->ssp_task.task_prio << 3);
e73823f7
JB		 673 memcpy(buf_cmd + 12, task->ssp_task.cmd->cmnd,
674 task->ssp_task.cmd->cmd_len);
20b09c29
AY		 675 } else{
676 buf_cmd[10] = tmf->tmf;
677 switch (tmf->tmf) {
678 case TMF_ABORT_TASK:
679 case TMF_QUERY_TASK:
680 buf_cmd[12] =
681 (tmf->tag_of_task_to_be_managed >> 8) & 0xff;
682 buf_cmd[13] =
683 tmf->tag_of_task_to_be_managed & 0xff;
684 break;
685 default:
686 break;
687 }
b5762948 688 }
20b09c29
AY		 689 /* fill in PRD (scatter/gather) table, if any */
690 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
b5762948
JG		 691 return 0;
692}
693
aa9f8328 694#define DEV_IS_GONE(mvi_dev) ((!mvi_dev || (mvi_dev->dev_type == SAS_PHY_UNUSED)))
0b15fb1f
XY		 695static int mvs_task_prep(struct sas_task *task, struct mvs_info *mvi, int is_tmf,
696 struct mvs_tmf_task *tmf, int *pass)
b5762948 697{
8f261aaf 698 struct domain_device *dev = task->dev;
0b15fb1f 699 struct mvs_device *mvi_dev = dev->lldd_dev;
b5762948 700 struct mvs_task_exec_info tei;
4e52fc0a 701 struct mvs_slot_info *slot;
0b15fb1f
XY		 702 u32 tag = 0xdeadbeef, n_elem = 0;
703 int rc = 0;
b5762948 704
20b09c29 705 if (!dev->port) {
0b15fb1f 706 struct task_status_struct *tsm = &task->task_status;
20b09c29
AY		 707
708 tsm->resp = SAS_TASK_UNDELIVERED;
709 tsm->stat = SAS_PHY_DOWN;
0b15fb1f
XY		 710 /*
711 * libsas will use dev->port, should
712 * not call task_done for sata
713 */
aa9f8328 714 if (dev->dev_type != SAS_SATA_DEV)
0b15fb1f
XY		 715 task->task_done(task);
716 return rc;
20b09c29
AY		 717 }
718
0b15fb1f
XY		 719 if (DEV_IS_GONE(mvi_dev)) {
720 if (mvi_dev)
721 mv_dprintk("device %d not ready.\n",
722 mvi_dev->device_id);
723 else
724 mv_dprintk("device %016llx not ready.\n",
725 SAS_ADDR(dev->sas_addr));
20b09c29 726
7789cd39
LB		 727 rc = SAS_PHY_DOWN;
728 return rc;
0b15fb1f
XY		 729 }
730 tei.port = dev->port->lldd_port;
731 if (tei.port && !tei.port->port_attached && !tmf) {
732 if (sas_protocol_ata(task->task_proto)) {
733 struct task_status_struct *ts = &task->task_status;
734 mv_dprintk("SATA/STP port %d does not attach"
735 "device.\n", dev->port->id);
736 ts->resp = SAS_TASK_COMPLETE;
737 ts->stat = SAS_PHY_DOWN;
20b09c29 738
0b15fb1f 739 task->task_done(task);
dd4969a8 740
dd4969a8 741 } else {
0b15fb1f
XY		 742 struct task_status_struct *ts = &task->task_status;
743 mv_dprintk("SAS port %d does not attach"
744 "device.\n", dev->port->id);
745 ts->resp = SAS_TASK_UNDELIVERED;
746 ts->stat = SAS_PHY_DOWN;
747 task->task_done(task);
dd4969a8 748 }
0b15fb1f
XY		 749 return rc;
750 }
dd4969a8 751
0b15fb1f
XY		 752 if (!sas_protocol_ata(task->task_proto)) {
753 if (task->num_scatter) {
754 n_elem = dma_map_sg(mvi->dev,
755 task->scatter,
756 task->num_scatter,
757 task->data_dir);
758 if (!n_elem) {
759 rc = -ENOMEM;
760 goto prep_out;
761 }
762 }
763 } else {
764 n_elem = task->num_scatter;
765 }
20b09c29 766
0b15fb1f
XY		 767 rc = mvs_tag_alloc(mvi, &tag);
768 if (rc)
769 goto err_out;
20b09c29 770
0b15fb1f 771 slot = &mvi->slot_info[tag];
20b09c29 772
0b15fb1f
XY		 773 task->lldd_task = NULL;
774 slot->n_elem = n_elem;
775 slot->slot_tag = tag;
776
1b171b1a 777 slot->buf = dma_pool_zalloc(mvi->dma_pool, GFP_ATOMIC, &slot->buf_dma);
18eddaed
WY		 778 if (!slot->buf) {
779 rc = -ENOMEM;
0b15fb1f 780 goto err_out_tag;
18eddaed 781 }
0b15fb1f
XY		 782
783 tei.task = task;
784 tei.hdr = &mvi->slot[tag];
785 tei.tag = tag;
786 tei.n_elem = n_elem;
787 switch (task->task_proto) {
788 case SAS_PROTOCOL_SMP:
789 rc = mvs_task_prep_smp(mvi, &tei);
790 break;
791 case SAS_PROTOCOL_SSP:
792 rc = mvs_task_prep_ssp(mvi, &tei, is_tmf, tmf);
793 break;
794 case SAS_PROTOCOL_SATA:
795 case SAS_PROTOCOL_STP:
796 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
797 rc = mvs_task_prep_ata(mvi, &tei);
798 break;
799 default:
800 dev_printk(KERN_ERR, mvi->dev,
801 "unknown sas_task proto: 0x%x\n",
802 task->task_proto);
803 rc = -EINVAL;
804 break;
805 }
dd4969a8 806
0b15fb1f
XY		 807 if (rc) {
808 mv_dprintk("rc is %x\n", rc);
809 goto err_out_slot_buf;
810 }
811 slot->task = task;
812 slot->port = tei.port;
813 task->lldd_task = slot;
814 list_add_tail(&slot->entry, &tei.port->list);
815 spin_lock(&task->task_state_lock);
816 task->task_state_flags |= SAS_TASK_AT_INITIATOR;
817 spin_unlock(&task->task_state_lock);
818
0b15fb1f
XY		 819 mvi_dev->running_req++;
820 ++(*pass);
821 mvi->tx_prod = (mvi->tx_prod + 1) & (MVS_CHIP_SLOT_SZ - 1);
9dc9fd94 822
0b15fb1f 823 return rc;
dd4969a8 824
0b15fb1f 825err_out_slot_buf:
4dbd6712 826 dma_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);
dd4969a8
JG		 827err_out_tag:
828 mvs_tag_free(mvi, tag);
829err_out:
20b09c29 830
0b15fb1f
XY		 831 dev_printk(KERN_ERR, mvi->dev, "mvsas prep failed[%d]!\n", rc);
832 if (!sas_protocol_ata(task->task_proto))
dd4969a8 833 if (n_elem)
0b15fb1f
XY		 834 dma_unmap_sg(mvi->dev, task->scatter, n_elem,
835 task->data_dir);
836prep_out:
837 return rc;
838}
839
79855d17 840static int mvs_task_exec(struct sas_task *task, gfp_t gfp_flags,
0b15fb1f
XY		 841 struct completion *completion, int is_tmf,
842 struct mvs_tmf_task *tmf)
843{
0b15fb1f
XY		 844 struct mvs_info *mvi = NULL;
845 u32 rc = 0;
846 u32 pass = 0;
847 unsigned long flags = 0;
848
849 mvi = ((struct mvs_device *)task->dev->lldd_dev)->mvi_info;
850
0b15fb1f
XY		 851 spin_lock_irqsave(&mvi->lock, flags);
852 rc = mvs_task_prep(task, mvi, is_tmf, tmf, &pass);
853 if (rc)
854 dev_printk(KERN_ERR, mvi->dev, "mvsas exec failed[%d]!\n", rc);
855
856 if (likely(pass))
857 MVS_CHIP_DISP->start_delivery(mvi, (mvi->tx_prod - 1) &
858 (MVS_CHIP_SLOT_SZ - 1));
0b84b709 859 spin_unlock_irqrestore(&mvi->lock, flags);
0b15fb1f 860
0b15fb1f
XY		 861 return rc;
862}
863
79855d17 864int mvs_queue_command(struct sas_task *task, gfp_t gfp_flags)
20b09c29 865{
79855d17 866 return mvs_task_exec(task, gfp_flags, NULL, 0, NULL);
20b09c29
AY		 867}
868
dd4969a8
JG		 869static void mvs_slot_free(struct mvs_info *mvi, u32 rx_desc)
870{
871 u32 slot_idx = rx_desc & RXQ_SLOT_MASK;
872 mvs_tag_clear(mvi, slot_idx);
873}
874
875static void mvs_slot_task_free(struct mvs_info *mvi, struct sas_task *task,
876 struct mvs_slot_info *slot, u32 slot_idx)
877{
22805217
DM		 878 if (!slot)
879 return;
20b09c29
AY		 880 if (!slot->task)
881 return;
dd4969a8
JG		 882 if (!sas_protocol_ata(task->task_proto))
883 if (slot->n_elem)
20b09c29 884 dma_unmap_sg(mvi->dev, task->scatter,
dd4969a8
JG		 885 slot->n_elem, task->data_dir);
886
887 switch (task->task_proto) {
888 case SAS_PROTOCOL_SMP:
20b09c29 889 dma_unmap_sg(mvi->dev, &task->smp_task.smp_resp, 1,
4179a061 890 DMA_FROM_DEVICE);
20b09c29 891 dma_unmap_sg(mvi->dev, &task->smp_task.smp_req, 1,
4179a061 892 DMA_TO_DEVICE);
dd4969a8
JG		 893 break;
894
895 case SAS_PROTOCOL_SATA:
896 case SAS_PROTOCOL_STP:
897 case SAS_PROTOCOL_SSP:
898 default:
899 /* do nothing */
900 break;
901 }
0b15fb1f
XY		 902
903 if (slot->buf) {
4dbd6712 904 dma_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);
0b15fb1f
XY		 905 slot->buf = NULL;
906 }
20b09c29 907 list_del_init(&slot->entry);
dd4969a8
JG		 908 task->lldd_task = NULL;
909 slot->task = NULL;
910 slot->port = NULL;
20b09c29
AY		 911 slot->slot_tag = 0xFFFFFFFF;
912 mvs_slot_free(mvi, slot_idx);
dd4969a8
JG		 913}
914
84fbd0ce 915static void mvs_update_wideport(struct mvs_info *mvi, int phy_no)
dd4969a8 916{
84fbd0ce 917 struct mvs_phy *phy = &mvi->phy[phy_no];
dd4969a8
JG		 918 struct mvs_port *port = phy->port;
919 int j, no;
920
20b09c29
AY		 921 for_each_phy(port->wide_port_phymap, j, no) {
922 if (j & 1) {
923 MVS_CHIP_DISP->write_port_cfg_addr(mvi, no,
924 PHYR_WIDE_PORT);
925 MVS_CHIP_DISP->write_port_cfg_data(mvi, no,
dd4969a8
JG		 926 port->wide_port_phymap);
927 } else {
20b09c29
AY		 928 MVS_CHIP_DISP->write_port_cfg_addr(mvi, no,
929 PHYR_WIDE_PORT);
930 MVS_CHIP_DISP->write_port_cfg_data(mvi, no,
931 0);
dd4969a8 932 }
20b09c29 933 }
dd4969a8
JG		 934}
935
936static u32 mvs_is_phy_ready(struct mvs_info *mvi, int i)
937{
938 u32 tmp;
939 struct mvs_phy *phy = &mvi->phy[i];
20b09c29 940 struct mvs_port *port = phy->port;
dd4969a8 941
20b09c29 942 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, i);
dd4969a8
JG		 943 if ((tmp & PHY_READY_MASK) && !(phy->irq_status & PHYEV_POOF)) {
944 if (!port)
945 phy->phy_attached = 1;
946 return tmp;
947 }
948
949 if (port) {
950 if (phy->phy_type & PORT_TYPE_SAS) {
951 port->wide_port_phymap &= ~(1U << i);
952 if (!port->wide_port_phymap)
953 port->port_attached = 0;
954 mvs_update_wideport(mvi, i);
955 } else if (phy->phy_type & PORT_TYPE_SATA)
956 port->port_attached = 0;
dd4969a8
JG		 957 phy->port = NULL;
958 phy->phy_attached = 0;
959 phy->phy_type &= ~(PORT_TYPE_SAS | PORT_TYPE_SATA);
960 }
961 return 0;
962}
963
964static void *mvs_get_d2h_reg(struct mvs_info *mvi, int i, void *buf)
965{
966 u32 *s = (u32 *) buf;
967
968 if (!s)
969 return NULL;
970
20b09c29 971 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG3);
84fbd0ce 972 s[3] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
dd4969a8 973
20b09c29 974 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG2);
84fbd0ce 975 s[2] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
dd4969a8 976
20b09c29 977 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG1);
84fbd0ce 978 s[1] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
dd4969a8 979
20b09c29 980 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG0);
84fbd0ce 981 s[0] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
20b09c29 982
20b09c29
AY		 983 if (((s[1] & 0x00FFFFFF) == 0x00EB1401) && (*(u8 *)&s[3] == 0x01))
984 s[1] = 0x00EB1401 | (*((u8 *)&s[1] + 3) & 0x10);
dd4969a8 985
f9da3be5 986 return s;
dd4969a8
JG		 987}
988
989static u32 mvs_is_sig_fis_received(u32 irq_status)
990{
991 return irq_status & PHYEV_SIG_FIS;
992}
993
8882f081
XY		 994static void mvs_sig_remove_timer(struct mvs_phy *phy)
995{
996 if (phy->timer.function)
997 del_timer(&phy->timer);
998 phy->timer.function = NULL;
999}
1000
20b09c29 1001void mvs_update_phyinfo(struct mvs_info *mvi, int i, int get_st)
dd4969a8
JG		 1002{
1003 struct mvs_phy *phy = &mvi->phy[i];
20b09c29 1004 struct sas_identify_frame *id;
b5762948 1005
20b09c29 1006 id = (struct sas_identify_frame *)phy->frame_rcvd;
b5762948 1007
dd4969a8 1008 if (get_st) {
20b09c29 1009 phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, i);
dd4969a8
JG		 1010 phy->phy_status = mvs_is_phy_ready(mvi, i);
1011 }
8f261aaf 1012
dd4969a8 1013 if (phy->phy_status) {
20b09c29
AY		 1014 int oob_done = 0;
1015 struct asd_sas_phy *sas_phy = &mvi->phy[i].sas_phy;
b5762948 1016
20b09c29
AY		 1017 oob_done = MVS_CHIP_DISP->oob_done(mvi, i);
1018
1019 MVS_CHIP_DISP->fix_phy_info(mvi, i, id);
1020 if (phy->phy_type & PORT_TYPE_SATA) {
1021 phy->identify.target_port_protocols = SAS_PROTOCOL_STP;
1022 if (mvs_is_sig_fis_received(phy->irq_status)) {
8882f081 1023 mvs_sig_remove_timer(phy);
20b09c29
AY		 1024 phy->phy_attached = 1;
1025 phy->att_dev_sas_addr =
1026 i + mvi->id * mvi->chip->n_phy;
1027 if (oob_done)
1028 sas_phy->oob_mode = SATA_OOB_MODE;
1029 phy->frame_rcvd_size =
1030 sizeof(struct dev_to_host_fis);
f9da3be5 1031 mvs_get_d2h_reg(mvi, i, id);
20b09c29
AY		 1032 } else {
1033 u32 tmp;
1034 dev_printk(KERN_DEBUG, mvi->dev,
1035 "Phy%d : No sig fis\n", i);
1036 tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, i);
1037 MVS_CHIP_DISP->write_port_irq_mask(mvi, i,
1038 tmp | PHYEV_SIG_FIS);
1039 phy->phy_attached = 0;
1040 phy->phy_type &= ~PORT_TYPE_SATA;
20b09c29
AY		 1041 goto out_done;
1042 }
9dc9fd94 1043 } else if (phy->phy_type & PORT_TYPE_SAS
20b09c29
AY		 1044 || phy->att_dev_info & PORT_SSP_INIT_MASK) {
1045 phy->phy_attached = 1;
dd4969a8 1046 phy->identify.device_type =
20b09c29 1047 phy->att_dev_info & PORT_DEV_TYPE_MASK;
b5762948 1048
aa9f8328 1049 if (phy->identify.device_type == SAS_END_DEVICE)
dd4969a8
JG		 1050 phy->identify.target_port_protocols =
1051 SAS_PROTOCOL_SSP;
aa9f8328 1052 else if (phy->identify.device_type != SAS_PHY_UNUSED)
dd4969a8
JG		 1053 phy->identify.target_port_protocols =
1054 SAS_PROTOCOL_SMP;
20b09c29 1055 if (oob_done)
dd4969a8
JG		 1056 sas_phy->oob_mode = SAS_OOB_MODE;
1057 phy->frame_rcvd_size =
1058 sizeof(struct sas_identify_frame);
dd4969a8 1059 }
20b09c29
AY		 1060 memcpy(sas_phy->attached_sas_addr,
1061 &phy->att_dev_sas_addr, SAS_ADDR_SIZE);
b5762948 1062
20b09c29
AY		 1063 if (MVS_CHIP_DISP->phy_work_around)
1064 MVS_CHIP_DISP->phy_work_around(mvi, i);
dd4969a8 1065 }
84fbd0ce 1066 mv_dprintk("phy %d attach dev info is %x\n",
20b09c29 1067 i + mvi->id * mvi->chip->n_phy, phy->att_dev_info);
84fbd0ce 1068 mv_dprintk("phy %d attach sas addr is %llx\n",
20b09c29 1069 i + mvi->id * mvi->chip->n_phy, phy->att_dev_sas_addr);
4e52fc0a 1070out_done:
dd4969a8 1071 if (get_st)
20b09c29 1072 MVS_CHIP_DISP->write_port_irq_stat(mvi, i, phy->irq_status);
b5762948
JG		 1073}
1074
20b09c29 1075static void mvs_port_notify_formed(struct asd_sas_phy *sas_phy, int lock)
8f261aaf 1076{
dd4969a8 1077 struct sas_ha_struct *sas_ha = sas_phy->ha;
20b09c29 1078 struct mvs_info *mvi = NULL; int i = 0, hi;
dd4969a8 1079 struct mvs_phy *phy = sas_phy->lldd_phy;
20b09c29
AY		 1080 struct asd_sas_port *sas_port = sas_phy->port;
1081 struct mvs_port *port;
1082 unsigned long flags = 0;
1083 if (!sas_port)
1084 return;
8f261aaf 1085
20b09c29
AY		 1086 while (sas_ha->sas_phy[i]) {
1087 if (sas_ha->sas_phy[i] == sas_phy)
1088 break;
1089 i++;
1090 }
1091 hi = i/((struct mvs_prv_info *)sas_ha->lldd_ha)->n_phy;
1092 mvi = ((struct mvs_prv_info *)sas_ha->lldd_ha)->mvi[hi];
84fbd0ce
XY		 1093 if (i >= mvi->chip->n_phy)
1094 port = &mvi->port[i - mvi->chip->n_phy];
20b09c29 1095 else
84fbd0ce 1096 port = &mvi->port[i];
20b09c29
AY		 1097 if (lock)
1098 spin_lock_irqsave(&mvi->lock, flags);
dd4969a8
JG		 1099 port->port_attached = 1;
1100 phy->port = port;
0b15fb1f 1101 sas_port->lldd_port = port;
dd4969a8
JG		 1102 if (phy->phy_type & PORT_TYPE_SAS) {
1103 port->wide_port_phymap = sas_port->phy_mask;
20b09c29 1104 mv_printk("set wide port phy map %x\n", sas_port->phy_mask);
dd4969a8 1105 mvs_update_wideport(mvi, sas_phy->id);
477f6d19
XY		 1106
1107 /* direct attached SAS device */
1108 if (phy->att_dev_info & PORT_SSP_TRGT_MASK) {
1109 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_PHY_STAT);
1110 MVS_CHIP_DISP->write_port_cfg_data(mvi, i, 0x04);
1111 }
8f261aaf 1112 }
20b09c29
AY		 1113 if (lock)
1114 spin_unlock_irqrestore(&mvi->lock, flags);
dd4969a8
JG		 1115}
1116
20b09c29 1117static void mvs_port_notify_deformed(struct asd_sas_phy *sas_phy, int lock)
dd4969a8 1118{
9dc9fd94
S		 1119 struct domain_device *dev;
1120 struct mvs_phy *phy = sas_phy->lldd_phy;
1121 struct mvs_info *mvi = phy->mvi;
1122 struct asd_sas_port *port = sas_phy->port;
1123 int phy_no = 0;
1124
1125 while (phy != &mvi->phy[phy_no]) {
1126 phy_no++;
1127 if (phy_no >= MVS_MAX_PHYS)
1128 return;
1129 }
1130 list_for_each_entry(dev, &port->dev_list, dev_list_node)
84fbd0ce 1131 mvs_do_release_task(phy->mvi, phy_no, dev);
9dc9fd94 1132
dd4969a8
JG		 1133}
1134
dd4969a8 1135
20b09c29
AY		 1136void mvs_port_formed(struct asd_sas_phy *sas_phy)
1137{
1138 mvs_port_notify_formed(sas_phy, 1);
dd4969a8
JG		 1139}
1140
20b09c29 1141void mvs_port_deformed(struct asd_sas_phy *sas_phy)
dd4969a8 1142{
20b09c29
AY		 1143 mvs_port_notify_deformed(sas_phy, 1);
1144}
8f261aaf 1145
14bf41dc 1146static struct mvs_device *mvs_alloc_dev(struct mvs_info *mvi)
20b09c29
AY		 1147{
1148 u32 dev;
1149 for (dev = 0; dev < MVS_MAX_DEVICES; dev++) {
aa9f8328 1150 if (mvi->devices[dev].dev_type == SAS_PHY_UNUSED) {
20b09c29
AY		 1151 mvi->devices[dev].device_id = dev;
1152 return &mvi->devices[dev];
1153 }
8f261aaf 1154 }
8121ed42 1155
20b09c29
AY		 1156 if (dev == MVS_MAX_DEVICES)
1157 mv_printk("max support %d devices, ignore ..\n",
1158 MVS_MAX_DEVICES);
1159
1160 return NULL;
8f261aaf
KW		 1161}
1162
14bf41dc 1163static void mvs_free_dev(struct mvs_device *mvi_dev)
b5762948 1164{
20b09c29
AY		 1165 u32 id = mvi_dev->device_id;
1166 memset(mvi_dev, 0, sizeof(*mvi_dev));
1167 mvi_dev->device_id = id;
aa9f8328 1168 mvi_dev->dev_type = SAS_PHY_UNUSED;
20b09c29
AY		 1169 mvi_dev->dev_status = MVS_DEV_NORMAL;
1170 mvi_dev->taskfileset = MVS_ID_NOT_MAPPED;
1171}
b5762948 1172
14bf41dc 1173static int mvs_dev_found_notify(struct domain_device *dev, int lock)
20b09c29
AY		 1174{
1175 unsigned long flags = 0;
1176 int res = 0;
1177 struct mvs_info *mvi = NULL;
1178 struct domain_device *parent_dev = dev->parent;
1179 struct mvs_device *mvi_device;
b5762948 1180
20b09c29 1181 mvi = mvs_find_dev_mvi(dev);
b5762948 1182
20b09c29
AY		 1183 if (lock)
1184 spin_lock_irqsave(&mvi->lock, flags);
1185
1186 mvi_device = mvs_alloc_dev(mvi);
1187 if (!mvi_device) {
1188 res = -1;
1189 goto found_out;
b5762948 1190 }
f9da3be5 1191 dev->lldd_dev = mvi_device;
9dc9fd94 1192 mvi_device->dev_status = MVS_DEV_NORMAL;
20b09c29 1193 mvi_device->dev_type = dev->dev_type;
9870d9a2 1194 mvi_device->mvi_info = mvi;
84fbd0ce 1195 mvi_device->sas_device = dev;
924a3541 1196 if (parent_dev && dev_is_expander(parent_dev->dev_type)) {
20b09c29
AY		 1197 int phy_id;
1198 u8 phy_num = parent_dev->ex_dev.num_phys;
1199 struct ex_phy *phy;
1200 for (phy_id = 0; phy_id < phy_num; phy_id++) {
1201 phy = &parent_dev->ex_dev.ex_phy[phy_id];
1202 if (SAS_ADDR(phy->attached_sas_addr) ==
1203 SAS_ADDR(dev->sas_addr)) {
1204 mvi_device->attached_phy = phy_id;
1205 break;
1206 }
1207 }
b5762948 1208
20b09c29
AY		 1209 if (phy_id == phy_num) {
1210 mv_printk("Error: no attached dev:%016llx"
1211 "at ex:%016llx.\n",
1212 SAS_ADDR(dev->sas_addr),
1213 SAS_ADDR(parent_dev->sas_addr));
1214 res = -1;
1215 }
dd4969a8 1216 }
b5762948 1217
20b09c29
AY		 1218found_out:
1219 if (lock)
1220 spin_unlock_irqrestore(&mvi->lock, flags);
1221 return res;
1222}
b5762948 1223
20b09c29
AY		 1224int mvs_dev_found(struct domain_device *dev)
1225{
1226 return mvs_dev_found_notify(dev, 1);
1227}
b5762948 1228
14bf41dc 1229static void mvs_dev_gone_notify(struct domain_device *dev)
20b09c29
AY		 1230{
1231 unsigned long flags = 0;
f9da3be5 1232 struct mvs_device *mvi_dev = dev->lldd_dev;
eaa015d2 1233 struct mvs_info *mvi;
b5762948 1234
eaa015d2 1235 if (!mvi_dev) {
20b09c29 1236 mv_dprintk("found dev has gone.\n");
eaa015d2 1237 return;
b5762948 1238 }
eaa015d2
RS		 1239
1240 mvi = mvi_dev->mvi_info;
1241
1242 spin_lock_irqsave(&mvi->lock, flags);
1243
1244 mv_dprintk("found dev[%d:%x] is gone.\n",
1245 mvi_dev->device_id, mvi_dev->dev_type);
1246 mvs_release_task(mvi, dev);
1247 mvs_free_reg_set(mvi, mvi_dev);
1248 mvs_free_dev(mvi_dev);
1249
20b09c29 1250 dev->lldd_dev = NULL;
84fbd0ce 1251 mvi_dev->sas_device = NULL;
b5762948 1252
9dc9fd94 1253 spin_unlock_irqrestore(&mvi->lock, flags);
b5762948
JG		 1254}
1255
b5762948 1256
20b09c29
AY		 1257void mvs_dev_gone(struct domain_device *dev)
1258{
9dc9fd94 1259 mvs_dev_gone_notify(dev);
20b09c29 1260}
b5762948 1261
20b09c29
AY		 1262static void mvs_task_done(struct sas_task *task)
1263{
f0bf750c 1264 if (!del_timer(&task->slow_task->timer))
20b09c29 1265 return;
f0bf750c 1266 complete(&task->slow_task->completion);
b5762948 1267}
b5762948 1268
77570eed 1269static void mvs_tmf_timedout(struct timer_list *t)
b5762948 1270{
77570eed
KC		 1271 struct sas_task_slow *slow = from_timer(slow, t, timer);
1272 struct sas_task *task = slow->task;
8f261aaf 1273
20b09c29 1274 task->task_state_flags |= SAS_TASK_STATE_ABORTED;
f0bf750c 1275 complete(&task->slow_task->completion);
20b09c29 1276}
8f261aaf 1277
20b09c29
AY		 1278#define MVS_TASK_TIMEOUT 20
1279static int mvs_exec_internal_tmf_task(struct domain_device *dev,
1280 void *parameter, u32 para_len, struct mvs_tmf_task *tmf)
1281{
1282 int res, retry;
1283 struct sas_task *task = NULL;
8f261aaf 1284
20b09c29 1285 for (retry = 0; retry < 3; retry++) {
f0bf750c 1286 task = sas_alloc_slow_task(GFP_KERNEL);
20b09c29
AY		 1287 if (!task)
1288 return -ENOMEM;
8f261aaf 1289
20b09c29
AY		 1290 task->dev = dev;
1291 task->task_proto = dev->tproto;
8f261aaf 1292
20b09c29
AY		 1293 memcpy(&task->ssp_task, parameter, para_len);
1294 task->task_done = mvs_task_done;
8f261aaf 1295
841b86f3 1296 task->slow_task->timer.function = mvs_tmf_timedout;
f0bf750c
DW		 1297 task->slow_task->timer.expires = jiffies + MVS_TASK_TIMEOUT*HZ;
1298 add_timer(&task->slow_task->timer);
8f261aaf 1299
79855d17 1300 res = mvs_task_exec(task, GFP_KERNEL, NULL, 1, tmf);
8f261aaf 1301
20b09c29 1302 if (res) {
f0bf750c 1303 del_timer(&task->slow_task->timer);
6d3be300 1304 mv_printk("executing internal task failed:%d\n", res);
20b09c29
AY		 1305 goto ex_err;
1306 }
8f261aaf 1307
f0bf750c 1308 wait_for_completion(&task->slow_task->completion);
84fbd0ce 1309 res = TMF_RESP_FUNC_FAILED;
20b09c29
AY		 1310 /* Even TMF timed out, return direct. */
1311 if ((task->task_state_flags & SAS_TASK_STATE_ABORTED)) {
1312 if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) {
1313 mv_printk("TMF task[%x] timeout.\n", tmf->tmf);
1314 goto ex_err;
1315 }
1316 }
8f261aaf 1317
20b09c29 1318 if (task->task_status.resp == SAS_TASK_COMPLETE &&
df64d3ca 1319 task->task_status.stat == SAM_STAT_GOOD) {
20b09c29
AY		 1320 res = TMF_RESP_FUNC_COMPLETE;
1321 break;
1322 }
b5762948 1323
20b09c29
AY		 1324 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1325 task->task_status.stat == SAS_DATA_UNDERRUN) {
1326 /* no error, but return the number of bytes of
1327 * underrun */
1328 res = task->task_status.residual;
1329 break;
1330 }
b5762948 1331
20b09c29
AY		 1332 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1333 task->task_status.stat == SAS_DATA_OVERRUN) {
1334 mv_dprintk("blocked task error.\n");
1335 res = -EMSGSIZE;
1336 break;
1337 } else {
1338 mv_dprintk(" task to dev %016llx response: 0x%x "
1339 "status 0x%x\n",
1340 SAS_ADDR(dev->sas_addr),
1341 task->task_status.resp,
1342 task->task_status.stat);
4fcf812c 1343 sas_free_task(task);
20b09c29 1344 task = NULL;
b5762948 1345
dd4969a8 1346 }
dd4969a8 1347 }
20b09c29
AY		 1348ex_err:
1349 BUG_ON(retry == 3 && task != NULL);
4fcf812c 1350 sas_free_task(task);
20b09c29 1351 return res;
dd4969a8 1352}
b5762948 1353
20b09c29
AY		 1354static int mvs_debug_issue_ssp_tmf(struct domain_device *dev,
1355 u8 *lun, struct mvs_tmf_task *tmf)
dd4969a8 1356{
20b09c29 1357 struct sas_ssp_task ssp_task;
20b09c29
AY		 1358 if (!(dev->tproto & SAS_PROTOCOL_SSP))
1359 return TMF_RESP_FUNC_ESUPP;
b5762948 1360
84fbd0ce 1361 memcpy(ssp_task.LUN, lun, 8);
b5762948 1362
20b09c29
AY		 1363 return mvs_exec_internal_tmf_task(dev, &ssp_task,
1364 sizeof(ssp_task), tmf);
1365}
8f261aaf 1366
8f261aaf 1367
20b09c29
AY		 1368/* Standard mandates link reset for ATA (type 0)
1369 and hard reset for SSP (type 1) , only for RECOVERY */
1370static int mvs_debug_I_T_nexus_reset(struct domain_device *dev)
1371{
1372 int rc;
f41a0c44 1373 struct sas_phy *phy = sas_get_local_phy(dev);
aa9f8328 1374 int reset_type = (dev->dev_type == SAS_SATA_DEV ||
20b09c29
AY		 1375 (dev->tproto & SAS_PROTOCOL_STP)) ? 0 : 1;
1376 rc = sas_phy_reset(phy, reset_type);
f41a0c44 1377 sas_put_local_phy(phy);
20b09c29
AY		 1378 msleep(2000);
1379 return rc;
1380}
8f261aaf 1381
20b09c29
AY		 1382/* mandatory SAM-3 */
1383int mvs_lu_reset(struct domain_device *dev, u8 *lun)
1384{
1385 unsigned long flags;
84fbd0ce 1386 int rc = TMF_RESP_FUNC_FAILED;
20b09c29 1387 struct mvs_tmf_task tmf_task;
f9da3be5 1388 struct mvs_device * mvi_dev = dev->lldd_dev;
9870d9a2 1389 struct mvs_info *mvi = mvi_dev->mvi_info;
20b09c29
AY		 1390
1391 tmf_task.tmf = TMF_LU_RESET;
1392 mvi_dev->dev_status = MVS_DEV_EH;
1393 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
1394 if (rc == TMF_RESP_FUNC_COMPLETE) {
20b09c29 1395 spin_lock_irqsave(&mvi->lock, flags);
84fbd0ce 1396 mvs_release_task(mvi, dev);
20b09c29 1397 spin_unlock_irqrestore(&mvi->lock, flags);
dd4969a8 1398 }
20b09c29
AY		 1399 /* If failed, fall-through I_T_Nexus reset */
1400 mv_printk("%s for device[%x]:rc= %d\n", __func__,
1401 mvi_dev->device_id, rc);
1402 return rc;
1403}
8f261aaf 1404
20b09c29
AY		 1405int mvs_I_T_nexus_reset(struct domain_device *dev)
1406{
1407 unsigned long flags;
9dc9fd94 1408 int rc = TMF_RESP_FUNC_FAILED;
f2c43a62 1409 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
9870d9a2 1410 struct mvs_info *mvi = mvi_dev->mvi_info;
20b09c29
AY		 1411
1412 if (mvi_dev->dev_status != MVS_DEV_EH)
1413 return TMF_RESP_FUNC_COMPLETE;
84fbd0ce
XY		 1414 else
1415 mvi_dev->dev_status = MVS_DEV_NORMAL;
20b09c29
AY		 1416 rc = mvs_debug_I_T_nexus_reset(dev);
1417 mv_printk("%s for device[%x]:rc= %d\n",
1418 __func__, mvi_dev->device_id, rc);
1419
20b09c29 1420 spin_lock_irqsave(&mvi->lock, flags);
9dc9fd94 1421 mvs_release_task(mvi, dev);
20b09c29
AY		 1422 spin_unlock_irqrestore(&mvi->lock, flags);
1423
1424 return rc;
1425}
1426/* optional SAM-3 */
1427int mvs_query_task(struct sas_task *task)
1428{
1429 u32 tag;
1430 struct scsi_lun lun;
1431 struct mvs_tmf_task tmf_task;
1432 int rc = TMF_RESP_FUNC_FAILED;
1433
1434 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1435 struct scsi_cmnd * cmnd = (struct scsi_cmnd *)task->uldd_task;
1436 struct domain_device *dev = task->dev;
9870d9a2
AY		 1437 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
1438 struct mvs_info *mvi = mvi_dev->mvi_info;
20b09c29
AY		 1439
1440 int_to_scsilun(cmnd->device->lun, &lun);
1441 rc = mvs_find_tag(mvi, task, &tag);
1442 if (rc == 0) {
1443 rc = TMF_RESP_FUNC_FAILED;
dd4969a8 1444 return rc;
20b09c29 1445 }
8f261aaf 1446
20b09c29
AY		 1447 tmf_task.tmf = TMF_QUERY_TASK;
1448 tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag);
8f261aaf 1449
20b09c29
AY		 1450 rc = mvs_debug_issue_ssp_tmf(dev, lun.scsi_lun, &tmf_task);
1451 switch (rc) {
1452 /* The task is still in Lun, release it then */
1453 case TMF_RESP_FUNC_SUCC:
1454 /* The task is not in Lun or failed, reset the phy */
1455 case TMF_RESP_FUNC_FAILED:
1456 case TMF_RESP_FUNC_COMPLETE:
1457 break;
1458 }
dd4969a8 1459 }
20b09c29
AY		 1460 mv_printk("%s:rc= %d\n", __func__, rc);
1461 return rc;
8f261aaf
KW		 1462}
1463
20b09c29
AY		 1464/* mandatory SAM-3, still need free task/slot info */
1465int mvs_abort_task(struct sas_task *task)
8f261aaf 1466{
20b09c29
AY		 1467 struct scsi_lun lun;
1468 struct mvs_tmf_task tmf_task;
1469 struct domain_device *dev = task->dev;
9870d9a2 1470 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
24ae163e 1471 struct mvs_info *mvi;
20b09c29
AY		 1472 int rc = TMF_RESP_FUNC_FAILED;
1473 unsigned long flags;
1474 u32 tag;
9870d9a2 1475
9dc9fd94 1476 if (!mvi_dev) {
84fbd0ce
XY		 1477 mv_printk("Device has removed\n");
1478 return TMF_RESP_FUNC_FAILED;
9dc9fd94
S		 1479 }
1480
24ae163e
JS		 1481 mvi = mvi_dev->mvi_info;
1482
20b09c29
AY		 1483 spin_lock_irqsave(&task->task_state_lock, flags);
1484 if (task->task_state_flags & SAS_TASK_STATE_DONE) {
1485 spin_unlock_irqrestore(&task->task_state_lock, flags);
1486 rc = TMF_RESP_FUNC_COMPLETE;
1487 goto out;
dd4969a8 1488 }
20b09c29 1489 spin_unlock_irqrestore(&task->task_state_lock, flags);
9dc9fd94 1490 mvi_dev->dev_status = MVS_DEV_EH;
20b09c29
AY		 1491 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1492 struct scsi_cmnd * cmnd = (struct scsi_cmnd *)task->uldd_task;
1493
1494 int_to_scsilun(cmnd->device->lun, &lun);
1495 rc = mvs_find_tag(mvi, task, &tag);
1496 if (rc == 0) {
1497 mv_printk("No such tag in %s\n", __func__);
1498 rc = TMF_RESP_FUNC_FAILED;
1499 return rc;
1500 }
8f261aaf 1501
20b09c29
AY		 1502 tmf_task.tmf = TMF_ABORT_TASK;
1503 tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag);
8f261aaf 1504
20b09c29 1505 rc = mvs_debug_issue_ssp_tmf(dev, lun.scsi_lun, &tmf_task);
8f261aaf 1506
20b09c29
AY		 1507 /* if successful, clear the task and callback forwards.*/
1508 if (rc == TMF_RESP_FUNC_COMPLETE) {
1509 u32 slot_no;
1510 struct mvs_slot_info *slot;
8f261aaf 1511
20b09c29 1512 if (task->lldd_task) {
f9da3be5 1513 slot = task->lldd_task;
20b09c29 1514 slot_no = (u32) (slot - mvi->slot_info);
9dc9fd94 1515 spin_lock_irqsave(&mvi->lock, flags);
20b09c29 1516 mvs_slot_complete(mvi, slot_no, 1);
9dc9fd94 1517 spin_unlock_irqrestore(&mvi->lock, flags);
20b09c29
AY		 1518 }
1519 }
9dc9fd94 1520
20b09c29
AY		 1521 } else if (task->task_proto & SAS_PROTOCOL_SATA ||
1522 task->task_proto & SAS_PROTOCOL_STP) {
aa9f8328 1523 if (SAS_SATA_DEV == dev->dev_type) {
9dc9fd94 1524 struct mvs_slot_info *slot = task->lldd_task;
9dc9fd94 1525 u32 slot_idx = (u32)(slot - mvi->slot_info);
84fbd0ce 1526 mv_dprintk("mvs_abort_task() mvi=%p task=%p "
9dc9fd94
S		 1527 "slot=%p slot_idx=x%x\n",
1528 mvi, task, slot, slot_idx);
95ab0003 1529 task->task_state_flags |= SAS_TASK_STATE_ABORTED;
9dc9fd94 1530 mvs_slot_task_free(mvi, task, slot, slot_idx);
84fbd0ce
XY		 1531 rc = TMF_RESP_FUNC_COMPLETE;
1532 goto out;
9dc9fd94 1533 }
8f261aaf 1534
20b09c29
AY		 1535 }
1536out:
1537 if (rc != TMF_RESP_FUNC_COMPLETE)
1538 mv_printk("%s:rc= %d\n", __func__, rc);
dd4969a8 1539 return rc;
8f261aaf
KW		 1540}
1541
20b09c29 1542int mvs_abort_task_set(struct domain_device *dev, u8 *lun)
8f261aaf 1543{
20b09c29
AY		 1544 int rc = TMF_RESP_FUNC_FAILED;
1545 struct mvs_tmf_task tmf_task;
8f261aaf 1546
20b09c29
AY		 1547 tmf_task.tmf = TMF_ABORT_TASK_SET;
1548 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
dd4969a8 1549
20b09c29 1550 return rc;
8f261aaf
KW		 1551}
1552
20b09c29 1553int mvs_clear_aca(struct domain_device *dev, u8 *lun)
8f261aaf 1554{
20b09c29
AY		 1555 int rc = TMF_RESP_FUNC_FAILED;
1556 struct mvs_tmf_task tmf_task;
8f261aaf 1557
20b09c29
AY		 1558 tmf_task.tmf = TMF_CLEAR_ACA;
1559 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
8f261aaf 1560
20b09c29
AY		 1561 return rc;
1562}
8f261aaf 1563
20b09c29
AY		 1564int mvs_clear_task_set(struct domain_device *dev, u8 *lun)
1565{
1566 int rc = TMF_RESP_FUNC_FAILED;
1567 struct mvs_tmf_task tmf_task;
8f261aaf 1568
20b09c29
AY		 1569 tmf_task.tmf = TMF_CLEAR_TASK_SET;
1570 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
8f261aaf 1571
20b09c29 1572 return rc;
dd4969a8 1573}
8f261aaf 1574
20b09c29
AY		 1575static int mvs_sata_done(struct mvs_info *mvi, struct sas_task *task,
1576 u32 slot_idx, int err)
dd4969a8 1577{
f9da3be5 1578 struct mvs_device *mvi_dev = task->dev->lldd_dev;
20b09c29
AY		 1579 struct task_status_struct *tstat = &task->task_status;
1580 struct ata_task_resp *resp = (struct ata_task_resp *)tstat->buf;
df64d3ca 1581 int stat = SAM_STAT_GOOD;
e9ff91b6 1582
8f261aaf 1583
20b09c29
AY		 1584 resp->frame_len = sizeof(struct dev_to_host_fis);
1585 memcpy(&resp->ending_fis[0],
1586 SATA_RECEIVED_D2H_FIS(mvi_dev->taskfileset),
1587 sizeof(struct dev_to_host_fis));
1588 tstat->buf_valid_size = sizeof(*resp);
9dc9fd94
S		 1589 if (unlikely(err)) {
1590 if (unlikely(err & CMD_ISS_STPD))
1591 stat = SAS_OPEN_REJECT;
1592 else
1593 stat = SAS_PROTO_RESPONSE;
1594 }
1595
20b09c29 1596 return stat;
8f261aaf
KW		 1597}
1598
14bf41dc 1599static void mvs_set_sense(u8 *buffer, int len, int d_sense,
a4632aae
XY		 1600 int key, int asc, int ascq)
1601{
1602 memset(buffer, 0, len);
1603
1604 if (d_sense) {
1605 /* Descriptor format */
1606 if (len < 4) {
1607 mv_printk("Length %d of sense buffer too small to "
1608 "fit sense %x:%x:%x", len, key, asc, ascq);
1609 }
1610
1611 buffer[0] = 0x72; /* Response Code */
1612 if (len > 1)
1613 buffer[1] = key; /* Sense Key */
1614 if (len > 2)
1615 buffer[2] = asc; /* ASC */
1616 if (len > 3)
1617 buffer[3] = ascq; /* ASCQ */
1618 } else {
1619 if (len < 14) {
1620 mv_printk("Length %d of sense buffer too small to "
1621 "fit sense %x:%x:%x", len, key, asc, ascq);
1622 }
1623
1624 buffer[0] = 0x70; /* Response Code */
1625 if (len > 2)
1626 buffer[2] = key; /* Sense Key */
1627 if (len > 7)
1628 buffer[7] = 0x0a; /* Additional Sense Length */
1629 if (len > 12)
1630 buffer[12] = asc; /* ASC */
1631 if (len > 13)
1632 buffer[13] = ascq; /* ASCQ */
1633 }
1634
1635 return;
1636}
1637
14bf41dc 1638static void mvs_fill_ssp_resp_iu(struct ssp_response_iu *iu,
a4632aae
XY		 1639 u8 key, u8 asc, u8 asc_q)
1640{
1641 iu->datapres = 2;
1642 iu->response_data_len = 0;
1643 iu->sense_data_len = 17;
1644 iu->status = 02;
1645 mvs_set_sense(iu->sense_data, 17, 0,
1646 key, asc, asc_q);
1647}
1648
20b09c29
AY		 1649static int mvs_slot_err(struct mvs_info *mvi, struct sas_task *task,
1650 u32 slot_idx)
8f261aaf 1651{
20b09c29
AY		 1652 struct mvs_slot_info *slot = &mvi->slot_info[slot_idx];
1653 int stat;
84fbd0ce 1654 u32 err_dw0 = le32_to_cpu(*(u32 *)slot->response);
a4632aae 1655 u32 err_dw1 = le32_to_cpu(*((u32 *)slot->response + 1));
20b09c29
AY		 1656 u32 tfs = 0;
1657 enum mvs_port_type type = PORT_TYPE_SAS;
8f261aaf 1658
20b09c29
AY		 1659 if (err_dw0 & CMD_ISS_STPD)
1660 MVS_CHIP_DISP->issue_stop(mvi, type, tfs);
1661
1662 MVS_CHIP_DISP->command_active(mvi, slot_idx);
b5762948 1663
df64d3ca 1664 stat = SAM_STAT_CHECK_CONDITION;
dd4969a8 1665 switch (task->task_proto) {
dd4969a8 1666 case SAS_PROTOCOL_SSP:
a4632aae 1667 {
20b09c29 1668 stat = SAS_ABORTED_TASK;
a4632aae
XY		 1669 if ((err_dw0 & NO_DEST) || err_dw1 & bit(31)) {
1670 struct ssp_response_iu *iu = slot->response +
1671 sizeof(struct mvs_err_info);
1672 mvs_fill_ssp_resp_iu(iu, NOT_READY, 0x04, 01);
1673 sas_ssp_task_response(mvi->dev, task, iu);
1674 stat = SAM_STAT_CHECK_CONDITION;
1675 }
1676 if (err_dw1 & bit(31))
1677 mv_printk("reuse same slot, retry command.\n");
20b09c29 1678 break;
a4632aae 1679 }
20b09c29 1680 case SAS_PROTOCOL_SMP:
df64d3ca 1681 stat = SAM_STAT_CHECK_CONDITION;
dd4969a8 1682 break;
20b09c29 1683
dd4969a8
JG		 1684 case SAS_PROTOCOL_SATA:
1685 case SAS_PROTOCOL_STP:
20b09c29
AY		 1686 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
1687 {
20b09c29 1688 task->ata_task.use_ncq = 0;
84fbd0ce 1689 stat = SAS_PROTO_RESPONSE;
9dc9fd94 1690 mvs_sata_done(mvi, task, slot_idx, err_dw0);
dd4969a8 1691 }
20b09c29 1692 break;
dd4969a8
JG		 1693 default:
1694 break;
1695 }
1696
20b09c29 1697 return stat;
e9ff91b6
KW		 1698}
1699
20b09c29 1700int mvs_slot_complete(struct mvs_info *mvi, u32 rx_desc, u32 flags)
b5762948 1701{
20b09c29
AY		 1702 u32 slot_idx = rx_desc & RXQ_SLOT_MASK;
1703 struct mvs_slot_info *slot = &mvi->slot_info[slot_idx];
1704 struct sas_task *task = slot->task;
1705 struct mvs_device *mvi_dev = NULL;
1706 struct task_status_struct *tstat;
9dc9fd94
S		 1707 struct domain_device *dev;
1708 u32 aborted;
20b09c29 1709
20b09c29
AY		 1710 void *to;
1711 enum exec_status sts;
1712
9dc9fd94 1713 if (unlikely(!task || !task->lldd_task || !task->dev))
20b09c29
AY		 1714 return -1;
1715
1716 tstat = &task->task_status;
9dc9fd94
S		 1717 dev = task->dev;
1718 mvi_dev = dev->lldd_dev;
b5762948 1719
20b09c29
AY		 1720 spin_lock(&task->task_state_lock);
1721 task->task_state_flags &=
1722 ~(SAS_TASK_STATE_PENDING | SAS_TASK_AT_INITIATOR);
1723 task->task_state_flags |= SAS_TASK_STATE_DONE;
1724 /* race condition*/
1725 aborted = task->task_state_flags & SAS_TASK_STATE_ABORTED;
1726 spin_unlock(&task->task_state_lock);
1727
1728 memset(tstat, 0, sizeof(*tstat));
1729 tstat->resp = SAS_TASK_COMPLETE;
1730
1731 if (unlikely(aborted)) {
1732 tstat->stat = SAS_ABORTED_TASK;
9dc9fd94
S		 1733 if (mvi_dev && mvi_dev->running_req)
1734 mvi_dev->running_req--;
20b09c29
AY		 1735 if (sas_protocol_ata(task->task_proto))
1736 mvs_free_reg_set(mvi, mvi_dev);
1737
1738 mvs_slot_task_free(mvi, task, slot, slot_idx);
1739 return -1;
b5762948
JG		 1740 }
1741
e144f7ef 1742 /* when no device attaching, go ahead and complete by error handling*/
9dc9fd94
S		 1743 if (unlikely(!mvi_dev || flags)) {
1744 if (!mvi_dev)
1745 mv_dprintk("port has not device.\n");
20b09c29
AY		 1746 tstat->stat = SAS_PHY_DOWN;
1747 goto out;
1748 }
b5762948 1749
53a983c4
JB		 1750 /*
1751 * error info record present; slot->response is 32 bit aligned but may
1752 * not be 64 bit aligned, so check for zero in two 32 bit reads
1753 */
1754 if (unlikely((rx_desc & RXQ_ERR)
1755 && (*((u32 *)slot->response)
1756 || *(((u32 *)slot->response) + 1)))) {
84fbd0ce
XY		 1757 mv_dprintk("port %d slot %d rx_desc %X has error info"
1758 "%016llX.\n", slot->port->sas_port.id, slot_idx,
53a983c4 1759 rx_desc, get_unaligned_le64(slot->response));
20b09c29 1760 tstat->stat = mvs_slot_err(mvi, task, slot_idx);
9dc9fd94 1761 tstat->resp = SAS_TASK_COMPLETE;
20b09c29 1762 goto out;
b5762948
JG		 1763 }
1764
20b09c29
AY		 1765 switch (task->task_proto) {
1766 case SAS_PROTOCOL_SSP:
1767 /* hw says status == 0, datapres == 0 */
1768 if (rx_desc & RXQ_GOOD) {
df64d3ca 1769 tstat->stat = SAM_STAT_GOOD;
20b09c29
AY		 1770 tstat->resp = SAS_TASK_COMPLETE;
1771 }
1772 /* response frame present */
1773 else if (rx_desc & RXQ_RSP) {
1774 struct ssp_response_iu *iu = slot->response +
1775 sizeof(struct mvs_err_info);
1776 sas_ssp_task_response(mvi->dev, task, iu);
1777 } else
df64d3ca 1778 tstat->stat = SAM_STAT_CHECK_CONDITION;
20b09c29 1779 break;
b5762948 1780
20b09c29
AY		 1781 case SAS_PROTOCOL_SMP: {
1782 struct scatterlist *sg_resp = &task->smp_task.smp_resp;
df64d3ca 1783 tstat->stat = SAM_STAT_GOOD;
77dfce07 1784 to = kmap_atomic(sg_page(sg_resp));
20b09c29
AY		 1785 memcpy(to + sg_resp->offset,
1786 slot->response + sizeof(struct mvs_err_info),
1787 sg_dma_len(sg_resp));
77dfce07 1788 kunmap_atomic(to);
20b09c29
AY		 1789 break;
1790 }
8f261aaf 1791
20b09c29
AY		 1792 case SAS_PROTOCOL_SATA:
1793 case SAS_PROTOCOL_STP:
1794 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: {
1795 tstat->stat = mvs_sata_done(mvi, task, slot_idx, 0);
1796 break;
1797 }
b5762948 1798
20b09c29 1799 default:
df64d3ca 1800 tstat->stat = SAM_STAT_CHECK_CONDITION;
20b09c29
AY		 1801 break;
1802 }
9dc9fd94
S		 1803 if (!slot->port->port_attached) {
1804 mv_dprintk("port %d has removed.\n", slot->port->sas_port.id);
1805 tstat->stat = SAS_PHY_DOWN;
1806 }
1807
b5762948 1808
20b09c29 1809out:
9dc9fd94
S		 1810 if (mvi_dev && mvi_dev->running_req) {
1811 mvi_dev->running_req--;
1812 if (sas_protocol_ata(task->task_proto) && !mvi_dev->running_req)
0f980a87
AY		 1813 mvs_free_reg_set(mvi, mvi_dev);
1814 }
20b09c29
AY		 1815 mvs_slot_task_free(mvi, task, slot, slot_idx);
1816 sts = tstat->stat;
8f261aaf 1817
20b09c29
AY		 1818 spin_unlock(&mvi->lock);
1819 if (task->task_done)
1820 task->task_done(task);
84fbd0ce 1821
20b09c29 1822 spin_lock(&mvi->lock);
b5762948 1823
20b09c29
AY		 1824 return sts;
1825}
b5762948 1826
9dc9fd94 1827void mvs_do_release_task(struct mvs_info *mvi,
20b09c29
AY		 1828 int phy_no, struct domain_device *dev)
1829{
9dc9fd94 1830 u32 slot_idx;
20b09c29
AY		 1831 struct mvs_phy *phy;
1832 struct mvs_port *port;
1833 struct mvs_slot_info *slot, *slot2;
b5762948 1834
20b09c29
AY		 1835 phy = &mvi->phy[phy_no];
1836 port = phy->port;
1837 if (!port)
1838 return;
9dc9fd94
S		 1839 /* clean cmpl queue in case request is already finished */
1840 mvs_int_rx(mvi, false);
1841
1842
b5762948 1843
20b09c29
AY		 1844 list_for_each_entry_safe(slot, slot2, &port->list, entry) {
1845 struct sas_task *task;
1846 slot_idx = (u32) (slot - mvi->slot_info);
1847 task = slot->task;
b5762948 1848
20b09c29
AY		 1849 if (dev && task->dev != dev)
1850 continue;
8f261aaf 1851
20b09c29
AY		 1852 mv_printk("Release slot [%x] tag[%x], task [%p]:\n",
1853 slot_idx, slot->slot_tag, task);
9dc9fd94 1854 MVS_CHIP_DISP->command_active(mvi, slot_idx);
b5762948 1855
20b09c29 1856 mvs_slot_complete(mvi, slot_idx, 1);
b5762948 1857 }
20b09c29 1858}
b5762948 1859
9dc9fd94
S		 1860void mvs_release_task(struct mvs_info *mvi,
1861 struct domain_device *dev)
1862{
1863 int i, phyno[WIDE_PORT_MAX_PHY], num;
9dc9fd94
S		 1864 num = mvs_find_dev_phyno(dev, phyno);
1865 for (i = 0; i < num; i++)
1866 mvs_do_release_task(mvi, phyno[i], dev);
1867}
1868
20b09c29
AY		 1869static void mvs_phy_disconnected(struct mvs_phy *phy)
1870{
1871 phy->phy_attached = 0;
1872 phy->att_dev_info = 0;
1873 phy->att_dev_sas_addr = 0;
1874}
1875
1876static void mvs_work_queue(struct work_struct *work)
1877{
1878 struct delayed_work *dw = container_of(work, struct delayed_work, work);
1879 struct mvs_wq *mwq = container_of(dw, struct mvs_wq, work_q);
1880 struct mvs_info *mvi = mwq->mvi;
1881 unsigned long flags;
a4632aae
XY		 1882 u32 phy_no = (unsigned long) mwq->data;
1883 struct sas_ha_struct *sas_ha = mvi->sas;
1884 struct mvs_phy *phy = &mvi->phy[phy_no];
1885 struct asd_sas_phy *sas_phy = &phy->sas_phy;
b5762948 1886
20b09c29
AY		 1887 spin_lock_irqsave(&mvi->lock, flags);
1888 if (mwq->handler & PHY_PLUG_EVENT) {
20b09c29
AY		 1889
1890 if (phy->phy_event & PHY_PLUG_OUT) {
1891 u32 tmp;
33279c30 1892
20b09c29
AY		 1893 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no);
1894 phy->phy_event &= ~PHY_PLUG_OUT;
1895 if (!(tmp & PHY_READY_MASK)) {
1896 sas_phy_disconnected(sas_phy);
1897 mvs_phy_disconnected(phy);
1898 sas_ha->notify_phy_event(sas_phy,
1899 PHYE_LOSS_OF_SIGNAL);
1900 mv_dprintk("phy%d Removed Device\n", phy_no);
1901 } else {
1902 MVS_CHIP_DISP->detect_porttype(mvi, phy_no);
1903 mvs_update_phyinfo(mvi, phy_no, 1);
1904 mvs_bytes_dmaed(mvi, phy_no);
1905 mvs_port_notify_formed(sas_phy, 0);
1906 mv_dprintk("phy%d Attached Device\n", phy_no);
1907 }
1908 }
a4632aae
XY		 1909 } else if (mwq->handler & EXP_BRCT_CHG) {
1910 phy->phy_event &= ~EXP_BRCT_CHG;
1911 sas_ha->notify_port_event(sas_phy,
1912 PORTE_BROADCAST_RCVD);
1913 mv_dprintk("phy%d Got Broadcast Change\n", phy_no);
20b09c29
AY		 1914 }
1915 list_del(&mwq->entry);
1916 spin_unlock_irqrestore(&mvi->lock, flags);
1917 kfree(mwq);
1918}
8f261aaf 1919
20b09c29
AY		 1920static int mvs_handle_event(struct mvs_info *mvi, void *data, int handler)
1921{
1922 struct mvs_wq *mwq;
1923 int ret = 0;
1924
1925 mwq = kmalloc(sizeof(struct mvs_wq), GFP_ATOMIC);
1926 if (mwq) {
1927 mwq->mvi = mvi;
1928 mwq->data = data;
1929 mwq->handler = handler;
1930 MV_INIT_DELAYED_WORK(&mwq->work_q, mvs_work_queue, mwq);
1931 list_add_tail(&mwq->entry, &mvi->wq_list);
1932 schedule_delayed_work(&mwq->work_q, HZ * 2);
1933 } else
1934 ret = -ENOMEM;
1935
1936 return ret;
1937}
b5762948 1938
77570eed 1939static void mvs_sig_time_out(struct timer_list *t)
20b09c29 1940{
77570eed 1941 struct mvs_phy *phy = from_timer(phy, t, timer);
20b09c29
AY		 1942 struct mvs_info *mvi = phy->mvi;
1943 u8 phy_no;
1944
1945 for (phy_no = 0; phy_no < mvi->chip->n_phy; phy_no++) {
1946 if (&mvi->phy[phy_no] == phy) {
1947 mv_dprintk("Get signature time out, reset phy %d\n",
1948 phy_no+mvi->id*mvi->chip->n_phy);
a4632aae 1949 MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_HARD_RESET);
20b09c29 1950 }
b5762948 1951 }
20b09c29 1952}
b5762948 1953
20b09c29
AY		 1954void mvs_int_port(struct mvs_info *mvi, int phy_no, u32 events)
1955{
1956 u32 tmp;
20b09c29 1957 struct mvs_phy *phy = &mvi->phy[phy_no];
8f261aaf 1958
20b09c29 1959 phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, phy_no);
84fbd0ce
XY		 1960 MVS_CHIP_DISP->write_port_irq_stat(mvi, phy_no, phy->irq_status);
1961 mv_dprintk("phy %d ctrl sts=0x%08X.\n", phy_no+mvi->id*mvi->chip->n_phy,
20b09c29 1962 MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no));
84fbd0ce 1963 mv_dprintk("phy %d irq sts = 0x%08X\n", phy_no+mvi->id*mvi->chip->n_phy,
20b09c29 1964 phy->irq_status);
8f261aaf 1965
20b09c29
AY		 1966 /*
1967 * events is port event now ,
1968 * we need check the interrupt status which belongs to per port.
1969 */
b5762948 1970
9dc9fd94 1971 if (phy->irq_status & PHYEV_DCDR_ERR) {
84fbd0ce 1972 mv_dprintk("phy %d STP decoding error.\n",
9dc9fd94
S		 1973 phy_no + mvi->id*mvi->chip->n_phy);
1974 }
20b09c29
AY		 1975
1976 if (phy->irq_status & PHYEV_POOF) {
84fbd0ce 1977 mdelay(500);
20b09c29
AY		 1978 if (!(phy->phy_event & PHY_PLUG_OUT)) {
1979 int dev_sata = phy->phy_type & PORT_TYPE_SATA;
1980 int ready;
9dc9fd94 1981 mvs_do_release_task(mvi, phy_no, NULL);
20b09c29 1982 phy->phy_event |= PHY_PLUG_OUT;
9dc9fd94 1983 MVS_CHIP_DISP->clear_srs_irq(mvi, 0, 1);
20b09c29
AY		 1984 mvs_handle_event(mvi,
1985 (void *)(unsigned long)phy_no,
1986 PHY_PLUG_EVENT);
1987 ready = mvs_is_phy_ready(mvi, phy_no);
20b09c29
AY		 1988 if (ready || dev_sata) {
1989 if (MVS_CHIP_DISP->stp_reset)
1990 MVS_CHIP_DISP->stp_reset(mvi,
1991 phy_no);
1992 else
1993 MVS_CHIP_DISP->phy_reset(mvi,
a4632aae 1994 phy_no, MVS_SOFT_RESET);
20b09c29
AY		 1995 return;
1996 }
1997 }
1998 }
b5762948 1999
20b09c29
AY		 2000 if (phy->irq_status & PHYEV_COMWAKE) {
2001 tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, phy_no);
2002 MVS_CHIP_DISP->write_port_irq_mask(mvi, phy_no,
2003 tmp | PHYEV_SIG_FIS);
2004 if (phy->timer.function == NULL) {
841b86f3 2005 phy->timer.function = mvs_sig_time_out;
84fbd0ce 2006 phy->timer.expires = jiffies + 5*HZ;
20b09c29
AY		 2007 add_timer(&phy->timer);
2008 }
2009 }
2010 if (phy->irq_status & (PHYEV_SIG_FIS | PHYEV_ID_DONE)) {
2011 phy->phy_status = mvs_is_phy_ready(mvi, phy_no);
20b09c29
AY		 2012 mv_dprintk("notify plug in on phy[%d]\n", phy_no);
2013 if (phy->phy_status) {
2014 mdelay(10);
2015 MVS_CHIP_DISP->detect_porttype(mvi, phy_no);
2016 if (phy->phy_type & PORT_TYPE_SATA) {
2017 tmp = MVS_CHIP_DISP->read_port_irq_mask(
2018 mvi, phy_no);
2019 tmp &= ~PHYEV_SIG_FIS;
2020 MVS_CHIP_DISP->write_port_irq_mask(mvi,
2021 phy_no, tmp);
2022 }
2023 mvs_update_phyinfo(mvi, phy_no, 0);
9dc9fd94 2024 if (phy->phy_type & PORT_TYPE_SAS) {
a4632aae 2025 MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_PHY_TUNE);
9dc9fd94
S		 2026 mdelay(10);
2027 }
2028
20b09c29
AY		 2029 mvs_bytes_dmaed(mvi, phy_no);
2030 /* whether driver is going to handle hot plug */
2031 if (phy->phy_event & PHY_PLUG_OUT) {
a4632aae 2032 mvs_port_notify_formed(&phy->sas_phy, 0);
20b09c29
AY		 2033 phy->phy_event &= ~PHY_PLUG_OUT;
2034 }
2035 } else {
2036 mv_dprintk("plugin interrupt but phy%d is gone\n",
2037 phy_no + mvi->id*mvi->chip->n_phy);
2038 }
2039 } else if (phy->irq_status & PHYEV_BROAD_CH) {
84fbd0ce 2040 mv_dprintk("phy %d broadcast change.\n",
20b09c29 2041 phy_no + mvi->id*mvi->chip->n_phy);
a4632aae
XY		 2042 mvs_handle_event(mvi, (void *)(unsigned long)phy_no,
2043 EXP_BRCT_CHG);
20b09c29 2044 }
b5762948
JG		 2045}
2046
20b09c29 2047int mvs_int_rx(struct mvs_info *mvi, bool self_clear)
b5762948 2048{
20b09c29
AY		 2049 u32 rx_prod_idx, rx_desc;
2050 bool attn = false;
b5762948 2051
20b09c29
AY		 2052 /* the first dword in the RX ring is special: it contains
2053 * a mirror of the hardware's RX producer index, so that
2054 * we don't have to stall the CPU reading that register.
2055 * The actual RX ring is offset by one dword, due to this.
2056 */
2057 rx_prod_idx = mvi->rx_cons;
2058 mvi->rx_cons = le32_to_cpu(mvi->rx[0]);
2059 if (mvi->rx_cons == 0xfff) /* h/w hasn't touched RX ring yet */
2060 return 0;
b5762948 2061
20b09c29
AY		 2062 /* The CMPL_Q may come late, read from register and try again
2063 * note: if coalescing is enabled,
2064 * it will need to read from register every time for sure
2065 */
2066 if (unlikely(mvi->rx_cons == rx_prod_idx))
2067 mvi->rx_cons = MVS_CHIP_DISP->rx_update(mvi) & RX_RING_SZ_MASK;
2068
2069 if (mvi->rx_cons == rx_prod_idx)
2070 return 0;
2071
2072 while (mvi->rx_cons != rx_prod_idx) {
2073 /* increment our internal RX consumer pointer */
2074 rx_prod_idx = (rx_prod_idx + 1) & (MVS_RX_RING_SZ - 1);
2075 rx_desc = le32_to_cpu(mvi->rx[rx_prod_idx + 1]);
2076
2077 if (likely(rx_desc & RXQ_DONE))
2078 mvs_slot_complete(mvi, rx_desc, 0);
2079 if (rx_desc & RXQ_ATTN) {
2080 attn = true;
2081 } else if (rx_desc & RXQ_ERR) {
2082 if (!(rx_desc & RXQ_DONE))
2083 mvs_slot_complete(mvi, rx_desc, 0);
2084 } else if (rx_desc & RXQ_SLOT_RESET) {
2085 mvs_slot_free(mvi, rx_desc);
2086 }
2087 }
2088
2089 if (attn && self_clear)
2090 MVS_CHIP_DISP->int_full(mvi);
2091 return 0;
b5762948
JG		 2092}
2093
c56f5f1d
WW		 2094int mvs_gpio_write(struct sas_ha_struct *sha, u8 reg_type, u8 reg_index,
2095 u8 reg_count, u8 *write_data)
2096{
2097 struct mvs_prv_info *mvs_prv = sha->lldd_ha;
2098 struct mvs_info *mvi = mvs_prv->mvi[0];
2099
2100 if (MVS_CHIP_DISP->gpio_write) {
2101 return MVS_CHIP_DISP->gpio_write(mvs_prv, reg_type,
2102 reg_index, reg_count, write_data);
2103 }
2104
2105 return -ENOSYS;
2106}
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