[linux.git] / drivers / rtc / rtc-fm3130.c

/*
 * rtc-fm3130.c - RTC driver for Ramtron FM3130 I2C chip.
 *
 *  Copyright (C) 2008 Sergey Lapin
 *  Based on ds1307 driver by James Chapman and David Brownell
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/rtc.h>
#include <linux/bcd.h>
#include <linux/slab.h>

#define FM3130_RTC_CONTROL	(0x0)
#define FM3130_CAL_CONTROL	(0x1)
#define FM3130_RTC_SECONDS	(0x2)
#define FM3130_RTC_MINUTES	(0x3)
#define FM3130_RTC_HOURS	(0x4)
#define FM3130_RTC_DAY		(0x5)
#define FM3130_RTC_DATE		(0x6)
#define FM3130_RTC_MONTHS	(0x7)
#define FM3130_RTC_YEARS	(0x8)

#define FM3130_ALARM_SECONDS	(0x9)
#define FM3130_ALARM_MINUTES	(0xa)
#define FM3130_ALARM_HOURS	(0xb)
#define FM3130_ALARM_DATE	(0xc)
#define FM3130_ALARM_MONTHS	(0xd)
#define FM3130_ALARM_WP_CONTROL	(0xe)

#define FM3130_CAL_CONTROL_BIT_nOSCEN (1 << 7) /* Osciallator enabled */
#define FM3130_RTC_CONTROL_BIT_LB (1 << 7) /* Low battery */
#define FM3130_RTC_CONTROL_BIT_AF (1 << 6) /* Alarm flag */
#define FM3130_RTC_CONTROL_BIT_CF (1 << 5) /* Century overflow */
#define FM3130_RTC_CONTROL_BIT_POR (1 << 4) /* Power on reset */
#define FM3130_RTC_CONTROL_BIT_AEN (1 << 3) /* Alarm enable */
#define FM3130_RTC_CONTROL_BIT_CAL (1 << 2) /* Calibration mode */
#define FM3130_RTC_CONTROL_BIT_WRITE (1 << 1) /* W=1 -> write mode W=0 normal */
#define FM3130_RTC_CONTROL_BIT_READ (1 << 0) /* R=1 -> read mode R=0 normal */

#define FM3130_CLOCK_REGS 7
#define FM3130_ALARM_REGS 5

struct fm3130 {
	u8			reg_addr_time;
	u8			reg_addr_alarm;
	u8			regs[15];
	struct i2c_msg		msg[4];
	struct i2c_client	*client;
	struct rtc_device	*rtc;
	int			alarm_valid;
	int			data_valid;
};
static const struct i2c_device_id fm3130_id[] = {
	{ "fm3130", 0 },
	{ }
};
MODULE_DEVICE_TABLE(i2c, fm3130_id);

#define FM3130_MODE_NORMAL		0
#define FM3130_MODE_WRITE		1
#define FM3130_MODE_READ		2

static void fm3130_rtc_mode(struct device *dev, int mode)
{
	struct fm3130 *fm3130 = dev_get_drvdata(dev);

	fm3130->regs[FM3130_RTC_CONTROL] =
		i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);
	switch (mode) {
	case FM3130_MODE_NORMAL:
		fm3130->regs[FM3130_RTC_CONTROL] &=
			~(FM3130_RTC_CONTROL_BIT_WRITE |
			FM3130_RTC_CONTROL_BIT_READ);
		break;
	case FM3130_MODE_WRITE:
		fm3130->regs[FM3130_RTC_CONTROL] |= FM3130_RTC_CONTROL_BIT_WRITE;
		break;
	case FM3130_MODE_READ:
		fm3130->regs[FM3130_RTC_CONTROL] |= FM3130_RTC_CONTROL_BIT_READ;
		break;
	default:
		dev_dbg(dev, "invalid mode %d\n", mode);
		break;
	}

	i2c_smbus_write_byte_data(fm3130->client,
		 FM3130_RTC_CONTROL, fm3130->regs[FM3130_RTC_CONTROL]);
}

static int fm3130_get_time(struct device *dev, struct rtc_time *t)
{
	struct fm3130 *fm3130 = dev_get_drvdata(dev);
	int		tmp;

	if (!fm3130->data_valid) {
		/* We have invalid data in RTC, probably due
		to battery faults or other problems. Return EIO
		for now, it will allow us to set data later instead
		of error during probing which disables device */
		return -EIO;
	}
	fm3130_rtc_mode(dev, FM3130_MODE_READ);

	/* read the RTC date and time registers all at once */
	tmp = i2c_transfer(to_i2c_adapter(fm3130->client->dev.parent),
			fm3130->msg, 2);
	if (tmp != 2) {
		dev_err(dev, "%s error %d\n", "read", tmp);
		return -EIO;
	}

	fm3130_rtc_mode(dev, FM3130_MODE_NORMAL);

	dev_dbg(dev, "%s: %15ph\n", "read", fm3130->regs);

	t->tm_sec = bcd2bin(fm3130->regs[FM3130_RTC_SECONDS] & 0x7f);
	t->tm_min = bcd2bin(fm3130->regs[FM3130_RTC_MINUTES] & 0x7f);
	tmp = fm3130->regs[FM3130_RTC_HOURS] & 0x3f;
	t->tm_hour = bcd2bin(tmp);
	t->tm_wday = bcd2bin(fm3130->regs[FM3130_RTC_DAY] & 0x07) - 1;
	t->tm_mday = bcd2bin(fm3130->regs[FM3130_RTC_DATE] & 0x3f);
	tmp = fm3130->regs[FM3130_RTC_MONTHS] & 0x1f;
	t->tm_mon = bcd2bin(tmp) - 1;

	/* assume 20YY not 19YY, and ignore CF bit */
	t->tm_year = bcd2bin(fm3130->regs[FM3130_RTC_YEARS]) + 100;

	dev_dbg(dev, "%s secs=%d, mins=%d, "
		"hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
		"read", t->tm_sec, t->tm_min,
		t->tm_hour, t->tm_mday,
		t->tm_mon, t->tm_year, t->tm_wday);

	/* initial clock setting can be undefined */
	return rtc_valid_tm(t);
}


static int fm3130_set_time(struct device *dev, struct rtc_time *t)
{
	struct fm3130 *fm3130 = dev_get_drvdata(dev);
	int		tmp, i;
	u8		*buf = fm3130->regs;

	dev_dbg(dev, "%s secs=%d, mins=%d, "
		"hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
		"write", t->tm_sec, t->tm_min,
		t->tm_hour, t->tm_mday,
		t->tm_mon, t->tm_year, t->tm_wday);

	/* first register addr */
	buf[FM3130_RTC_SECONDS] = bin2bcd(t->tm_sec);
	buf[FM3130_RTC_MINUTES] = bin2bcd(t->tm_min);
	buf[FM3130_RTC_HOURS] = bin2bcd(t->tm_hour);
	buf[FM3130_RTC_DAY] = bin2bcd(t->tm_wday + 1);
	buf[FM3130_RTC_DATE] = bin2bcd(t->tm_mday);
	buf[FM3130_RTC_MONTHS] = bin2bcd(t->tm_mon + 1);

	/* assume 20YY not 19YY */
	tmp = t->tm_year - 100;
	buf[FM3130_RTC_YEARS] = bin2bcd(tmp);

	dev_dbg(dev, "%s: %15ph\n", "write", buf);

	fm3130_rtc_mode(dev, FM3130_MODE_WRITE);

	/* Writing time registers, we don't support multibyte transfers */
	for (i = 0; i < FM3130_CLOCK_REGS; i++) {
		i2c_smbus_write_byte_data(fm3130->client,
					FM3130_RTC_SECONDS + i,
					fm3130->regs[FM3130_RTC_SECONDS + i]);
	}

	fm3130_rtc_mode(dev, FM3130_MODE_NORMAL);

	/* We assume here that data are valid once written */
	if (!fm3130->data_valid)
		fm3130->data_valid = 1;
	return 0;
}

static int fm3130_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	struct fm3130 *fm3130 = dev_get_drvdata(dev);
	int tmp;
	struct rtc_time *tm = &alrm->time;

	if (!fm3130->alarm_valid) {
		/*
		 * We have invalid alarm in RTC, probably due to battery faults
		 * or other problems. Return EIO for now, it will allow us to
		 * set alarm value later instead of error during probing which
		 * disables device
		 */
		return -EIO;
	}

	/* read the RTC alarm registers all at once */
	tmp = i2c_transfer(to_i2c_adapter(fm3130->client->dev.parent),
			&fm3130->msg[2], 2);
	if (tmp != 2) {
		dev_err(dev, "%s error %d\n", "read", tmp);
		return -EIO;
	}
	dev_dbg(dev, "alarm read %02x %02x %02x %02x %02x\n",
			fm3130->regs[FM3130_ALARM_SECONDS],
			fm3130->regs[FM3130_ALARM_MINUTES],
			fm3130->regs[FM3130_ALARM_HOURS],
			fm3130->regs[FM3130_ALARM_DATE],
			fm3130->regs[FM3130_ALARM_MONTHS]);

	tm->tm_sec	= bcd2bin(fm3130->regs[FM3130_ALARM_SECONDS] & 0x7F);
	tm->tm_min	= bcd2bin(fm3130->regs[FM3130_ALARM_MINUTES] & 0x7F);
	tm->tm_hour	= bcd2bin(fm3130->regs[FM3130_ALARM_HOURS] & 0x3F);
	tm->tm_mday	= bcd2bin(fm3130->regs[FM3130_ALARM_DATE] & 0x3F);
	tm->tm_mon	= bcd2bin(fm3130->regs[FM3130_ALARM_MONTHS] & 0x1F);

	if (tm->tm_mon > 0)
		tm->tm_mon -= 1; /* RTC is 1-12, tm_mon is 0-11 */

	dev_dbg(dev, "%s secs=%d, mins=%d, "
		"hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
		"read alarm", tm->tm_sec, tm->tm_min,
		tm->tm_hour, tm->tm_mday,
		tm->tm_mon, tm->tm_year, tm->tm_wday);

	/* check if alarm enabled */
	fm3130->regs[FM3130_RTC_CONTROL] =
		i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);

	if ((fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_AEN) &&
		(~fm3130->regs[FM3130_RTC_CONTROL] &
			FM3130_RTC_CONTROL_BIT_CAL)) {
		alrm->enabled = 1;
	}

	return 0;
}

static int fm3130_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	struct fm3130 *fm3130 = dev_get_drvdata(dev);
	struct rtc_time *tm = &alrm->time;
	int i;

	dev_dbg(dev, "%s secs=%d, mins=%d, "
		"hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
		"write alarm", tm->tm_sec, tm->tm_min,
		tm->tm_hour, tm->tm_mday,
		tm->tm_mon, tm->tm_year, tm->tm_wday);

	fm3130->regs[FM3130_ALARM_SECONDS] =
		(tm->tm_sec != -1) ? bin2bcd(tm->tm_sec) : 0x80;

	fm3130->regs[FM3130_ALARM_MINUTES] =
		(tm->tm_min != -1) ? bin2bcd(tm->tm_min) : 0x80;

	fm3130->regs[FM3130_ALARM_HOURS] =
		(tm->tm_hour != -1) ? bin2bcd(tm->tm_hour) : 0x80;

	fm3130->regs[FM3130_ALARM_DATE] =
		(tm->tm_mday != -1) ? bin2bcd(tm->tm_mday) : 0x80;

	fm3130->regs[FM3130_ALARM_MONTHS] =
		(tm->tm_mon != -1) ? bin2bcd(tm->tm_mon + 1) : 0x80;

	dev_dbg(dev, "alarm write %02x %02x %02x %02x %02x\n",
			fm3130->regs[FM3130_ALARM_SECONDS],
			fm3130->regs[FM3130_ALARM_MINUTES],
			fm3130->regs[FM3130_ALARM_HOURS],
			fm3130->regs[FM3130_ALARM_DATE],
			fm3130->regs[FM3130_ALARM_MONTHS]);
	/* Writing time registers, we don't support multibyte transfers */
	for (i = 0; i < FM3130_ALARM_REGS; i++) {
		i2c_smbus_write_byte_data(fm3130->client,
					FM3130_ALARM_SECONDS + i,
					fm3130->regs[FM3130_ALARM_SECONDS + i]);
	}
	fm3130->regs[FM3130_RTC_CONTROL] =
		i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);

	/* enable or disable alarm */
	if (alrm->enabled) {
		i2c_smbus_write_byte_data(fm3130->client, FM3130_RTC_CONTROL,
			(fm3130->regs[FM3130_RTC_CONTROL] &
				~(FM3130_RTC_CONTROL_BIT_CAL)) |
					FM3130_RTC_CONTROL_BIT_AEN);
	} else {
		i2c_smbus_write_byte_data(fm3130->client, FM3130_RTC_CONTROL,
			fm3130->regs[FM3130_RTC_CONTROL] &
				~(FM3130_RTC_CONTROL_BIT_CAL) &
					~(FM3130_RTC_CONTROL_BIT_AEN));
	}

	/* We assume here that data is valid once written */
	if (!fm3130->alarm_valid)
		fm3130->alarm_valid = 1;

	return 0;
}

static int fm3130_alarm_irq_enable(struct device *dev, unsigned int enabled)
{
	struct fm3130 *fm3130 = dev_get_drvdata(dev);
	int ret = 0;

	fm3130->regs[FM3130_RTC_CONTROL] =
		i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);

	dev_dbg(dev, "alarm_irq_enable: enable=%d, FM3130_RTC_CONTROL=%02x\n",
		enabled, fm3130->regs[FM3130_RTC_CONTROL]);

	switch (enabled) {
	case 0:		/* alarm off */
		ret = i2c_smbus_write_byte_data(fm3130->client,
			FM3130_RTC_CONTROL, fm3130->regs[FM3130_RTC_CONTROL] &
				~(FM3130_RTC_CONTROL_BIT_CAL) &
					~(FM3130_RTC_CONTROL_BIT_AEN));
		break;
	case 1:		/* alarm on */
		ret = i2c_smbus_write_byte_data(fm3130->client,
			FM3130_RTC_CONTROL, (fm3130->regs[FM3130_RTC_CONTROL] &
				~(FM3130_RTC_CONTROL_BIT_CAL)) |
					FM3130_RTC_CONTROL_BIT_AEN);
		break;
	default:
		ret = -EINVAL;
		break;
	}

	return ret;
}

static const struct rtc_class_ops fm3130_rtc_ops = {
	.read_time	= fm3130_get_time,
	.set_time	= fm3130_set_time,
	.read_alarm	= fm3130_read_alarm,
	.set_alarm	= fm3130_set_alarm,
	.alarm_irq_enable = fm3130_alarm_irq_enable,
};

static struct i2c_driver fm3130_driver;

static int fm3130_probe(struct i2c_client *client,
			const struct i2c_device_id *id)
{
	struct fm3130		*fm3130;
	int			err = -ENODEV;
	int			tmp;
	struct i2c_adapter	*adapter = to_i2c_adapter(client->dev.parent);

	if (!i2c_check_functionality(adapter,
			I2C_FUNC_I2C | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
		return -EIO;

	fm3130 = devm_kzalloc(&client->dev, sizeof(struct fm3130), GFP_KERNEL);

	if (!fm3130)
		return -ENOMEM;

	fm3130->client = client;
	i2c_set_clientdata(client, fm3130);
	fm3130->reg_addr_time = FM3130_RTC_SECONDS;
	fm3130->reg_addr_alarm = FM3130_ALARM_SECONDS;

	/* Messages to read time */
	fm3130->msg[0].addr = client->addr;
	fm3130->msg[0].flags = 0;
	fm3130->msg[0].len = 1;
	fm3130->msg[0].buf = &fm3130->reg_addr_time;

	fm3130->msg[1].addr = client->addr;
	fm3130->msg[1].flags = I2C_M_RD;
	fm3130->msg[1].len = FM3130_CLOCK_REGS;
	fm3130->msg[1].buf = &fm3130->regs[FM3130_RTC_SECONDS];

	/* Messages to read alarm */
	fm3130->msg[2].addr = client->addr;
	fm3130->msg[2].flags = 0;
	fm3130->msg[2].len = 1;
	fm3130->msg[2].buf = &fm3130->reg_addr_alarm;

	fm3130->msg[3].addr = client->addr;
	fm3130->msg[3].flags = I2C_M_RD;
	fm3130->msg[3].len = FM3130_ALARM_REGS;
	fm3130->msg[3].buf = &fm3130->regs[FM3130_ALARM_SECONDS];

	fm3130->alarm_valid = 0;
	fm3130->data_valid = 0;

	tmp = i2c_transfer(adapter, fm3130->msg, 4);
	if (tmp != 4) {
		dev_dbg(&client->dev, "read error %d\n", tmp);
		err = -EIO;
		goto exit_free;
	}

	fm3130->regs[FM3130_RTC_CONTROL] =
		i2c_smbus_read_byte_data(client, FM3130_RTC_CONTROL);
	fm3130->regs[FM3130_CAL_CONTROL] =
		i2c_smbus_read_byte_data(client, FM3130_CAL_CONTROL);

	/* Disabling calibration mode */
	if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_CAL) {
		i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
			fm3130->regs[FM3130_RTC_CONTROL] &
				~(FM3130_RTC_CONTROL_BIT_CAL));
		dev_warn(&client->dev, "Disabling calibration mode!\n");
	}

	/* Disabling read and write modes */
	if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_WRITE ||
	    fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_READ) {
		i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
			fm3130->regs[FM3130_RTC_CONTROL] &
				~(FM3130_RTC_CONTROL_BIT_READ |
					FM3130_RTC_CONTROL_BIT_WRITE));
		dev_warn(&client->dev, "Disabling READ or WRITE mode!\n");
	}

	/* oscillator off?  turn it on, so clock can tick. */
	if (fm3130->regs[FM3130_CAL_CONTROL] & FM3130_CAL_CONTROL_BIT_nOSCEN)
		i2c_smbus_write_byte_data(client, FM3130_CAL_CONTROL,
			fm3130->regs[FM3130_CAL_CONTROL] &
				~(FM3130_CAL_CONTROL_BIT_nOSCEN));

	/* low battery?  clear flag, and warn */
	if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_LB) {
		i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
			fm3130->regs[FM3130_RTC_CONTROL] &
				~(FM3130_RTC_CONTROL_BIT_LB));
		dev_warn(&client->dev, "Low battery!\n");
	}

	/* check if Power On Reset bit is set */
	if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_POR) {
		i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
			fm3130->regs[FM3130_RTC_CONTROL] &
				~FM3130_RTC_CONTROL_BIT_POR);
		dev_dbg(&client->dev, "POR bit is set\n");
	}
	/* ACS is controlled by alarm */
	i2c_smbus_write_byte_data(client, FM3130_ALARM_WP_CONTROL, 0x80);

	/* alarm registers sanity check */
	tmp = bcd2bin(fm3130->regs[FM3130_RTC_SECONDS] & 0x7f);
	if (tmp > 59)
		goto bad_alarm;

	tmp = bcd2bin(fm3130->regs[FM3130_RTC_MINUTES] & 0x7f);
	if (tmp > 59)
		goto bad_alarm;

	tmp = bcd2bin(fm3130->regs[FM3130_RTC_HOURS] & 0x3f);
	if (tmp > 23)
		goto bad_alarm;

	tmp = bcd2bin(fm3130->regs[FM3130_RTC_DATE] & 0x3f);
	if (tmp == 0 || tmp > 31)
		goto bad_alarm;

	tmp = bcd2bin(fm3130->regs[FM3130_RTC_MONTHS] & 0x1f);
	if (tmp == 0 || tmp > 12)
		goto bad_alarm;

	fm3130->alarm_valid = 1;

bad_alarm:

	/* clock registers sanity chek */
	tmp = bcd2bin(fm3130->regs[FM3130_RTC_SECONDS] & 0x7f);
	if (tmp > 59)
		goto bad_clock;

	tmp = bcd2bin(fm3130->regs[FM3130_RTC_MINUTES] & 0x7f);
	if (tmp > 59)
		goto bad_clock;

	tmp = bcd2bin(fm3130->regs[FM3130_RTC_HOURS] & 0x3f);
	if (tmp > 23)
		goto bad_clock;

	tmp = bcd2bin(fm3130->regs[FM3130_RTC_DAY] & 0x7);
	if (tmp == 0 || tmp > 7)
		goto bad_clock;

	tmp = bcd2bin(fm3130->regs[FM3130_RTC_DATE] & 0x3f);
	if (tmp == 0 || tmp > 31)
		goto bad_clock;

	tmp = bcd2bin(fm3130->regs[FM3130_RTC_MONTHS] & 0x1f);
	if (tmp == 0 || tmp > 12)
		goto bad_clock;

	fm3130->data_valid = 1;

bad_clock:

	if (!fm3130->data_valid || !fm3130->alarm_valid)
		dev_dbg(&client->dev, "%s: %15ph\n", "bogus registers",
			fm3130->regs);

	/* We won't bail out here because we just got invalid data.
	   Time setting from u-boot doesn't work anyway */
	fm3130->rtc = devm_rtc_device_register(&client->dev, client->name,
				&fm3130_rtc_ops, THIS_MODULE);
	if (IS_ERR(fm3130->rtc)) {
		err = PTR_ERR(fm3130->rtc);
		dev_err(&client->dev,
			"unable to register the class device\n");
		goto exit_free;
	}
	return 0;
exit_free:
	return err;
}

static struct i2c_driver fm3130_driver = {
	.driver = {
		.name	= "rtc-fm3130",
	},
	.probe		= fm3130_probe,
	.id_table	= fm3130_id,
};

module_i2c_driver(fm3130_driver);

MODULE_DESCRIPTION("RTC driver for FM3130");
MODULE_AUTHOR("Sergey Lapin <[email protected]>");
MODULE_LICENSE("GPL");
Commit	Line	Data
c6d8f400 SL	1	/*
	2	* rtc-fm3130.c - RTC driver for Ramtron FM3130 I2C chip.
	3	*
	4	* Copyright (C) 2008 Sergey Lapin
	5	* Based on ds1307 driver by James Chapman and David Brownell
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*/
	11
	12	#include <linux/module.h>
	13	#include <linux/i2c.h>
	14	#include <linux/rtc.h>
	15	#include <linux/bcd.h>
5a0e3ad6	16	#include <linux/slab.h>
c6d8f400 SL	17
	18	#define FM3130_RTC_CONTROL (0x0)
	19	#define FM3130_CAL_CONTROL (0x1)
	20	#define FM3130_RTC_SECONDS (0x2)
	21	#define FM3130_RTC_MINUTES (0x3)
	22	#define FM3130_RTC_HOURS (0x4)
	23	#define FM3130_RTC_DAY (0x5)
	24	#define FM3130_RTC_DATE (0x6)
	25	#define FM3130_RTC_MONTHS (0x7)
	26	#define FM3130_RTC_YEARS (0x8)
	27
	28	#define FM3130_ALARM_SECONDS (0x9)
	29	#define FM3130_ALARM_MINUTES (0xa)
	30	#define FM3130_ALARM_HOURS (0xb)
	31	#define FM3130_ALARM_DATE (0xc)
	32	#define FM3130_ALARM_MONTHS (0xd)
	33	#define FM3130_ALARM_WP_CONTROL (0xe)
	34
	35	#define FM3130_CAL_CONTROL_BIT_nOSCEN (1 << 7) /* Osciallator enabled */
	36	#define FM3130_RTC_CONTROL_BIT_LB (1 << 7) /* Low battery */
	37	#define FM3130_RTC_CONTROL_BIT_AF (1 << 6) /* Alarm flag */
	38	#define FM3130_RTC_CONTROL_BIT_CF (1 << 5) /* Century overflow */
	39	#define FM3130_RTC_CONTROL_BIT_POR (1 << 4) /* Power on reset */
	40	#define FM3130_RTC_CONTROL_BIT_AEN (1 << 3) /* Alarm enable */
	41	#define FM3130_RTC_CONTROL_BIT_CAL (1 << 2) /* Calibration mode */
	42	#define FM3130_RTC_CONTROL_BIT_WRITE (1 << 1) /* W=1 -> write mode W=0 normal */
	43	#define FM3130_RTC_CONTROL_BIT_READ (1 << 0) /* R=1 -> read mode R=0 normal */
	44
	45	#define FM3130_CLOCK_REGS 7
	46	#define FM3130_ALARM_REGS 5
	47
	48	struct fm3130 {
	49	u8 reg_addr_time;
c865e922	50	u8 reg_addr_alarm;
c6d8f400 SL	51	u8 regs[15];
	52	struct i2c_msg msg[4];
	53	struct i2c_client *client;
	54	struct rtc_device *rtc;
f3f99cf3	55	int alarm_valid;
c6d8f400	56	int data_valid;
c6d8f400 SL	57	};
c6d8f400 SL	58	static const struct i2c_device_id fm3130_id[] = {
876550aa	59	{ "fm3130", 0 },
c6d8f400 SL	60	{ }
	61	};
	62	MODULE_DEVICE_TABLE(i2c, fm3130_id);
	63
	64	#define FM3130_MODE_NORMAL 0
	65	#define FM3130_MODE_WRITE 1
	66	#define FM3130_MODE_READ 2
	67
	68	static void fm3130_rtc_mode(struct device *dev, int mode)
	69	{
	70	struct fm3130 *fm3130 = dev_get_drvdata(dev);
	71
	72	fm3130->regs[FM3130_RTC_CONTROL] =
	73	i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);
	74	switch (mode) {
	75	case FM3130_MODE_NORMAL:
	76	fm3130->regs[FM3130_RTC_CONTROL] &=
	77	~(FM3130_RTC_CONTROL_BIT_WRITE \|
	78	FM3130_RTC_CONTROL_BIT_READ);
	79	break;
	80	case FM3130_MODE_WRITE:
	81	fm3130->regs[FM3130_RTC_CONTROL] \|= FM3130_RTC_CONTROL_BIT_WRITE;
	82	break;
	83	case FM3130_MODE_READ:
	84	fm3130->regs[FM3130_RTC_CONTROL] \|= FM3130_RTC_CONTROL_BIT_READ;
	85	break;
	86	default:
	87	dev_dbg(dev, "invalid mode %d\n", mode);
	88	break;
	89	}
f3f99cf3	90
c6d8f400 SL	91	i2c_smbus_write_byte_data(fm3130->client,
	92	FM3130_RTC_CONTROL, fm3130->regs[FM3130_RTC_CONTROL]);
	93	}
	94
	95	static int fm3130_get_time(struct device dev, struct rtc_time t)
	96	{
	97	struct fm3130 *fm3130 = dev_get_drvdata(dev);
	98	int tmp;
	99
	100	if (!fm3130->data_valid) {
	101	/* We have invalid data in RTC, probably due
	102	to battery faults or other problems. Return EIO
fd0961ff	103	for now, it will allow us to set data later instead
c6d8f400 SL	104	of error during probing which disables device */
	105	return -EIO;
	106	}
	107	fm3130_rtc_mode(dev, FM3130_MODE_READ);
	108
	109	/* read the RTC date and time registers all at once */
	110	tmp = i2c_transfer(to_i2c_adapter(fm3130->client->dev.parent),
	111	fm3130->msg, 2);
	112	if (tmp != 2) {
	113	dev_err(dev, "%s error %d\n", "read", tmp);
	114	return -EIO;
	115	}
	116
	117	fm3130_rtc_mode(dev, FM3130_MODE_NORMAL);
	118
01a4ca16	119	dev_dbg(dev, "%s: %15ph\n", "read", fm3130->regs);
c6d8f400	120
fe20ba70 AB	121	t->tm_sec = bcd2bin(fm3130->regs[FM3130_RTC_SECONDS] & 0x7f);
fe20ba70 AB	122	t->tm_min = bcd2bin(fm3130->regs[FM3130_RTC_MINUTES] & 0x7f);
c6d8f400	123	tmp = fm3130->regs[FM3130_RTC_HOURS] & 0x3f;
fe20ba70 AB	124	t->tm_hour = bcd2bin(tmp);
	125	t->tm_wday = bcd2bin(fm3130->regs[FM3130_RTC_DAY] & 0x07) - 1;
	126	t->tm_mday = bcd2bin(fm3130->regs[FM3130_RTC_DATE] & 0x3f);
c6d8f400	127	tmp = fm3130->regs[FM3130_RTC_MONTHS] & 0x1f;
fe20ba70	128	t->tm_mon = bcd2bin(tmp) - 1;
c6d8f400 SL	129
c6d8f400 SL	130	/* assume 20YY not 19YY, and ignore CF bit */
fe20ba70	131	t->tm_year = bcd2bin(fm3130->regs[FM3130_RTC_YEARS]) + 100;
c6d8f400 SL	132
	133	dev_dbg(dev, "%s secs=%d, mins=%d, "
	134	"hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
	135	"read", t->tm_sec, t->tm_min,
	136	t->tm_hour, t->tm_mday,
	137	t->tm_mon, t->tm_year, t->tm_wday);
	138
	139	/* initial clock setting can be undefined */
	140	return rtc_valid_tm(t);
	141	}
	142
	143
	144	static int fm3130_set_time(struct device dev, struct rtc_time t)
	145	{
	146	struct fm3130 *fm3130 = dev_get_drvdata(dev);
	147	int tmp, i;
	148	u8 *buf = fm3130->regs;
	149
	150	dev_dbg(dev, "%s secs=%d, mins=%d, "
	151	"hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
	152	"write", t->tm_sec, t->tm_min,
	153	t->tm_hour, t->tm_mday,
	154	t->tm_mon, t->tm_year, t->tm_wday);
	155
	156	/* first register addr */
fe20ba70 AB	157	buf[FM3130_RTC_SECONDS] = bin2bcd(t->tm_sec);
	158	buf[FM3130_RTC_MINUTES] = bin2bcd(t->tm_min);
	159	buf[FM3130_RTC_HOURS] = bin2bcd(t->tm_hour);
	160	buf[FM3130_RTC_DAY] = bin2bcd(t->tm_wday + 1);
	161	buf[FM3130_RTC_DATE] = bin2bcd(t->tm_mday);
	162	buf[FM3130_RTC_MONTHS] = bin2bcd(t->tm_mon + 1);
c6d8f400 SL	163
	164	/* assume 20YY not 19YY */
	165	tmp = t->tm_year - 100;
fe20ba70	166	buf[FM3130_RTC_YEARS] = bin2bcd(tmp);
c6d8f400	167
01a4ca16	168	dev_dbg(dev, "%s: %15ph\n", "write", buf);
c6d8f400 SL	169
	170	fm3130_rtc_mode(dev, FM3130_MODE_WRITE);
	171
	172	/* Writing time registers, we don't support multibyte transfers */
	173	for (i = 0; i < FM3130_CLOCK_REGS; i++) {
	174	i2c_smbus_write_byte_data(fm3130->client,
	175	FM3130_RTC_SECONDS + i,
	176	fm3130->regs[FM3130_RTC_SECONDS + i]);
	177	}
	178
	179	fm3130_rtc_mode(dev, FM3130_MODE_NORMAL);
	180
	181	/* We assume here that data are valid once written */
	182	if (!fm3130->data_valid)
	183	fm3130->data_valid = 1;
	184	return 0;
	185	}
	186
	187	static int fm3130_read_alarm(struct device dev, struct rtc_wkalrm alrm)
	188	{
	189	struct fm3130 *fm3130 = dev_get_drvdata(dev);
	190	int tmp;
	191	struct rtc_time *tm = &alrm->time;
f3f99cf3 SM	192
	193	if (!fm3130->alarm_valid) {
	194	/*
	195	* We have invalid alarm in RTC, probably due to battery faults
	196	* or other problems. Return EIO for now, it will allow us to
	197	* set alarm value later instead of error during probing which
	198	* disables device
	199	*/
	200	return -EIO;
	201	}
	202
c6d8f400 SL	203	/* read the RTC alarm registers all at once */
	204	tmp = i2c_transfer(to_i2c_adapter(fm3130->client->dev.parent),
	205	&fm3130->msg[2], 2);
	206	if (tmp != 2) {
	207	dev_err(dev, "%s error %d\n", "read", tmp);
	208	return -EIO;
	209	}
	210	dev_dbg(dev, "alarm read %02x %02x %02x %02x %02x\n",
	211	fm3130->regs[FM3130_ALARM_SECONDS],
	212	fm3130->regs[FM3130_ALARM_MINUTES],
	213	fm3130->regs[FM3130_ALARM_HOURS],
	214	fm3130->regs[FM3130_ALARM_DATE],
	215	fm3130->regs[FM3130_ALARM_MONTHS]);
	216
fe20ba70 AB	217	tm->tm_sec = bcd2bin(fm3130->regs[FM3130_ALARM_SECONDS] & 0x7F);
	218	tm->tm_min = bcd2bin(fm3130->regs[FM3130_ALARM_MINUTES] & 0x7F);
	219	tm->tm_hour = bcd2bin(fm3130->regs[FM3130_ALARM_HOURS] & 0x3F);
	220	tm->tm_mday = bcd2bin(fm3130->regs[FM3130_ALARM_DATE] & 0x3F);
	221	tm->tm_mon = bcd2bin(fm3130->regs[FM3130_ALARM_MONTHS] & 0x1F);
f3f99cf3	222
c6d8f400 SL	223	if (tm->tm_mon > 0)
c6d8f400 SL	224	tm->tm_mon -= 1; /* RTC is 1-12, tm_mon is 0-11 */
f3f99cf3	225
c6d8f400 SL	226	dev_dbg(dev, "%s secs=%d, mins=%d, "
	227	"hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
	228	"read alarm", tm->tm_sec, tm->tm_min,
	229	tm->tm_hour, tm->tm_mday,
	230	tm->tm_mon, tm->tm_year, tm->tm_wday);
	231
f3f99cf3 SM	232	/* check if alarm enabled */
	233	fm3130->regs[FM3130_RTC_CONTROL] =
	234	i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);
	235
	236	if ((fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_AEN) &&
	237	(~fm3130->regs[FM3130_RTC_CONTROL] &
	238	FM3130_RTC_CONTROL_BIT_CAL)) {
	239	alrm->enabled = 1;
	240	}
	241
c6d8f400 SL	242	return 0;
	243	}
	244
	245	static int fm3130_set_alarm(struct device dev, struct rtc_wkalrm alrm)
	246	{
	247	struct fm3130 *fm3130 = dev_get_drvdata(dev);
	248	struct rtc_time *tm = &alrm->time;
	249	int i;
	250
	251	dev_dbg(dev, "%s secs=%d, mins=%d, "
	252	"hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
	253	"write alarm", tm->tm_sec, tm->tm_min,
	254	tm->tm_hour, tm->tm_mday,
	255	tm->tm_mon, tm->tm_year, tm->tm_wday);
	256
f3f99cf3 SM	257	fm3130->regs[FM3130_ALARM_SECONDS] =
f3f99cf3 SM	258	(tm->tm_sec != -1) ? bin2bcd(tm->tm_sec) : 0x80;
c6d8f400	259
f3f99cf3 SM	260	fm3130->regs[FM3130_ALARM_MINUTES] =
f3f99cf3 SM	261	(tm->tm_min != -1) ? bin2bcd(tm->tm_min) : 0x80;
c6d8f400	262
f3f99cf3 SM	263	fm3130->regs[FM3130_ALARM_HOURS] =
f3f99cf3 SM	264	(tm->tm_hour != -1) ? bin2bcd(tm->tm_hour) : 0x80;
c6d8f400	265
f3f99cf3 SM	266	fm3130->regs[FM3130_ALARM_DATE] =
f3f99cf3 SM	267	(tm->tm_mday != -1) ? bin2bcd(tm->tm_mday) : 0x80;
c6d8f400	268
f3f99cf3 SM	269	fm3130->regs[FM3130_ALARM_MONTHS] =
f3f99cf3 SM	270	(tm->tm_mon != -1) ? bin2bcd(tm->tm_mon + 1) : 0x80;
c6d8f400 SL	271
	272	dev_dbg(dev, "alarm write %02x %02x %02x %02x %02x\n",
	273	fm3130->regs[FM3130_ALARM_SECONDS],
	274	fm3130->regs[FM3130_ALARM_MINUTES],
	275	fm3130->regs[FM3130_ALARM_HOURS],
	276	fm3130->regs[FM3130_ALARM_DATE],
	277	fm3130->regs[FM3130_ALARM_MONTHS]);
	278	/* Writing time registers, we don't support multibyte transfers */
	279	for (i = 0; i < FM3130_ALARM_REGS; i++) {
	280	i2c_smbus_write_byte_data(fm3130->client,
	281	FM3130_ALARM_SECONDS + i,
	282	fm3130->regs[FM3130_ALARM_SECONDS + i]);
	283	}
	284	fm3130->regs[FM3130_RTC_CONTROL] =
	285	i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);
f3f99cf3 SM	286
f3f99cf3 SM	287	/* enable or disable alarm */
c6d8f400 SL	288	if (alrm->enabled) {
	289	i2c_smbus_write_byte_data(fm3130->client, FM3130_RTC_CONTROL,
	290	(fm3130->regs[FM3130_RTC_CONTROL] &
	291	~(FM3130_RTC_CONTROL_BIT_CAL)) \|
	292	FM3130_RTC_CONTROL_BIT_AEN);
	293	} else {
	294	i2c_smbus_write_byte_data(fm3130->client, FM3130_RTC_CONTROL,
	295	fm3130->regs[FM3130_RTC_CONTROL] &
f3f99cf3 SM	296	~(FM3130_RTC_CONTROL_BIT_CAL) &
f3f99cf3 SM	297	~(FM3130_RTC_CONTROL_BIT_AEN));
c6d8f400	298	}
f3f99cf3 SM	299
	300	/* We assume here that data is valid once written */
	301	if (!fm3130->alarm_valid)
	302	fm3130->alarm_valid = 1;
	303
c6d8f400 SL	304	return 0;
	305	}
	306
f3f99cf3 SM	307	static int fm3130_alarm_irq_enable(struct device *dev, unsigned int enabled)
	308	{
	309	struct fm3130 *fm3130 = dev_get_drvdata(dev);
	310	int ret = 0;
	311
	312	fm3130->regs[FM3130_RTC_CONTROL] =
	313	i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);
	314
	315	dev_dbg(dev, "alarm_irq_enable: enable=%d, FM3130_RTC_CONTROL=%02x\n",
	316	enabled, fm3130->regs[FM3130_RTC_CONTROL]);
	317
	318	switch (enabled) {
	319	case 0: /* alarm off */
	320	ret = i2c_smbus_write_byte_data(fm3130->client,
	321	FM3130_RTC_CONTROL, fm3130->regs[FM3130_RTC_CONTROL] &
	322	~(FM3130_RTC_CONTROL_BIT_CAL) &
	323	~(FM3130_RTC_CONTROL_BIT_AEN));
	324	break;
	325	case 1: /* alarm on */
	326	ret = i2c_smbus_write_byte_data(fm3130->client,
	327	FM3130_RTC_CONTROL, (fm3130->regs[FM3130_RTC_CONTROL] &
	328	~(FM3130_RTC_CONTROL_BIT_CAL)) \|
	329	FM3130_RTC_CONTROL_BIT_AEN);
	330	break;
	331	default:
	332	ret = -EINVAL;
	333	break;
	334	}
	335
	336	return ret;
	337	}
	338
c6d8f400 SL	339	static const struct rtc_class_ops fm3130_rtc_ops = {
	340	.read_time = fm3130_get_time,
	341	.set_time = fm3130_set_time,
	342	.read_alarm = fm3130_read_alarm,
	343	.set_alarm = fm3130_set_alarm,
f3f99cf3	344	.alarm_irq_enable = fm3130_alarm_irq_enable,
c6d8f400 SL	345	};
	346
	347	static struct i2c_driver fm3130_driver;
	348
5a167f45 GKH	349	static int fm3130_probe(struct i2c_client *client,
5a167f45 GKH	350	const struct i2c_device_id *id)
c6d8f400 SL	351	{
	352	struct fm3130 *fm3130;
	353	int err = -ENODEV;
	354	int tmp;
	355	struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
	356
	357	if (!i2c_check_functionality(adapter,
	358	I2C_FUNC_I2C \| I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
	359	return -EIO;
	360
c54a52e3	361	fm3130 = devm_kzalloc(&client->dev, sizeof(struct fm3130), GFP_KERNEL);
c6d8f400 SL	362
	363	if (!fm3130)
	364	return -ENOMEM;
	365
	366	fm3130->client = client;
	367	i2c_set_clientdata(client, fm3130);
	368	fm3130->reg_addr_time = FM3130_RTC_SECONDS;
	369	fm3130->reg_addr_alarm = FM3130_ALARM_SECONDS;
	370
	371	/* Messages to read time */
	372	fm3130->msg[0].addr = client->addr;
	373	fm3130->msg[0].flags = 0;
	374	fm3130->msg[0].len = 1;
	375	fm3130->msg[0].buf = &fm3130->reg_addr_time;
	376
	377	fm3130->msg[1].addr = client->addr;
	378	fm3130->msg[1].flags = I2C_M_RD;
	379	fm3130->msg[1].len = FM3130_CLOCK_REGS;
	380	fm3130->msg[1].buf = &fm3130->regs[FM3130_RTC_SECONDS];
	381
	382	/* Messages to read alarm */
	383	fm3130->msg[2].addr = client->addr;
	384	fm3130->msg[2].flags = 0;
	385	fm3130->msg[2].len = 1;
	386	fm3130->msg[2].buf = &fm3130->reg_addr_alarm;
	387
	388	fm3130->msg[3].addr = client->addr;
	389	fm3130->msg[3].flags = I2C_M_RD;
	390	fm3130->msg[3].len = FM3130_ALARM_REGS;
	391	fm3130->msg[3].buf = &fm3130->regs[FM3130_ALARM_SECONDS];
	392
f3f99cf3	393	fm3130->alarm_valid = 0;
c6d8f400 SL	394	fm3130->data_valid = 0;
	395
	396	tmp = i2c_transfer(adapter, fm3130->msg, 4);
	397	if (tmp != 4) {
198b8ec8	398	dev_dbg(&client->dev, "read error %d\n", tmp);
c6d8f400 SL	399	err = -EIO;
	400	goto exit_free;
	401	}
	402
	403	fm3130->regs[FM3130_RTC_CONTROL] =
	404	i2c_smbus_read_byte_data(client, FM3130_RTC_CONTROL);
	405	fm3130->regs[FM3130_CAL_CONTROL] =
	406	i2c_smbus_read_byte_data(client, FM3130_CAL_CONTROL);
	407
c6d8f400	408	/* Disabling calibration mode */
f4b51628	409	if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_CAL) {
c6d8f400 SL	410	i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
	411	fm3130->regs[FM3130_RTC_CONTROL] &
	412	~(FM3130_RTC_CONTROL_BIT_CAL));
	413	dev_warn(&client->dev, "Disabling calibration mode!\n");
f4b51628	414	}
c6d8f400 SL	415
	416	/* Disabling read and write modes */
	417	if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_WRITE \|\|
f4b51628	418	fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_READ) {
c6d8f400 SL	419	i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
	420	fm3130->regs[FM3130_RTC_CONTROL] &
	421	~(FM3130_RTC_CONTROL_BIT_READ \|
	422	FM3130_RTC_CONTROL_BIT_WRITE));
	423	dev_warn(&client->dev, "Disabling READ or WRITE mode!\n");
f4b51628	424	}
c6d8f400 SL	425
	426	/* oscillator off? turn it on, so clock can tick. */
	427	if (fm3130->regs[FM3130_CAL_CONTROL] & FM3130_CAL_CONTROL_BIT_nOSCEN)
	428	i2c_smbus_write_byte_data(client, FM3130_CAL_CONTROL,
	429	fm3130->regs[FM3130_CAL_CONTROL] &
	430	~(FM3130_CAL_CONTROL_BIT_nOSCEN));
	431
f3f99cf3 SM	432	/* low battery? clear flag, and warn */
	433	if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_LB) {
	434	i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
	435	fm3130->regs[FM3130_RTC_CONTROL] &
	436	~(FM3130_RTC_CONTROL_BIT_LB));
c6d8f400	437	dev_warn(&client->dev, "Low battery!\n");
f3f99cf3	438	}
c6d8f400	439
f3f99cf3	440	/* check if Power On Reset bit is set */
c6d8f400 SL	441	if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_POR) {
	442	i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
	443	fm3130->regs[FM3130_RTC_CONTROL] &
	444	~FM3130_RTC_CONTROL_BIT_POR);
f3f99cf3	445	dev_dbg(&client->dev, "POR bit is set\n");
c6d8f400 SL	446	}
	447	/* ACS is controlled by alarm */
	448	i2c_smbus_write_byte_data(client, FM3130_ALARM_WP_CONTROL, 0x80);
	449
f3f99cf3 SM	450	/* alarm registers sanity check */
	451	tmp = bcd2bin(fm3130->regs[FM3130_RTC_SECONDS] & 0x7f);
	452	if (tmp > 59)
	453	goto bad_alarm;
	454
fe20ba70	455	tmp = bcd2bin(fm3130->regs[FM3130_RTC_MINUTES] & 0x7f);
f3f99cf3 SM	456	if (tmp > 59)
	457	goto bad_alarm;
	458
	459	tmp = bcd2bin(fm3130->regs[FM3130_RTC_HOURS] & 0x3f);
	460	if (tmp > 23)
	461	goto bad_alarm;
c6d8f400	462
fe20ba70	463	tmp = bcd2bin(fm3130->regs[FM3130_RTC_DATE] & 0x3f);
c6d8f400	464	if (tmp == 0 \|\| tmp > 31)
f3f99cf3	465	goto bad_alarm;
c6d8f400	466
fe20ba70	467	tmp = bcd2bin(fm3130->regs[FM3130_RTC_MONTHS] & 0x1f);
c6d8f400	468	if (tmp == 0 \|\| tmp > 12)
f3f99cf3	469	goto bad_alarm;
c6d8f400	470
f3f99cf3 SM	471	fm3130->alarm_valid = 1;
	472
	473	bad_alarm:
	474
	475	/* clock registers sanity chek */
	476	tmp = bcd2bin(fm3130->regs[FM3130_RTC_SECONDS] & 0x7f);
	477	if (tmp > 59)
	478	goto bad_clock;
	479
	480	tmp = bcd2bin(fm3130->regs[FM3130_RTC_MINUTES] & 0x7f);
	481	if (tmp > 59)
	482	goto bad_clock;
	483
	484	tmp = bcd2bin(fm3130->regs[FM3130_RTC_HOURS] & 0x3f);
	485	if (tmp > 23)
	486	goto bad_clock;
	487
	488	tmp = bcd2bin(fm3130->regs[FM3130_RTC_DAY] & 0x7);
	489	if (tmp == 0 \|\| tmp > 7)
	490	goto bad_clock;
	491
	492	tmp = bcd2bin(fm3130->regs[FM3130_RTC_DATE] & 0x3f);
	493	if (tmp == 0 \|\| tmp > 31)
	494	goto bad_clock;
	495
	496	tmp = bcd2bin(fm3130->regs[FM3130_RTC_MONTHS] & 0x1f);
	497	if (tmp == 0 \|\| tmp > 12)
	498	goto bad_clock;
c6d8f400 SL	499
	500	fm3130->data_valid = 1;
	501
f3f99cf3 SM	502	bad_clock:
	503
	504	if (!fm3130->data_valid \|\| !fm3130->alarm_valid)
01a4ca16 AS	505	dev_dbg(&client->dev, "%s: %15ph\n", "bogus registers",
01a4ca16 AS	506	fm3130->regs);
c6d8f400 SL	507
	508	/* We won't bail out here because we just got invalid data.
	509	Time setting from u-boot doesn't work anyway */
c54a52e3	510	fm3130->rtc = devm_rtc_device_register(&client->dev, client->name,
c6d8f400 SL	511	&fm3130_rtc_ops, THIS_MODULE);
	512	if (IS_ERR(fm3130->rtc)) {
	513	err = PTR_ERR(fm3130->rtc);
	514	dev_err(&client->dev,
	515	"unable to register the class device\n");
	516	goto exit_free;
	517	}
	518	return 0;
	519	exit_free:
c6d8f400 SL	520	return err;
	521	}
	522
c6d8f400 SL	523	static struct i2c_driver fm3130_driver = {
	524	.driver = {
	525	.name = "rtc-fm3130",
c6d8f400 SL	526	},
c6d8f400 SL	527	.probe = fm3130_probe,
c6d8f400 SL	528	.id_table = fm3130_id,
	529	};
	530
0abc9201	531	module_i2c_driver(fm3130_driver);
c6d8f400 SL	532
	533	MODULE_DESCRIPTION("RTC driver for FM3130");
	534	MODULE_AUTHOR("Sergey Lapin <[email protected]>");
	535	MODULE_LICENSE("GPL");
	536