[linux.git] / drivers / mfd / wm8994-irq.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * wm8994-irq.c  --  Interrupt controller support for Wolfson WM8994
 *
 * Copyright 2010 Wolfson Microelectronics PLC.
 *
 * Author: Mark Brown <[email protected]>
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/gpio.h>
#include <linux/i2c.h>
#include <linux/irq.h>
#include <linux/mfd/core.h>
#include <linux/interrupt.h>
#include <linux/irqdomain.h>
#include <linux/regmap.h>

#include <linux/mfd/wm8994/core.h>
#include <linux/mfd/wm8994/pdata.h>
#include <linux/mfd/wm8994/registers.h>

#include <linux/delay.h>

static const struct regmap_irq wm8994_irqs[] = {
	[WM8994_IRQ_TEMP_SHUT] = {
		.reg_offset = 1,
		.mask = WM8994_TEMP_SHUT_EINT,
	},
	[WM8994_IRQ_MIC1_DET] = {
		.reg_offset = 1,
		.mask = WM8994_MIC1_DET_EINT,
	},
	[WM8994_IRQ_MIC1_SHRT] = {
		.reg_offset = 1,
		.mask = WM8994_MIC1_SHRT_EINT,
	},
	[WM8994_IRQ_MIC2_DET] = {
		.reg_offset = 1,
		.mask = WM8994_MIC2_DET_EINT,
	},
	[WM8994_IRQ_MIC2_SHRT] = {
		.reg_offset = 1,
		.mask = WM8994_MIC2_SHRT_EINT,
	},
	[WM8994_IRQ_FLL1_LOCK] = {
		.reg_offset = 1,
		.mask = WM8994_FLL1_LOCK_EINT,
	},
	[WM8994_IRQ_FLL2_LOCK] = {
		.reg_offset = 1,
		.mask = WM8994_FLL2_LOCK_EINT,
	},
	[WM8994_IRQ_SRC1_LOCK] = {
		.reg_offset = 1,
		.mask = WM8994_SRC1_LOCK_EINT,
	},
	[WM8994_IRQ_SRC2_LOCK] = {
		.reg_offset = 1,
		.mask = WM8994_SRC2_LOCK_EINT,
	},
	[WM8994_IRQ_AIF1DRC1_SIG_DET] = {
		.reg_offset = 1,
		.mask = WM8994_AIF1DRC1_SIG_DET,
	},
	[WM8994_IRQ_AIF1DRC2_SIG_DET] = {
		.reg_offset = 1,
		.mask = WM8994_AIF1DRC2_SIG_DET_EINT,
	},
	[WM8994_IRQ_AIF2DRC_SIG_DET] = {
		.reg_offset = 1,
		.mask = WM8994_AIF2DRC_SIG_DET_EINT,
	},
	[WM8994_IRQ_FIFOS_ERR] = {
		.reg_offset = 1,
		.mask = WM8994_FIFOS_ERR_EINT,
	},
	[WM8994_IRQ_WSEQ_DONE] = {
		.reg_offset = 1,
		.mask = WM8994_WSEQ_DONE_EINT,
	},
	[WM8994_IRQ_DCS_DONE] = {
		.reg_offset = 1,
		.mask = WM8994_DCS_DONE_EINT,
	},
	[WM8994_IRQ_TEMP_WARN] = {
		.reg_offset = 1,
		.mask = WM8994_TEMP_WARN_EINT,
	},
	[WM8994_IRQ_GPIO(1)] = {
		.mask = WM8994_GP1_EINT,
	},
	[WM8994_IRQ_GPIO(2)] = {
		.mask = WM8994_GP2_EINT,
	},
	[WM8994_IRQ_GPIO(3)] = {
		.mask = WM8994_GP3_EINT,
	},
	[WM8994_IRQ_GPIO(4)] = {
		.mask = WM8994_GP4_EINT,
	},
	[WM8994_IRQ_GPIO(5)] = {
		.mask = WM8994_GP5_EINT,
	},
	[WM8994_IRQ_GPIO(6)] = {
		.mask = WM8994_GP6_EINT,
	},
	[WM8994_IRQ_GPIO(7)] = {
		.mask = WM8994_GP7_EINT,
	},
	[WM8994_IRQ_GPIO(8)] = {
		.mask = WM8994_GP8_EINT,
	},
	[WM8994_IRQ_GPIO(9)] = {
		.mask = WM8994_GP8_EINT,
	},
	[WM8994_IRQ_GPIO(10)] = {
		.mask = WM8994_GP10_EINT,
	},
	[WM8994_IRQ_GPIO(11)] = {
		.mask = WM8994_GP11_EINT,
	},
};

static const struct regmap_irq_chip wm8994_irq_chip = {
	.name = "wm8994",
	.irqs = wm8994_irqs,
	.num_irqs = ARRAY_SIZE(wm8994_irqs),

	.num_regs = 2,
	.status_base = WM8994_INTERRUPT_STATUS_1,
	.mask_base = WM8994_INTERRUPT_STATUS_1_MASK,
	.ack_base = WM8994_INTERRUPT_STATUS_1,
	.runtime_pm = true,
};

static void wm8994_edge_irq_enable(struct irq_data *data)
{
}

static void wm8994_edge_irq_disable(struct irq_data *data)
{
}

static struct irq_chip wm8994_edge_irq_chip = {
	.name			= "wm8994_edge",
	.irq_disable		= wm8994_edge_irq_disable,
	.irq_enable		= wm8994_edge_irq_enable,
};

static irqreturn_t wm8994_edge_irq(int irq, void *data)
{
	struct wm8994 *wm8994 = data;

	while (gpio_get_value_cansleep(wm8994->pdata.irq_gpio))
		handle_nested_irq(irq_find_mapping(wm8994->edge_irq, 0));

	return IRQ_HANDLED;
}

static int wm8994_edge_irq_map(struct irq_domain *h, unsigned int virq,
			       irq_hw_number_t hw)
{
	struct wm8994 *wm8994 = h->host_data;

	irq_set_chip_data(virq, wm8994);
	irq_set_chip_and_handler(virq, &wm8994_edge_irq_chip, handle_edge_irq);
	irq_set_nested_thread(virq, 1);
	irq_set_noprobe(virq);

	return 0;
}

static const struct irq_domain_ops wm8994_edge_irq_ops = {
	.map	= wm8994_edge_irq_map,
	.xlate	= irq_domain_xlate_twocell,
};

int wm8994_irq_init(struct wm8994 *wm8994)
{
	int ret;
	unsigned long irqflags;
	struct wm8994_pdata *pdata = &wm8994->pdata;

	if (!wm8994->irq) {
		dev_warn(wm8994->dev,
			 "No interrupt specified, no interrupts\n");
		wm8994->irq_base = 0;
		return 0;
	}

	/* select user or default irq flags */
	irqflags = IRQF_TRIGGER_HIGH | IRQF_ONESHOT;
	if (pdata->irq_flags)
		irqflags = pdata->irq_flags;

	/* use a GPIO for edge triggered controllers */
	if (irqflags & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
		if (gpio_to_irq(pdata->irq_gpio) != wm8994->irq) {
			dev_warn(wm8994->dev, "IRQ %d is not GPIO %d (%d)\n",
				 wm8994->irq, pdata->irq_gpio,
				 gpio_to_irq(pdata->irq_gpio));
			wm8994->irq = gpio_to_irq(pdata->irq_gpio);
		}

		ret = devm_gpio_request_one(wm8994->dev, pdata->irq_gpio,
					    GPIOF_IN, "WM8994 IRQ");

		if (ret != 0) {
			dev_err(wm8994->dev, "Failed to get IRQ GPIO: %d\n",
				ret);
			return ret;
		}

		wm8994->edge_irq = irq_domain_add_linear(NULL, 1,
							 &wm8994_edge_irq_ops,
							 wm8994);

		ret = regmap_add_irq_chip(wm8994->regmap,
					  irq_create_mapping(wm8994->edge_irq,
							     0),
					  IRQF_ONESHOT,
					  wm8994->irq_base, &wm8994_irq_chip,
					  &wm8994->irq_data);
		if (ret != 0) {
			dev_err(wm8994->dev, "Failed to get IRQ: %d\n",
				ret);
			return ret;
		}

		ret = request_threaded_irq(wm8994->irq,
					   NULL, wm8994_edge_irq,
					   irqflags,
					   "WM8994 edge", wm8994);
	} else {
		ret = regmap_add_irq_chip(wm8994->regmap, wm8994->irq,
					  irqflags,
					  wm8994->irq_base, &wm8994_irq_chip,
					  &wm8994->irq_data);
	}

	if (ret != 0) {
		dev_err(wm8994->dev, "Failed to register IRQ chip: %d\n", ret);
		return ret;
	}

	/* Enable top level interrupt if it was masked */
	wm8994_reg_write(wm8994, WM8994_INTERRUPT_CONTROL, 0);

	return 0;
}
EXPORT_SYMBOL(wm8994_irq_init);

void wm8994_irq_exit(struct wm8994 *wm8994)
{
	regmap_del_irq_chip(wm8994->irq, wm8994->irq_data);
}
EXPORT_SYMBOL(wm8994_irq_exit);
Commit	Line	Data
2874c5fd	1	// SPDX-License-Identifier: GPL-2.0-or-later
c9fbf7e0 MB	2	/*
	3	* wm8994-irq.c -- Interrupt controller support for Wolfson WM8994
	4	*
	5	* Copyright 2010 Wolfson Microelectronics PLC.
	6	*
	7	* Author: Mark Brown <[email protected]>
c9fbf7e0 MB	8	*/
	9
	10	#include <linux/kernel.h>
	11	#include <linux/module.h>
7c884448	12	#include <linux/gpio.h>
c9fbf7e0 MB	13	#include <linux/i2c.h>
	14	#include <linux/irq.h>
	15	#include <linux/mfd/core.h>
	16	#include <linux/interrupt.h>
7c884448	17	#include <linux/irqdomain.h>
8ab30691	18	#include <linux/regmap.h>
c9fbf7e0 MB	19
c9fbf7e0 MB	20	#include <linux/mfd/wm8994/core.h>
b0ab907d	21	#include <linux/mfd/wm8994/pdata.h>
c9fbf7e0 MB	22	#include <linux/mfd/wm8994/registers.h>
	23
	24	#include <linux/delay.h>
	25
7ce7b26f	26	static const struct regmap_irq wm8994_irqs[] = {
c9fbf7e0	27	[WM8994_IRQ_TEMP_SHUT] = {
8ab30691	28	.reg_offset = 1,
c9fbf7e0 MB	29	.mask = WM8994_TEMP_SHUT_EINT,
	30	},
	31	[WM8994_IRQ_MIC1_DET] = {
8ab30691	32	.reg_offset = 1,
c9fbf7e0 MB	33	.mask = WM8994_MIC1_DET_EINT,
	34	},
	35	[WM8994_IRQ_MIC1_SHRT] = {
8ab30691	36	.reg_offset = 1,
c9fbf7e0 MB	37	.mask = WM8994_MIC1_SHRT_EINT,
	38	},
	39	[WM8994_IRQ_MIC2_DET] = {
8ab30691	40	.reg_offset = 1,
c9fbf7e0 MB	41	.mask = WM8994_MIC2_DET_EINT,
	42	},
	43	[WM8994_IRQ_MIC2_SHRT] = {
8ab30691	44	.reg_offset = 1,
c9fbf7e0 MB	45	.mask = WM8994_MIC2_SHRT_EINT,
	46	},
	47	[WM8994_IRQ_FLL1_LOCK] = {
8ab30691	48	.reg_offset = 1,
c9fbf7e0 MB	49	.mask = WM8994_FLL1_LOCK_EINT,
	50	},
	51	[WM8994_IRQ_FLL2_LOCK] = {
8ab30691	52	.reg_offset = 1,
c9fbf7e0 MB	53	.mask = WM8994_FLL2_LOCK_EINT,
	54	},
	55	[WM8994_IRQ_SRC1_LOCK] = {
8ab30691	56	.reg_offset = 1,
c9fbf7e0 MB	57	.mask = WM8994_SRC1_LOCK_EINT,
	58	},
	59	[WM8994_IRQ_SRC2_LOCK] = {
8ab30691	60	.reg_offset = 1,
c9fbf7e0 MB	61	.mask = WM8994_SRC2_LOCK_EINT,
	62	},
	63	[WM8994_IRQ_AIF1DRC1_SIG_DET] = {
8ab30691	64	.reg_offset = 1,
c9fbf7e0 MB	65	.mask = WM8994_AIF1DRC1_SIG_DET,
	66	},
	67	[WM8994_IRQ_AIF1DRC2_SIG_DET] = {
8ab30691	68	.reg_offset = 1,
c9fbf7e0 MB	69	.mask = WM8994_AIF1DRC2_SIG_DET_EINT,
	70	},
	71	[WM8994_IRQ_AIF2DRC_SIG_DET] = {
8ab30691	72	.reg_offset = 1,
c9fbf7e0 MB	73	.mask = WM8994_AIF2DRC_SIG_DET_EINT,
	74	},
	75	[WM8994_IRQ_FIFOS_ERR] = {
8ab30691	76	.reg_offset = 1,
c9fbf7e0 MB	77	.mask = WM8994_FIFOS_ERR_EINT,
	78	},
	79	[WM8994_IRQ_WSEQ_DONE] = {
8ab30691	80	.reg_offset = 1,
c9fbf7e0 MB	81	.mask = WM8994_WSEQ_DONE_EINT,
	82	},
	83	[WM8994_IRQ_DCS_DONE] = {
8ab30691	84	.reg_offset = 1,
c9fbf7e0 MB	85	.mask = WM8994_DCS_DONE_EINT,
	86	},
	87	[WM8994_IRQ_TEMP_WARN] = {
8ab30691	88	.reg_offset = 1,
c9fbf7e0 MB	89	.mask = WM8994_TEMP_WARN_EINT,
	90	},
	91	[WM8994_IRQ_GPIO(1)] = {
c9fbf7e0 MB	92	.mask = WM8994_GP1_EINT,
	93	},
	94	[WM8994_IRQ_GPIO(2)] = {
c9fbf7e0 MB	95	.mask = WM8994_GP2_EINT,
	96	},
	97	[WM8994_IRQ_GPIO(3)] = {
c9fbf7e0 MB	98	.mask = WM8994_GP3_EINT,
	99	},
	100	[WM8994_IRQ_GPIO(4)] = {
c9fbf7e0 MB	101	.mask = WM8994_GP4_EINT,
	102	},
	103	[WM8994_IRQ_GPIO(5)] = {
c9fbf7e0 MB	104	.mask = WM8994_GP5_EINT,
	105	},
	106	[WM8994_IRQ_GPIO(6)] = {
c9fbf7e0 MB	107	.mask = WM8994_GP6_EINT,
	108	},
	109	[WM8994_IRQ_GPIO(7)] = {
c9fbf7e0 MB	110	.mask = WM8994_GP7_EINT,
	111	},
	112	[WM8994_IRQ_GPIO(8)] = {
c9fbf7e0 MB	113	.mask = WM8994_GP8_EINT,
	114	},
	115	[WM8994_IRQ_GPIO(9)] = {
c9fbf7e0 MB	116	.mask = WM8994_GP8_EINT,
	117	},
	118	[WM8994_IRQ_GPIO(10)] = {
c9fbf7e0 MB	119	.mask = WM8994_GP10_EINT,
	120	},
	121	[WM8994_IRQ_GPIO(11)] = {
c9fbf7e0 MB	122	.mask = WM8994_GP11_EINT,
	123	},
	124	};
	125
7ce7b26f	126	static const struct regmap_irq_chip wm8994_irq_chip = {
8ab30691 MB	127	.name = "wm8994",
	128	.irqs = wm8994_irqs,
	129	.num_irqs = ARRAY_SIZE(wm8994_irqs),
c9fbf7e0	130
8ab30691 MB	131	.num_regs = 2,
	132	.status_base = WM8994_INTERRUPT_STATUS_1,
	133	.mask_base = WM8994_INTERRUPT_STATUS_1_MASK,
	134	.ack_base = WM8994_INTERRUPT_STATUS_1,
7a976379	135	.runtime_pm = true,
c9fbf7e0 MB	136	};
c9fbf7e0 MB	137
7c884448 MB	138	static void wm8994_edge_irq_enable(struct irq_data *data)
	139	{
	140	}
	141
	142	static void wm8994_edge_irq_disable(struct irq_data *data)
	143	{
	144	}
	145
	146	static struct irq_chip wm8994_edge_irq_chip = {
	147	.name = "wm8994_edge",
	148	.irq_disable = wm8994_edge_irq_disable,
	149	.irq_enable = wm8994_edge_irq_enable,
	150	};
	151
	152	static irqreturn_t wm8994_edge_irq(int irq, void *data)
	153	{
	154	struct wm8994 *wm8994 = data;
	155
	156	while (gpio_get_value_cansleep(wm8994->pdata.irq_gpio))
9ff80e2d	157	handle_nested_irq(irq_find_mapping(wm8994->edge_irq, 0));
7c884448 MB	158
	159	return IRQ_HANDLED;
	160	}
	161
	162	static int wm8994_edge_irq_map(struct irq_domain *h, unsigned int virq,
	163	irq_hw_number_t hw)
	164	{
	165	struct wm8994 *wm8994 = h->host_data;
	166
	167	irq_set_chip_data(virq, wm8994);
	168	irq_set_chip_and_handler(virq, &wm8994_edge_irq_chip, handle_edge_irq);
	169	irq_set_nested_thread(virq, 1);
7c884448	170	irq_set_noprobe(virq);
7c884448 MB	171
	172	return 0;
	173	}
	174
7ce7b26f	175	static const struct irq_domain_ops wm8994_edge_irq_ops = {
7c884448 MB	176	.map = wm8994_edge_irq_map,
	177	.xlate = irq_domain_xlate_twocell,
	178	};
	179
c9fbf7e0 MB	180	int wm8994_irq_init(struct wm8994 *wm8994)
c9fbf7e0 MB	181	{
8ab30691	182	int ret;
b0ab907d	183	unsigned long irqflags;
dd30acc8	184	struct wm8994_pdata *pdata = &wm8994->pdata;
c9fbf7e0 MB	185
	186	if (!wm8994->irq) {
	187	dev_warn(wm8994->dev,
	188	"No interrupt specified, no interrupts\n");
	189	wm8994->irq_base = 0;
	190	return 0;
	191	}
	192
b0ab907d MB	193	/* select user or default irq flags */
	194	irqflags = IRQF_TRIGGER_HIGH \| IRQF_ONESHOT;
	195	if (pdata->irq_flags)
	196	irqflags = pdata->irq_flags;
	197
7c884448 MB	198	/* use a GPIO for edge triggered controllers */
	199	if (irqflags & (IRQF_TRIGGER_RISING \| IRQF_TRIGGER_FALLING)) {
	200	if (gpio_to_irq(pdata->irq_gpio) != wm8994->irq) {
	201	dev_warn(wm8994->dev, "IRQ %d is not GPIO %d (%d)\n",
	202	wm8994->irq, pdata->irq_gpio,
	203	gpio_to_irq(pdata->irq_gpio));
	204	wm8994->irq = gpio_to_irq(pdata->irq_gpio);
	205	}
	206
	207	ret = devm_gpio_request_one(wm8994->dev, pdata->irq_gpio,
	208	GPIOF_IN, "WM8994 IRQ");
	209
	210	if (ret != 0) {
	211	dev_err(wm8994->dev, "Failed to get IRQ GPIO: %d\n",
	212	ret);
	213	return ret;
	214	}
	215
	216	wm8994->edge_irq = irq_domain_add_linear(NULL, 1,
	217	&wm8994_edge_irq_ops,
	218	wm8994);
	219
	220	ret = regmap_add_irq_chip(wm8994->regmap,
	221	irq_create_mapping(wm8994->edge_irq,
	222	0),
	223	IRQF_ONESHOT,
	224	wm8994->irq_base, &wm8994_irq_chip,
	225	&wm8994->irq_data);
	226	if (ret != 0) {
	227	dev_err(wm8994->dev, "Failed to get IRQ: %d\n",
	228	ret);
	229	return ret;
	230	}
	231
	232	ret = request_threaded_irq(wm8994->irq,
	233	NULL, wm8994_edge_irq,
	234	irqflags,
	235	"WM8994 edge", wm8994);
	236	} else {
	237	ret = regmap_add_irq_chip(wm8994->regmap, wm8994->irq,
	238	irqflags,
	239	wm8994->irq_base, &wm8994_irq_chip,
	240	&wm8994->irq_data);
	241	}
	242
c9fbf7e0	243	if (ret != 0) {
8ab30691	244	dev_err(wm8994->dev, "Failed to register IRQ chip: %d\n", ret);
c9fbf7e0 MB	245	return ret;
	246	}
	247
	248	/* Enable top level interrupt if it was masked */
	249	wm8994_reg_write(wm8994, WM8994_INTERRUPT_CONTROL, 0);
	250
	251	return 0;
	252	}
7821d9b2	253	EXPORT_SYMBOL(wm8994_irq_init);
c9fbf7e0 MB	254
	255	void wm8994_irq_exit(struct wm8994 *wm8994)
	256	{
8ab30691	257	regmap_del_irq_chip(wm8994->irq, wm8994->irq_data);
c9fbf7e0	258	}
7821d9b2	259	EXPORT_SYMBOL(wm8994_irq_exit);