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Commit | Line | Data |
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550a7375 FB |
1 | /* |
2 | * This is used to for host and peripheral modes of the driver for | |
3 | * Inventra (Multidrop) Highspeed Dual-Role Controllers: (M)HDRC. | |
4 | * | |
5 | * Board initialization should put one of these into dev->platform_data, | |
05ac10dd | 6 | * probably on some platform_device named "musb-hdrc". It encapsulates |
550a7375 FB |
7 | * key configuration differences between boards. |
8 | */ | |
9 | ||
fbfc396e MG |
10 | #ifndef __LINUX_USB_MUSB_H |
11 | #define __LINUX_USB_MUSB_H | |
12 | ||
550a7375 FB |
13 | /* The USB role is defined by the connector used on the board, so long as |
14 | * standards are being followed. (Developer boards sometimes won't.) | |
15 | */ | |
16 | enum musb_mode { | |
17 | MUSB_UNDEFINED = 0, | |
18 | MUSB_HOST, /* A or Mini-A connector */ | |
19 | MUSB_PERIPHERAL, /* B or Mini-B connector */ | |
20 | MUSB_OTG /* Mini-AB connector */ | |
21 | }; | |
22 | ||
23 | struct clk; | |
24 | ||
e6c213b2 FB |
25 | enum musb_fifo_style { |
26 | FIFO_RXTX, | |
27 | FIFO_TX, | |
28 | FIFO_RX | |
29 | } __attribute__ ((packed)); | |
30 | ||
31 | enum musb_buf_mode { | |
32 | BUF_SINGLE, | |
33 | BUF_DOUBLE | |
34 | } __attribute__ ((packed)); | |
35 | ||
36 | struct musb_fifo_cfg { | |
37 | u8 hw_ep_num; | |
38 | enum musb_fifo_style style; | |
39 | enum musb_buf_mode mode; | |
40 | u16 maxpacket; | |
41 | }; | |
42 | ||
43 | #define MUSB_EP_FIFO(ep, st, m, pkt) \ | |
44 | { \ | |
45 | .hw_ep_num = ep, \ | |
46 | .style = st, \ | |
47 | .mode = m, \ | |
48 | .maxpacket = pkt, \ | |
49 | } | |
50 | ||
51 | #define MUSB_EP_FIFO_SINGLE(ep, st, pkt) \ | |
52 | MUSB_EP_FIFO(ep, st, BUF_SINGLE, pkt) | |
53 | ||
54 | #define MUSB_EP_FIFO_DOUBLE(ep, st, pkt) \ | |
55 | MUSB_EP_FIFO(ep, st, BUF_DOUBLE, pkt) | |
56 | ||
ca6d1b13 FB |
57 | struct musb_hdrc_eps_bits { |
58 | const char name[16]; | |
59 | u8 bits; | |
60 | }; | |
61 | ||
62 | struct musb_hdrc_config { | |
e6c213b2 FB |
63 | struct musb_fifo_cfg *fifo_cfg; /* board fifo configuration */ |
64 | unsigned fifo_cfg_size; /* size of the fifo configuration */ | |
65 | ||
ca6d1b13 FB |
66 | /* MUSB configuration-specific details */ |
67 | unsigned multipoint:1; /* multipoint device */ | |
c58bfa6b FB |
68 | unsigned dyn_fifo:1 __deprecated; /* supports dynamic fifo sizing */ |
69 | unsigned soft_con:1 __deprecated; /* soft connect required */ | |
70 | unsigned utm_16:1 __deprecated; /* utm data witdh is 16 bits */ | |
ca6d1b13 FB |
71 | unsigned big_endian:1; /* true if CPU uses big-endian */ |
72 | unsigned mult_bulk_tx:1; /* Tx ep required for multbulk pkts */ | |
73 | unsigned mult_bulk_rx:1; /* Rx ep required for multbulk pkts */ | |
74 | unsigned high_iso_tx:1; /* Tx ep required for HB iso */ | |
75 | unsigned high_iso_rx:1; /* Rx ep required for HD iso */ | |
c58bfa6b FB |
76 | unsigned dma:1 __deprecated; /* supports DMA */ |
77 | unsigned vendor_req:1 __deprecated; /* vendor registers required */ | |
ca6d1b13 FB |
78 | |
79 | u8 num_eps; /* number of endpoints _with_ ep0 */ | |
c58bfa6b | 80 | u8 dma_channels __deprecated; /* number of dma channels */ |
ca6d1b13 | 81 | u8 dyn_fifo_size; /* dynamic size in bytes */ |
c58bfa6b FB |
82 | u8 vendor_ctrl __deprecated; /* vendor control reg width */ |
83 | u8 vendor_stat __deprecated; /* vendor status reg witdh */ | |
84 | u8 dma_req_chan __deprecated; /* bitmask for required dma channels */ | |
ca6d1b13 FB |
85 | u8 ram_bits; /* ram address size */ |
86 | ||
c58bfa6b | 87 | struct musb_hdrc_eps_bits *eps_bits __deprecated; |
2ffcdb3b | 88 | #ifdef CONFIG_BLACKFIN |
0858a3a5 GKH |
89 | /* A GPIO controlling VRSEL in Blackfin */ |
90 | unsigned int gpio_vrsel; | |
6ddc6dae | 91 | unsigned int gpio_vrsel_active; |
9c756462 BL |
92 | /* musb CLKIN in Blackfin in MHZ */ |
93 | unsigned char clkin; | |
2ffcdb3b BW |
94 | #endif |
95 | ||
ca6d1b13 FB |
96 | }; |
97 | ||
550a7375 FB |
98 | struct musb_hdrc_platform_data { |
99 | /* MUSB_HOST, MUSB_PERIPHERAL, or MUSB_OTG */ | |
100 | u8 mode; | |
101 | ||
102 | /* for clk_get() */ | |
103 | const char *clock; | |
104 | ||
105 | /* (HOST or OTG) switch VBUS on/off */ | |
106 | int (*set_vbus)(struct device *dev, int is_on); | |
107 | ||
108 | /* (HOST or OTG) mA/2 power supplied on (default = 8mA) */ | |
109 | u8 power; | |
110 | ||
111 | /* (PERIPHERAL) mA/2 max power consumed (default = 100mA) */ | |
112 | u8 min_power; | |
113 | ||
114 | /* (HOST or OTG) msec/2 after VBUS on till power good */ | |
115 | u8 potpgt; | |
116 | ||
5fc4e779 AKG |
117 | /* (HOST or OTG) program PHY for external Vbus */ |
118 | unsigned extvbus:1; | |
119 | ||
550a7375 FB |
120 | /* Power the device on or off */ |
121 | int (*set_power)(int state); | |
122 | ||
ca6d1b13 FB |
123 | /* MUSB configuration-specific details */ |
124 | struct musb_hdrc_config *config; | |
884b8369 MM |
125 | |
126 | /* Architecture specific board data */ | |
127 | void *board_data; | |
f7ec9437 FB |
128 | |
129 | /* Platform specific struct musb_ops pointer */ | |
130 | const void *platform_ops; | |
550a7375 FB |
131 | }; |
132 | ||
133 | ||
134 | /* TUSB 6010 support */ | |
135 | ||
136 | #define TUSB6010_OSCCLK_60 16667 /* psec/clk @ 60.0 MHz */ | |
137 | #define TUSB6010_REFCLK_24 41667 /* psec/clk @ 24.0 MHz XI */ | |
138 | #define TUSB6010_REFCLK_19 52083 /* psec/clk @ 19.2 MHz CLKIN */ | |
139 | ||
140 | #ifdef CONFIG_ARCH_OMAP2 | |
141 | ||
142 | extern int __init tusb6010_setup_interface( | |
143 | struct musb_hdrc_platform_data *data, | |
144 | unsigned ps_refclk, unsigned waitpin, | |
145 | unsigned async_cs, unsigned sync_cs, | |
146 | unsigned irq, unsigned dmachan); | |
147 | ||
148 | extern int tusb6010_platform_retime(unsigned is_refclk); | |
149 | ||
150 | #endif /* OMAP2 */ | |
fbfc396e MG |
151 | |
152 | #endif /* __LINUX_USB_MUSB_H */ |