]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | #ifndef _X8664_DMA_MAPPING_H |
2 | #define _X8664_DMA_MAPPING_H 1 | |
3 | ||
4 | /* | |
5 | * IOMMU interface. See Documentation/DMA-mapping.txt and DMA-API.txt for | |
6 | * documentation. | |
7 | */ | |
8 | ||
1da177e4 LT |
9 | |
10 | #include <asm/scatterlist.h> | |
11 | #include <asm/io.h> | |
12 | #include <asm/swiotlb.h> | |
13 | ||
17a941d8 MBY |
14 | struct dma_mapping_ops { |
15 | int (*mapping_error)(dma_addr_t dma_addr); | |
16 | void* (*alloc_coherent)(struct device *dev, size_t size, | |
17 | dma_addr_t *dma_handle, gfp_t gfp); | |
18 | void (*free_coherent)(struct device *dev, size_t size, | |
19 | void *vaddr, dma_addr_t dma_handle); | |
20 | dma_addr_t (*map_single)(struct device *hwdev, void *ptr, | |
21 | size_t size, int direction); | |
22 | /* like map_single, but doesn't check the device mask */ | |
23 | dma_addr_t (*map_simple)(struct device *hwdev, char *ptr, | |
24 | size_t size, int direction); | |
25 | void (*unmap_single)(struct device *dev, dma_addr_t addr, | |
26 | size_t size, int direction); | |
27 | void (*sync_single_for_cpu)(struct device *hwdev, | |
28 | dma_addr_t dma_handle, size_t size, | |
29 | int direction); | |
30 | void (*sync_single_for_device)(struct device *hwdev, | |
31 | dma_addr_t dma_handle, size_t size, | |
32 | int direction); | |
33 | void (*sync_single_range_for_cpu)(struct device *hwdev, | |
34 | dma_addr_t dma_handle, unsigned long offset, | |
35 | size_t size, int direction); | |
36 | void (*sync_single_range_for_device)(struct device *hwdev, | |
37 | dma_addr_t dma_handle, unsigned long offset, | |
38 | size_t size, int direction); | |
39 | void (*sync_sg_for_cpu)(struct device *hwdev, | |
40 | struct scatterlist *sg, int nelems, | |
41 | int direction); | |
42 | void (*sync_sg_for_device)(struct device *hwdev, | |
43 | struct scatterlist *sg, int nelems, | |
44 | int direction); | |
45 | int (*map_sg)(struct device *hwdev, struct scatterlist *sg, | |
46 | int nents, int direction); | |
47 | void (*unmap_sg)(struct device *hwdev, | |
48 | struct scatterlist *sg, int nents, | |
49 | int direction); | |
50 | int (*dma_supported)(struct device *hwdev, u64 mask); | |
51 | int is_phys; | |
52 | }; | |
1da177e4 | 53 | |
17a941d8 MBY |
54 | extern dma_addr_t bad_dma_address; |
55 | extern struct dma_mapping_ops* dma_ops; | |
56 | extern int iommu_merge; | |
1da177e4 | 57 | |
17a941d8 MBY |
58 | static inline int dma_mapping_error(dma_addr_t dma_addr) |
59 | { | |
60 | if (dma_ops->mapping_error) | |
61 | return dma_ops->mapping_error(dma_addr); | |
1da177e4 | 62 | |
17a941d8 MBY |
63 | return (dma_addr == bad_dma_address); |
64 | } | |
1da177e4 | 65 | |
17a941d8 MBY |
66 | extern void *dma_alloc_coherent(struct device *dev, size_t size, |
67 | dma_addr_t *dma_handle, gfp_t gfp); | |
68 | extern void dma_free_coherent(struct device *dev, size_t size, void *vaddr, | |
69 | dma_addr_t dma_handle); | |
1da177e4 | 70 | |
17a941d8 MBY |
71 | static inline dma_addr_t |
72 | dma_map_single(struct device *hwdev, void *ptr, size_t size, | |
73 | int direction) | |
1da177e4 | 74 | { |
a3c042a0 | 75 | BUG_ON(!valid_dma_direction(direction)); |
17a941d8 | 76 | return dma_ops->map_single(hwdev, ptr, size, direction); |
1da177e4 LT |
77 | } |
78 | ||
17a941d8 MBY |
79 | static inline void |
80 | dma_unmap_single(struct device *dev, dma_addr_t addr,size_t size, | |
81 | int direction) | |
1da177e4 | 82 | { |
a3c042a0 | 83 | BUG_ON(!valid_dma_direction(direction)); |
17a941d8 | 84 | dma_ops->unmap_single(dev, addr, size, direction); |
1da177e4 LT |
85 | } |
86 | ||
1da177e4 LT |
87 | #define dma_map_page(dev,page,offset,size,dir) \ |
88 | dma_map_single((dev), page_address(page)+(offset), (size), (dir)) | |
89 | ||
17a941d8 | 90 | #define dma_unmap_page dma_unmap_single |
1da177e4 | 91 | |
17a941d8 MBY |
92 | static inline void |
93 | dma_sync_single_for_cpu(struct device *hwdev, dma_addr_t dma_handle, | |
94 | size_t size, int direction) | |
95 | { | |
a3c042a0 | 96 | BUG_ON(!valid_dma_direction(direction)); |
17a941d8 MBY |
97 | if (dma_ops->sync_single_for_cpu) |
98 | dma_ops->sync_single_for_cpu(hwdev, dma_handle, size, | |
99 | direction); | |
1da177e4 LT |
100 | flush_write_buffers(); |
101 | } | |
102 | ||
17a941d8 MBY |
103 | static inline void |
104 | dma_sync_single_for_device(struct device *hwdev, dma_addr_t dma_handle, | |
105 | size_t size, int direction) | |
1da177e4 | 106 | { |
a3c042a0 | 107 | BUG_ON(!valid_dma_direction(direction)); |
17a941d8 MBY |
108 | if (dma_ops->sync_single_for_device) |
109 | dma_ops->sync_single_for_device(hwdev, dma_handle, size, | |
110 | direction); | |
1da177e4 LT |
111 | flush_write_buffers(); |
112 | } | |
113 | ||
17a941d8 MBY |
114 | static inline void |
115 | dma_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dma_handle, | |
116 | unsigned long offset, size_t size, int direction) | |
8d15d19e | 117 | { |
a3c042a0 | 118 | BUG_ON(!valid_dma_direction(direction)); |
17a941d8 MBY |
119 | if (dma_ops->sync_single_range_for_cpu) { |
120 | dma_ops->sync_single_range_for_cpu(hwdev, dma_handle, offset, size, direction); | |
121 | } | |
8d15d19e JL |
122 | |
123 | flush_write_buffers(); | |
124 | } | |
125 | ||
17a941d8 MBY |
126 | static inline void |
127 | dma_sync_single_range_for_device(struct device *hwdev, dma_addr_t dma_handle, | |
128 | unsigned long offset, size_t size, int direction) | |
8d15d19e | 129 | { |
a3c042a0 | 130 | BUG_ON(!valid_dma_direction(direction)); |
17a941d8 MBY |
131 | if (dma_ops->sync_single_range_for_device) |
132 | dma_ops->sync_single_range_for_device(hwdev, dma_handle, | |
133 | offset, size, direction); | |
8d15d19e JL |
134 | |
135 | flush_write_buffers(); | |
136 | } | |
27183ebd | 137 | |
17a941d8 MBY |
138 | static inline void |
139 | dma_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg, | |
140 | int nelems, int direction) | |
1da177e4 | 141 | { |
a3c042a0 | 142 | BUG_ON(!valid_dma_direction(direction)); |
17a941d8 MBY |
143 | if (dma_ops->sync_sg_for_cpu) |
144 | dma_ops->sync_sg_for_cpu(hwdev, sg, nelems, direction); | |
1da177e4 LT |
145 | flush_write_buffers(); |
146 | } | |
147 | ||
17a941d8 MBY |
148 | static inline void |
149 | dma_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg, | |
150 | int nelems, int direction) | |
1da177e4 | 151 | { |
a3c042a0 | 152 | BUG_ON(!valid_dma_direction(direction)); |
17a941d8 MBY |
153 | if (dma_ops->sync_sg_for_device) { |
154 | dma_ops->sync_sg_for_device(hwdev, sg, nelems, direction); | |
155 | } | |
1da177e4 LT |
156 | |
157 | flush_write_buffers(); | |
158 | } | |
159 | ||
17a941d8 MBY |
160 | static inline int |
161 | dma_map_sg(struct device *hwdev, struct scatterlist *sg, int nents, int direction) | |
162 | { | |
a3c042a0 | 163 | BUG_ON(!valid_dma_direction(direction)); |
17a941d8 MBY |
164 | return dma_ops->map_sg(hwdev, sg, nents, direction); |
165 | } | |
1da177e4 | 166 | |
17a941d8 MBY |
167 | static inline void |
168 | dma_unmap_sg(struct device *hwdev, struct scatterlist *sg, int nents, | |
169 | int direction) | |
170 | { | |
a3c042a0 | 171 | BUG_ON(!valid_dma_direction(direction)); |
17a941d8 MBY |
172 | dma_ops->unmap_sg(hwdev, sg, nents, direction); |
173 | } | |
1da177e4 LT |
174 | |
175 | extern int dma_supported(struct device *hwdev, u64 mask); | |
1da177e4 | 176 | |
17a941d8 MBY |
177 | /* same for gart, swiotlb, and nommu */ |
178 | static inline int dma_get_cache_alignment(void) | |
1da177e4 | 179 | { |
17a941d8 | 180 | return boot_cpu_data.x86_clflush_size; |
1da177e4 LT |
181 | } |
182 | ||
17a941d8 MBY |
183 | #define dma_is_consistent(h) 1 |
184 | ||
185 | extern int dma_set_mask(struct device *dev, u64 mask); | |
186 | ||
187 | static inline void | |
188 | dma_cache_sync(void *vaddr, size_t size, enum dma_data_direction dir) | |
1da177e4 LT |
189 | { |
190 | flush_write_buffers(); | |
191 | } | |
192 | ||
17a941d8 MBY |
193 | extern struct device fallback_dev; |
194 | extern int panic_on_overflow; | |
195 | ||
196 | #endif /* _X8664_DMA_MAPPING_H */ |