[linux.git] / drivers / watchdog / at32ap700x_wdt.c

/*
 * Watchdog driver for Atmel AT32AP700X devices
 *
 * Copyright (C) 2005-2006 Atmel Corporation
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 *
 * Errata: WDT Clear is blocked after WDT Reset
 *
 * A watchdog timer event will, after reset, block writes to the WDT_CLEAR
 * register, preventing the program to clear the next Watchdog Timer Reset.
 *
 * If you still want to use the WDT after a WDT reset a small code can be
 * insterted at the startup checking the AVR32_PM.rcause register for WDT reset
 * and use a GPIO pin to reset the system. This method requires that one of the
 * GPIO pins are available and connected externally to the RESET_N pin. After
 * the GPIO pin has pulled down the reset line the GPIO will be reset and leave
 * the pin tristated with pullup.
 */

#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/miscdevice.h>
#include <linux/fs.h>
#include <linux/platform_device.h>
#include <linux/watchdog.h>
#include <linux/uaccess.h>
#include <linux/io.h>
#include <linux/spinlock.h>
#include <linux/slab.h>

#define TIMEOUT_MIN		1
#define TIMEOUT_MAX		2
#define TIMEOUT_DEFAULT		TIMEOUT_MAX

/* module parameters */
static int timeout =  TIMEOUT_DEFAULT;
module_param(timeout, int, 0);
MODULE_PARM_DESC(timeout,
		"Timeout value. Limited to be 1 or 2 seconds. (default="
		__MODULE_STRING(TIMEOUT_DEFAULT) ")");

static bool nowayout = WATCHDOG_NOWAYOUT;
module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
		__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");

/* Watchdog registers and write/read macro */
#define WDT_CTRL		0x00
#define WDT_CTRL_EN		   0
#define WDT_CTRL_PSEL		   8
#define WDT_CTRL_KEY		  24

#define WDT_CLR			0x04

#define WDT_RCAUSE		0x10
#define WDT_RCAUSE_POR		   0
#define WDT_RCAUSE_EXT		   2
#define WDT_RCAUSE_WDT		   3
#define WDT_RCAUSE_JTAG		   4
#define WDT_RCAUSE_SERP		   5

#define WDT_BIT(name)		(1 << WDT_##name)
#define WDT_BF(name, value)	((value) << WDT_##name)

#define wdt_readl(dev, reg)				\
	__raw_readl((dev)->regs + WDT_##reg)
#define wdt_writel(dev, reg, value)			\
	__raw_writel((value), (dev)->regs + WDT_##reg)

struct wdt_at32ap700x {
	void __iomem		*regs;
	spinlock_t		io_lock;
	int			timeout;
	int			boot_status;
	unsigned long		users;
	struct miscdevice	miscdev;
};

static struct wdt_at32ap700x *wdt;
static char expect_release;

/*
 * Disable the watchdog.
 */
static inline void at32_wdt_stop(void)
{
	unsigned long psel;

	spin_lock(&wdt->io_lock);
	psel = wdt_readl(wdt, CTRL) & WDT_BF(CTRL_PSEL, 0x0f);
	wdt_writel(wdt, CTRL, psel | WDT_BF(CTRL_KEY, 0x55));
	wdt_writel(wdt, CTRL, psel | WDT_BF(CTRL_KEY, 0xaa));
	spin_unlock(&wdt->io_lock);
}

/*
 * Enable and reset the watchdog.
 */
static inline void at32_wdt_start(void)
{
	/* 0xf is 2^16 divider = 2 sec, 0xe is 2^15 divider = 1 sec */
	unsigned long psel = (wdt->timeout > 1) ? 0xf : 0xe;

	spin_lock(&wdt->io_lock);
	wdt_writel(wdt, CTRL, WDT_BIT(CTRL_EN)
			| WDT_BF(CTRL_PSEL, psel)
			| WDT_BF(CTRL_KEY, 0x55));
	wdt_writel(wdt, CTRL, WDT_BIT(CTRL_EN)
			| WDT_BF(CTRL_PSEL, psel)
			| WDT_BF(CTRL_KEY, 0xaa));
	spin_unlock(&wdt->io_lock);
}

/*
 * Pat the watchdog timer.
 */
static inline void at32_wdt_pat(void)
{
	spin_lock(&wdt->io_lock);
	wdt_writel(wdt, CLR, 0x42);
	spin_unlock(&wdt->io_lock);
}

/*
 * Watchdog device is opened, and watchdog starts running.
 */
static int at32_wdt_open(struct inode *inode, struct file *file)
{
	if (test_and_set_bit(1, &wdt->users))
		return -EBUSY;

	at32_wdt_start();
	return nonseekable_open(inode, file);
}

/*
 * Close the watchdog device.
 */
static int at32_wdt_close(struct inode *inode, struct file *file)
{
	if (expect_release == 42) {
		at32_wdt_stop();
	} else {
		dev_dbg(wdt->miscdev.parent,
			"unexpected close, not stopping watchdog!\n");
		at32_wdt_pat();
	}
	clear_bit(1, &wdt->users);
	expect_release = 0;
	return 0;
}

/*
 * Change the watchdog time interval.
 */
static int at32_wdt_settimeout(int time)
{
	/*
	 * All counting occurs at 1 / SLOW_CLOCK (32 kHz) and max prescaler is
	 * 2 ^ 16 allowing up to 2 seconds timeout.
	 */
	if ((time < TIMEOUT_MIN) || (time > TIMEOUT_MAX))
		return -EINVAL;

	/*
	 * Set new watchdog time. It will be used when at32_wdt_start() is
	 * called.
	 */
	wdt->timeout = time;
	return 0;
}

/*
 * Get the watchdog status.
 */
static int at32_wdt_get_status(void)
{
	int rcause;
	int status = 0;

	rcause = wdt_readl(wdt, RCAUSE);

	switch (rcause) {
	case WDT_BIT(RCAUSE_EXT):
		status = WDIOF_EXTERN1;
		break;
	case WDT_BIT(RCAUSE_WDT):
		status = WDIOF_CARDRESET;
		break;
	case WDT_BIT(RCAUSE_POR):  /* fall through */
	case WDT_BIT(RCAUSE_JTAG): /* fall through */
	case WDT_BIT(RCAUSE_SERP): /* fall through */
	default:
		break;
	}

	return status;
}

static const struct watchdog_info at32_wdt_info = {
	.identity	= "at32ap700x watchdog",
	.options	= WDIOF_SETTIMEOUT |
			  WDIOF_KEEPALIVEPING |
			  WDIOF_MAGICCLOSE,
};

/*
 * Handle commands from user-space.
 */
static long at32_wdt_ioctl(struct file *file,
				unsigned int cmd, unsigned long arg)
{
	int ret = -ENOTTY;
	int time;
	void __user *argp = (void __user *)arg;
	int __user *p = argp;

	switch (cmd) {
	case WDIOC_GETSUPPORT:
		ret = copy_to_user(argp, &at32_wdt_info,
				sizeof(at32_wdt_info)) ? -EFAULT : 0;
		break;
	case WDIOC_GETSTATUS:
		ret = put_user(0, p);
		break;
	case WDIOC_GETBOOTSTATUS:
		ret = put_user(wdt->boot_status, p);
		break;
	case WDIOC_SETOPTIONS:
		ret = get_user(time, p);
		if (ret)
			break;
		if (time & WDIOS_DISABLECARD)
			at32_wdt_stop();
		if (time & WDIOS_ENABLECARD)
			at32_wdt_start();
		ret = 0;
		break;
	case WDIOC_KEEPALIVE:
		at32_wdt_pat();
		ret = 0;
		break;
	case WDIOC_SETTIMEOUT:
		ret = get_user(time, p);
		if (ret)
			break;
		ret = at32_wdt_settimeout(time);
		if (ret)
			break;
		/* Enable new time value */
		at32_wdt_start();
		/* fall through */
	case WDIOC_GETTIMEOUT:
		ret = put_user(wdt->timeout, p);
		break;
	}

	return ret;
}

static ssize_t at32_wdt_write(struct file *file, const char __user *data,
				size_t len, loff_t *ppos)
{
	/* See if we got the magic character 'V' and reload the timer */
	if (len) {
		if (!nowayout) {
			size_t i;

			/*
			 * note: just in case someone wrote the magic
			 * character five months ago...
			 */
			expect_release = 0;

			/*
			 * scan to see whether or not we got the magic
			 * character
			 */
			for (i = 0; i != len; i++) {
				char c;
				if (get_user(c, data + i))
					return -EFAULT;
				if (c == 'V')
					expect_release = 42;
			}
		}
		/* someone wrote to us, we should pat the watchdog */
		at32_wdt_pat();
	}
	return len;
}

static const struct file_operations at32_wdt_fops = {
	.owner		= THIS_MODULE,
	.llseek		= no_llseek,
	.unlocked_ioctl	= at32_wdt_ioctl,
	.open		= at32_wdt_open,
	.release	= at32_wdt_close,
	.write		= at32_wdt_write,
};

static int __init at32_wdt_probe(struct platform_device *pdev)
{
	struct resource	*regs;
	int ret;

	if (wdt) {
		dev_dbg(&pdev->dev, "only 1 wdt instance supported.\n");
		return -EBUSY;
	}

	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!regs) {
		dev_dbg(&pdev->dev, "missing mmio resource\n");
		return -ENXIO;
	}

	wdt = devm_kzalloc(&pdev->dev, sizeof(struct wdt_at32ap700x),
			GFP_KERNEL);
	if (!wdt) {
		dev_dbg(&pdev->dev, "no memory for wdt structure\n");
		return -ENOMEM;
	}

	wdt->regs = devm_ioremap(&pdev->dev, regs->start, resource_size(regs));
	if (!wdt->regs) {
		ret = -ENOMEM;
		dev_dbg(&pdev->dev, "could not map I/O memory\n");
		goto err_free;
	}

	spin_lock_init(&wdt->io_lock);
	wdt->boot_status = at32_wdt_get_status();

	/* Work-around for watchdog silicon errata. */
	if (wdt->boot_status & WDIOF_CARDRESET) {
		dev_info(&pdev->dev, "CPU must be reset with external "
				"reset or POR due to silicon errata.\n");
		ret = -EIO;
		goto err_free;
	} else {
		wdt->users = 0;
	}

	wdt->miscdev.minor	= WATCHDOG_MINOR;
	wdt->miscdev.name	= "watchdog";
	wdt->miscdev.fops	= &at32_wdt_fops;
	wdt->miscdev.parent	= &pdev->dev;

	platform_set_drvdata(pdev, wdt);

	if (at32_wdt_settimeout(timeout)) {
		at32_wdt_settimeout(TIMEOUT_DEFAULT);
		dev_dbg(&pdev->dev,
			"default timeout invalid, set to %d sec.\n",
			TIMEOUT_DEFAULT);
	}

	ret = misc_register(&wdt->miscdev);
	if (ret) {
		dev_dbg(&pdev->dev, "failed to register wdt miscdev\n");
		goto err_free;
	}

	dev_info(&pdev->dev,
		"AT32AP700X WDT at 0x%p, timeout %d sec (nowayout=%d)\n",
		wdt->regs, wdt->timeout, nowayout);

	return 0;

err_free:
	wdt = NULL;
	return ret;
}

static int __exit at32_wdt_remove(struct platform_device *pdev)
{
	if (wdt && platform_get_drvdata(pdev) == wdt) {
		/* Stop the timer before we leave */
		if (!nowayout)
			at32_wdt_stop();

		misc_deregister(&wdt->miscdev);
		wdt = NULL;
	}
	return 0;
}

static void at32_wdt_shutdown(struct platform_device *pdev)
{
	at32_wdt_stop();
}

#ifdef CONFIG_PM
static int at32_wdt_suspend(struct platform_device *pdev, pm_message_t message)
{
	at32_wdt_stop();
	return 0;
}

static int at32_wdt_resume(struct platform_device *pdev)
{
	if (wdt->users)
		at32_wdt_start();
	return 0;
}
#else
#define at32_wdt_suspend NULL
#define at32_wdt_resume NULL
#endif

/* work with hotplug and coldplug */
MODULE_ALIAS("platform:at32_wdt");

static struct platform_driver at32_wdt_driver = {
	.remove		= __exit_p(at32_wdt_remove),
	.suspend	= at32_wdt_suspend,
	.resume		= at32_wdt_resume,
	.driver		= {
		.name	= "at32_wdt",
		.owner	= THIS_MODULE,
	},
	.shutdown	= at32_wdt_shutdown,
};

module_platform_driver_probe(at32_wdt_driver, at32_wdt_probe);

MODULE_AUTHOR("Hans-Christian Egtvedt <[email protected]>");
MODULE_DESCRIPTION("Watchdog driver for Atmel AT32AP700X");
MODULE_LICENSE("GPL");
MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
Commit	Line	Data
a9cb3959 HCE	1	/*
	2	* Watchdog driver for Atmel AT32AP700X devices
	3	*
	4	* Copyright (C) 2005-2006 Atmel Corporation
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
bb133450 HCE	9	*
	10	*
	11	* Errata: WDT Clear is blocked after WDT Reset
	12	*
	13	* A watchdog timer event will, after reset, block writes to the WDT_CLEAR
	14	* register, preventing the program to clear the next Watchdog Timer Reset.
	15	*
	16	* If you still want to use the WDT after a WDT reset a small code can be
	17	* insterted at the startup checking the AVR32_PM.rcause register for WDT reset
	18	* and use a GPIO pin to reset the system. This method requires that one of the
	19	* GPIO pins are available and connected externally to the RESET_N pin. After
	20	* the GPIO pin has pulled down the reset line the GPIO will be reset and leave
	21	* the pin tristated with pullup.
a9cb3959 HCE	22	*/
	23
	24	#include <linux/init.h>
	25	#include <linux/kernel.h>
	26	#include <linux/module.h>
	27	#include <linux/moduleparam.h>
	28	#include <linux/miscdevice.h>
	29	#include <linux/fs.h>
	30	#include <linux/platform_device.h>
	31	#include <linux/watchdog.h>
c37f2713 AM	32	#include <linux/uaccess.h>
c37f2713 AM	33	#include <linux/io.h>
e75e6577	34	#include <linux/spinlock.h>
5a0e3ad6	35	#include <linux/slab.h>
a9cb3959 HCE	36
a9cb3959 HCE	37	#define TIMEOUT_MIN 1
a9cb3959	38	#define TIMEOUT_MAX 2
726c9f61 WVS	39	#define TIMEOUT_DEFAULT TIMEOUT_MAX
	40
	41	/* module parameters */
	42	static int timeout = TIMEOUT_DEFAULT;
	43	module_param(timeout, int, 0);
	44	MODULE_PARM_DESC(timeout,
	45	"Timeout value. Limited to be 1 or 2 seconds. (default="
	46	__MODULE_STRING(TIMEOUT_DEFAULT) ")");
a9cb3959	47
86a1e189 WVS	48	static bool nowayout = WATCHDOG_NOWAYOUT;
86a1e189 WVS	49	module_param(nowayout, bool, 0);
28401140 WVS	50	MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
	51	__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
	52
a9cb3959 HCE	53	/* Watchdog registers and write/read macro */
	54	#define WDT_CTRL 0x00
	55	#define WDT_CTRL_EN 0
	56	#define WDT_CTRL_PSEL 8
	57	#define WDT_CTRL_KEY 24
	58
	59	#define WDT_CLR 0x04
	60
bb133450 HCE	61	#define WDT_RCAUSE 0x10
	62	#define WDT_RCAUSE_POR 0
	63	#define WDT_RCAUSE_EXT 2
	64	#define WDT_RCAUSE_WDT 3
	65	#define WDT_RCAUSE_JTAG 4
	66	#define WDT_RCAUSE_SERP 5
	67
a9cb3959	68	#define WDT_BIT(name) (1 << WDT_##name)
c0ead7e0	69	#define WDT_BF(name, value) ((value) << WDT_##name)
a9cb3959	70
c0ead7e0	71	#define wdt_readl(dev, reg) \
a9cb3959	72	__raw_readl((dev)->regs + WDT_##reg)
c0ead7e0	73	#define wdt_writel(dev, reg, value) \
a9cb3959 HCE	74	__raw_writel((value), (dev)->regs + WDT_##reg)
	75
	76	struct wdt_at32ap700x {
	77	void __iomem *regs;
e75e6577	78	spinlock_t io_lock;
a9cb3959	79	int timeout;
bb133450	80	int boot_status;
7e2a1498	81	unsigned long users;
a9cb3959 HCE	82	struct miscdevice miscdev;
	83	};
	84
	85	static struct wdt_at32ap700x *wdt;
28401140	86	static char expect_release;
a9cb3959 HCE	87
	88	/*
	89	* Disable the watchdog.
	90	*/
c0ead7e0	91	static inline void at32_wdt_stop(void)
a9cb3959	92	{
7e2a1498 WVS	93	unsigned long psel;
7e2a1498 WVS	94
e75e6577	95	spin_lock(&wdt->io_lock);
7e2a1498	96	psel = wdt_readl(wdt, CTRL) & WDT_BF(CTRL_PSEL, 0x0f);
a9cb3959 HCE	97	wdt_writel(wdt, CTRL, psel \| WDT_BF(CTRL_KEY, 0x55));
a9cb3959 HCE	98	wdt_writel(wdt, CTRL, psel \| WDT_BF(CTRL_KEY, 0xaa));
e75e6577	99	spin_unlock(&wdt->io_lock);
a9cb3959 HCE	100	}
	101
	102	/*
	103	* Enable and reset the watchdog.
	104	*/
c0ead7e0	105	static inline void at32_wdt_start(void)
a9cb3959 HCE	106	{
	107	/* 0xf is 2^16 divider = 2 sec, 0xe is 2^15 divider = 1 sec */
	108	unsigned long psel = (wdt->timeout > 1) ? 0xf : 0xe;
	109
e75e6577	110	spin_lock(&wdt->io_lock);
a9cb3959 HCE	111	wdt_writel(wdt, CTRL, WDT_BIT(CTRL_EN)
	112	\| WDT_BF(CTRL_PSEL, psel)
	113	\| WDT_BF(CTRL_KEY, 0x55));
	114	wdt_writel(wdt, CTRL, WDT_BIT(CTRL_EN)
	115	\| WDT_BF(CTRL_PSEL, psel)
	116	\| WDT_BF(CTRL_KEY, 0xaa));
e75e6577	117	spin_unlock(&wdt->io_lock);
a9cb3959 HCE	118	}
	119
	120	/*
	121	* Pat the watchdog timer.
	122	*/
c0ead7e0	123	static inline void at32_wdt_pat(void)
a9cb3959	124	{
e75e6577	125	spin_lock(&wdt->io_lock);
a9cb3959	126	wdt_writel(wdt, CLR, 0x42);
e75e6577	127	spin_unlock(&wdt->io_lock);
a9cb3959 HCE	128	}
	129
	130	/*
	131	* Watchdog device is opened, and watchdog starts running.
	132	*/
	133	static int at32_wdt_open(struct inode inode, struct file file)
	134	{
	135	if (test_and_set_bit(1, &wdt->users))
	136	return -EBUSY;
	137
	138	at32_wdt_start();
	139	return nonseekable_open(inode, file);
	140	}
	141
	142	/*
28401140	143	* Close the watchdog device.
a9cb3959 HCE	144	*/
	145	static int at32_wdt_close(struct inode inode, struct file file)
	146	{
28401140 WVS	147	if (expect_release == 42) {
	148	at32_wdt_stop();
	149	} else {
	150	dev_dbg(wdt->miscdev.parent,
bb133450	151	"unexpected close, not stopping watchdog!\n");
28401140 WVS	152	at32_wdt_pat();
28401140 WVS	153	}
a9cb3959	154	clear_bit(1, &wdt->users);
28401140	155	expect_release = 0;
a9cb3959 HCE	156	return 0;
	157	}
	158
	159	/*
	160	* Change the watchdog time interval.
	161	*/
	162	static int at32_wdt_settimeout(int time)
	163	{
	164	/*
	165	* All counting occurs at 1 / SLOW_CLOCK (32 kHz) and max prescaler is
	166	* 2 ^ 16 allowing up to 2 seconds timeout.
	167	*/
	168	if ((time < TIMEOUT_MIN) \|\| (time > TIMEOUT_MAX))
	169	return -EINVAL;
	170
c37f2713 AM	171	/*
	172	* Set new watchdog time. It will be used when at32_wdt_start() is
	173	* called.
	174	*/
a9cb3959 HCE	175	wdt->timeout = time;
	176	return 0;
	177	}
	178
bb133450 HCE	179	/*
	180	* Get the watchdog status.
	181	*/
	182	static int at32_wdt_get_status(void)
	183	{
	184	int rcause;
	185	int status = 0;
	186
	187	rcause = wdt_readl(wdt, RCAUSE);
	188
	189	switch (rcause) {
	190	case WDT_BIT(RCAUSE_EXT):
	191	status = WDIOF_EXTERN1;
	192	break;
	193	case WDT_BIT(RCAUSE_WDT):
	194	status = WDIOF_CARDRESET;
	195	break;
	196	case WDT_BIT(RCAUSE_POR): /* fall through */
	197	case WDT_BIT(RCAUSE_JTAG): /* fall through */
	198	case WDT_BIT(RCAUSE_SERP): /* fall through */
	199	default:
	200	break;
	201	}
	202
	203	return status;
	204	}
	205
42747d71	206	static const struct watchdog_info at32_wdt_info = {
a9cb3959	207	.identity = "at32ap700x watchdog",
28401140 WVS	208	.options = WDIOF_SETTIMEOUT \|
	209	WDIOF_KEEPALIVEPING \|
	210	WDIOF_MAGICCLOSE,
a9cb3959 HCE	211	};
	212
	213	/*
	214	* Handle commands from user-space.
	215	*/
a6be8e5f AC	216	static long at32_wdt_ioctl(struct file *file,
a6be8e5f AC	217	unsigned int cmd, unsigned long arg)
a9cb3959 HCE	218	{
	219	int ret = -ENOTTY;
	220	int time;
	221	void __user argp = (void __user )arg;
	222	int __user *p = argp;
	223
c37f2713	224	switch (cmd) {
a9cb3959 HCE	225	case WDIOC_GETSUPPORT:
	226	ret = copy_to_user(argp, &at32_wdt_info,
	227	sizeof(at32_wdt_info)) ? -EFAULT : 0;
	228	break;
bb133450	229	case WDIOC_GETSTATUS:
a9cb3959 HCE	230	ret = put_user(0, p);
a9cb3959 HCE	231	break;
bb133450 HCE	232	case WDIOC_GETBOOTSTATUS:
	233	ret = put_user(wdt->boot_status, p);
	234	break;
a9cb3959 HCE	235	case WDIOC_SETOPTIONS:
	236	ret = get_user(time, p);
	237	if (ret)
	238	break;
	239	if (time & WDIOS_DISABLECARD)
	240	at32_wdt_stop();
	241	if (time & WDIOS_ENABLECARD)
	242	at32_wdt_start();
	243	ret = 0;
	244	break;
0c06090c WVS	245	case WDIOC_KEEPALIVE:
	246	at32_wdt_pat();
	247	ret = 0;
	248	break;
	249	case WDIOC_SETTIMEOUT:
	250	ret = get_user(time, p);
	251	if (ret)
	252	break;
	253	ret = at32_wdt_settimeout(time);
	254	if (ret)
	255	break;
	256	/* Enable new time value */
	257	at32_wdt_start();
	258	/* fall through */
	259	case WDIOC_GETTIMEOUT:
	260	ret = put_user(wdt->timeout, p);
	261	break;
a9cb3959 HCE	262	}
	263
	264	return ret;
	265	}
	266
28401140 WVS	267	static ssize_t at32_wdt_write(struct file file, const char __user data,
28401140 WVS	268	size_t len, loff_t *ppos)
a9cb3959	269	{
28401140 WVS	270	/* See if we got the magic character 'V' and reload the timer */
	271	if (len) {
	272	if (!nowayout) {
	273	size_t i;
	274
	275	/*
	276	* note: just in case someone wrote the magic
	277	* character five months ago...
	278	*/
	279	expect_release = 0;
	280
	281	/*
	282	* scan to see whether or not we got the magic
	283	* character
	284	*/
	285	for (i = 0; i != len; i++) {
	286	char c;
7944d3a5	287	if (get_user(c, data + i))
28401140 WVS	288	return -EFAULT;
	289	if (c == 'V')
	290	expect_release = 42;
	291	}
	292	}
	293	/* someone wrote to us, we should pat the watchdog */
	294	at32_wdt_pat();
	295	}
a9cb3959 HCE	296	return len;
	297	}
	298
	299	static const struct file_operations at32_wdt_fops = {
	300	.owner = THIS_MODULE,
	301	.llseek = no_llseek,
a6be8e5f	302	.unlocked_ioctl = at32_wdt_ioctl,
a9cb3959 HCE	303	.open = at32_wdt_open,
	304	.release = at32_wdt_close,
	305	.write = at32_wdt_write,
	306	};
	307
	308	static int __init at32_wdt_probe(struct platform_device *pdev)
	309	{
	310	struct resource *regs;
	311	int ret;
	312
	313	if (wdt) {
	314	dev_dbg(&pdev->dev, "only 1 wdt instance supported.\n");
	315	return -EBUSY;
	316	}
	317
	318	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	319	if (!regs) {
	320	dev_dbg(&pdev->dev, "missing mmio resource\n");
	321	return -ENXIO;
	322	}
	323
a7960784 JH	324	wdt = devm_kzalloc(&pdev->dev, sizeof(struct wdt_at32ap700x),
a7960784 JH	325	GFP_KERNEL);
a9cb3959 HCE	326	if (!wdt) {
	327	dev_dbg(&pdev->dev, "no memory for wdt structure\n");
	328	return -ENOMEM;
	329	}
	330
a7960784	331	wdt->regs = devm_ioremap(&pdev->dev, regs->start, resource_size(regs));
47d17763 HCE	332	if (!wdt->regs) {
	333	ret = -ENOMEM;
	334	dev_dbg(&pdev->dev, "could not map I/O memory\n");
	335	goto err_free;
	336	}
bb133450	337
e75e6577	338	spin_lock_init(&wdt->io_lock);
bb133450 HCE	339	wdt->boot_status = at32_wdt_get_status();
	340
	341	/* Work-around for watchdog silicon errata. */
	342	if (wdt->boot_status & WDIOF_CARDRESET) {
	343	dev_info(&pdev->dev, "CPU must be reset with external "
	344	"reset or POR due to silicon errata.\n");
	345	ret = -EIO;
a7960784	346	goto err_free;
bb133450 HCE	347	} else {
	348	wdt->users = 0;
	349	}
f1f5bda4 HCE	350
	351	wdt->miscdev.minor = WATCHDOG_MINOR;
	352	wdt->miscdev.name = "watchdog";
	353	wdt->miscdev.fops = &at32_wdt_fops;
	354	wdt->miscdev.parent = &pdev->dev;
	355
	356	platform_set_drvdata(pdev, wdt);
a9cb3959	357
726c9f61 WVS	358	if (at32_wdt_settimeout(timeout)) {
726c9f61 WVS	359	at32_wdt_settimeout(TIMEOUT_DEFAULT);
a9cb3959 HCE	360	dev_dbg(&pdev->dev,
a9cb3959 HCE	361	"default timeout invalid, set to %d sec.\n",
726c9f61	362	TIMEOUT_DEFAULT);
a9cb3959 HCE	363	}
	364
	365	ret = misc_register(&wdt->miscdev);
	366	if (ret) {
	367	dev_dbg(&pdev->dev, "failed to register wdt miscdev\n");
321e3123	368	goto err_free;
a9cb3959 HCE	369	}
a9cb3959 HCE	370
28401140 WVS	371	dev_info(&pdev->dev,
	372	"AT32AP700X WDT at 0x%p, timeout %d sec (nowayout=%d)\n",
	373	wdt->regs, wdt->timeout, nowayout);
a9cb3959 HCE	374
	375	return 0;
	376
47d17763	377	err_free:
a9cb3959 HCE	378	wdt = NULL;
	379	return ret;
	380	}
	381
	382	static int __exit at32_wdt_remove(struct platform_device *pdev)
	383	{
	384	if (wdt && platform_get_drvdata(pdev) == wdt) {
28401140 WVS	385	/* Stop the timer before we leave */
	386	if (!nowayout)
	387	at32_wdt_stop();
	388
a9cb3959	389	misc_deregister(&wdt->miscdev);
a9cb3959	390	wdt = NULL;
a9cb3959	391	}
a9cb3959 HCE	392	return 0;
	393	}
	394
	395	static void at32_wdt_shutdown(struct platform_device *pdev)
	396	{
	397	at32_wdt_stop();
	398	}
	399
	400	#ifdef CONFIG_PM
	401	static int at32_wdt_suspend(struct platform_device *pdev, pm_message_t message)
	402	{
	403	at32_wdt_stop();
	404	return 0;
	405	}
	406
	407	static int at32_wdt_resume(struct platform_device *pdev)
	408	{
	409	if (wdt->users)
	410	at32_wdt_start();
	411	return 0;
	412	}
97a2a2ea AM	413	#else
	414	#define at32_wdt_suspend NULL
	415	#define at32_wdt_resume NULL
a9cb3959 HCE	416	#endif
a9cb3959 HCE	417
f37d193c KS	418	/* work with hotplug and coldplug */
	419	MODULE_ALIAS("platform:at32_wdt");
	420
a9cb3959 HCE	421	static struct platform_driver at32_wdt_driver = {
a9cb3959 HCE	422	.remove = __exit_p(at32_wdt_remove),
a9cb3959 HCE	423	.suspend = at32_wdt_suspend,
a9cb3959 HCE	424	.resume = at32_wdt_resume,
a9cb3959 HCE	425	.driver = {
	426	.name = "at32_wdt",
	427	.owner = THIS_MODULE,
	428	},
	429	.shutdown = at32_wdt_shutdown,
	430	};
	431
1cb9204c	432	module_platform_driver_probe(at32_wdt_driver, at32_wdt_probe);
a9cb3959	433
aeb0aea1	434	MODULE_AUTHOR("Hans-Christian Egtvedt <[email protected]>");
a9cb3959 HCE	435	MODULE_DESCRIPTION("Watchdog driver for Atmel AT32AP700X");
	436	MODULE_LICENSE("GPL");
	437	MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);