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ASoC: wm_adsp: Replace debugfs lock with more general DSP power lock
[linux.git] / sound / soc / codecs / wm_adsp.c
CommitLineData
2159ad93
MB		 1/*
2 * wm_adsp.c -- Wolfson ADSP support
3 *
4 * Copyright 2012 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <[email protected]>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/firmware.h>
cf17c83c 18#include <linux/list.h>
2159ad93
MB		 19#include <linux/pm.h>
20#include <linux/pm_runtime.h>
21#include <linux/regmap.h>
973838a0 22#include <linux/regulator/consumer.h>
2159ad93 23#include <linux/slab.h>
cdcd7f72 24#include <linux/vmalloc.h>
6ab2b7b4 25#include <linux/workqueue.h>
f9f55e31 26#include <linux/debugfs.h>
2159ad93
MB		 27#include <sound/core.h>
28#include <sound/pcm.h>
29#include <sound/pcm_params.h>
30#include <sound/soc.h>
31#include <sound/jack.h>
32#include <sound/initval.h>
33#include <sound/tlv.h>
34
35#include <linux/mfd/arizona/registers.h>
36
dc91428a 37#include "arizona.h"
2159ad93
MB		 38#include "wm_adsp.h"
39
40#define adsp_crit(_dsp, fmt, ...) \
41 dev_crit(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
42#define adsp_err(_dsp, fmt, ...) \
43 dev_err(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
44#define adsp_warn(_dsp, fmt, ...) \
45 dev_warn(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
46#define adsp_info(_dsp, fmt, ...) \
47 dev_info(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
48#define adsp_dbg(_dsp, fmt, ...) \
49 dev_dbg(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
50
51#define ADSP1_CONTROL_1 0x00
52#define ADSP1_CONTROL_2 0x02
53#define ADSP1_CONTROL_3 0x03
54#define ADSP1_CONTROL_4 0x04
55#define ADSP1_CONTROL_5 0x06
56#define ADSP1_CONTROL_6 0x07
57#define ADSP1_CONTROL_7 0x08
58#define ADSP1_CONTROL_8 0x09
59#define ADSP1_CONTROL_9 0x0A
60#define ADSP1_CONTROL_10 0x0B
61#define ADSP1_CONTROL_11 0x0C
62#define ADSP1_CONTROL_12 0x0D
63#define ADSP1_CONTROL_13 0x0F
64#define ADSP1_CONTROL_14 0x10
65#define ADSP1_CONTROL_15 0x11
66#define ADSP1_CONTROL_16 0x12
67#define ADSP1_CONTROL_17 0x13
68#define ADSP1_CONTROL_18 0x14
69#define ADSP1_CONTROL_19 0x16
70#define ADSP1_CONTROL_20 0x17
71#define ADSP1_CONTROL_21 0x18
72#define ADSP1_CONTROL_22 0x1A
73#define ADSP1_CONTROL_23 0x1B
74#define ADSP1_CONTROL_24 0x1C
75#define ADSP1_CONTROL_25 0x1E
76#define ADSP1_CONTROL_26 0x20
77#define ADSP1_CONTROL_27 0x21
78#define ADSP1_CONTROL_28 0x22
79#define ADSP1_CONTROL_29 0x23
80#define ADSP1_CONTROL_30 0x24
81#define ADSP1_CONTROL_31 0x26
82
83/*
84 * ADSP1 Control 19
85 */
86#define ADSP1_WDMA_BUFFER_LENGTH_MASK 0x00FF /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
87#define ADSP1_WDMA_BUFFER_LENGTH_SHIFT 0 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
88#define ADSP1_WDMA_BUFFER_LENGTH_WIDTH 8 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
89
90
91/*
92 * ADSP1 Control 30
93 */
94#define ADSP1_DBG_CLK_ENA 0x0008 /* DSP1_DBG_CLK_ENA */
95#define ADSP1_DBG_CLK_ENA_MASK 0x0008 /* DSP1_DBG_CLK_ENA */
96#define ADSP1_DBG_CLK_ENA_SHIFT 3 /* DSP1_DBG_CLK_ENA */
97#define ADSP1_DBG_CLK_ENA_WIDTH 1 /* DSP1_DBG_CLK_ENA */
98#define ADSP1_SYS_ENA 0x0004 /* DSP1_SYS_ENA */
99#define ADSP1_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */
100#define ADSP1_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */
101#define ADSP1_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */
102#define ADSP1_CORE_ENA 0x0002 /* DSP1_CORE_ENA */
103#define ADSP1_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */
104#define ADSP1_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */
105#define ADSP1_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */
106#define ADSP1_START 0x0001 /* DSP1_START */
107#define ADSP1_START_MASK 0x0001 /* DSP1_START */
108#define ADSP1_START_SHIFT 0 /* DSP1_START */
109#define ADSP1_START_WIDTH 1 /* DSP1_START */
110
94e205bf
CR		 111/*
112 * ADSP1 Control 31
113 */
114#define ADSP1_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */
115#define ADSP1_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */
116#define ADSP1_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */
117
2d30b575
MB		 118#define ADSP2_CONTROL 0x0
119#define ADSP2_CLOCKING 0x1
120#define ADSP2_STATUS1 0x4
121#define ADSP2_WDMA_CONFIG_1 0x30
122#define ADSP2_WDMA_CONFIG_2 0x31
123#define ADSP2_RDMA_CONFIG_1 0x34
2159ad93 124
10337b07
RF		 125#define ADSP2_SCRATCH0 0x40
126#define ADSP2_SCRATCH1 0x41
127#define ADSP2_SCRATCH2 0x42
128#define ADSP2_SCRATCH3 0x43
129
2159ad93
MB		 130/*
131 * ADSP2 Control
132 */
133
134#define ADSP2_MEM_ENA 0x0010 /* DSP1_MEM_ENA */
135#define ADSP2_MEM_ENA_MASK 0x0010 /* DSP1_MEM_ENA */
136#define ADSP2_MEM_ENA_SHIFT 4 /* DSP1_MEM_ENA */
137#define ADSP2_MEM_ENA_WIDTH 1 /* DSP1_MEM_ENA */
138#define ADSP2_SYS_ENA 0x0004 /* DSP1_SYS_ENA */
139#define ADSP2_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */
140#define ADSP2_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */
141#define ADSP2_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */
142#define ADSP2_CORE_ENA 0x0002 /* DSP1_CORE_ENA */
143#define ADSP2_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */
144#define ADSP2_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */
145#define ADSP2_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */
146#define ADSP2_START 0x0001 /* DSP1_START */
147#define ADSP2_START_MASK 0x0001 /* DSP1_START */
148#define ADSP2_START_SHIFT 0 /* DSP1_START */
149#define ADSP2_START_WIDTH 1 /* DSP1_START */
150
973838a0
MB		 151/*
152 * ADSP2 clocking
153 */
154#define ADSP2_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */
155#define ADSP2_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */
156#define ADSP2_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */
157
2159ad93
MB		 158/*
159 * ADSP2 Status 1
160 */
161#define ADSP2_RAM_RDY 0x0001
162#define ADSP2_RAM_RDY_MASK 0x0001
163#define ADSP2_RAM_RDY_SHIFT 0
164#define ADSP2_RAM_RDY_WIDTH 1
165
cf17c83c
MB		 166struct wm_adsp_buf {
167 struct list_head list;
168 void *buf;
169};
170
171static struct wm_adsp_buf *wm_adsp_buf_alloc(const void *src, size_t len,
172 struct list_head *list)
173{
174 struct wm_adsp_buf *buf = kzalloc(sizeof(*buf), GFP_KERNEL);
175
176 if (buf == NULL)
177 return NULL;
178
cdcd7f72 179 buf->buf = vmalloc(len);
cf17c83c 180 if (!buf->buf) {
cdcd7f72 181 vfree(buf);
cf17c83c
MB		 182 return NULL;
183 }
cdcd7f72 184 memcpy(buf->buf, src, len);
cf17c83c
MB		 185
186 if (list)
187 list_add_tail(&buf->list, list);
188
189 return buf;
190}
191
192static void wm_adsp_buf_free(struct list_head *list)
193{
194 while (!list_empty(list)) {
195 struct wm_adsp_buf *buf = list_first_entry(list,
196 struct wm_adsp_buf,
197 list);
198 list_del(&buf->list);
cdcd7f72 199 vfree(buf->buf);
cf17c83c
MB		 200 kfree(buf);
201 }
202}
203
04d1300f
CK		 204#define WM_ADSP_FW_MBC_VSS 0
205#define WM_ADSP_FW_HIFI 1
206#define WM_ADSP_FW_TX 2
207#define WM_ADSP_FW_TX_SPK 3
208#define WM_ADSP_FW_RX 4
209#define WM_ADSP_FW_RX_ANC 5
210#define WM_ADSP_FW_CTRL 6
211#define WM_ADSP_FW_ASR 7
212#define WM_ADSP_FW_TRACE 8
213#define WM_ADSP_FW_SPK_PROT 9
214#define WM_ADSP_FW_MISC 10
215
216#define WM_ADSP_NUM_FW 11
dd84f925 217
1023dbd9 218static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = {
04d1300f
CK		 219 [WM_ADSP_FW_MBC_VSS] = "MBC/VSS",
220 [WM_ADSP_FW_HIFI] = "MasterHiFi",
221 [WM_ADSP_FW_TX] = "Tx",
222 [WM_ADSP_FW_TX_SPK] = "Tx Speaker",
223 [WM_ADSP_FW_RX] = "Rx",
224 [WM_ADSP_FW_RX_ANC] = "Rx ANC",
225 [WM_ADSP_FW_CTRL] = "Voice Ctrl",
226 [WM_ADSP_FW_ASR] = "ASR Assist",
227 [WM_ADSP_FW_TRACE] = "Dbg Trace",
228 [WM_ADSP_FW_SPK_PROT] = "Protection",
229 [WM_ADSP_FW_MISC] = "Misc",
1023dbd9
MB		 230};
231
232static struct {
233 const char *file;
234} wm_adsp_fw[WM_ADSP_NUM_FW] = {
04d1300f
CK		 235 [WM_ADSP_FW_MBC_VSS] = { .file = "mbc-vss" },
236 [WM_ADSP_FW_HIFI] = { .file = "hifi" },
237 [WM_ADSP_FW_TX] = { .file = "tx" },
238 [WM_ADSP_FW_TX_SPK] = { .file = "tx-spk" },
239 [WM_ADSP_FW_RX] = { .file = "rx" },
240 [WM_ADSP_FW_RX_ANC] = { .file = "rx-anc" },
241 [WM_ADSP_FW_CTRL] = { .file = "ctrl" },
242 [WM_ADSP_FW_ASR] = { .file = "asr" },
243 [WM_ADSP_FW_TRACE] = { .file = "trace" },
244 [WM_ADSP_FW_SPK_PROT] = { .file = "spk-prot" },
245 [WM_ADSP_FW_MISC] = { .file = "misc" },
1023dbd9
MB		 246};
247
6ab2b7b4
DP		 248struct wm_coeff_ctl_ops {
249 int (*xget)(struct snd_kcontrol *kcontrol,
250 struct snd_ctl_elem_value *ucontrol);
251 int (*xput)(struct snd_kcontrol *kcontrol,
252 struct snd_ctl_elem_value *ucontrol);
253 int (*xinfo)(struct snd_kcontrol *kcontrol,
254 struct snd_ctl_elem_info *uinfo);
255};
256
6ab2b7b4
DP		 257struct wm_coeff_ctl {
258 const char *name;
2323736d 259 const char *fw_name;
3809f001 260 struct wm_adsp_alg_region alg_region;
6ab2b7b4 261 struct wm_coeff_ctl_ops ops;
3809f001 262 struct wm_adsp *dsp;
6ab2b7b4
DP		 263 unsigned int enabled:1;
264 struct list_head list;
265 void *cache;
2323736d 266 unsigned int offset;
6ab2b7b4 267 size_t len;
0c2e3f34 268 unsigned int set:1;
6ab2b7b4 269 struct snd_kcontrol *kcontrol;
26c22a19 270 unsigned int flags;
6ab2b7b4
DP		 271};
272
f9f55e31
RF		 273#ifdef CONFIG_DEBUG_FS
274static void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp, const char *s)
275{
276 char *tmp = kasprintf(GFP_KERNEL, "%s\n", s);
277
f9f55e31
RF		 278 kfree(dsp->wmfw_file_name);
279 dsp->wmfw_file_name = tmp;
f9f55e31
RF		 280}
281
282static void wm_adsp_debugfs_save_binname(struct wm_adsp *dsp, const char *s)
283{
284 char *tmp = kasprintf(GFP_KERNEL, "%s\n", s);
285
f9f55e31
RF		 286 kfree(dsp->bin_file_name);
287 dsp->bin_file_name = tmp;
f9f55e31
RF		 288}
289
290static void wm_adsp_debugfs_clear(struct wm_adsp *dsp)
291{
f9f55e31
RF		 292 kfree(dsp->wmfw_file_name);
293 kfree(dsp->bin_file_name);
294 dsp->wmfw_file_name = NULL;
295 dsp->bin_file_name = NULL;
f9f55e31
RF		 296}
297
298static ssize_t wm_adsp_debugfs_wmfw_read(struct file *file,
299 char __user *user_buf,
300 size_t count, loff_t *ppos)
301{
302 struct wm_adsp *dsp = file->private_data;
303 ssize_t ret;
304
078e7183 305 mutex_lock(&dsp->pwr_lock);
f9f55e31
RF		 306
307 if (!dsp->wmfw_file_name || !dsp->running)
308 ret = 0;
309 else
310 ret = simple_read_from_buffer(user_buf, count, ppos,
311 dsp->wmfw_file_name,
312 strlen(dsp->wmfw_file_name));
313
078e7183 314 mutex_unlock(&dsp->pwr_lock);
f9f55e31
RF		 315 return ret;
316}
317
318static ssize_t wm_adsp_debugfs_bin_read(struct file *file,
319 char __user *user_buf,
320 size_t count, loff_t *ppos)
321{
322 struct wm_adsp *dsp = file->private_data;
323 ssize_t ret;
324
078e7183 325 mutex_lock(&dsp->pwr_lock);
f9f55e31
RF		 326
327 if (!dsp->bin_file_name || !dsp->running)
328 ret = 0;
329 else
330 ret = simple_read_from_buffer(user_buf, count, ppos,
331 dsp->bin_file_name,
332 strlen(dsp->bin_file_name));
333
078e7183 334 mutex_unlock(&dsp->pwr_lock);
f9f55e31
RF		 335 return ret;
336}
337
338static const struct {
339 const char *name;
340 const struct file_operations fops;
341} wm_adsp_debugfs_fops[] = {
342 {
343 .name = "wmfw_file_name",
344 .fops = {
345 .open = simple_open,
346 .read = wm_adsp_debugfs_wmfw_read,
347 },
348 },
349 {
350 .name = "bin_file_name",
351 .fops = {
352 .open = simple_open,
353 .read = wm_adsp_debugfs_bin_read,
354 },
355 },
356};
357
358static void wm_adsp2_init_debugfs(struct wm_adsp *dsp,
359 struct snd_soc_codec *codec)
360{
361 struct dentry *root = NULL;
362 char *root_name;
363 int i;
364
365 if (!codec->component.debugfs_root) {
366 adsp_err(dsp, "No codec debugfs root\n");
367 goto err;
368 }
369
370 root_name = kmalloc(PAGE_SIZE, GFP_KERNEL);
371 if (!root_name)
372 goto err;
373
374 snprintf(root_name, PAGE_SIZE, "dsp%d", dsp->num);
375 root = debugfs_create_dir(root_name, codec->component.debugfs_root);
376 kfree(root_name);
377
378 if (!root)
379 goto err;
380
381 if (!debugfs_create_bool("running", S_IRUGO, root, &dsp->running))
382 goto err;
383
384 if (!debugfs_create_x32("fw_id", S_IRUGO, root, &dsp->fw_id))
385 goto err;
386
387 if (!debugfs_create_x32("fw_version", S_IRUGO, root,
388 &dsp->fw_id_version))
389 goto err;
390
391 for (i = 0; i < ARRAY_SIZE(wm_adsp_debugfs_fops); ++i) {
392 if (!debugfs_create_file(wm_adsp_debugfs_fops[i].name,
393 S_IRUGO, root, dsp,
394 &wm_adsp_debugfs_fops[i].fops))
395 goto err;
396 }
397
398 dsp->debugfs_root = root;
399 return;
400
401err:
402 debugfs_remove_recursive(root);
403 adsp_err(dsp, "Failed to create debugfs\n");
404}
405
406static void wm_adsp2_cleanup_debugfs(struct wm_adsp *dsp)
407{
408 wm_adsp_debugfs_clear(dsp);
409 debugfs_remove_recursive(dsp->debugfs_root);
410}
411#else
412static inline void wm_adsp2_init_debugfs(struct wm_adsp *dsp,
413 struct snd_soc_codec *codec)
414{
415}
416
417static inline void wm_adsp2_cleanup_debugfs(struct wm_adsp *dsp)
418{
419}
420
421static inline void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp,
422 const char *s)
423{
424}
425
426static inline void wm_adsp_debugfs_save_binname(struct wm_adsp *dsp,
427 const char *s)
428{
429}
430
431static inline void wm_adsp_debugfs_clear(struct wm_adsp *dsp)
432{
433}
434#endif
435
1023dbd9
MB		 436static int wm_adsp_fw_get(struct snd_kcontrol *kcontrol,
437 struct snd_ctl_elem_value *ucontrol)
438{
ea53bf77 439 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
1023dbd9 440 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
3809f001 441 struct wm_adsp *dsp = snd_soc_codec_get_drvdata(codec);
1023dbd9 442
3809f001 443 ucontrol->value.integer.value[0] = dsp[e->shift_l].fw;
1023dbd9
MB		 444
445 return 0;
446}
447
448static int wm_adsp_fw_put(struct snd_kcontrol *kcontrol,
449 struct snd_ctl_elem_value *ucontrol)
450{
ea53bf77 451 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
1023dbd9 452 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
3809f001 453 struct wm_adsp *dsp = snd_soc_codec_get_drvdata(codec);
1023dbd9 454
3809f001 455 if (ucontrol->value.integer.value[0] == dsp[e->shift_l].fw)
1023dbd9
MB		 456 return 0;
457
458 if (ucontrol->value.integer.value[0] >= WM_ADSP_NUM_FW)
459 return -EINVAL;
460
3809f001 461 if (dsp[e->shift_l].running)
1023dbd9
MB		 462 return -EBUSY;
463
3809f001 464 dsp[e->shift_l].fw = ucontrol->value.integer.value[0];
1023dbd9
MB		 465
466 return 0;
467}
468
469static const struct soc_enum wm_adsp_fw_enum[] = {
470 SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
471 SOC_ENUM_SINGLE(0, 1, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
472 SOC_ENUM_SINGLE(0, 2, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
473 SOC_ENUM_SINGLE(0, 3, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
474};
475
336d0442 476const struct snd_kcontrol_new wm_adsp_fw_controls[] = {
1023dbd9
MB		 477 SOC_ENUM_EXT("DSP1 Firmware", wm_adsp_fw_enum[0],
478 wm_adsp_fw_get, wm_adsp_fw_put),
479 SOC_ENUM_EXT("DSP2 Firmware", wm_adsp_fw_enum[1],
480 wm_adsp_fw_get, wm_adsp_fw_put),
481 SOC_ENUM_EXT("DSP3 Firmware", wm_adsp_fw_enum[2],
482 wm_adsp_fw_get, wm_adsp_fw_put),
336d0442
RF		 483 SOC_ENUM_EXT("DSP4 Firmware", wm_adsp_fw_enum[3],
484 wm_adsp_fw_get, wm_adsp_fw_put),
b6ed61cf 485};
336d0442 486EXPORT_SYMBOL_GPL(wm_adsp_fw_controls);
2159ad93
MB		 487
488static struct wm_adsp_region const *wm_adsp_find_region(struct wm_adsp *dsp,
489 int type)
490{
491 int i;
492
493 for (i = 0; i < dsp->num_mems; i++)
494 if (dsp->mem[i].type == type)
495 return &dsp->mem[i];
496
497 return NULL;
498}
499
3809f001 500static unsigned int wm_adsp_region_to_reg(struct wm_adsp_region const *mem,
45b9ee72
MB		 501 unsigned int offset)
502{
3809f001 503 if (WARN_ON(!mem))
6c452bda 504 return offset;
3809f001 505 switch (mem->type) {
45b9ee72 506 case WMFW_ADSP1_PM:
3809f001 507 return mem->base + (offset * 3);
45b9ee72 508 case WMFW_ADSP1_DM:
3809f001 509 return mem->base + (offset * 2);
45b9ee72 510 case WMFW_ADSP2_XM:
3809f001 511 return mem->base + (offset * 2);
45b9ee72 512 case WMFW_ADSP2_YM:
3809f001 513 return mem->base + (offset * 2);
45b9ee72 514 case WMFW_ADSP1_ZM:
3809f001 515 return mem->base + (offset * 2);
45b9ee72 516 default:
6c452bda 517 WARN(1, "Unknown memory region type");
45b9ee72
MB		 518 return offset;
519 }
520}
521
10337b07
RF		 522static void wm_adsp2_show_fw_status(struct wm_adsp *dsp)
523{
524 u16 scratch[4];
525 int ret;
526
527 ret = regmap_raw_read(dsp->regmap, dsp->base + ADSP2_SCRATCH0,
528 scratch, sizeof(scratch));
529 if (ret) {
530 adsp_err(dsp, "Failed to read SCRATCH regs: %d\n", ret);
531 return;
532 }
533
534 adsp_dbg(dsp, "FW SCRATCH 0:0x%x 1:0x%x 2:0x%x 3:0x%x\n",
535 be16_to_cpu(scratch[0]),
536 be16_to_cpu(scratch[1]),
537 be16_to_cpu(scratch[2]),
538 be16_to_cpu(scratch[3]));
539}
540
6ab2b7b4
DP		 541static int wm_coeff_info(struct snd_kcontrol *kcontrol,
542 struct snd_ctl_elem_info *uinfo)
543{
544 struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value;
545
546 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
547 uinfo->count = ctl->len;
548 return 0;
549}
550
c9f8dd71 551static int wm_coeff_write_control(struct wm_coeff_ctl *ctl,
6ab2b7b4
DP		 552 const void *buf, size_t len)
553{
3809f001 554 struct wm_adsp_alg_region *alg_region = &ctl->alg_region;
6ab2b7b4 555 const struct wm_adsp_region *mem;
3809f001 556 struct wm_adsp *dsp = ctl->dsp;
6ab2b7b4
DP		 557 void *scratch;
558 int ret;
559 unsigned int reg;
560
3809f001 561 mem = wm_adsp_find_region(dsp, alg_region->type);
6ab2b7b4 562 if (!mem) {
3809f001
CK		 563 adsp_err(dsp, "No base for region %x\n",
564 alg_region->type);
6ab2b7b4
DP		 565 return -EINVAL;
566 }
567
2323736d 568 reg = ctl->alg_region.base + ctl->offset;
6ab2b7b4
DP		 569 reg = wm_adsp_region_to_reg(mem, reg);
570
571 scratch = kmemdup(buf, ctl->len, GFP_KERNEL | GFP_DMA);
572 if (!scratch)
573 return -ENOMEM;
574
3809f001 575 ret = regmap_raw_write(dsp->regmap, reg, scratch,
6ab2b7b4
DP		 576 ctl->len);
577 if (ret) {
3809f001 578 adsp_err(dsp, "Failed to write %zu bytes to %x: %d\n",
43bc3bf6 579 ctl->len, reg, ret);
6ab2b7b4
DP		 580 kfree(scratch);
581 return ret;
582 }
3809f001 583 adsp_dbg(dsp, "Wrote %zu bytes to %x\n", ctl->len, reg);
6ab2b7b4
DP		 584
585 kfree(scratch);
586
587 return 0;
588}
589
590static int wm_coeff_put(struct snd_kcontrol *kcontrol,
591 struct snd_ctl_elem_value *ucontrol)
592{
593 struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value;
594 char *p = ucontrol->value.bytes.data;
595
596 memcpy(ctl->cache, p, ctl->len);
597
65d17a9c
NO		 598 ctl->set = 1;
599 if (!ctl->enabled)
6ab2b7b4 600 return 0;
6ab2b7b4 601
c9f8dd71 602 return wm_coeff_write_control(ctl, p, ctl->len);
6ab2b7b4
DP		 603}
604
c9f8dd71 605static int wm_coeff_read_control(struct wm_coeff_ctl *ctl,
6ab2b7b4
DP		 606 void *buf, size_t len)
607{
3809f001 608 struct wm_adsp_alg_region *alg_region = &ctl->alg_region;
6ab2b7b4 609 const struct wm_adsp_region *mem;
3809f001 610 struct wm_adsp *dsp = ctl->dsp;
6ab2b7b4
DP		 611 void *scratch;
612 int ret;
613 unsigned int reg;
614
3809f001 615 mem = wm_adsp_find_region(dsp, alg_region->type);
6ab2b7b4 616 if (!mem) {
3809f001
CK		 617 adsp_err(dsp, "No base for region %x\n",
618 alg_region->type);
6ab2b7b4
DP		 619 return -EINVAL;
620 }
621
2323736d 622 reg = ctl->alg_region.base + ctl->offset;
6ab2b7b4
DP		 623 reg = wm_adsp_region_to_reg(mem, reg);
624
625 scratch = kmalloc(ctl->len, GFP_KERNEL | GFP_DMA);
626 if (!scratch)
627 return -ENOMEM;
628
3809f001 629 ret = regmap_raw_read(dsp->regmap, reg, scratch, ctl->len);
6ab2b7b4 630 if (ret) {
3809f001 631 adsp_err(dsp, "Failed to read %zu bytes from %x: %d\n",
43bc3bf6 632 ctl->len, reg, ret);
6ab2b7b4
DP		 633 kfree(scratch);
634 return ret;
635 }
3809f001 636 adsp_dbg(dsp, "Read %zu bytes from %x\n", ctl->len, reg);
6ab2b7b4
DP		 637
638 memcpy(buf, scratch, ctl->len);
639 kfree(scratch);
640
641 return 0;
642}
643
644static int wm_coeff_get(struct snd_kcontrol *kcontrol,
645 struct snd_ctl_elem_value *ucontrol)
646{
647 struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value;
648 char *p = ucontrol->value.bytes.data;
649
26c22a19
CK		 650 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) {
651 if (ctl->enabled)
652 return wm_coeff_read_control(ctl, p, ctl->len);
653 else
654 return -EPERM;
655 }
656
6ab2b7b4 657 memcpy(p, ctl->cache, ctl->len);
26c22a19 658
6ab2b7b4
DP		 659 return 0;
660}
661
6ab2b7b4 662struct wmfw_ctl_work {
3809f001 663 struct wm_adsp *dsp;
6ab2b7b4
DP		 664 struct wm_coeff_ctl *ctl;
665 struct work_struct work;
666};
667
3809f001 668static int wmfw_add_ctl(struct wm_adsp *dsp, struct wm_coeff_ctl *ctl)
6ab2b7b4
DP		 669{
670 struct snd_kcontrol_new *kcontrol;
671 int ret;
672
92bb4c32 673 if (!ctl || !ctl->name)
6ab2b7b4
DP		 674 return -EINVAL;
675
676 kcontrol = kzalloc(sizeof(*kcontrol), GFP_KERNEL);
677 if (!kcontrol)
678 return -ENOMEM;
679 kcontrol->iface = SNDRV_CTL_ELEM_IFACE_MIXER;
680
681 kcontrol->name = ctl->name;
682 kcontrol->info = wm_coeff_info;
683 kcontrol->get = wm_coeff_get;
684 kcontrol->put = wm_coeff_put;
685 kcontrol->private_value = (unsigned long)ctl;
686
26c22a19
CK		 687 if (ctl->flags) {
688 if (ctl->flags & WMFW_CTL_FLAG_WRITEABLE)
689 kcontrol->access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
690 if (ctl->flags & WMFW_CTL_FLAG_READABLE)
691 kcontrol->access |= SNDRV_CTL_ELEM_ACCESS_READ;
692 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE)
693 kcontrol->access |= SNDRV_CTL_ELEM_ACCESS_VOLATILE;
694 }
695
3809f001 696 ret = snd_soc_add_card_controls(dsp->card,
81ad93ec 697 kcontrol, 1);
6ab2b7b4
DP		 698 if (ret < 0)
699 goto err_kcontrol;
700
701 kfree(kcontrol);
702
3809f001 703 ctl->kcontrol = snd_soc_card_get_kcontrol(dsp->card,
81ad93ec
DP		 704 ctl->name);
705
6ab2b7b4
DP		 706 return 0;
707
708err_kcontrol:
709 kfree(kcontrol);
710 return ret;
711}
712
b21acc1c
CK		 713static int wm_coeff_init_control_caches(struct wm_adsp *dsp)
714{
715 struct wm_coeff_ctl *ctl;
716 int ret;
717
718 list_for_each_entry(ctl, &dsp->ctl_list, list) {
719 if (!ctl->enabled || ctl->set)
720 continue;
26c22a19
CK		 721 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE)
722 continue;
723
b21acc1c
CK		 724 ret = wm_coeff_read_control(ctl,
725 ctl->cache,
726 ctl->len);
727 if (ret < 0)
728 return ret;
729 }
730
731 return 0;
732}
733
734static int wm_coeff_sync_controls(struct wm_adsp *dsp)
735{
736 struct wm_coeff_ctl *ctl;
737 int ret;
738
739 list_for_each_entry(ctl, &dsp->ctl_list, list) {
740 if (!ctl->enabled)
741 continue;
26c22a19 742 if (ctl->set && !(ctl->flags & WMFW_CTL_FLAG_VOLATILE)) {
b21acc1c
CK		 743 ret = wm_coeff_write_control(ctl,
744 ctl->cache,
745 ctl->len);
746 if (ret < 0)
747 return ret;
748 }
749 }
750
751 return 0;
752}
753
754static void wm_adsp_ctl_work(struct work_struct *work)
755{
756 struct wmfw_ctl_work *ctl_work = container_of(work,
757 struct wmfw_ctl_work,
758 work);
759
760 wmfw_add_ctl(ctl_work->dsp, ctl_work->ctl);
761 kfree(ctl_work);
762}
763
764static int wm_adsp_create_control(struct wm_adsp *dsp,
765 const struct wm_adsp_alg_region *alg_region,
2323736d 766 unsigned int offset, unsigned int len,
26c22a19
CK		 767 const char *subname, unsigned int subname_len,
768 unsigned int flags)
b21acc1c
CK		 769{
770 struct wm_coeff_ctl *ctl;
771 struct wmfw_ctl_work *ctl_work;
772 char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
773 char *region_name;
774 int ret;
775
26c22a19
CK		 776 if (flags & WMFW_CTL_FLAG_SYS)
777 return 0;
778
b21acc1c
CK		 779 switch (alg_region->type) {
780 case WMFW_ADSP1_PM:
781 region_name = "PM";
782 break;
783 case WMFW_ADSP1_DM:
784 region_name = "DM";
785 break;
786 case WMFW_ADSP2_XM:
787 region_name = "XM";
788 break;
789 case WMFW_ADSP2_YM:
790 region_name = "YM";
791 break;
792 case WMFW_ADSP1_ZM:
793 region_name = "ZM";
794 break;
795 default:
2323736d 796 adsp_err(dsp, "Unknown region type: %d\n", alg_region->type);
b21acc1c
CK		 797 return -EINVAL;
798 }
799
cb5b57a9
CK		 800 switch (dsp->fw_ver) {
801 case 0:
802 case 1:
803 snprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN, "DSP%d %s %x",
804 dsp->num, region_name, alg_region->alg);
805 break;
806 default:
807 ret = snprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN,
808 "DSP%d%c %.12s %x", dsp->num, *region_name,
809 wm_adsp_fw_text[dsp->fw], alg_region->alg);
810
811 /* Truncate the subname from the start if it is too long */
812 if (subname) {
813 int avail = SNDRV_CTL_ELEM_ID_NAME_MAXLEN - ret - 2;
814 int skip = 0;
815
816 if (subname_len > avail)
817 skip = subname_len - avail;
818
819 snprintf(name + ret,
820 SNDRV_CTL_ELEM_ID_NAME_MAXLEN - ret, " %.*s",
821 subname_len - skip, subname + skip);
822 }
823 break;
824 }
b21acc1c
CK		 825
826 list_for_each_entry(ctl, &dsp->ctl_list,
827 list) {
828 if (!strcmp(ctl->name, name)) {
829 if (!ctl->enabled)
830 ctl->enabled = 1;
831 return 0;
832 }
833 }
834
835 ctl = kzalloc(sizeof(*ctl), GFP_KERNEL);
836 if (!ctl)
837 return -ENOMEM;
2323736d 838 ctl->fw_name = wm_adsp_fw_text[dsp->fw];
b21acc1c
CK		 839 ctl->alg_region = *alg_region;
840 ctl->name = kmemdup(name, strlen(name) + 1, GFP_KERNEL);
841 if (!ctl->name) {
842 ret = -ENOMEM;
843 goto err_ctl;
844 }
845 ctl->enabled = 1;
846 ctl->set = 0;
847 ctl->ops.xget = wm_coeff_get;
848 ctl->ops.xput = wm_coeff_put;
849 ctl->dsp = dsp;
850
26c22a19 851 ctl->flags = flags;
2323736d 852 ctl->offset = offset;
b21acc1c
CK		 853 if (len > 512) {
854 adsp_warn(dsp, "Truncating control %s from %d\n",
855 ctl->name, len);
856 len = 512;
857 }
858 ctl->len = len;
859 ctl->cache = kzalloc(ctl->len, GFP_KERNEL);
860 if (!ctl->cache) {
861 ret = -ENOMEM;
862 goto err_ctl_name;
863 }
864
2323736d
CK		 865 list_add(&ctl->list, &dsp->ctl_list);
866
b21acc1c
CK		 867 ctl_work = kzalloc(sizeof(*ctl_work), GFP_KERNEL);
868 if (!ctl_work) {
869 ret = -ENOMEM;
870 goto err_ctl_cache;
871 }
872
873 ctl_work->dsp = dsp;
874 ctl_work->ctl = ctl;
875 INIT_WORK(&ctl_work->work, wm_adsp_ctl_work);
876 schedule_work(&ctl_work->work);
877
878 return 0;
879
880err_ctl_cache:
881 kfree(ctl->cache);
882err_ctl_name:
883 kfree(ctl->name);
884err_ctl:
885 kfree(ctl);
886
887 return ret;
888}
889
2323736d
CK		 890struct wm_coeff_parsed_alg {
891 int id;
892 const u8 *name;
893 int name_len;
894 int ncoeff;
895};
896
897struct wm_coeff_parsed_coeff {
898 int offset;
899 int mem_type;
900 const u8 *name;
901 int name_len;
902 int ctl_type;
903 int flags;
904 int len;
905};
906
cb5b57a9
CK		 907static int wm_coeff_parse_string(int bytes, const u8 **pos, const u8 **str)
908{
909 int length;
910
911 switch (bytes) {
912 case 1:
913 length = **pos;
914 break;
915 case 2:
8299ee81 916 length = le16_to_cpu(*((__le16 *)*pos));
cb5b57a9
CK		 917 break;
918 default:
919 return 0;
920 }
921
922 if (str)
923 *str = *pos + bytes;
924
925 *pos += ((length + bytes) + 3) & ~0x03;
926
927 return length;
928}
929
930static int wm_coeff_parse_int(int bytes, const u8 **pos)
931{
932 int val = 0;
933
934 switch (bytes) {
935 case 2:
8299ee81 936 val = le16_to_cpu(*((__le16 *)*pos));
cb5b57a9
CK		 937 break;
938 case 4:
8299ee81 939 val = le32_to_cpu(*((__le32 *)*pos));
cb5b57a9
CK		 940 break;
941 default:
942 break;
943 }
944
945 *pos += bytes;
946
947 return val;
948}
949
2323736d
CK		 950static inline void wm_coeff_parse_alg(struct wm_adsp *dsp, const u8 **data,
951 struct wm_coeff_parsed_alg *blk)
952{
953 const struct wmfw_adsp_alg_data *raw;
954
cb5b57a9
CK		 955 switch (dsp->fw_ver) {
956 case 0:
957 case 1:
958 raw = (const struct wmfw_adsp_alg_data *)*data;
959 *data = raw->data;
2323736d 960
cb5b57a9
CK		 961 blk->id = le32_to_cpu(raw->id);
962 blk->name = raw->name;
963 blk->name_len = strlen(raw->name);
964 blk->ncoeff = le32_to_cpu(raw->ncoeff);
965 break;
966 default:
967 blk->id = wm_coeff_parse_int(sizeof(raw->id), data);
968 blk->name_len = wm_coeff_parse_string(sizeof(u8), data,
969 &blk->name);
970 wm_coeff_parse_string(sizeof(u16), data, NULL);
971 blk->ncoeff = wm_coeff_parse_int(sizeof(raw->ncoeff), data);
972 break;
973 }
2323736d
CK		 974
975 adsp_dbg(dsp, "Algorithm ID: %#x\n", blk->id);
976 adsp_dbg(dsp, "Algorithm name: %.*s\n", blk->name_len, blk->name);
977 adsp_dbg(dsp, "# of coefficient descriptors: %#x\n", blk->ncoeff);
978}
979
980static inline void wm_coeff_parse_coeff(struct wm_adsp *dsp, const u8 **data,
981 struct wm_coeff_parsed_coeff *blk)
982{
983 const struct wmfw_adsp_coeff_data *raw;
cb5b57a9
CK		 984 const u8 *tmp;
985 int length;
2323736d 986
cb5b57a9
CK		 987 switch (dsp->fw_ver) {
988 case 0:
989 case 1:
990 raw = (const struct wmfw_adsp_coeff_data *)*data;
991 *data = *data + sizeof(raw->hdr) + le32_to_cpu(raw->hdr.size);
992
993 blk->offset = le16_to_cpu(raw->hdr.offset);
994 blk->mem_type = le16_to_cpu(raw->hdr.type);
995 blk->name = raw->name;
996 blk->name_len = strlen(raw->name);
997 blk->ctl_type = le16_to_cpu(raw->ctl_type);
998 blk->flags = le16_to_cpu(raw->flags);
999 blk->len = le32_to_cpu(raw->len);
1000 break;
1001 default:
1002 tmp = *data;
1003 blk->offset = wm_coeff_parse_int(sizeof(raw->hdr.offset), &tmp);
1004 blk->mem_type = wm_coeff_parse_int(sizeof(raw->hdr.type), &tmp);
1005 length = wm_coeff_parse_int(sizeof(raw->hdr.size), &tmp);
1006 blk->name_len = wm_coeff_parse_string(sizeof(u8), &tmp,
1007 &blk->name);
1008 wm_coeff_parse_string(sizeof(u8), &tmp, NULL);
1009 wm_coeff_parse_string(sizeof(u16), &tmp, NULL);
1010 blk->ctl_type = wm_coeff_parse_int(sizeof(raw->ctl_type), &tmp);
1011 blk->flags = wm_coeff_parse_int(sizeof(raw->flags), &tmp);
1012 blk->len = wm_coeff_parse_int(sizeof(raw->len), &tmp);
1013
1014 *data = *data + sizeof(raw->hdr) + length;
1015 break;
1016 }
2323736d
CK		 1017
1018 adsp_dbg(dsp, "\tCoefficient type: %#x\n", blk->mem_type);
1019 adsp_dbg(dsp, "\tCoefficient offset: %#x\n", blk->offset);
1020 adsp_dbg(dsp, "\tCoefficient name: %.*s\n", blk->name_len, blk->name);
1021 adsp_dbg(dsp, "\tCoefficient flags: %#x\n", blk->flags);
1022 adsp_dbg(dsp, "\tALSA control type: %#x\n", blk->ctl_type);
1023 adsp_dbg(dsp, "\tALSA control len: %#x\n", blk->len);
1024}
1025
1026static int wm_adsp_parse_coeff(struct wm_adsp *dsp,
1027 const struct wmfw_region *region)
1028{
1029 struct wm_adsp_alg_region alg_region = {};
1030 struct wm_coeff_parsed_alg alg_blk;
1031 struct wm_coeff_parsed_coeff coeff_blk;
1032 const u8 *data = region->data;
1033 int i, ret;
1034
1035 wm_coeff_parse_alg(dsp, &data, &alg_blk);
1036 for (i = 0; i < alg_blk.ncoeff; i++) {
1037 wm_coeff_parse_coeff(dsp, &data, &coeff_blk);
1038
1039 switch (coeff_blk.ctl_type) {
1040 case SNDRV_CTL_ELEM_TYPE_BYTES:
1041 break;
1042 default:
1043 adsp_err(dsp, "Unknown control type: %d\n",
1044 coeff_blk.ctl_type);
1045 return -EINVAL;
1046 }
1047
1048 alg_region.type = coeff_blk.mem_type;
1049 alg_region.alg = alg_blk.id;
1050
1051 ret = wm_adsp_create_control(dsp, &alg_region,
1052 coeff_blk.offset,
1053 coeff_blk.len,
1054 coeff_blk.name,
26c22a19
CK		 1055 coeff_blk.name_len,
1056 coeff_blk.flags);
2323736d
CK		 1057 if (ret < 0)
1058 adsp_err(dsp, "Failed to create control: %.*s, %d\n",
1059 coeff_blk.name_len, coeff_blk.name, ret);
1060 }
1061
1062 return 0;
1063}
1064
2159ad93
MB		 1065static int wm_adsp_load(struct wm_adsp *dsp)
1066{
cf17c83c 1067 LIST_HEAD(buf_list);
2159ad93
MB		 1068 const struct firmware *firmware;
1069 struct regmap *regmap = dsp->regmap;
1070 unsigned int pos = 0;
1071 const struct wmfw_header *header;
1072 const struct wmfw_adsp1_sizes *adsp1_sizes;
1073 const struct wmfw_adsp2_sizes *adsp2_sizes;
1074 const struct wmfw_footer *footer;
1075 const struct wmfw_region *region;
1076 const struct wm_adsp_region *mem;
1077 const char *region_name;
1078 char *file, *text;
cf17c83c 1079 struct wm_adsp_buf *buf;
2159ad93
MB		 1080 unsigned int reg;
1081 int regions = 0;
1082 int ret, offset, type, sizes;
1083
1084 file = kzalloc(PAGE_SIZE, GFP_KERNEL);
1085 if (file == NULL)
1086 return -ENOMEM;
1087
1023dbd9
MB		 1088 snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.wmfw", dsp->part, dsp->num,
1089 wm_adsp_fw[dsp->fw].file);
2159ad93
MB		 1090 file[PAGE_SIZE - 1] = '\0';
1091
1092 ret = request_firmware(&firmware, file, dsp->dev);
1093 if (ret != 0) {
1094 adsp_err(dsp, "Failed to request '%s'\n", file);
1095 goto out;
1096 }
1097 ret = -EINVAL;
1098
1099 pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer);
1100 if (pos >= firmware->size) {
1101 adsp_err(dsp, "%s: file too short, %zu bytes\n",
1102 file, firmware->size);
1103 goto out_fw;
1104 }
1105
1106 header = (void*)&firmware->data[0];
1107
1108 if (memcmp(&header->magic[0], "WMFW", 4) != 0) {
1109 adsp_err(dsp, "%s: invalid magic\n", file);
1110 goto out_fw;
1111 }
1112
2323736d
CK		 1113 switch (header->ver) {
1114 case 0:
c61e59fe
CK		 1115 adsp_warn(dsp, "%s: Depreciated file format %d\n",
1116 file, header->ver);
1117 break;
2323736d 1118 case 1:
cb5b57a9 1119 case 2:
2323736d
CK		 1120 break;
1121 default:
2159ad93
MB		 1122 adsp_err(dsp, "%s: unknown file format %d\n",
1123 file, header->ver);
1124 goto out_fw;
1125 }
2323736d 1126
3626992a 1127 adsp_info(dsp, "Firmware version: %d\n", header->ver);
2323736d 1128 dsp->fw_ver = header->ver;
2159ad93
MB		 1129
1130 if (header->core != dsp->type) {
1131 adsp_err(dsp, "%s: invalid core %d != %d\n",
1132 file, header->core, dsp->type);
1133 goto out_fw;
1134 }
1135
1136 switch (dsp->type) {
1137 case WMFW_ADSP1:
1138 pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer);
1139 adsp1_sizes = (void *)&(header[1]);
1140 footer = (void *)&(adsp1_sizes[1]);
1141 sizes = sizeof(*adsp1_sizes);
1142
1143 adsp_dbg(dsp, "%s: %d DM, %d PM, %d ZM\n",
1144 file, le32_to_cpu(adsp1_sizes->dm),
1145 le32_to_cpu(adsp1_sizes->pm),
1146 le32_to_cpu(adsp1_sizes->zm));
1147 break;
1148
1149 case WMFW_ADSP2:
1150 pos = sizeof(*header) + sizeof(*adsp2_sizes) + sizeof(*footer);
1151 adsp2_sizes = (void *)&(header[1]);
1152 footer = (void *)&(adsp2_sizes[1]);
1153 sizes = sizeof(*adsp2_sizes);
1154
1155 adsp_dbg(dsp, "%s: %d XM, %d YM %d PM, %d ZM\n",
1156 file, le32_to_cpu(adsp2_sizes->xm),
1157 le32_to_cpu(adsp2_sizes->ym),
1158 le32_to_cpu(adsp2_sizes->pm),
1159 le32_to_cpu(adsp2_sizes->zm));
1160 break;
1161
1162 default:
6c452bda 1163 WARN(1, "Unknown DSP type");
2159ad93
MB		 1164 goto out_fw;
1165 }
1166
1167 if (le32_to_cpu(header->len) != sizeof(*header) +
1168 sizes + sizeof(*footer)) {
1169 adsp_err(dsp, "%s: unexpected header length %d\n",
1170 file, le32_to_cpu(header->len));
1171 goto out_fw;
1172 }
1173
1174 adsp_dbg(dsp, "%s: timestamp %llu\n", file,
1175 le64_to_cpu(footer->timestamp));
1176
1177 while (pos < firmware->size &&
1178 pos - firmware->size > sizeof(*region)) {
1179 region = (void *)&(firmware->data[pos]);
1180 region_name = "Unknown";
1181 reg = 0;
1182 text = NULL;
1183 offset = le32_to_cpu(region->offset) & 0xffffff;
1184 type = be32_to_cpu(region->type) & 0xff;
1185 mem = wm_adsp_find_region(dsp, type);
1186
1187 switch (type) {
1188 case WMFW_NAME_TEXT:
1189 region_name = "Firmware name";
1190 text = kzalloc(le32_to_cpu(region->len) + 1,
1191 GFP_KERNEL);
1192 break;
2323736d
CK		 1193 case WMFW_ALGORITHM_DATA:
1194 region_name = "Algorithm";
1195 ret = wm_adsp_parse_coeff(dsp, region);
1196 if (ret != 0)
1197 goto out_fw;
1198 break;
2159ad93
MB		 1199 case WMFW_INFO_TEXT:
1200 region_name = "Information";
1201 text = kzalloc(le32_to_cpu(region->len) + 1,
1202 GFP_KERNEL);
1203 break;
1204 case WMFW_ABSOLUTE:
1205 region_name = "Absolute";
1206 reg = offset;
1207 break;
1208 case WMFW_ADSP1_PM:
2159ad93 1209 region_name = "PM";
45b9ee72 1210 reg = wm_adsp_region_to_reg(mem, offset);
2159ad93
MB		 1211 break;
1212 case WMFW_ADSP1_DM:
2159ad93 1213 region_name = "DM";
45b9ee72 1214 reg = wm_adsp_region_to_reg(mem, offset);
2159ad93
MB		 1215 break;
1216 case WMFW_ADSP2_XM:
2159ad93 1217 region_name = "XM";
45b9ee72 1218 reg = wm_adsp_region_to_reg(mem, offset);
2159ad93
MB		 1219 break;
1220 case WMFW_ADSP2_YM:
2159ad93 1221 region_name = "YM";
45b9ee72 1222 reg = wm_adsp_region_to_reg(mem, offset);
2159ad93
MB		 1223 break;
1224 case WMFW_ADSP1_ZM:
2159ad93 1225 region_name = "ZM";
45b9ee72 1226 reg = wm_adsp_region_to_reg(mem, offset);
2159ad93
MB		 1227 break;
1228 default:
1229 adsp_warn(dsp,
1230 "%s.%d: Unknown region type %x at %d(%x)\n",
1231 file, regions, type, pos, pos);
1232 break;
1233 }
1234
1235 adsp_dbg(dsp, "%s.%d: %d bytes at %d in %s\n", file,
1236 regions, le32_to_cpu(region->len), offset,
1237 region_name);
1238
1239 if (text) {
1240 memcpy(text, region->data, le32_to_cpu(region->len));
1241 adsp_info(dsp, "%s: %s\n", file, text);
1242 kfree(text);
1243 }
1244
1245 if (reg) {
cdcd7f72
CK		 1246 buf = wm_adsp_buf_alloc(region->data,
1247 le32_to_cpu(region->len),
1248 &buf_list);
1249 if (!buf) {
1250 adsp_err(dsp, "Out of memory\n");
1251 ret = -ENOMEM;
1252 goto out_fw;
1253 }
c1a7898d 1254
cdcd7f72
CK		 1255 ret = regmap_raw_write_async(regmap, reg, buf->buf,
1256 le32_to_cpu(region->len));
1257 if (ret != 0) {
1258 adsp_err(dsp,
1259 "%s.%d: Failed to write %d bytes at %d in %s: %d\n",
1260 file, regions,
1261 le32_to_cpu(region->len), offset,
1262 region_name, ret);
1263 goto out_fw;
2159ad93
MB		 1264 }
1265 }
1266
1267 pos += le32_to_cpu(region->len) + sizeof(*region);
1268 regions++;
1269 }
cf17c83c
MB		 1270
1271 ret = regmap_async_complete(regmap);
1272 if (ret != 0) {
1273 adsp_err(dsp, "Failed to complete async write: %d\n", ret);
1274 goto out_fw;
1275 }
1276
2159ad93
MB		 1277 if (pos > firmware->size)
1278 adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n",
1279 file, regions, pos - firmware->size);
1280
f9f55e31
RF		 1281 wm_adsp_debugfs_save_wmfwname(dsp, file);
1282
2159ad93 1283out_fw:
cf17c83c
MB		 1284 regmap_async_complete(regmap);
1285 wm_adsp_buf_free(&buf_list);
2159ad93
MB		 1286 release_firmware(firmware);
1287out:
1288 kfree(file);
1289
1290 return ret;
1291}
1292
2323736d
CK		 1293static void wm_adsp_ctl_fixup_base(struct wm_adsp *dsp,
1294 const struct wm_adsp_alg_region *alg_region)
1295{
1296 struct wm_coeff_ctl *ctl;
1297
1298 list_for_each_entry(ctl, &dsp->ctl_list, list) {
1299 if (ctl->fw_name == wm_adsp_fw_text[dsp->fw] &&
1300 alg_region->alg == ctl->alg_region.alg &&
1301 alg_region->type == ctl->alg_region.type) {
1302 ctl->alg_region.base = alg_region->base;
1303 }
1304 }
1305}
1306
3809f001 1307static void *wm_adsp_read_algs(struct wm_adsp *dsp, size_t n_algs,
b618a185 1308 unsigned int pos, unsigned int len)
db40517c 1309{
b618a185
CK		 1310 void *alg;
1311 int ret;
db40517c 1312 __be32 val;
db40517c 1313
3809f001 1314 if (n_algs == 0) {
b618a185
CK		 1315 adsp_err(dsp, "No algorithms\n");
1316 return ERR_PTR(-EINVAL);
db40517c
MB		 1317 }
1318
3809f001
CK		 1319 if (n_algs > 1024) {
1320 adsp_err(dsp, "Algorithm count %zx excessive\n", n_algs);
b618a185
CK		 1321 return ERR_PTR(-EINVAL);
1322 }
db40517c 1323
b618a185
CK		 1324 /* Read the terminator first to validate the length */
1325 ret = regmap_raw_read(dsp->regmap, pos + len, &val, sizeof(val));
1326 if (ret != 0) {
1327 adsp_err(dsp, "Failed to read algorithm list end: %d\n",
1328 ret);
1329 return ERR_PTR(ret);
1330 }
db40517c 1331
b618a185
CK		 1332 if (be32_to_cpu(val) != 0xbedead)
1333 adsp_warn(dsp, "Algorithm list end %x 0x%x != 0xbeadead\n",
1334 pos + len, be32_to_cpu(val));
d62f4bc6 1335
b618a185
CK		 1336 alg = kzalloc(len * 2, GFP_KERNEL | GFP_DMA);
1337 if (!alg)
1338 return ERR_PTR(-ENOMEM);
db40517c 1339
b618a185
CK		 1340 ret = regmap_raw_read(dsp->regmap, pos, alg, len * 2);
1341 if (ret != 0) {
1342 adsp_err(dsp, "Failed to read algorithm list: %d\n",
1343 ret);
1344 kfree(alg);
1345 return ERR_PTR(ret);
1346 }
ac50009f 1347
b618a185
CK		 1348 return alg;
1349}
ac50009f 1350
d9d20e17
CK		 1351static struct wm_adsp_alg_region *wm_adsp_create_region(struct wm_adsp *dsp,
1352 int type, __be32 id,
1353 __be32 base)
1354{
1355 struct wm_adsp_alg_region *alg_region;
1356
1357 alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL);
1358 if (!alg_region)
1359 return ERR_PTR(-ENOMEM);
1360
1361 alg_region->type = type;
1362 alg_region->alg = be32_to_cpu(id);
1363 alg_region->base = be32_to_cpu(base);
1364
1365 list_add_tail(&alg_region->list, &dsp->alg_regions);
1366
2323736d
CK		 1367 if (dsp->fw_ver > 0)
1368 wm_adsp_ctl_fixup_base(dsp, alg_region);
1369
d9d20e17
CK		 1370 return alg_region;
1371}
1372
b618a185
CK		 1373static int wm_adsp1_setup_algs(struct wm_adsp *dsp)
1374{
1375 struct wmfw_adsp1_id_hdr adsp1_id;
1376 struct wmfw_adsp1_alg_hdr *adsp1_alg;
3809f001 1377 struct wm_adsp_alg_region *alg_region;
b618a185
CK		 1378 const struct wm_adsp_region *mem;
1379 unsigned int pos, len;
3809f001 1380 size_t n_algs;
b618a185 1381 int i, ret;
db40517c 1382
b618a185
CK		 1383 mem = wm_adsp_find_region(dsp, WMFW_ADSP1_DM);
1384 if (WARN_ON(!mem))
1385 return -EINVAL;
1386
1387 ret = regmap_raw_read(dsp->regmap, mem->base, &adsp1_id,
1388 sizeof(adsp1_id));
1389 if (ret != 0) {
1390 adsp_err(dsp, "Failed to read algorithm info: %d\n",
1391 ret);
1392 return ret;
1393 }
db40517c 1394
3809f001 1395 n_algs = be32_to_cpu(adsp1_id.n_algs);
b618a185
CK		 1396 dsp->fw_id = be32_to_cpu(adsp1_id.fw.id);
1397 adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n",
1398 dsp->fw_id,
1399 (be32_to_cpu(adsp1_id.fw.ver) & 0xff0000) >> 16,
1400 (be32_to_cpu(adsp1_id.fw.ver) & 0xff00) >> 8,
1401 be32_to_cpu(adsp1_id.fw.ver) & 0xff,
3809f001 1402 n_algs);
b618a185 1403
d9d20e17
CK		 1404 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_ZM,
1405 adsp1_id.fw.id, adsp1_id.zm);
1406 if (IS_ERR(alg_region))
1407 return PTR_ERR(alg_region);
d62f4bc6 1408
d9d20e17
CK		 1409 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_DM,
1410 adsp1_id.fw.id, adsp1_id.dm);
1411 if (IS_ERR(alg_region))
1412 return PTR_ERR(alg_region);
db40517c 1413
b618a185 1414 pos = sizeof(adsp1_id) / 2;
3809f001 1415 len = (sizeof(*adsp1_alg) * n_algs) / 2;
b618a185 1416
3809f001 1417 adsp1_alg = wm_adsp_read_algs(dsp, n_algs, mem->base + pos, len);
b618a185
CK		 1418 if (IS_ERR(adsp1_alg))
1419 return PTR_ERR(adsp1_alg);
1420
3809f001 1421 for (i = 0; i < n_algs; i++) {
b618a185
CK		 1422 adsp_info(dsp, "%d: ID %x v%d.%d.%d DM@%x ZM@%x\n",
1423 i, be32_to_cpu(adsp1_alg[i].alg.id),
1424 (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff0000) >> 16,
1425 (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff00) >> 8,
1426 be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff,
1427 be32_to_cpu(adsp1_alg[i].dm),
1428 be32_to_cpu(adsp1_alg[i].zm));
ac50009f 1429
d9d20e17
CK		 1430 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_DM,
1431 adsp1_alg[i].alg.id,
1432 adsp1_alg[i].dm);
1433 if (IS_ERR(alg_region)) {
1434 ret = PTR_ERR(alg_region);
b618a185
CK		 1435 goto out;
1436 }
2323736d
CK		 1437 if (dsp->fw_ver == 0) {
1438 if (i + 1 < n_algs) {
1439 len = be32_to_cpu(adsp1_alg[i + 1].dm);
1440 len -= be32_to_cpu(adsp1_alg[i].dm);
1441 len *= 4;
1442 wm_adsp_create_control(dsp, alg_region, 0,
26c22a19 1443 len, NULL, 0, 0);
2323736d
CK		 1444 } else {
1445 adsp_warn(dsp, "Missing length info for region DM with ID %x\n",
1446 be32_to_cpu(adsp1_alg[i].alg.id));
1447 }
b618a185 1448 }
ac50009f 1449
d9d20e17
CK		 1450 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_ZM,
1451 adsp1_alg[i].alg.id,
1452 adsp1_alg[i].zm);
1453 if (IS_ERR(alg_region)) {
1454 ret = PTR_ERR(alg_region);
b618a185
CK		 1455 goto out;
1456 }
2323736d
CK		 1457 if (dsp->fw_ver == 0) {
1458 if (i + 1 < n_algs) {
1459 len = be32_to_cpu(adsp1_alg[i + 1].zm);
1460 len -= be32_to_cpu(adsp1_alg[i].zm);
1461 len *= 4;
1462 wm_adsp_create_control(dsp, alg_region, 0,
26c22a19 1463 len, NULL, 0, 0);
2323736d
CK		 1464 } else {
1465 adsp_warn(dsp, "Missing length info for region ZM with ID %x\n",
1466 be32_to_cpu(adsp1_alg[i].alg.id));
1467 }
b618a185 1468 }
db40517c
MB		 1469 }
1470
b618a185
CK		 1471out:
1472 kfree(adsp1_alg);
1473 return ret;
1474}
db40517c 1475
b618a185
CK		 1476static int wm_adsp2_setup_algs(struct wm_adsp *dsp)
1477{
1478 struct wmfw_adsp2_id_hdr adsp2_id;
1479 struct wmfw_adsp2_alg_hdr *adsp2_alg;
3809f001 1480 struct wm_adsp_alg_region *alg_region;
b618a185
CK		 1481 const struct wm_adsp_region *mem;
1482 unsigned int pos, len;
3809f001 1483 size_t n_algs;
b618a185
CK		 1484 int i, ret;
1485
1486 mem = wm_adsp_find_region(dsp, WMFW_ADSP2_XM);
1487 if (WARN_ON(!mem))
d62f4bc6 1488 return -EINVAL;
d62f4bc6 1489
b618a185
CK		 1490 ret = regmap_raw_read(dsp->regmap, mem->base, &adsp2_id,
1491 sizeof(adsp2_id));
db40517c 1492 if (ret != 0) {
b618a185
CK		 1493 adsp_err(dsp, "Failed to read algorithm info: %d\n",
1494 ret);
db40517c
MB		 1495 return ret;
1496 }
1497
3809f001 1498 n_algs = be32_to_cpu(adsp2_id.n_algs);
b618a185 1499 dsp->fw_id = be32_to_cpu(adsp2_id.fw.id);
f9f55e31 1500 dsp->fw_id_version = be32_to_cpu(adsp2_id.fw.ver);
b618a185
CK		 1501 adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n",
1502 dsp->fw_id,
f9f55e31
RF		 1503 (dsp->fw_id_version & 0xff0000) >> 16,
1504 (dsp->fw_id_version & 0xff00) >> 8,
1505 dsp->fw_id_version & 0xff,
3809f001 1506 n_algs);
b618a185 1507
d9d20e17
CK		 1508 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_XM,
1509 adsp2_id.fw.id, adsp2_id.xm);
1510 if (IS_ERR(alg_region))
1511 return PTR_ERR(alg_region);
db40517c 1512
d9d20e17
CK		 1513 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_YM,
1514 adsp2_id.fw.id, adsp2_id.ym);
1515 if (IS_ERR(alg_region))
1516 return PTR_ERR(alg_region);
db40517c 1517
d9d20e17
CK		 1518 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_ZM,
1519 adsp2_id.fw.id, adsp2_id.zm);
1520 if (IS_ERR(alg_region))
1521 return PTR_ERR(alg_region);
db40517c 1522
b618a185 1523 pos = sizeof(adsp2_id) / 2;
3809f001 1524 len = (sizeof(*adsp2_alg) * n_algs) / 2;
db40517c 1525
3809f001 1526 adsp2_alg = wm_adsp_read_algs(dsp, n_algs, mem->base + pos, len);
b618a185
CK		 1527 if (IS_ERR(adsp2_alg))
1528 return PTR_ERR(adsp2_alg);
471f4885 1529
3809f001 1530 for (i = 0; i < n_algs; i++) {
b618a185
CK		 1531 adsp_info(dsp,
1532 "%d: ID %x v%d.%d.%d XM@%x YM@%x ZM@%x\n",
1533 i, be32_to_cpu(adsp2_alg[i].alg.id),
1534 (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff0000) >> 16,
1535 (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff00) >> 8,
1536 be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff,
1537 be32_to_cpu(adsp2_alg[i].xm),
1538 be32_to_cpu(adsp2_alg[i].ym),
1539 be32_to_cpu(adsp2_alg[i].zm));
db40517c 1540
d9d20e17
CK		 1541 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_XM,
1542 adsp2_alg[i].alg.id,
1543 adsp2_alg[i].xm);
1544 if (IS_ERR(alg_region)) {
1545 ret = PTR_ERR(alg_region);
b618a185
CK		 1546 goto out;
1547 }
2323736d
CK		 1548 if (dsp->fw_ver == 0) {
1549 if (i + 1 < n_algs) {
1550 len = be32_to_cpu(adsp2_alg[i + 1].xm);
1551 len -= be32_to_cpu(adsp2_alg[i].xm);
1552 len *= 4;
1553 wm_adsp_create_control(dsp, alg_region, 0,
26c22a19 1554 len, NULL, 0, 0);
2323736d
CK		 1555 } else {
1556 adsp_warn(dsp, "Missing length info for region XM with ID %x\n",
1557 be32_to_cpu(adsp2_alg[i].alg.id));
1558 }
b618a185 1559 }
471f4885 1560
d9d20e17
CK		 1561 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_YM,
1562 adsp2_alg[i].alg.id,
1563 adsp2_alg[i].ym);
1564 if (IS_ERR(alg_region)) {
1565 ret = PTR_ERR(alg_region);
b618a185
CK		 1566 goto out;
1567 }
2323736d
CK		 1568 if (dsp->fw_ver == 0) {
1569 if (i + 1 < n_algs) {
1570 len = be32_to_cpu(adsp2_alg[i + 1].ym);
1571 len -= be32_to_cpu(adsp2_alg[i].ym);
1572 len *= 4;
1573 wm_adsp_create_control(dsp, alg_region, 0,
26c22a19 1574 len, NULL, 0, 0);
2323736d
CK		 1575 } else {
1576 adsp_warn(dsp, "Missing length info for region YM with ID %x\n",
1577 be32_to_cpu(adsp2_alg[i].alg.id));
1578 }
b618a185 1579 }
471f4885 1580
d9d20e17
CK		 1581 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_ZM,
1582 adsp2_alg[i].alg.id,
1583 adsp2_alg[i].zm);
1584 if (IS_ERR(alg_region)) {
1585 ret = PTR_ERR(alg_region);
b618a185
CK		 1586 goto out;
1587 }
2323736d
CK		 1588 if (dsp->fw_ver == 0) {
1589 if (i + 1 < n_algs) {
1590 len = be32_to_cpu(adsp2_alg[i + 1].zm);
1591 len -= be32_to_cpu(adsp2_alg[i].zm);
1592 len *= 4;
1593 wm_adsp_create_control(dsp, alg_region, 0,
26c22a19 1594 len, NULL, 0, 0);
2323736d
CK		 1595 } else {
1596 adsp_warn(dsp, "Missing length info for region ZM with ID %x\n",
1597 be32_to_cpu(adsp2_alg[i].alg.id));
1598 }
db40517c
MB		 1599 }
1600 }
1601
1602out:
b618a185 1603 kfree(adsp2_alg);
db40517c
MB		 1604 return ret;
1605}
1606
2159ad93
MB		 1607static int wm_adsp_load_coeff(struct wm_adsp *dsp)
1608{
cf17c83c 1609 LIST_HEAD(buf_list);
2159ad93
MB		 1610 struct regmap *regmap = dsp->regmap;
1611 struct wmfw_coeff_hdr *hdr;
1612 struct wmfw_coeff_item *blk;
1613 const struct firmware *firmware;
471f4885
MB		 1614 const struct wm_adsp_region *mem;
1615 struct wm_adsp_alg_region *alg_region;
2159ad93
MB		 1616 const char *region_name;
1617 int ret, pos, blocks, type, offset, reg;
1618 char *file;
cf17c83c 1619 struct wm_adsp_buf *buf;
2159ad93
MB		 1620
1621 file = kzalloc(PAGE_SIZE, GFP_KERNEL);
1622 if (file == NULL)
1623 return -ENOMEM;
1624
1023dbd9
MB		 1625 snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.bin", dsp->part, dsp->num,
1626 wm_adsp_fw[dsp->fw].file);
2159ad93
MB		 1627 file[PAGE_SIZE - 1] = '\0';
1628
1629 ret = request_firmware(&firmware, file, dsp->dev);
1630 if (ret != 0) {
1631 adsp_warn(dsp, "Failed to request '%s'\n", file);
1632 ret = 0;
1633 goto out;
1634 }
1635 ret = -EINVAL;
1636
1637 if (sizeof(*hdr) >= firmware->size) {
1638 adsp_err(dsp, "%s: file too short, %zu bytes\n",
1639 file, firmware->size);
1640 goto out_fw;
1641 }
1642
1643 hdr = (void*)&firmware->data[0];
1644 if (memcmp(hdr->magic, "WMDR", 4) != 0) {
1645 adsp_err(dsp, "%s: invalid magic\n", file);
a4cdbec7 1646 goto out_fw;
2159ad93
MB		 1647 }
1648
c712326d
MB		 1649 switch (be32_to_cpu(hdr->rev) & 0xff) {
1650 case 1:
1651 break;
1652 default:
1653 adsp_err(dsp, "%s: Unsupported coefficient file format %d\n",
1654 file, be32_to_cpu(hdr->rev) & 0xff);
1655 ret = -EINVAL;
1656 goto out_fw;
1657 }
1658
2159ad93
MB		 1659 adsp_dbg(dsp, "%s: v%d.%d.%d\n", file,
1660 (le32_to_cpu(hdr->ver) >> 16) & 0xff,
1661 (le32_to_cpu(hdr->ver) >> 8) & 0xff,
1662 le32_to_cpu(hdr->ver) & 0xff);
1663
1664 pos = le32_to_cpu(hdr->len);
1665
1666 blocks = 0;
1667 while (pos < firmware->size &&
1668 pos - firmware->size > sizeof(*blk)) {
1669 blk = (void*)(&firmware->data[pos]);
1670
c712326d
MB		 1671 type = le16_to_cpu(blk->type);
1672 offset = le16_to_cpu(blk->offset);
2159ad93
MB		 1673
1674 adsp_dbg(dsp, "%s.%d: %x v%d.%d.%d\n",
1675 file, blocks, le32_to_cpu(blk->id),
1676 (le32_to_cpu(blk->ver) >> 16) & 0xff,
1677 (le32_to_cpu(blk->ver) >> 8) & 0xff,
1678 le32_to_cpu(blk->ver) & 0xff);
1679 adsp_dbg(dsp, "%s.%d: %d bytes at 0x%x in %x\n",
1680 file, blocks, le32_to_cpu(blk->len), offset, type);
1681
1682 reg = 0;
1683 region_name = "Unknown";
1684 switch (type) {
c712326d
MB		 1685 case (WMFW_NAME_TEXT << 8):
1686 case (WMFW_INFO_TEXT << 8):
2159ad93 1687 break;
c712326d 1688 case (WMFW_ABSOLUTE << 8):
f395a218
MB		 1689 /*
1690 * Old files may use this for global
1691 * coefficients.
1692 */
1693 if (le32_to_cpu(blk->id) == dsp->fw_id &&
1694 offset == 0) {
1695 region_name = "global coefficients";
1696 mem = wm_adsp_find_region(dsp, type);
1697 if (!mem) {
1698 adsp_err(dsp, "No ZM\n");
1699 break;
1700 }
1701 reg = wm_adsp_region_to_reg(mem, 0);
1702
1703 } else {
1704 region_name = "register";
1705 reg = offset;
1706 }
2159ad93 1707 break;
471f4885
MB		 1708
1709 case WMFW_ADSP1_DM:
1710 case WMFW_ADSP1_ZM:
1711 case WMFW_ADSP2_XM:
1712 case WMFW_ADSP2_YM:
1713 adsp_dbg(dsp, "%s.%d: %d bytes in %x for %x\n",
1714 file, blocks, le32_to_cpu(blk->len),
1715 type, le32_to_cpu(blk->id));
1716
1717 mem = wm_adsp_find_region(dsp, type);
1718 if (!mem) {
1719 adsp_err(dsp, "No base for region %x\n", type);
1720 break;
1721 }
1722
1723 reg = 0;
1724 list_for_each_entry(alg_region,
1725 &dsp->alg_regions, list) {
1726 if (le32_to_cpu(blk->id) == alg_region->alg &&
1727 type == alg_region->type) {
338c5188 1728 reg = alg_region->base;
471f4885
MB		 1729 reg = wm_adsp_region_to_reg(mem,
1730 reg);
338c5188 1731 reg += offset;
d733dc08 1732 break;
471f4885
MB		 1733 }
1734 }
1735
1736 if (reg == 0)
1737 adsp_err(dsp, "No %x for algorithm %x\n",
1738 type, le32_to_cpu(blk->id));
1739 break;
1740
2159ad93 1741 default:
25c62f7e
MB		 1742 adsp_err(dsp, "%s.%d: Unknown region type %x at %d\n",
1743 file, blocks, type, pos);
2159ad93
MB		 1744 break;
1745 }
1746
1747 if (reg) {
cf17c83c
MB		 1748 buf = wm_adsp_buf_alloc(blk->data,
1749 le32_to_cpu(blk->len),
1750 &buf_list);
a76fefab
MB		 1751 if (!buf) {
1752 adsp_err(dsp, "Out of memory\n");
f4b82812
WY		 1753 ret = -ENOMEM;
1754 goto out_fw;
a76fefab
MB		 1755 }
1756
20da6d5a
MB		 1757 adsp_dbg(dsp, "%s.%d: Writing %d bytes at %x\n",
1758 file, blocks, le32_to_cpu(blk->len),
1759 reg);
cf17c83c
MB		 1760 ret = regmap_raw_write_async(regmap, reg, buf->buf,
1761 le32_to_cpu(blk->len));
2159ad93
MB		 1762 if (ret != 0) {
1763 adsp_err(dsp,
43bc3bf6
DP		 1764 "%s.%d: Failed to write to %x in %s: %d\n",
1765 file, blocks, reg, region_name, ret);
2159ad93
MB		 1766 }
1767 }
1768
be951017 1769 pos += (le32_to_cpu(blk->len) + sizeof(*blk) + 3) & ~0x03;
2159ad93
MB		 1770 blocks++;
1771 }
1772
cf17c83c
MB		 1773 ret = regmap_async_complete(regmap);
1774 if (ret != 0)
1775 adsp_err(dsp, "Failed to complete async write: %d\n", ret);
1776
2159ad93
MB		 1777 if (pos > firmware->size)
1778 adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n",
1779 file, blocks, pos - firmware->size);
1780
f9f55e31
RF		 1781 wm_adsp_debugfs_save_binname(dsp, file);
1782
2159ad93 1783out_fw:
9da7a5a9 1784 regmap_async_complete(regmap);
2159ad93 1785 release_firmware(firmware);
cf17c83c 1786 wm_adsp_buf_free(&buf_list);
2159ad93
MB		 1787out:
1788 kfree(file);
f4b82812 1789 return ret;
2159ad93
MB		 1790}
1791
3809f001 1792int wm_adsp1_init(struct wm_adsp *dsp)
5e7a7a22 1793{
3809f001 1794 INIT_LIST_HEAD(&dsp->alg_regions);
5e7a7a22 1795
078e7183
CK		 1796 mutex_init(&dsp->pwr_lock);
1797
5e7a7a22
MB		 1798 return 0;
1799}
1800EXPORT_SYMBOL_GPL(wm_adsp1_init);
1801
2159ad93
MB		 1802int wm_adsp1_event(struct snd_soc_dapm_widget *w,
1803 struct snd_kcontrol *kcontrol,
1804 int event)
1805{
72718517 1806 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
2159ad93
MB		 1807 struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
1808 struct wm_adsp *dsp = &dsps[w->shift];
b0101b4f 1809 struct wm_adsp_alg_region *alg_region;
6ab2b7b4 1810 struct wm_coeff_ctl *ctl;
2159ad93 1811 int ret;
94e205bf 1812 int val;
2159ad93 1813
00200107 1814 dsp->card = codec->component.card;
92bb4c32 1815
078e7183
CK		 1816 mutex_lock(&dsp->pwr_lock);
1817
2159ad93
MB		 1818 switch (event) {
1819 case SND_SOC_DAPM_POST_PMU:
1820 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
1821 ADSP1_SYS_ENA, ADSP1_SYS_ENA);
1822
94e205bf
CR		 1823 /*
1824 * For simplicity set the DSP clock rate to be the
1825 * SYSCLK rate rather than making it configurable.
1826 */
1827 if(dsp->sysclk_reg) {
1828 ret = regmap_read(dsp->regmap, dsp->sysclk_reg, &val);
1829 if (ret != 0) {
1830 adsp_err(dsp, "Failed to read SYSCLK state: %d\n",
1831 ret);
078e7183 1832 goto err_mutex;
94e205bf
CR		 1833 }
1834
1835 val = (val & dsp->sysclk_mask)
1836 >> dsp->sysclk_shift;
1837
1838 ret = regmap_update_bits(dsp->regmap,
1839 dsp->base + ADSP1_CONTROL_31,
1840 ADSP1_CLK_SEL_MASK, val);
1841 if (ret != 0) {
1842 adsp_err(dsp, "Failed to set clock rate: %d\n",
1843 ret);
078e7183 1844 goto err_mutex;
94e205bf
CR		 1845 }
1846 }
1847
2159ad93
MB		 1848 ret = wm_adsp_load(dsp);
1849 if (ret != 0)
078e7183 1850 goto err_ena;
2159ad93 1851
b618a185 1852 ret = wm_adsp1_setup_algs(dsp);
db40517c 1853 if (ret != 0)
078e7183 1854 goto err_ena;
db40517c 1855
2159ad93
MB		 1856 ret = wm_adsp_load_coeff(dsp);
1857 if (ret != 0)
078e7183 1858 goto err_ena;
2159ad93 1859
0c2e3f34 1860 /* Initialize caches for enabled and unset controls */
81ad93ec 1861 ret = wm_coeff_init_control_caches(dsp);
6ab2b7b4 1862 if (ret != 0)
078e7183 1863 goto err_ena;
6ab2b7b4 1864
0c2e3f34 1865 /* Sync set controls */
81ad93ec 1866 ret = wm_coeff_sync_controls(dsp);
6ab2b7b4 1867 if (ret != 0)
078e7183 1868 goto err_ena;
6ab2b7b4 1869
2159ad93
MB		 1870 /* Start the core running */
1871 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
1872 ADSP1_CORE_ENA | ADSP1_START,
1873 ADSP1_CORE_ENA | ADSP1_START);
1874 break;
1875
1876 case SND_SOC_DAPM_PRE_PMD:
1877 /* Halt the core */
1878 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
1879 ADSP1_CORE_ENA | ADSP1_START, 0);
1880
1881 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_19,
1882 ADSP1_WDMA_BUFFER_LENGTH_MASK, 0);
1883
1884 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
1885 ADSP1_SYS_ENA, 0);
6ab2b7b4 1886
81ad93ec 1887 list_for_each_entry(ctl, &dsp->ctl_list, list)
6ab2b7b4 1888 ctl->enabled = 0;
b0101b4f
DP		 1889
1890 while (!list_empty(&dsp->alg_regions)) {
1891 alg_region = list_first_entry(&dsp->alg_regions,
1892 struct wm_adsp_alg_region,
1893 list);
1894 list_del(&alg_region->list);
1895 kfree(alg_region);
1896 }
2159ad93
MB		 1897 break;
1898
1899 default:
1900 break;
1901 }
1902
078e7183
CK		 1903 mutex_unlock(&dsp->pwr_lock);
1904
2159ad93
MB		 1905 return 0;
1906
078e7183 1907err_ena:
2159ad93
MB		 1908 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
1909 ADSP1_SYS_ENA, 0);
078e7183
CK		 1910err_mutex:
1911 mutex_unlock(&dsp->pwr_lock);
1912
2159ad93
MB		 1913 return ret;
1914}
1915EXPORT_SYMBOL_GPL(wm_adsp1_event);
1916
1917static int wm_adsp2_ena(struct wm_adsp *dsp)
1918{
1919 unsigned int val;
1920 int ret, count;
1921
1552c325
MB		 1922 ret = regmap_update_bits_async(dsp->regmap, dsp->base + ADSP2_CONTROL,
1923 ADSP2_SYS_ENA, ADSP2_SYS_ENA);
2159ad93
MB		 1924 if (ret != 0)
1925 return ret;
1926
1927 /* Wait for the RAM to start, should be near instantaneous */
939fd1e8 1928 for (count = 0; count < 10; ++count) {
2159ad93
MB		 1929 ret = regmap_read(dsp->regmap, dsp->base + ADSP2_STATUS1,
1930 &val);
1931 if (ret != 0)
1932 return ret;
939fd1e8
CK		 1933
1934 if (val & ADSP2_RAM_RDY)
1935 break;
1936
1937 msleep(1);
1938 }
2159ad93
MB		 1939
1940 if (!(val & ADSP2_RAM_RDY)) {
1941 adsp_err(dsp, "Failed to start DSP RAM\n");
1942 return -EBUSY;
1943 }
1944
1945 adsp_dbg(dsp, "RAM ready after %d polls\n", count);
2159ad93
MB		 1946
1947 return 0;
1948}
1949
18b1a902 1950static void wm_adsp2_boot_work(struct work_struct *work)
2159ad93 1951{
d8a64d6a
CK		 1952 struct wm_adsp *dsp = container_of(work,
1953 struct wm_adsp,
1954 boot_work);
2159ad93 1955 int ret;
d8a64d6a 1956 unsigned int val;
2159ad93 1957
078e7183
CK		 1958 mutex_lock(&dsp->pwr_lock);
1959
d8a64d6a
CK		 1960 /*
1961 * For simplicity set the DSP clock rate to be the
1962 * SYSCLK rate rather than making it configurable.
1963 */
1964 ret = regmap_read(dsp->regmap, ARIZONA_SYSTEM_CLOCK_1, &val);
1965 if (ret != 0) {
1966 adsp_err(dsp, "Failed to read SYSCLK state: %d\n", ret);
078e7183 1967 goto err_mutex;
d8a64d6a
CK		 1968 }
1969 val = (val & ARIZONA_SYSCLK_FREQ_MASK)
1970 >> ARIZONA_SYSCLK_FREQ_SHIFT;
92bb4c32 1971
d8a64d6a
CK		 1972 ret = regmap_update_bits_async(dsp->regmap,
1973 dsp->base + ADSP2_CLOCKING,
1974 ADSP2_CLK_SEL_MASK, val);
1975 if (ret != 0) {
1976 adsp_err(dsp, "Failed to set clock rate: %d\n", ret);
078e7183 1977 goto err_mutex;
d8a64d6a 1978 }
dd49e2c8 1979
d8a64d6a
CK		 1980 ret = wm_adsp2_ena(dsp);
1981 if (ret != 0)
078e7183 1982 goto err_mutex;
2159ad93 1983
d8a64d6a
CK		 1984 ret = wm_adsp_load(dsp);
1985 if (ret != 0)
078e7183 1986 goto err_ena;
2159ad93 1987
b618a185 1988 ret = wm_adsp2_setup_algs(dsp);
d8a64d6a 1989 if (ret != 0)
078e7183 1990 goto err_ena;
db40517c 1991
d8a64d6a
CK		 1992 ret = wm_adsp_load_coeff(dsp);
1993 if (ret != 0)
078e7183 1994 goto err_ena;
2159ad93 1995
d8a64d6a
CK		 1996 /* Initialize caches for enabled and unset controls */
1997 ret = wm_coeff_init_control_caches(dsp);
1998 if (ret != 0)
078e7183 1999 goto err_ena;
6ab2b7b4 2000
d8a64d6a
CK		 2001 /* Sync set controls */
2002 ret = wm_coeff_sync_controls(dsp);
2003 if (ret != 0)
078e7183 2004 goto err_ena;
d8a64d6a 2005
d8a64d6a
CK		 2006 dsp->running = true;
2007
078e7183
CK		 2008 mutex_unlock(&dsp->pwr_lock);
2009
d8a64d6a 2010 return;
6ab2b7b4 2011
078e7183 2012err_ena:
d8a64d6a
CK		 2013 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2014 ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0);
078e7183
CK		 2015err_mutex:
2016 mutex_unlock(&dsp->pwr_lock);
d8a64d6a
CK		 2017}
2018
12db5edd
CK		 2019int wm_adsp2_early_event(struct snd_soc_dapm_widget *w,
2020 struct snd_kcontrol *kcontrol, int event)
2021{
72718517 2022 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
12db5edd
CK		 2023 struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
2024 struct wm_adsp *dsp = &dsps[w->shift];
2025
00200107 2026 dsp->card = codec->component.card;
12db5edd
CK		 2027
2028 switch (event) {
2029 case SND_SOC_DAPM_PRE_PMU:
2030 queue_work(system_unbound_wq, &dsp->boot_work);
2031 break;
2032 default:
2033 break;
cab27258 2034 }
12db5edd
CK		 2035
2036 return 0;
2037}
2038EXPORT_SYMBOL_GPL(wm_adsp2_early_event);
2039
d8a64d6a
CK		 2040int wm_adsp2_event(struct snd_soc_dapm_widget *w,
2041 struct snd_kcontrol *kcontrol, int event)
2042{
72718517 2043 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
d8a64d6a
CK		 2044 struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
2045 struct wm_adsp *dsp = &dsps[w->shift];
2046 struct wm_adsp_alg_region *alg_region;
2047 struct wm_coeff_ctl *ctl;
2048 int ret;
2049
d8a64d6a
CK		 2050 switch (event) {
2051 case SND_SOC_DAPM_POST_PMU:
d8a64d6a
CK		 2052 flush_work(&dsp->boot_work);
2053
2054 if (!dsp->running)
2055 return -EIO;
6ab2b7b4 2056
d8a64d6a
CK		 2057 ret = regmap_update_bits(dsp->regmap,
2058 dsp->base + ADSP2_CONTROL,
00e4c3b6
CK		 2059 ADSP2_CORE_ENA | ADSP2_START,
2060 ADSP2_CORE_ENA | ADSP2_START);
2159ad93
MB		 2061 if (ret != 0)
2062 goto err;
2063 break;
2064
2065 case SND_SOC_DAPM_PRE_PMD:
10337b07
RF		 2066 /* Log firmware state, it can be useful for analysis */
2067 wm_adsp2_show_fw_status(dsp);
2068
078e7183
CK		 2069 mutex_lock(&dsp->pwr_lock);
2070
f9f55e31
RF		 2071 wm_adsp_debugfs_clear(dsp);
2072
2073 dsp->fw_id = 0;
2074 dsp->fw_id_version = 0;
1023dbd9
MB		 2075 dsp->running = false;
2076
2159ad93 2077 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
a7f9be7e
MB		 2078 ADSP2_SYS_ENA | ADSP2_CORE_ENA |
2079 ADSP2_START, 0);
973838a0 2080
2d30b575
MB		 2081 /* Make sure DMAs are quiesced */
2082 regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_1, 0);
2083 regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_2, 0);
2084 regmap_write(dsp->regmap, dsp->base + ADSP2_RDMA_CONFIG_1, 0);
2085
81ad93ec 2086 list_for_each_entry(ctl, &dsp->ctl_list, list)
6ab2b7b4 2087 ctl->enabled = 0;
6ab2b7b4 2088
471f4885
MB		 2089 while (!list_empty(&dsp->alg_regions)) {
2090 alg_region = list_first_entry(&dsp->alg_regions,
2091 struct wm_adsp_alg_region,
2092 list);
2093 list_del(&alg_region->list);
2094 kfree(alg_region);
2095 }
ddbc5efe 2096
078e7183
CK		 2097 mutex_unlock(&dsp->pwr_lock);
2098
ddbc5efe 2099 adsp_dbg(dsp, "Shutdown complete\n");
2159ad93
MB		 2100 break;
2101
2102 default:
2103 break;
2104 }
2105
2106 return 0;
2107err:
2108 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
a7f9be7e 2109 ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0);
2159ad93
MB		 2110 return ret;
2111}
2112EXPORT_SYMBOL_GPL(wm_adsp2_event);
973838a0 2113
f5e2ce92
RF		 2114int wm_adsp2_codec_probe(struct wm_adsp *dsp, struct snd_soc_codec *codec)
2115{
f9f55e31
RF		 2116 wm_adsp2_init_debugfs(dsp, codec);
2117
218e5087 2118 return snd_soc_add_codec_controls(codec,
336d0442
RF		 2119 &wm_adsp_fw_controls[dsp->num - 1],
2120 1);
f5e2ce92
RF		 2121}
2122EXPORT_SYMBOL_GPL(wm_adsp2_codec_probe);
2123
2124int wm_adsp2_codec_remove(struct wm_adsp *dsp, struct snd_soc_codec *codec)
2125{
f9f55e31
RF		 2126 wm_adsp2_cleanup_debugfs(dsp);
2127
f5e2ce92
RF		 2128 return 0;
2129}
2130EXPORT_SYMBOL_GPL(wm_adsp2_codec_remove);
2131
81ac58b1 2132int wm_adsp2_init(struct wm_adsp *dsp)
973838a0
MB		 2133{
2134 int ret;
2135
10a2b662
MB		 2136 /*
2137 * Disable the DSP memory by default when in reset for a small
2138 * power saving.
2139 */
3809f001 2140 ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
10a2b662
MB		 2141 ADSP2_MEM_ENA, 0);
2142 if (ret != 0) {
3809f001 2143 adsp_err(dsp, "Failed to clear memory retention: %d\n", ret);
10a2b662
MB		 2144 return ret;
2145 }
2146
3809f001
CK		 2147 INIT_LIST_HEAD(&dsp->alg_regions);
2148 INIT_LIST_HEAD(&dsp->ctl_list);
2149 INIT_WORK(&dsp->boot_work, wm_adsp2_boot_work);
6ab2b7b4 2150
078e7183
CK		 2151 mutex_init(&dsp->pwr_lock);
2152
973838a0
MB		 2153 return 0;
2154}
2155EXPORT_SYMBOL_GPL(wm_adsp2_init);
0a37c6ef
PD		 2156
2157MODULE_LICENSE("GPL v2");
Empty description
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