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Merge tag 'media/v4.20-3' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab...
[linux.git] / drivers / tty / moxa.c
CommitLineData
e3b3d0f5 1// SPDX-License-Identifier: GPL-2.0+
1da177e4
LT		 2/*****************************************************************************/
3/*
4 * moxa.c -- MOXA Intellio family multiport serial driver.
5 *
b9705b60
JS		 6 * Copyright (C) 1999-2000 Moxa Technologies ([email protected]).
7 * Copyright (c) 2007 Jiri Slaby <[email protected]>
1da177e4
LT		 8 *
9 * This code is loosely based on the Linux serial driver, written by
10 * Linus Torvalds, Theodore T'so and others.
1da177e4
LT		 11 */
12
13/*
14 * MOXA Intellio Series Driver
15 * for : LINUX
16 * date : 1999/1/7
17 * version : 5.1
18 */
19
1da177e4
LT		 20#include <linux/module.h>
21#include <linux/types.h>
22#include <linux/mm.h>
23#include <linux/ioport.h>
24#include <linux/errno.h>
03718234 25#include <linux/firmware.h>
1da177e4
LT		 26#include <linux/signal.h>
27#include <linux/sched.h>
28#include <linux/timer.h>
29#include <linux/interrupt.h>
30#include <linux/tty.h>
31#include <linux/tty_flip.h>
32#include <linux/major.h>
33#include <linux/string.h>
34#include <linux/fcntl.h>
35#include <linux/ptrace.h>
36#include <linux/serial.h>
37#include <linux/tty_driver.h>
38#include <linux/delay.h>
39#include <linux/pci.h>
40#include <linux/init.h>
41#include <linux/bitops.h>
5a0e3ad6 42#include <linux/slab.h>
5a3c6b25 43#include <linux/ratelimit.h>
1da177e4 44
1da177e4 45#include <asm/io.h>
7c0f6ba6 46#include <linux/uaccess.h>
1da177e4 47
03718234
JS		 48#include "moxa.h"
49
b9705b60 50#define MOXA_VERSION "6.0k"
1da177e4 51
03718234
JS		 52#define MOXA_FW_HDRLEN 32
53
11324edd 54#define MOXAMAJOR 172
1da177e4 55
11324edd 56#define MAX_BOARDS 4 /* Don't change this value */
1da177e4 57#define MAX_PORTS_PER_BOARD 32 /* Don't change this value */
11324edd 58#define MAX_PORTS (MAX_BOARDS * MAX_PORTS_PER_BOARD)
1da177e4 59
08d01c79
JS		 60#define MOXA_IS_320(brd) ((brd)->boardType == MOXA_BOARD_C320_ISA || \
61 (brd)->boardType == MOXA_BOARD_C320_PCI)
62
1da177e4
LT		 63/*
64 * Define the Moxa PCI vendor and device IDs.
65 */
11324edd
JS		 66#define MOXA_BUS_TYPE_ISA 0
67#define MOXA_BUS_TYPE_PCI 1
1da177e4 68
1da177e4
LT		 69enum {
70 MOXA_BOARD_C218_PCI = 1,
71 MOXA_BOARD_C218_ISA,
72 MOXA_BOARD_C320_PCI,
73 MOXA_BOARD_C320_ISA,
74 MOXA_BOARD_CP204J,
75};
76
77static char *moxa_brdname[] =
78{
79 "C218 Turbo PCI series",
80 "C218 Turbo ISA series",
81 "C320 Turbo PCI series",
82 "C320 Turbo ISA series",
83 "CP-204J series",
84};
85
86#ifdef CONFIG_PCI
50bd842b 87static const struct pci_device_id moxa_pcibrds[] = {
5ebb4078
JS		 88 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C218),
89 .driver_data = MOXA_BOARD_C218_PCI },
90 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C320),
91 .driver_data = MOXA_BOARD_C320_PCI },
92 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP204J),
93 .driver_data = MOXA_BOARD_CP204J },
1da177e4
LT		 94 { 0 }
95};
96MODULE_DEVICE_TABLE(pci, moxa_pcibrds);
97#endif /* CONFIG_PCI */
98
03718234
JS		 99struct moxa_port;
100
8f8ecbad 101static struct moxa_board_conf {
1da177e4
LT		 102 int boardType;
103 int numPorts;
1da177e4 104 int busType;
8f8ecbad 105
810ab09b 106 unsigned int ready;
8f8ecbad 107
03718234
JS		 108 struct moxa_port *ports;
109
8f8ecbad
JS		 110 void __iomem *basemem;
111 void __iomem *intNdx;
112 void __iomem *intPend;
113 void __iomem *intTable;
114} moxa_boards[MAX_BOARDS];
115
116struct mxser_mstatus {
117 tcflag_t cflag;
118 int cts;
119 int dsr;
120 int ri;
121 int dcd;
9dff89cd 122};
1da177e4 123
8f8ecbad
JS		 124struct moxaq_str {
125 int inq;
126 int outq;
127};
1da177e4 128
8f8ecbad 129struct moxa_port {
9de6a51f 130 struct tty_port port;
b4173f45 131 struct moxa_board_conf *board;
7bcf97d1
JS		 132 void __iomem *tableAddr;
133
1da177e4 134 int type;
1da177e4 135 int cflag;
7bcf97d1 136 unsigned long statusflags;
1da177e4 137
8482bcd5 138 u8 DCDState; /* Protected by the port lock */
7bcf97d1
JS		 139 u8 lineCtrl;
140 u8 lowChkFlag;
8f8ecbad 141};
1da177e4 142
74d7d97b
JS		 143struct mon_str {
144 int tick;
145 int rxcnt[MAX_PORTS];
146 int txcnt[MAX_PORTS];
147};
148
1da177e4 149/* statusflags */
a808ac0c
AC		 150#define TXSTOPPED 1
151#define LOWWAIT 2
152#define EMPTYWAIT 3
1da177e4 153
1da177e4 154
1da177e4
LT		 155#define WAKEUP_CHARS 256
156
1da177e4 157static int ttymajor = MOXAMAJOR;
74d7d97b
JS		 158static struct mon_str moxaLog;
159static unsigned int moxaFuncTout = HZ / 2;
7bcf97d1 160static unsigned int moxaLowWaterChk;
a8f5cda0 161static DEFINE_MUTEX(moxa_openlock);
e8c62103 162static DEFINE_SPINLOCK(moxa_lock);
c6fc826e 163
d353eca4
JS		 164static unsigned long baseaddr[MAX_BOARDS];
165static unsigned int type[MAX_BOARDS];
166static unsigned int numports[MAX_BOARDS];
793be898 167static struct tty_port moxa_service_port;
1da177e4
LT		 168
169MODULE_AUTHOR("William Chen");
170MODULE_DESCRIPTION("MOXA Intellio Family Multiport Board Device Driver");
171MODULE_LICENSE("GPL");
e6c4ef98
BH		 172MODULE_FIRMWARE("c218tunx.cod");
173MODULE_FIRMWARE("cp204unx.cod");
174MODULE_FIRMWARE("c320tunx.cod");
c6fc826e 175
d353eca4
JS		 176module_param_array(type, uint, NULL, 0);
177MODULE_PARM_DESC(type, "card type: C218=2, C320=4");
3b60daf8 178module_param_hw_array(baseaddr, ulong, ioport, NULL, 0);
d353eca4
JS		 179MODULE_PARM_DESC(baseaddr, "base address");
180module_param_array(numports, uint, NULL, 0);
181MODULE_PARM_DESC(numports, "numports (ignored for C218)");
c6fc826e 182
1da177e4 183module_param(ttymajor, int, 0);
1da177e4 184
1da177e4
LT		 185/*
186 * static functions:
187 */
1da177e4
LT		 188static int moxa_open(struct tty_struct *, struct file *);
189static void moxa_close(struct tty_struct *, struct file *);
190static int moxa_write(struct tty_struct *, const unsigned char *, int);
191static int moxa_write_room(struct tty_struct *);
192static void moxa_flush_buffer(struct tty_struct *);
193static int moxa_chars_in_buffer(struct tty_struct *);
606d099c 194static void moxa_set_termios(struct tty_struct *, struct ktermios *);
1da177e4
LT		 195static void moxa_stop(struct tty_struct *);
196static void moxa_start(struct tty_struct *);
197static void moxa_hangup(struct tty_struct *);
60b33c13 198static int moxa_tiocmget(struct tty_struct *tty);
20b9d177 199static int moxa_tiocmset(struct tty_struct *tty,
1da177e4 200 unsigned int set, unsigned int clear);
24ed960a 201static void moxa_poll(struct timer_list *);
db1acaa6 202static void moxa_set_tty_param(struct tty_struct *, struct ktermios *);
f176178b 203static void moxa_shutdown(struct tty_port *);
31f35939 204static int moxa_carrier_raised(struct tty_port *);
f176178b 205static void moxa_dtr_rts(struct tty_port *, int);
1da177e4
LT		 206/*
207 * moxa board interface functions:
208 */
b4173f45
JS		 209static void MoxaPortEnable(struct moxa_port *);
210static void MoxaPortDisable(struct moxa_port *);
211static int MoxaPortSetTermio(struct moxa_port *, struct ktermios *, speed_t);
212static int MoxaPortGetLineOut(struct moxa_port *, int *, int *);
213static void MoxaPortLineCtrl(struct moxa_port *, int, int);
214static void MoxaPortFlowCtrl(struct moxa_port *, int, int, int, int, int);
215static int MoxaPortLineStatus(struct moxa_port *);
b4173f45 216static void MoxaPortFlushData(struct moxa_port *, int);
d450b5a0 217static int MoxaPortWriteData(struct tty_struct *, const unsigned char *, int);
7bcf97d1 218static int MoxaPortReadData(struct moxa_port *);
b4173f45
JS		 219static int MoxaPortTxQueue(struct moxa_port *);
220static int MoxaPortRxQueue(struct moxa_port *);
221static int MoxaPortTxFree(struct moxa_port *);
222static void MoxaPortTxDisable(struct moxa_port *);
223static void MoxaPortTxEnable(struct moxa_port *);
1c729ab1
AV		 224static int moxa_get_serial_info(struct tty_struct *, struct serial_struct *);
225static int moxa_set_serial_info(struct tty_struct *, struct serial_struct *);
b4173f45 226static void MoxaSetFifo(struct moxa_port *port, int enable);
1da177e4 227
74d7d97b
JS		 228/*
229 * I/O functions
230 */
231
a808ac0c
AC		 232static DEFINE_SPINLOCK(moxafunc_lock);
233
74d7d97b
JS		 234static void moxa_wait_finish(void __iomem *ofsAddr)
235{
236 unsigned long end = jiffies + moxaFuncTout;
237
238 while (readw(ofsAddr + FuncCode) != 0)
239 if (time_after(jiffies, end))
240 return;
5a3c6b25
MZ		 241 if (readw(ofsAddr + FuncCode) != 0)
242 printk_ratelimited(KERN_WARNING "moxa function expired\n");
74d7d97b
JS		 243}
244
eaa95a8d 245static void moxafunc(void __iomem *ofsAddr, u16 cmd, u16 arg)
74d7d97b 246{
f5c5a36d
AC		 247 unsigned long flags;
248 spin_lock_irqsave(&moxafunc_lock, flags);
74d7d97b
JS		 249 writew(arg, ofsAddr + FuncArg);
250 writew(cmd, ofsAddr + FuncCode);
251 moxa_wait_finish(ofsAddr);
f5c5a36d
AC		 252 spin_unlock_irqrestore(&moxafunc_lock, flags);
253}
254
255static int moxafuncret(void __iomem *ofsAddr, u16 cmd, u16 arg)
256{
257 unsigned long flags;
258 u16 ret;
259 spin_lock_irqsave(&moxafunc_lock, flags);
260 writew(arg, ofsAddr + FuncArg);
261 writew(cmd, ofsAddr + FuncCode);
262 moxa_wait_finish(ofsAddr);
263 ret = readw(ofsAddr + FuncArg);
264 spin_unlock_irqrestore(&moxafunc_lock, flags);
265 return ret;
74d7d97b
JS		 266}
267
7bcf97d1
JS		 268static void moxa_low_water_check(void __iomem *ofsAddr)
269{
270 u16 rptr, wptr, mask, len;
271
272 if (readb(ofsAddr + FlagStat) & Xoff_state) {
273 rptr = readw(ofsAddr + RXrptr);
274 wptr = readw(ofsAddr + RXwptr);
275 mask = readw(ofsAddr + RX_mask);
276 len = (wptr - rptr) & mask;
277 if (len <= Low_water)
278 moxafunc(ofsAddr, FC_SendXon, 0);
279 }
280}
281
74d7d97b
JS		 282/*
283 * TTY operations
284 */
285
6caa76b7 286static int moxa_ioctl(struct tty_struct *tty,
74d7d97b
JS		 287 unsigned int cmd, unsigned long arg)
288{
289 struct moxa_port *ch = tty->driver_data;
290 void __user *argp = (void __user *)arg;
a8f5cda0 291 int status, ret = 0;
74d7d97b
JS		 292
293 if (tty->index == MAX_PORTS) {
294 if (cmd != MOXA_GETDATACOUNT && cmd != MOXA_GET_IOQUEUE &&
295 cmd != MOXA_GETMSTATUS)
296 return -EINVAL;
297 } else if (!ch)
298 return -ENODEV;
299
300 switch (cmd) {
301 case MOXA_GETDATACOUNT:
302 moxaLog.tick = jiffies;
a8f5cda0
JS		 303 if (copy_to_user(argp, &moxaLog, sizeof(moxaLog)))
304 ret = -EFAULT;
305 break;
74d7d97b
JS		 306 case MOXA_FLUSH_QUEUE:
307 MoxaPortFlushData(ch, arg);
a8f5cda0 308 break;
74d7d97b
JS		 309 case MOXA_GET_IOQUEUE: {
310 struct moxaq_str __user *argm = argp;
311 struct moxaq_str tmp;
312 struct moxa_port *p;
313 unsigned int i, j;
314
315 for (i = 0; i < MAX_BOARDS; i++) {
316 p = moxa_boards[i].ports;
317 for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) {
318 memset(&tmp, 0, sizeof(tmp));
e8c62103 319 spin_lock_bh(&moxa_lock);
74d7d97b
JS		 320 if (moxa_boards[i].ready) {
321 tmp.inq = MoxaPortRxQueue(p);
322 tmp.outq = MoxaPortTxQueue(p);
323 }
e8c62103
AC		 324 spin_unlock_bh(&moxa_lock);
325 if (copy_to_user(argm, &tmp, sizeof(tmp)))
74d7d97b
JS		 326 return -EFAULT;
327 }
328 }
a8f5cda0 329 break;
74d7d97b
JS		 330 } case MOXA_GET_OQUEUE:
331 status = MoxaPortTxQueue(ch);
a8f5cda0
JS		 332 ret = put_user(status, (unsigned long __user *)argp);
333 break;
74d7d97b
JS		 334 case MOXA_GET_IQUEUE:
335 status = MoxaPortRxQueue(ch);
a8f5cda0
JS		 336 ret = put_user(status, (unsigned long __user *)argp);
337 break;
74d7d97b
JS		 338 case MOXA_GETMSTATUS: {
339 struct mxser_mstatus __user *argm = argp;
340 struct mxser_mstatus tmp;
341 struct moxa_port *p;
342 unsigned int i, j;
343
344 for (i = 0; i < MAX_BOARDS; i++) {
345 p = moxa_boards[i].ports;
346 for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) {
d450b5a0 347 struct tty_struct *ttyp;
74d7d97b 348 memset(&tmp, 0, sizeof(tmp));
e8c62103
AC		 349 spin_lock_bh(&moxa_lock);
350 if (!moxa_boards[i].ready) {
351 spin_unlock_bh(&moxa_lock);
74d7d97b 352 goto copy;
e8c62103 353 }
74d7d97b
JS		 354
355 status = MoxaPortLineStatus(p);
e8c62103
AC		 356 spin_unlock_bh(&moxa_lock);
357
74d7d97b
JS		 358 if (status & 1)
359 tmp.cts = 1;
360 if (status & 2)
361 tmp.dsr = 1;
362 if (status & 4)
363 tmp.dcd = 1;
364
d450b5a0 365 ttyp = tty_port_tty_get(&p->port);
adc8d746 366 if (!ttyp)
74d7d97b
JS		 367 tmp.cflag = p->cflag;
368 else
adc8d746 369 tmp.cflag = ttyp->termios.c_cflag;
df43daaa 370 tty_kref_put(ttyp);
74d7d97b 371copy:
e8c62103 372 if (copy_to_user(argm, &tmp, sizeof(tmp)))
74d7d97b
JS		 373 return -EFAULT;
374 }
375 }
a8f5cda0 376 break;
74d7d97b 377 }
a8f5cda0
JS		 378 default:
379 ret = -ENOIOCTLCMD;
74d7d97b 380 }
a8f5cda0 381 return ret;
74d7d97b
JS		 382}
383
9e98966c 384static int moxa_break_ctl(struct tty_struct *tty, int state)
74d7d97b
JS		 385{
386 struct moxa_port *port = tty->driver_data;
387
388 moxafunc(port->tableAddr, state ? FC_SendBreak : FC_StopBreak,
389 Magic_code);
9e98966c 390 return 0;
74d7d97b
JS		 391}
392
b68e31d0 393static const struct tty_operations moxa_ops = {
1da177e4
LT		 394 .open = moxa_open,
395 .close = moxa_close,
396 .write = moxa_write,
397 .write_room = moxa_write_room,
398 .flush_buffer = moxa_flush_buffer,
399 .chars_in_buffer = moxa_chars_in_buffer,
1da177e4 400 .ioctl = moxa_ioctl,
1da177e4
LT		 401 .set_termios = moxa_set_termios,
402 .stop = moxa_stop,
403 .start = moxa_start,
404 .hangup = moxa_hangup,
74d7d97b 405 .break_ctl = moxa_break_ctl,
1da177e4
LT		 406 .tiocmget = moxa_tiocmget,
407 .tiocmset = moxa_tiocmset,
1c729ab1
AV		 408 .set_serial = moxa_set_serial_info,
409 .get_serial = moxa_get_serial_info,
1da177e4
LT		 410};
411
31f35939
AC		 412static const struct tty_port_operations moxa_port_ops = {
413 .carrier_raised = moxa_carrier_raised,
f176178b
AC		 414 .dtr_rts = moxa_dtr_rts,
415 .shutdown = moxa_shutdown,
31f35939
AC		 416};
417
aa7e5221 418static struct tty_driver *moxaDriver;
1d27e3e2 419static DEFINE_TIMER(moxaTimer, moxa_poll);
33f0f88f 420
74d7d97b
JS		 421/*
422 * HW init
423 */
424
03718234
JS		 425static int moxa_check_fw_model(struct moxa_board_conf *brd, u8 model)
426{
427 switch (brd->boardType) {
428 case MOXA_BOARD_C218_ISA:
429 case MOXA_BOARD_C218_PCI:
430 if (model != 1)
431 goto err;
432 break;
433 case MOXA_BOARD_CP204J:
434 if (model != 3)
435 goto err;
436 break;
437 default:
438 if (model != 2)
439 goto err;
440 break;
441 }
442 return 0;
443err:
444 return -EINVAL;
445}
446
447static int moxa_check_fw(const void *ptr)
448{
449 const __le16 *lptr = ptr;
450
451 if (*lptr != cpu_to_le16(0x7980))
452 return -EINVAL;
453
454 return 0;
455}
456
457static int moxa_load_bios(struct moxa_board_conf *brd, const u8 *buf,
458 size_t len)
459{
460 void __iomem *baseAddr = brd->basemem;
461 u16 tmp;
462
463 writeb(HW_reset, baseAddr + Control_reg); /* reset */
464 msleep(10);
465 memset_io(baseAddr, 0, 4096);
466 memcpy_toio(baseAddr, buf, len); /* download BIOS */
467 writeb(0, baseAddr + Control_reg); /* restart */
468
469 msleep(2000);
470
471 switch (brd->boardType) {
472 case MOXA_BOARD_C218_ISA:
473 case MOXA_BOARD_C218_PCI:
474 tmp = readw(baseAddr + C218_key);
475 if (tmp != C218_KeyCode)
476 goto err;
477 break;
478 case MOXA_BOARD_CP204J:
479 tmp = readw(baseAddr + C218_key);
480 if (tmp != CP204J_KeyCode)
481 goto err;
482 break;
483 default:
484 tmp = readw(baseAddr + C320_key);
485 if (tmp != C320_KeyCode)
486 goto err;
487 tmp = readw(baseAddr + C320_status);
488 if (tmp != STS_init) {
eaa95a8d 489 printk(KERN_ERR "MOXA: bios upload failed -- CPU/Basic "
03718234
JS		 490 "module not found\n");
491 return -EIO;
492 }
493 break;
494 }
495
496 return 0;
497err:
eaa95a8d 498 printk(KERN_ERR "MOXA: bios upload failed -- board not found\n");
03718234
JS		 499 return -EIO;
500}
501
502static int moxa_load_320b(struct moxa_board_conf *brd, const u8 *ptr,
503 size_t len)
504{
505 void __iomem *baseAddr = brd->basemem;
506
507 if (len < 7168) {
eaa95a8d 508 printk(KERN_ERR "MOXA: invalid 320 bios -- too short\n");
03718234
JS		 509 return -EINVAL;
510 }
511
512 writew(len - 7168 - 2, baseAddr + C320bapi_len);
513 writeb(1, baseAddr + Control_reg); /* Select Page 1 */
514 memcpy_toio(baseAddr + DynPage_addr, ptr, 7168);
515 writeb(2, baseAddr + Control_reg); /* Select Page 2 */
516 memcpy_toio(baseAddr + DynPage_addr, ptr + 7168, len - 7168);
517
518 return 0;
519}
520
5292bcd3 521static int moxa_real_load_code(struct moxa_board_conf *brd, const void *ptr,
03718234
JS		 522 size_t len)
523{
524 void __iomem *baseAddr = brd->basemem;
b46f69cd 525 const __le16 *uptr = ptr;
03718234 526 size_t wlen, len2, j;
5292bcd3 527 unsigned long key, loadbuf, loadlen, checksum, checksum_ok;
08d01c79 528 unsigned int i, retry;
03718234
JS		 529 u16 usum, keycode;
530
5292bcd3
JS		 531 keycode = (brd->boardType == MOXA_BOARD_CP204J) ? CP204J_KeyCode :
532 C218_KeyCode;
03718234 533
5292bcd3
JS		 534 switch (brd->boardType) {
535 case MOXA_BOARD_CP204J:
536 case MOXA_BOARD_C218_ISA:
537 case MOXA_BOARD_C218_PCI:
538 key = C218_key;
539 loadbuf = C218_LoadBuf;
540 loadlen = C218DLoad_len;
541 checksum = C218check_sum;
542 checksum_ok = C218chksum_ok;
543 break;
544 default:
545 key = C320_key;
546 keycode = C320_KeyCode;
547 loadbuf = C320_LoadBuf;
548 loadlen = C320DLoad_len;
549 checksum = C320check_sum;
550 checksum_ok = C320chksum_ok;
551 break;
03718234 552 }
03718234
JS		 553
554 usum = 0;
555 wlen = len >> 1;
556 for (i = 0; i < wlen; i++)
557 usum += le16_to_cpu(uptr[i]);
558 retry = 0;
559 do {
560 wlen = len >> 1;
561 j = 0;
562 while (wlen) {
563 len2 = (wlen > 2048) ? 2048 : wlen;
564 wlen -= len2;
5292bcd3 565 memcpy_toio(baseAddr + loadbuf, ptr + j, len2 << 1);
03718234 566 j += len2 << 1;
5292bcd3
JS		 567
568 writew(len2, baseAddr + loadlen);
569 writew(0, baseAddr + key);
570 for (i = 0; i < 100; i++) {
571 if (readw(baseAddr + key) == keycode)
03718234
JS		 572 break;
573 msleep(10);
574 }
5292bcd3 575 if (readw(baseAddr + key) != keycode)
03718234
JS		 576 return -EIO;
577 }
5292bcd3
JS		 578 writew(0, baseAddr + loadlen);
579 writew(usum, baseAddr + checksum);
580 writew(0, baseAddr + key);
581 for (i = 0; i < 100; i++) {
582 if (readw(baseAddr + key) == keycode)
03718234
JS		 583 break;
584 msleep(10);
585 }
586 retry++;
5292bcd3
JS		 587 } while ((readb(baseAddr + checksum_ok) != 1) && (retry < 3));
588 if (readb(baseAddr + checksum_ok) != 1)
03718234
JS		 589 return -EIO;
590
5292bcd3 591 writew(0, baseAddr + key);
03718234
JS		 592 for (i = 0; i < 600; i++) {
593 if (readw(baseAddr + Magic_no) == Magic_code)
594 break;
595 msleep(10);
596 }
597 if (readw(baseAddr + Magic_no) != Magic_code)
598 return -EIO;
599
08d01c79 600 if (MOXA_IS_320(brd)) {
5292bcd3
JS		 601 if (brd->busType == MOXA_BUS_TYPE_PCI) { /* ASIC board */
602 writew(0x3800, baseAddr + TMS320_PORT1);
603 writew(0x3900, baseAddr + TMS320_PORT2);
604 writew(28499, baseAddr + TMS320_CLOCK);
605 } else {
606 writew(0x3200, baseAddr + TMS320_PORT1);
607 writew(0x3400, baseAddr + TMS320_PORT2);
608 writew(19999, baseAddr + TMS320_CLOCK);
609 }
03718234
JS		 610 }
611 writew(1, baseAddr + Disable_IRQ);
612 writew(0, baseAddr + Magic_no);
613 for (i = 0; i < 500; i++) {
614 if (readw(baseAddr + Magic_no) == Magic_code)
615 break;
616 msleep(10);
617 }
618 if (readw(baseAddr + Magic_no) != Magic_code)
619 return -EIO;
620
08d01c79 621 if (MOXA_IS_320(brd)) {
5292bcd3
JS		 622 j = readw(baseAddr + Module_cnt);
623 if (j <= 0)
624 return -EIO;
625 brd->numPorts = j * 8;
626 writew(j, baseAddr + Module_no);
627 writew(0, baseAddr + Magic_no);
628 for (i = 0; i < 600; i++) {
629 if (readw(baseAddr + Magic_no) == Magic_code)
630 break;
631 msleep(10);
632 }
633 if (readw(baseAddr + Magic_no) != Magic_code)
634 return -EIO;
03718234 635 }
03718234
JS		 636 brd->intNdx = baseAddr + IRQindex;
637 brd->intPend = baseAddr + IRQpending;
638 brd->intTable = baseAddr + IRQtable;
639
640 return 0;
641}
642
643static int moxa_load_code(struct moxa_board_conf *brd, const void *ptr,
644 size_t len)
645{
646 void __iomem *ofsAddr, *baseAddr = brd->basemem;
647 struct moxa_port *port;
648 int retval, i;
649
650 if (len % 2) {
eaa95a8d 651 printk(KERN_ERR "MOXA: bios length is not even\n");
03718234
JS		 652 return -EINVAL;
653 }
654
5292bcd3
JS		 655 retval = moxa_real_load_code(brd, ptr, len); /* may change numPorts */
656 if (retval)
657 return retval;
658
03718234
JS		 659 switch (brd->boardType) {
660 case MOXA_BOARD_C218_ISA:
661 case MOXA_BOARD_C218_PCI:
662 case MOXA_BOARD_CP204J:
03718234
JS		 663 port = brd->ports;
664 for (i = 0; i < brd->numPorts; i++, port++) {
b4173f45 665 port->board = brd;
03718234
JS		 666 port->DCDState = 0;
667 port->tableAddr = baseAddr + Extern_table +
668 Extern_size * i;
669 ofsAddr = port->tableAddr;
670 writew(C218rx_mask, ofsAddr + RX_mask);
671 writew(C218tx_mask, ofsAddr + TX_mask);
672 writew(C218rx_spage + i * C218buf_pageno, ofsAddr + Page_rxb);
673 writew(readw(ofsAddr + Page_rxb) + C218rx_pageno, ofsAddr + EndPage_rxb);
674
675 writew(C218tx_spage + i * C218buf_pageno, ofsAddr + Page_txb);
676 writew(readw(ofsAddr + Page_txb) + C218tx_pageno, ofsAddr + EndPage_txb);
677
678 }
679 break;
680 default:
03718234
JS		 681 port = brd->ports;
682 for (i = 0; i < brd->numPorts; i++, port++) {
b4173f45 683 port->board = brd;
03718234
JS		 684 port->DCDState = 0;
685 port->tableAddr = baseAddr + Extern_table +
686 Extern_size * i;
687 ofsAddr = port->tableAddr;
688 switch (brd->numPorts) {
689 case 8:
690 writew(C320p8rx_mask, ofsAddr + RX_mask);
691 writew(C320p8tx_mask, ofsAddr + TX_mask);
692 writew(C320p8rx_spage + i * C320p8buf_pgno, ofsAddr + Page_rxb);
693 writew(readw(ofsAddr + Page_rxb) + C320p8rx_pgno, ofsAddr + EndPage_rxb);
694 writew(C320p8tx_spage + i * C320p8buf_pgno, ofsAddr + Page_txb);
695 writew(readw(ofsAddr + Page_txb) + C320p8tx_pgno, ofsAddr + EndPage_txb);
696
697 break;
698 case 16:
699 writew(C320p16rx_mask, ofsAddr + RX_mask);
700 writew(C320p16tx_mask, ofsAddr + TX_mask);
701 writew(C320p16rx_spage + i * C320p16buf_pgno, ofsAddr + Page_rxb);
702 writew(readw(ofsAddr + Page_rxb) + C320p16rx_pgno, ofsAddr + EndPage_rxb);
703 writew(C320p16tx_spage + i * C320p16buf_pgno, ofsAddr + Page_txb);
704 writew(readw(ofsAddr + Page_txb) + C320p16tx_pgno, ofsAddr + EndPage_txb);
705 break;
706
707 case 24:
708 writew(C320p24rx_mask, ofsAddr + RX_mask);
709 writew(C320p24tx_mask, ofsAddr + TX_mask);
710 writew(C320p24rx_spage + i * C320p24buf_pgno, ofsAddr + Page_rxb);
711 writew(readw(ofsAddr + Page_rxb) + C320p24rx_pgno, ofsAddr + EndPage_rxb);
712 writew(C320p24tx_spage + i * C320p24buf_pgno, ofsAddr + Page_txb);
713 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
714 break;
715 case 32:
716 writew(C320p32rx_mask, ofsAddr + RX_mask);
717 writew(C320p32tx_mask, ofsAddr + TX_mask);
718 writew(C320p32tx_ofs, ofsAddr + Ofs_txb);
719 writew(C320p32rx_spage + i * C320p32buf_pgno, ofsAddr + Page_rxb);
720 writew(readb(ofsAddr + Page_rxb), ofsAddr + EndPage_rxb);
721 writew(C320p32tx_spage + i * C320p32buf_pgno, ofsAddr + Page_txb);
722 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
723 break;
724 }
725 }
726 break;
727 }
03718234
JS		 728 return 0;
729}
730
731static int moxa_load_fw(struct moxa_board_conf *brd, const struct firmware *fw)
732{
2bca76e8 733 const void *ptr = fw->data;
03718234
JS		 734 char rsn[64];
735 u16 lens[5];
736 size_t len;
737 unsigned int a, lenp, lencnt;
738 int ret = -EINVAL;
739 struct {
740 __le32 magic; /* 0x34303430 */
741 u8 reserved1[2];
742 u8 type; /* UNIX = 3 */
743 u8 model; /* C218T=1, C320T=2, CP204=3 */
744 u8 reserved2[8];
745 __le16 len[5];
2bca76e8 746 } const *hdr = ptr;
03718234
JS		 747
748 BUILD_BUG_ON(ARRAY_SIZE(hdr->len) != ARRAY_SIZE(lens));
749
750 if (fw->size < MOXA_FW_HDRLEN) {
751 strcpy(rsn, "too short (even header won't fit)");
752 goto err;
753 }
754 if (hdr->magic != cpu_to_le32(0x30343034)) {
755 sprintf(rsn, "bad magic: %.8x", le32_to_cpu(hdr->magic));
756 goto err;
757 }
758 if (hdr->type != 3) {
759 sprintf(rsn, "not for linux, type is %u", hdr->type);
760 goto err;
761 }
762 if (moxa_check_fw_model(brd, hdr->model)) {
763 sprintf(rsn, "not for this card, model is %u", hdr->model);
764 goto err;
765 }
766
767 len = MOXA_FW_HDRLEN;
768 lencnt = hdr->model == 2 ? 5 : 3;
769 for (a = 0; a < ARRAY_SIZE(lens); a++) {
770 lens[a] = le16_to_cpu(hdr->len[a]);
771 if (lens[a] && len + lens[a] <= fw->size &&
772 moxa_check_fw(&fw->data[len]))
eaa95a8d 773 printk(KERN_WARNING "MOXA firmware: unexpected input "
03718234
JS		 774 "at offset %u, but going on\n", (u32)len);
775 if (!lens[a] && a < lencnt) {
776 sprintf(rsn, "too few entries in fw file");
777 goto err;
778 }
779 len += lens[a];
780 }
781
782 if (len != fw->size) {
783 sprintf(rsn, "bad length: %u (should be %u)", (u32)fw->size,
784 (u32)len);
785 goto err;
786 }
787
788 ptr += MOXA_FW_HDRLEN;
789 lenp = 0; /* bios */
790
791 strcpy(rsn, "read above");
792
793 ret = moxa_load_bios(brd, ptr, lens[lenp]);
794 if (ret)
795 goto err;
796
797 /* we skip the tty section (lens[1]), since we don't need it */
798 ptr += lens[lenp] + lens[lenp + 1];
799 lenp += 2; /* comm */
800
801 if (hdr->model == 2) {
802 ret = moxa_load_320b(brd, ptr, lens[lenp]);
803 if (ret)
804 goto err;
805 /* skip another tty */
806 ptr += lens[lenp] + lens[lenp + 1];
807 lenp += 2;
808 }
809
810 ret = moxa_load_code(brd, ptr, lens[lenp]);
811 if (ret)
812 goto err;
813
814 return 0;
815err:
816 printk(KERN_ERR "firmware failed to load, reason: %s\n", rsn);
817 return ret;
818}
819
820static int moxa_init_board(struct moxa_board_conf *brd, struct device *dev)
821{
822 const struct firmware *fw;
823 const char *file;
810ab09b 824 struct moxa_port *p;
793be898 825 unsigned int i, first_idx;
03718234
JS		 826 int ret;
827
810ab09b
JS		 828 brd->ports = kcalloc(MAX_PORTS_PER_BOARD, sizeof(*brd->ports),
829 GFP_KERNEL);
830 if (brd->ports == NULL) {
831 printk(KERN_ERR "cannot allocate memory for ports\n");
832 ret = -ENOMEM;
833 goto err;
834 }
835
836 for (i = 0, p = brd->ports; i < MAX_PORTS_PER_BOARD; i++, p++) {
44b7d1b3 837 tty_port_init(&p->port);
31f35939 838 p->port.ops = &moxa_port_ops;
810ab09b 839 p->type = PORT_16550A;
810ab09b 840 p->cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
810ab09b
JS		 841 }
842
03718234
JS		 843 switch (brd->boardType) {
844 case MOXA_BOARD_C218_ISA:
845 case MOXA_BOARD_C218_PCI:
846 file = "c218tunx.cod";
847 break;
848 case MOXA_BOARD_CP204J:
849 file = "cp204unx.cod";
850 break;
851 default:
852 file = "c320tunx.cod";
853 break;
854 }
855
856 ret = request_firmware(&fw, file, dev);
857 if (ret) {
ec09cd56
JS		 858 printk(KERN_ERR "MOXA: request_firmware failed. Make sure "
859 "you've placed '%s' file into your firmware "
860 "loader directory (e.g. /lib/firmware)\n",
861 file);
810ab09b 862 goto err_free;
03718234
JS		 863 }
864
865 ret = moxa_load_fw(brd, fw);
866
867 release_firmware(fw);
810ab09b
JS		 868
869 if (ret)
870 goto err_free;
871
2a541341 872 spin_lock_bh(&moxa_lock);
810ab09b 873 brd->ready = 1;
0bcc4caa
JS		 874 if (!timer_pending(&moxaTimer))
875 mod_timer(&moxaTimer, jiffies + HZ / 50);
2a541341 876 spin_unlock_bh(&moxa_lock);
0bcc4caa 877
793be898
JS		 878 first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD;
879 for (i = 0; i < brd->numPorts; i++)
880 tty_port_register_device(&brd->ports[i].port, moxaDriver,
881 first_idx + i, dev);
882
810ab09b
JS		 883 return 0;
884err_free:
191c5f10
JS		 885 for (i = 0; i < MAX_PORTS_PER_BOARD; i++)
886 tty_port_destroy(&brd->ports[i].port);
810ab09b
JS		 887 kfree(brd->ports);
888err:
03718234
JS		 889 return ret;
890}
891
810ab09b
JS		 892static void moxa_board_deinit(struct moxa_board_conf *brd)
893{
793be898 894 unsigned int a, opened, first_idx;
a8f5cda0
JS		 895
896 mutex_lock(&moxa_openlock);
7bcf97d1 897 spin_lock_bh(&moxa_lock);
810ab09b 898 brd->ready = 0;
7bcf97d1 899 spin_unlock_bh(&moxa_lock);
a8f5cda0
JS		 900
901 /* pci hot-un-plug support */
902 for (a = 0; a < brd->numPorts; a++)
d41861ca 903 if (tty_port_initialized(&brd->ports[a].port))
aa27a094
JS		 904 tty_port_tty_hangup(&brd->ports[a].port, false);
905
191c5f10
JS		 906 for (a = 0; a < MAX_PORTS_PER_BOARD; a++)
907 tty_port_destroy(&brd->ports[a].port);
aa27a094 908
a8f5cda0
JS		 909 while (1) {
910 opened = 0;
911 for (a = 0; a < brd->numPorts; a++)
d41861ca 912 if (tty_port_initialized(&brd->ports[a].port))
a8f5cda0
JS		 913 opened++;
914 mutex_unlock(&moxa_openlock);
915 if (!opened)
916 break;
917 msleep(50);
918 mutex_lock(&moxa_openlock);
919 }
920
793be898
JS		 921 first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD;
922 for (a = 0; a < brd->numPorts; a++)
923 tty_unregister_device(moxaDriver, first_idx + a);
924
810ab09b
JS		 925 iounmap(brd->basemem);
926 brd->basemem = NULL;
927 kfree(brd->ports);
928}
929
1da177e4 930#ifdef CONFIG_PCI
9671f099 931static int moxa_pci_probe(struct pci_dev *pdev,
9cde5bf0 932 const struct pci_device_id *ent)
1da177e4 933{
9cde5bf0
JS		 934 struct moxa_board_conf *board;
935 unsigned int i;
936 int board_type = ent->driver_data;
937 int retval;
938
939 retval = pci_enable_device(pdev);
7aeb95da
JS		 940 if (retval) {
941 dev_err(&pdev->dev, "can't enable pci device\n");
9cde5bf0 942 goto err;
7aeb95da 943 }
9cde5bf0
JS		 944
945 for (i = 0; i < MAX_BOARDS; i++)
946 if (moxa_boards[i].basemem == NULL)
947 break;
948
949 retval = -ENODEV;
950 if (i >= MAX_BOARDS) {
7aeb95da 951 dev_warn(&pdev->dev, "more than %u MOXA Intellio family boards "
9cde5bf0
JS		 952 "found. Board is ignored.\n", MAX_BOARDS);
953 goto err;
954 }
955
956 board = &moxa_boards[i];
e46a5e3f
JS		 957
958 retval = pci_request_region(pdev, 2, "moxa-base");
959 if (retval) {
960 dev_err(&pdev->dev, "can't request pci region 2\n");
961 goto err;
962 }
963
24cb2335 964 board->basemem = ioremap_nocache(pci_resource_start(pdev, 2), 0x4000);
7aeb95da
JS		 965 if (board->basemem == NULL) {
966 dev_err(&pdev->dev, "can't remap io space 2\n");
386d95b3 967 retval = -ENOMEM;
e46a5e3f 968 goto err_reg;
7aeb95da 969 }
9cde5bf0 970
1da177e4
LT		 971 board->boardType = board_type;
972 switch (board_type) {
973 case MOXA_BOARD_C218_ISA:
974 case MOXA_BOARD_C218_PCI:
975 board->numPorts = 8;
976 break;
977
978 case MOXA_BOARD_CP204J:
979 board->numPorts = 4;
980 break;
981 default:
982 board->numPorts = 0;
983 break;
984 }
985 board->busType = MOXA_BUS_TYPE_PCI;
a784bf7c 986
03718234
JS		 987 retval = moxa_init_board(board, &pdev->dev);
988 if (retval)
989 goto err_base;
990
9cde5bf0 991 pci_set_drvdata(pdev, board);
1da177e4 992
bb9f910a
JS		 993 dev_info(&pdev->dev, "board '%s' ready (%u ports, firmware loaded)\n",
994 moxa_brdname[board_type - 1], board->numPorts);
995
eaa95a8d 996 return 0;
03718234
JS		 997err_base:
998 iounmap(board->basemem);
999 board->basemem = NULL;
e46a5e3f
JS		 1000err_reg:
1001 pci_release_region(pdev, 2);
9cde5bf0
JS		 1002err:
1003 return retval;
1004}
1005
ae8d8a14 1006static void moxa_pci_remove(struct pci_dev *pdev)
9cde5bf0
JS		 1007{
1008 struct moxa_board_conf *brd = pci_get_drvdata(pdev);
1009
810ab09b
JS		 1010 moxa_board_deinit(brd);
1011
e46a5e3f 1012 pci_release_region(pdev, 2);
1da177e4 1013}
a784bf7c
JS		 1014
1015static struct pci_driver moxa_pci_driver = {
1016 .name = "moxa",
1017 .id_table = moxa_pcibrds,
1018 .probe = moxa_pci_probe,
91116cba 1019 .remove = moxa_pci_remove
a784bf7c 1020};
1da177e4
LT		 1021#endif /* CONFIG_PCI */
1022
1023static int __init moxa_init(void)
1024{
810ab09b 1025 unsigned int isabrds = 0;
d353eca4 1026 int retval = 0;
c6fc826e
RM		 1027 struct moxa_board_conf *brd = moxa_boards;
1028 unsigned int i;
1da177e4 1029
7aeb95da
JS		 1030 printk(KERN_INFO "MOXA Intellio family driver version %s\n",
1031 MOXA_VERSION);
793be898
JS		 1032
1033 tty_port_init(&moxa_service_port);
1034
1035 moxaDriver = tty_alloc_driver(MAX_PORTS + 1,
1036 TTY_DRIVER_REAL_RAW |
1037 TTY_DRIVER_DYNAMIC_DEV);
c3a6344a
DC		 1038 if (IS_ERR(moxaDriver))
1039 return PTR_ERR(moxaDriver);
1da177e4 1040
9b4e3b13 1041 moxaDriver->name = "ttyMX";
1da177e4
LT		 1042 moxaDriver->major = ttymajor;
1043 moxaDriver->minor_start = 0;
1044 moxaDriver->type = TTY_DRIVER_TYPE_SERIAL;
1045 moxaDriver->subtype = SERIAL_TYPE_NORMAL;
1046 moxaDriver->init_termios = tty_std_termios;
1da177e4 1047 moxaDriver->init_termios.c_cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
606d099c
AC		 1048 moxaDriver->init_termios.c_ispeed = 9600;
1049 moxaDriver->init_termios.c_ospeed = 9600;
1da177e4 1050 tty_set_operations(moxaDriver, &moxa_ops);
793be898
JS		 1051 /* Having one more port only for ioctls is ugly */
1052 tty_port_link_device(&moxa_service_port, moxaDriver, MAX_PORTS);
1da177e4 1053
1da177e4 1054 if (tty_register_driver(moxaDriver)) {
eaa95a8d 1055 printk(KERN_ERR "can't register MOXA Smartio tty driver!\n");
1da177e4
LT		 1056 put_tty_driver(moxaDriver);
1057 return -1;
1058 }
1da177e4 1059
d353eca4 1060 /* Find the boards defined from module args. */
c6fc826e 1061
1da177e4 1062 for (i = 0; i < MAX_BOARDS; i++) {
d353eca4
JS		 1063 if (!baseaddr[i])
1064 break;
1065 if (type[i] == MOXA_BOARD_C218_ISA ||
1066 type[i] == MOXA_BOARD_C320_ISA) {
7aeb95da 1067 pr_debug("Moxa board %2d: %s board(baseAddr=%lx)\n",
d353eca4
JS		 1068 isabrds + 1, moxa_brdname[type[i] - 1],
1069 baseaddr[i]);
1070 brd->boardType = type[i];
1071 brd->numPorts = type[i] == MOXA_BOARD_C218_ISA ? 8 :
1072 numports[i];
1073 brd->busType = MOXA_BUS_TYPE_ISA;
24cb2335 1074 brd->basemem = ioremap_nocache(baseaddr[i], 0x4000);
d353eca4 1075 if (!brd->basemem) {
eaa95a8d 1076 printk(KERN_ERR "MOXA: can't remap %lx\n",
d353eca4 1077 baseaddr[i]);
1da177e4
LT		 1078 continue;
1079 }
03718234
JS		 1080 if (moxa_init_board(brd, NULL)) {
1081 iounmap(brd->basemem);
1082 brd->basemem = NULL;
1083 continue;
1084 }
d353eca4 1085
e0525393 1086 printk(KERN_INFO "MOXA isa board found at 0x%.8lx and "
bb9f910a
JS		 1087 "ready (%u ports, firmware loaded)\n",
1088 baseaddr[i], brd->numPorts);
1089
d353eca4
JS		 1090 brd++;
1091 isabrds++;
1da177e4
LT		 1092 }
1093 }
a784bf7c 1094
1da177e4 1095#ifdef CONFIG_PCI
a784bf7c
JS		 1096 retval = pci_register_driver(&moxa_pci_driver);
1097 if (retval) {
eaa95a8d 1098 printk(KERN_ERR "Can't register MOXA pci driver!\n");
d353eca4 1099 if (isabrds)
a784bf7c 1100 retval = 0;
1da177e4
LT		 1101 }
1102#endif
a784bf7c 1103
a784bf7c 1104 return retval;
1da177e4
LT		 1105}
1106
1107static void __exit moxa_exit(void)
1108{
eaa95a8d 1109 unsigned int i;
1da177e4 1110
9cde5bf0 1111#ifdef CONFIG_PCI
a784bf7c 1112 pci_unregister_driver(&moxa_pci_driver);
9cde5bf0 1113#endif
a784bf7c 1114
810ab09b
JS		 1115 for (i = 0; i < MAX_BOARDS; i++) /* ISA boards */
1116 if (moxa_boards[i].ready)
1117 moxa_board_deinit(&moxa_boards[i]);
2a541341
JS		 1118
1119 del_timer_sync(&moxaTimer);
1120
1121 if (tty_unregister_driver(moxaDriver))
1122 printk(KERN_ERR "Couldn't unregister MOXA Intellio family "
1123 "serial driver\n");
1124 put_tty_driver(moxaDriver);
1da177e4
LT		 1125}
1126
1127module_init(moxa_init);
1128module_exit(moxa_exit);
1129
f176178b 1130static void moxa_shutdown(struct tty_port *port)
a8f5cda0 1131{
f176178b
AC		 1132 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1133 MoxaPortDisable(ch);
a8f5cda0 1134 MoxaPortFlushData(ch, 2);
a8f5cda0
JS		 1135}
1136
31f35939
AC		 1137static int moxa_carrier_raised(struct tty_port *port)
1138{
1139 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1140 int dcd;
1141
8482bcd5 1142 spin_lock_irq(&port->lock);
31f35939 1143 dcd = ch->DCDState;
8482bcd5 1144 spin_unlock_irq(&port->lock);
31f35939
AC		 1145 return dcd;
1146}
1147
f176178b 1148static void moxa_dtr_rts(struct tty_port *port, int onoff)
a8f5cda0 1149{
f176178b
AC		 1150 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1151 MoxaPortLineCtrl(ch, onoff, onoff);
a8f5cda0
JS		 1152}
1153
f176178b 1154
1da177e4
LT		 1155static int moxa_open(struct tty_struct *tty, struct file *filp)
1156{
810ab09b 1157 struct moxa_board_conf *brd;
8f8ecbad 1158 struct moxa_port *ch;
1da177e4 1159 int port;
1da177e4 1160
11324edd 1161 port = tty->index;
1da177e4 1162 if (port == MAX_PORTS) {
74d7d97b 1163 return capable(CAP_SYS_ADMIN) ? 0 : -EPERM;
1da177e4 1164 }
a8f5cda0
JS		 1165 if (mutex_lock_interruptible(&moxa_openlock))
1166 return -ERESTARTSYS;
810ab09b 1167 brd = &moxa_boards[port / MAX_PORTS_PER_BOARD];
a8f5cda0
JS		 1168 if (!brd->ready) {
1169 mutex_unlock(&moxa_openlock);
810ab09b 1170 return -ENODEV;
a8f5cda0 1171 }
1da177e4 1172
f0e85277
DE		 1173 if (port % MAX_PORTS_PER_BOARD >= brd->numPorts) {
1174 mutex_unlock(&moxa_openlock);
1175 return -ENODEV;
1176 }
1177
810ab09b 1178 ch = &brd->ports[port % MAX_PORTS_PER_BOARD];
9de6a51f 1179 ch->port.count++;
1da177e4 1180 tty->driver_data = ch;
d450b5a0 1181 tty_port_tty_set(&ch->port, tty);
f176178b 1182 mutex_lock(&ch->port.mutex);
d41861ca 1183 if (!tty_port_initialized(&ch->port)) {
1da177e4 1184 ch->statusflags = 0;
adc8d746 1185 moxa_set_tty_param(tty, &tty->termios);
b4173f45
JS		 1186 MoxaPortLineCtrl(ch, 1, 1);
1187 MoxaPortEnable(ch);
a8f5cda0 1188 MoxaSetFifo(ch, ch->type == PORT_16550A);
d41861ca 1189 tty_port_set_initialized(&ch->port, 1);
1da177e4 1190 }
f176178b 1191 mutex_unlock(&ch->port.mutex);
a8f5cda0 1192 mutex_unlock(&moxa_openlock);
1da177e4 1193
7c31bdb6 1194 return tty_port_block_til_ready(&ch->port, tty, filp);
1da177e4
LT		 1195}
1196
1197static void moxa_close(struct tty_struct *tty, struct file *filp)
1198{
f176178b 1199 struct moxa_port *ch = tty->driver_data;
adc8d746 1200 ch->cflag = tty->termios.c_cflag;
f176178b 1201 tty_port_close(&ch->port, tty, filp);
1da177e4
LT		 1202}
1203
1204static int moxa_write(struct tty_struct *tty,
1205 const unsigned char *buf, int count)
1206{
b4173f45 1207 struct moxa_port *ch = tty->driver_data;
0ad7c9af 1208 unsigned long flags;
b4173f45 1209 int len;
1da177e4 1210
1da177e4 1211 if (ch == NULL)
b4173f45 1212 return 0;
33f0f88f 1213
0ad7c9af 1214 spin_lock_irqsave(&moxa_lock, flags);
d450b5a0 1215 len = MoxaPortWriteData(tty, buf, count);
0ad7c9af 1216 spin_unlock_irqrestore(&moxa_lock, flags);
1da177e4 1217
a808ac0c 1218 set_bit(LOWWAIT, &ch->statusflags);
eaa95a8d 1219 return len;
1da177e4
LT		 1220}
1221
1222static int moxa_write_room(struct tty_struct *tty)
1223{
8f8ecbad 1224 struct moxa_port *ch;
1da177e4
LT		 1225
1226 if (tty->stopped)
eaa95a8d 1227 return 0;
b4173f45 1228 ch = tty->driver_data;
1da177e4 1229 if (ch == NULL)
eaa95a8d 1230 return 0;
b4173f45 1231 return MoxaPortTxFree(ch);
1da177e4
LT		 1232}
1233
1234static void moxa_flush_buffer(struct tty_struct *tty)
1235{
b4173f45 1236 struct moxa_port *ch = tty->driver_data;
1da177e4
LT		 1237
1238 if (ch == NULL)
1239 return;
b4173f45 1240 MoxaPortFlushData(ch, 1);
1da177e4
LT		 1241 tty_wakeup(tty);
1242}
1243
1244static int moxa_chars_in_buffer(struct tty_struct *tty)
1245{
b4173f45 1246 struct moxa_port *ch = tty->driver_data;
1da177e4 1247 int chars;
1da177e4 1248
b4173f45 1249 chars = MoxaPortTxQueue(ch);
f710ebd7 1250 if (chars)
1da177e4
LT		 1251 /*
1252 * Make it possible to wakeup anything waiting for output
1253 * in tty_ioctl.c, etc.
1254 */
f710ebd7 1255 set_bit(EMPTYWAIT, &ch->statusflags);
eaa95a8d 1256 return chars;
1da177e4
LT		 1257}
1258
60b33c13 1259static int moxa_tiocmget(struct tty_struct *tty)
1da177e4 1260{
8482bcd5 1261 struct moxa_port *ch = tty->driver_data;
1da177e4
LT		 1262 int flag = 0, dtr, rts;
1263
b4173f45 1264 MoxaPortGetLineOut(ch, &dtr, &rts);
1da177e4
LT		 1265 if (dtr)
1266 flag |= TIOCM_DTR;
1267 if (rts)
1268 flag |= TIOCM_RTS;
b4173f45 1269 dtr = MoxaPortLineStatus(ch);
1da177e4
LT		 1270 if (dtr & 1)
1271 flag |= TIOCM_CTS;
1272 if (dtr & 2)
1273 flag |= TIOCM_DSR;
1274 if (dtr & 4)
1275 flag |= TIOCM_CD;
1276 return flag;
1277}
1278
20b9d177 1279static int moxa_tiocmset(struct tty_struct *tty,
1da177e4
LT		 1280 unsigned int set, unsigned int clear)
1281{
a8f5cda0 1282 struct moxa_port *ch;
1da177e4
LT		 1283 int dtr, rts;
1284
a8f5cda0
JS		 1285 mutex_lock(&moxa_openlock);
1286 ch = tty->driver_data;
1287 if (!ch) {
1288 mutex_unlock(&moxa_openlock);
74d7d97b 1289 return -EINVAL;
a8f5cda0 1290 }
1da177e4 1291
b4173f45 1292 MoxaPortGetLineOut(ch, &dtr, &rts);
1da177e4
LT		 1293 if (set & TIOCM_RTS)
1294 rts = 1;
1295 if (set & TIOCM_DTR)
1296 dtr = 1;
1297 if (clear & TIOCM_RTS)
1298 rts = 0;
1299 if (clear & TIOCM_DTR)
1300 dtr = 0;
b4173f45 1301 MoxaPortLineCtrl(ch, dtr, rts);
a8f5cda0 1302 mutex_unlock(&moxa_openlock);
1da177e4
LT		 1303 return 0;
1304}
1305
1da177e4 1306static void moxa_set_termios(struct tty_struct *tty,
eaa95a8d 1307 struct ktermios *old_termios)
1da177e4 1308{
eaa95a8d 1309 struct moxa_port *ch = tty->driver_data;
1da177e4
LT		 1310
1311 if (ch == NULL)
1312 return;
db1acaa6 1313 moxa_set_tty_param(tty, old_termios);
eaa95a8d 1314 if (!(old_termios->c_cflag & CLOCAL) && C_CLOCAL(tty))
9de6a51f 1315 wake_up_interruptible(&ch->port.open_wait);
1da177e4
LT		 1316}
1317
1318static void moxa_stop(struct tty_struct *tty)
1319{
eaa95a8d 1320 struct moxa_port *ch = tty->driver_data;
1da177e4
LT		 1321
1322 if (ch == NULL)
1323 return;
b4173f45 1324 MoxaPortTxDisable(ch);
a808ac0c 1325 set_bit(TXSTOPPED, &ch->statusflags);
1da177e4
LT		 1326}
1327
1328
1329static void moxa_start(struct tty_struct *tty)
1330{
eaa95a8d 1331 struct moxa_port *ch = tty->driver_data;
1da177e4
LT		 1332
1333 if (ch == NULL)
1334 return;
1335
58112dfb 1336 if (!test_bit(TXSTOPPED, &ch->statusflags))
1da177e4
LT		 1337 return;
1338
b4173f45 1339 MoxaPortTxEnable(ch);
a808ac0c 1340 clear_bit(TXSTOPPED, &ch->statusflags);
1da177e4
LT		 1341}
1342
1343static void moxa_hangup(struct tty_struct *tty)
1344{
a808ac0c 1345 struct moxa_port *ch = tty->driver_data;
f176178b 1346 tty_port_hangup(&ch->port);
1da177e4
LT		 1347}
1348
7bcf97d1 1349static void moxa_new_dcdstate(struct moxa_port *p, u8 dcd)
1da177e4 1350{
8482bcd5 1351 unsigned long flags;
7bcf97d1 1352 dcd = !!dcd;
1da177e4 1353
8482bcd5 1354 spin_lock_irqsave(&p->port.lock, flags);
d450b5a0 1355 if (dcd != p->DCDState) {
8482bcd5
AC		 1356 p->DCDState = dcd;
1357 spin_unlock_irqrestore(&p->port.lock, flags);
aa27a094
JS		 1358 if (!dcd)
1359 tty_port_tty_hangup(&p->port, true);
7bcf97d1 1360 }
8482bcd5
AC		 1361 else
1362 spin_unlock_irqrestore(&p->port.lock, flags);
7bcf97d1 1363}
1da177e4 1364
7bcf97d1
JS		 1365static int moxa_poll_port(struct moxa_port *p, unsigned int handle,
1366 u16 __iomem *ip)
1367{
d450b5a0 1368 struct tty_struct *tty = tty_port_tty_get(&p->port);
7bcf97d1 1369 void __iomem *ofsAddr;
d41861ca 1370 unsigned int inited = tty_port_initialized(&p->port);
7bcf97d1
JS		 1371 u16 intr;
1372
1373 if (tty) {
a808ac0c 1374 if (test_bit(EMPTYWAIT, &p->statusflags) &&
7bcf97d1 1375 MoxaPortTxQueue(p) == 0) {
a808ac0c 1376 clear_bit(EMPTYWAIT, &p->statusflags);
7bcf97d1
JS		 1377 tty_wakeup(tty);
1378 }
a808ac0c 1379 if (test_bit(LOWWAIT, &p->statusflags) && !tty->stopped &&
7bcf97d1 1380 MoxaPortTxQueue(p) <= WAKEUP_CHARS) {
a808ac0c 1381 clear_bit(LOWWAIT, &p->statusflags);
7bcf97d1
JS		 1382 tty_wakeup(tty);
1383 }
1384
97ef38b8 1385 if (inited && !tty_throttled(tty) &&
7bcf97d1
JS		 1386 MoxaPortRxQueue(p) > 0) { /* RX */
1387 MoxaPortReadData(p);
6732c8bb 1388 tty_schedule_flip(&p->port);
7bcf97d1
JS		 1389 }
1390 } else {
a808ac0c 1391 clear_bit(EMPTYWAIT, &p->statusflags);
7bcf97d1 1392 MoxaPortFlushData(p, 0); /* flush RX */
1da177e4 1393 }
0bcc4caa 1394
7bcf97d1 1395 if (!handle) /* nothing else to do */
0e0fd7d7 1396 goto put;
7bcf97d1
JS		 1397
1398 intr = readw(ip); /* port irq status */
1399 if (intr == 0)
0e0fd7d7 1400 goto put;
7bcf97d1
JS		 1401
1402 writew(0, ip); /* ACK port */
1403 ofsAddr = p->tableAddr;
1404 if (intr & IntrTx) /* disable tx intr */
1405 writew(readw(ofsAddr + HostStat) & ~WakeupTx,
1406 ofsAddr + HostStat);
1407
1408 if (!inited)
0e0fd7d7 1409 goto put;
7bcf97d1
JS		 1410
1411 if (tty && (intr & IntrBreak) && !I_IGNBRK(tty)) { /* BREAK */
92a19f9c 1412 tty_insert_flip_char(&p->port, 0, TTY_BREAK);
6732c8bb 1413 tty_schedule_flip(&p->port);
7bcf97d1
JS		 1414 }
1415
1416 if (intr & IntrLine)
1417 moxa_new_dcdstate(p, readb(ofsAddr + FlagStat) & DCD_state);
0e0fd7d7
JS		 1418put:
1419 tty_kref_put(tty);
7bcf97d1
JS		 1420
1421 return 0;
1422}
1423
24ed960a 1424static void moxa_poll(struct timer_list *unused)
7bcf97d1
JS		 1425{
1426 struct moxa_board_conf *brd;
1427 u16 __iomem *ip;
2a541341 1428 unsigned int card, port, served = 0;
7bcf97d1
JS		 1429
1430 spin_lock(&moxa_lock);
1da177e4 1431 for (card = 0; card < MAX_BOARDS; card++) {
7bcf97d1
JS		 1432 brd = &moxa_boards[card];
1433 if (!brd->ready)
1da177e4 1434 continue;
7bcf97d1 1435
2a541341
JS		 1436 served++;
1437
7bcf97d1
JS		 1438 ip = NULL;
1439 if (readb(brd->intPend) == 0xff)
1440 ip = brd->intTable + readb(brd->intNdx);
1441
1442 for (port = 0; port < brd->numPorts; port++)
1443 moxa_poll_port(&brd->ports[port], !!ip, ip + port);
1444
1445 if (ip)
1446 writeb(0, brd->intPend); /* ACK */
1447
1448 if (moxaLowWaterChk) {
1449 struct moxa_port *p = brd->ports;
1450 for (port = 0; port < brd->numPorts; port++, p++)
1451 if (p->lowChkFlag) {
1452 p->lowChkFlag = 0;
1453 moxa_low_water_check(p->tableAddr);
1da177e4 1454 }
1da177e4
LT		 1455 }
1456 }
7bcf97d1 1457 moxaLowWaterChk = 0;
1da177e4 1458
2a541341
JS		 1459 if (served)
1460 mod_timer(&moxaTimer, jiffies + HZ / 50);
1461 spin_unlock(&moxa_lock);
1da177e4
LT		 1462}
1463
1464/******************************************************************************/
1465
db1acaa6 1466static void moxa_set_tty_param(struct tty_struct *tty, struct ktermios *old_termios)
1da177e4 1467{
adc8d746 1468 register struct ktermios *ts = &tty->termios;
eaa95a8d 1469 struct moxa_port *ch = tty->driver_data;
db1acaa6 1470 int rts, cts, txflow, rxflow, xany, baud;
1da177e4 1471
1da177e4
LT		 1472 rts = cts = txflow = rxflow = xany = 0;
1473 if (ts->c_cflag & CRTSCTS)
1474 rts = cts = 1;
1475 if (ts->c_iflag & IXON)
1476 txflow = 1;
1477 if (ts->c_iflag & IXOFF)
1478 rxflow = 1;
1479 if (ts->c_iflag & IXANY)
1480 xany = 1;
db1acaa6 1481
b4173f45
JS		 1482 MoxaPortFlowCtrl(ch, rts, cts, txflow, rxflow, xany);
1483 baud = MoxaPortSetTermio(ch, ts, tty_get_baud_rate(tty));
db1acaa6
AC		 1484 if (baud == -1)
1485 baud = tty_termios_baud_rate(old_termios);
1486 /* Not put the baud rate into the termios data */
1487 tty_encode_baud_rate(tty, baud, baud);
1da177e4
LT		 1488}
1489
1da177e4
LT		 1490/*****************************************************************************
1491 * Driver level functions: *
1da177e4 1492 *****************************************************************************/
1da177e4 1493
b4173f45 1494static void MoxaPortFlushData(struct moxa_port *port, int mode)
1da177e4
LT		 1495{
1496 void __iomem *ofsAddr;
eaa95a8d 1497 if (mode < 0 || mode > 2)
1da177e4 1498 return;
b4173f45 1499 ofsAddr = port->tableAddr;
1da177e4
LT		 1500 moxafunc(ofsAddr, FC_FlushQueue, mode);
1501 if (mode != 1) {
b4173f45 1502 port->lowChkFlag = 0;
6f56b658 1503 moxa_low_water_check(ofsAddr);
1da177e4
LT		 1504 }
1505}
1506
1da177e4
LT		 1507/*
1508 * Moxa Port Number Description:
1509 *
1510 * MOXA serial driver supports up to 4 MOXA-C218/C320 boards. And,
1511 * the port number using in MOXA driver functions will be 0 to 31 for
1512 * first MOXA board, 32 to 63 for second, 64 to 95 for third and 96
1513 * to 127 for fourth. For example, if you setup three MOXA boards,
1514 * first board is C218, second board is C320-16 and third board is
1515 * C320-32. The port number of first board (C218 - 8 ports) is from
1516 * 0 to 7. The port number of second board (C320 - 16 ports) is form
1517 * 32 to 47. The port number of third board (C320 - 32 ports) is from
1518 * 64 to 95. And those port numbers form 8 to 31, 48 to 63 and 96 to
1519 * 127 will be invalid.
1520 *
1521 *
1522 * Moxa Functions Description:
1523 *
1524 * Function 1: Driver initialization routine, this routine must be
1525 * called when initialized driver.
1526 * Syntax:
1527 * void MoxaDriverInit();
1528 *
1529 *
1530 * Function 2: Moxa driver private IOCTL command processing.
1531 * Syntax:
1532 * int MoxaDriverIoctl(unsigned int cmd, unsigned long arg, int port);
1533 *
1534 * unsigned int cmd : IOCTL command
1535 * unsigned long arg : IOCTL argument
1536 * int port : port number (0 - 127)
1537 *
1538 * return: 0 (OK)
1539 * -EINVAL
1540 * -ENOIOCTLCMD
1541 *
1542 *
1da177e4
LT		 1543 * Function 6: Enable this port to start Tx/Rx data.
1544 * Syntax:
1545 * void MoxaPortEnable(int port);
1546 * int port : port number (0 - 127)
1547 *
1548 *
1549 * Function 7: Disable this port
1550 * Syntax:
1551 * void MoxaPortDisable(int port);
1552 * int port : port number (0 - 127)
1553 *
1554 *
1da177e4
LT		 1555 * Function 10: Setting baud rate of this port.
1556 * Syntax:
08d01c79 1557 * speed_t MoxaPortSetBaud(int port, speed_t baud);
1da177e4
LT		 1558 * int port : port number (0 - 127)
1559 * long baud : baud rate (50 - 115200)
1560 *
1561 * return: 0 : this port is invalid or baud < 50
1562 * 50 - 115200 : the real baud rate set to the port, if
1563 * the argument baud is large than maximun
1564 * available baud rate, the real setting
1565 * baud rate will be the maximun baud rate.
1566 *
1567 *
1da177e4
LT		 1568 * Function 12: Configure the port.
1569 * Syntax:
606d099c 1570 * int MoxaPortSetTermio(int port, struct ktermios *termio, speed_t baud);
1da177e4 1571 * int port : port number (0 - 127)
606d099c 1572 * struct ktermios * termio : termio structure pointer
c7bce309 1573 * speed_t baud : baud rate
1da177e4
LT		 1574 *
1575 * return: -1 : this port is invalid or termio == NULL
1576 * 0 : setting O.K.
1577 *
1578 *
1579 * Function 13: Get the DTR/RTS state of this port.
1580 * Syntax:
1581 * int MoxaPortGetLineOut(int port, int *dtrState, int *rtsState);
1582 * int port : port number (0 - 127)
1583 * int * dtrState : pointer to INT to receive the current DTR
1584 * state. (if NULL, this function will not
1585 * write to this address)
1586 * int * rtsState : pointer to INT to receive the current RTS
1587 * state. (if NULL, this function will not
1588 * write to this address)
1589 *
1590 * return: -1 : this port is invalid
1591 * 0 : O.K.
1592 *
1593 *
1594 * Function 14: Setting the DTR/RTS output state of this port.
1595 * Syntax:
1596 * void MoxaPortLineCtrl(int port, int dtrState, int rtsState);
1597 * int port : port number (0 - 127)
1598 * int dtrState : DTR output state (0: off, 1: on)
1599 * int rtsState : RTS output state (0: off, 1: on)
1600 *
1601 *
1602 * Function 15: Setting the flow control of this port.
1603 * Syntax:
1604 * void MoxaPortFlowCtrl(int port, int rtsFlow, int ctsFlow, int rxFlow,
1605 * int txFlow,int xany);
1606 * int port : port number (0 - 127)
1607 * int rtsFlow : H/W RTS flow control (0: no, 1: yes)
1608 * int ctsFlow : H/W CTS flow control (0: no, 1: yes)
1609 * int rxFlow : S/W Rx XON/XOFF flow control (0: no, 1: yes)
1610 * int txFlow : S/W Tx XON/XOFF flow control (0: no, 1: yes)
1611 * int xany : S/W XANY flow control (0: no, 1: yes)
1612 *
1613 *
1614 * Function 16: Get ths line status of this port
1615 * Syntax:
1616 * int MoxaPortLineStatus(int port);
1617 * int port : port number (0 - 127)
1618 *
1619 * return: Bit 0 - CTS state (0: off, 1: on)
1620 * Bit 1 - DSR state (0: off, 1: on)
1621 * Bit 2 - DCD state (0: off, 1: on)
1622 *
1623 *
1da177e4
LT		 1624 * Function 19: Flush the Rx/Tx buffer data of this port.
1625 * Syntax:
1626 * void MoxaPortFlushData(int port, int mode);
1627 * int port : port number (0 - 127)
1628 * int mode
1629 * 0 : flush the Rx buffer
1630 * 1 : flush the Tx buffer
1631 * 2 : flush the Rx and Tx buffer
1632 *
1633 *
1634 * Function 20: Write data.
1635 * Syntax:
1636 * int MoxaPortWriteData(int port, unsigned char * buffer, int length);
1637 * int port : port number (0 - 127)
1638 * unsigned char * buffer : pointer to write data buffer.
1639 * int length : write data length
1640 *
1641 * return: 0 - length : real write data length
1642 *
1643 *
1644 * Function 21: Read data.
1645 * Syntax:
33f0f88f 1646 * int MoxaPortReadData(int port, struct tty_struct *tty);
1da177e4 1647 * int port : port number (0 - 127)
33f0f88f 1648 * struct tty_struct *tty : tty for data
1da177e4
LT		 1649 *
1650 * return: 0 - length : real read data length
1651 *
1652 *
1da177e4
LT		 1653 * Function 24: Get the Tx buffer current queued data bytes
1654 * Syntax:
1655 * int MoxaPortTxQueue(int port);
1656 * int port : port number (0 - 127)
1657 *
1658 * return: .. : Tx buffer current queued data bytes
1659 *
1660 *
1661 * Function 25: Get the Tx buffer current free space
1662 * Syntax:
1663 * int MoxaPortTxFree(int port);
1664 * int port : port number (0 - 127)
1665 *
1666 * return: .. : Tx buffer current free space
1667 *
1668 *
1669 * Function 26: Get the Rx buffer current queued data bytes
1670 * Syntax:
1671 * int MoxaPortRxQueue(int port);
1672 * int port : port number (0 - 127)
1673 *
1674 * return: .. : Rx buffer current queued data bytes
1675 *
1676 *
1da177e4
LT		 1677 * Function 28: Disable port data transmission.
1678 * Syntax:
1679 * void MoxaPortTxDisable(int port);
1680 * int port : port number (0 - 127)
1681 *
1682 *
1683 * Function 29: Enable port data transmission.
1684 * Syntax:
1685 * void MoxaPortTxEnable(int port);
1686 * int port : port number (0 - 127)
1687 *
1688 *
1da177e4
LT		 1689 * Function 31: Get the received BREAK signal count and reset it.
1690 * Syntax:
1691 * int MoxaPortResetBrkCnt(int port);
1692 * int port : port number (0 - 127)
1693 *
1694 * return: 0 - .. : BREAK signal count
1695 *
1696 *
1da177e4 1697 */
1da177e4 1698
b4173f45 1699static void MoxaPortEnable(struct moxa_port *port)
1da177e4
LT		 1700{
1701 void __iomem *ofsAddr;
eaa95a8d 1702 u16 lowwater = 512;
1da177e4 1703
b4173f45 1704 ofsAddr = port->tableAddr;
1da177e4 1705 writew(lowwater, ofsAddr + Low_water);
08d01c79 1706 if (MOXA_IS_320(port->board))
1da177e4 1707 moxafunc(ofsAddr, FC_SetBreakIrq, 0);
eaa95a8d
JS		 1708 else
1709 writew(readw(ofsAddr + HostStat) | WakeupBreak,
1710 ofsAddr + HostStat);
1da177e4
LT		 1711
1712 moxafunc(ofsAddr, FC_SetLineIrq, Magic_code);
1713 moxafunc(ofsAddr, FC_FlushQueue, 2);
1714
1715 moxafunc(ofsAddr, FC_EnableCH, Magic_code);
1716 MoxaPortLineStatus(port);
1717}
1718
b4173f45 1719static void MoxaPortDisable(struct moxa_port *port)
1da177e4 1720{
b4173f45 1721 void __iomem *ofsAddr = port->tableAddr;
1da177e4
LT		 1722
1723 moxafunc(ofsAddr, FC_SetFlowCtl, 0); /* disable flow control */
1724 moxafunc(ofsAddr, FC_ClrLineIrq, Magic_code);
1725 writew(0, ofsAddr + HostStat);
1726 moxafunc(ofsAddr, FC_DisableCH, Magic_code);
1727}
1728
08d01c79 1729static speed_t MoxaPortSetBaud(struct moxa_port *port, speed_t baud)
1da177e4 1730{
08d01c79
JS		 1731 void __iomem *ofsAddr = port->tableAddr;
1732 unsigned int clock, val;
1733 speed_t max;
1da177e4 1734
08d01c79
JS		 1735 max = MOXA_IS_320(port->board) ? 460800 : 921600;
1736 if (baud < 50)
eaa95a8d 1737 return 0;
1da177e4
LT		 1738 if (baud > max)
1739 baud = max;
08d01c79 1740 clock = 921600;
1da177e4
LT		 1741 val = clock / baud;
1742 moxafunc(ofsAddr, FC_SetBaud, val);
1743 baud = clock / val;
eaa95a8d 1744 return baud;
1da177e4
LT		 1745}
1746
b4173f45
JS		 1747static int MoxaPortSetTermio(struct moxa_port *port, struct ktermios *termio,
1748 speed_t baud)
1da177e4
LT		 1749{
1750 void __iomem *ofsAddr;
1da177e4
LT		 1751 tcflag_t mode = 0;
1752
b4173f45 1753 ofsAddr = port->tableAddr;
1da177e4
LT		 1754
1755 mode = termio->c_cflag & CSIZE;
1756 if (mode == CS5)
1757 mode = MX_CS5;
1758 else if (mode == CS6)
1759 mode = MX_CS6;
1760 else if (mode == CS7)
1761 mode = MX_CS7;
1762 else if (mode == CS8)
1763 mode = MX_CS8;
1764
1765 if (termio->c_cflag & CSTOPB) {
1766 if (mode == MX_CS5)
1767 mode |= MX_STOP15;
1768 else
1769 mode |= MX_STOP2;
1770 } else
1771 mode |= MX_STOP1;
1772
1773 if (termio->c_cflag & PARENB) {
d8dcbdd0
LK		 1774 if (termio->c_cflag & PARODD) {
1775 if (termio->c_cflag & CMSPAR)
1776 mode |= MX_PARMARK;
1777 else
1778 mode |= MX_PARODD;
1779 } else {
1780 if (termio->c_cflag & CMSPAR)
1781 mode |= MX_PARSPACE;
1782 else
1783 mode |= MX_PAREVEN;
1784 }
1da177e4
LT		 1785 } else
1786 mode |= MX_PARNONE;
1787
eaa95a8d 1788 moxafunc(ofsAddr, FC_SetDataMode, (u16)mode);
1da177e4 1789
08d01c79
JS		 1790 if (MOXA_IS_320(port->board) && baud >= 921600)
1791 return -1;
1792
db1acaa6 1793 baud = MoxaPortSetBaud(port, baud);
1da177e4
LT		 1794
1795 if (termio->c_iflag & (IXON | IXOFF | IXANY)) {
f5c5a36d 1796 spin_lock_irq(&moxafunc_lock);
1da177e4
LT		 1797 writeb(termio->c_cc[VSTART], ofsAddr + FuncArg);
1798 writeb(termio->c_cc[VSTOP], ofsAddr + FuncArg1);
1799 writeb(FC_SetXonXoff, ofsAddr + FuncCode);
6f56b658 1800 moxa_wait_finish(ofsAddr);
a808ac0c 1801 spin_unlock_irq(&moxafunc_lock);
1da177e4
LT		 1802
1803 }
eaa95a8d 1804 return baud;
1da177e4
LT		 1805}
1806
b4173f45
JS		 1807static int MoxaPortGetLineOut(struct moxa_port *port, int *dtrState,
1808 int *rtsState)
1da177e4 1809{
b4173f45
JS		 1810 if (dtrState)
1811 *dtrState = !!(port->lineCtrl & DTR_ON);
1812 if (rtsState)
1813 *rtsState = !!(port->lineCtrl & RTS_ON);
1814
eaa95a8d 1815 return 0;
1da177e4
LT		 1816}
1817
b4173f45 1818static void MoxaPortLineCtrl(struct moxa_port *port, int dtr, int rts)
1da177e4 1819{
eaa95a8d 1820 u8 mode = 0;
1da177e4 1821
1da177e4
LT		 1822 if (dtr)
1823 mode |= DTR_ON;
1824 if (rts)
1825 mode |= RTS_ON;
b4173f45
JS		 1826 port->lineCtrl = mode;
1827 moxafunc(port->tableAddr, FC_LineControl, mode);
1da177e4
LT		 1828}
1829
b4173f45
JS		 1830static void MoxaPortFlowCtrl(struct moxa_port *port, int rts, int cts,
1831 int txflow, int rxflow, int txany)
1da177e4 1832{
b4173f45 1833 int mode = 0;
1da177e4 1834
1da177e4
LT		 1835 if (rts)
1836 mode |= RTS_FlowCtl;
1837 if (cts)
1838 mode |= CTS_FlowCtl;
1839 if (txflow)
1840 mode |= Tx_FlowCtl;
1841 if (rxflow)
1842 mode |= Rx_FlowCtl;
1843 if (txany)
1844 mode |= IXM_IXANY;
b4173f45 1845 moxafunc(port->tableAddr, FC_SetFlowCtl, mode);
1da177e4
LT		 1846}
1847
b4173f45 1848static int MoxaPortLineStatus(struct moxa_port *port)
1da177e4
LT		 1849{
1850 void __iomem *ofsAddr;
1851 int val;
1852
b4173f45 1853 ofsAddr = port->tableAddr;
f5c5a36d
AC		 1854 if (MOXA_IS_320(port->board))
1855 val = moxafuncret(ofsAddr, FC_LineStatus, 0);
1856 else
1da177e4 1857 val = readw(ofsAddr + FlagStat) >> 4;
1da177e4 1858 val &= 0x0B;
7bcf97d1 1859 if (val & 8)
1da177e4 1860 val |= 4;
7bcf97d1 1861 moxa_new_dcdstate(port, val & 8);
1da177e4 1862 val &= 7;
7bcf97d1 1863 return val;
1da177e4
LT		 1864}
1865
d450b5a0 1866static int MoxaPortWriteData(struct tty_struct *tty,
2108eba5 1867 const unsigned char *buffer, int len)
1da177e4 1868{
d450b5a0 1869 struct moxa_port *port = tty->driver_data;
1da177e4 1870 void __iomem *baseAddr, *ofsAddr, *ofs;
2108eba5
JS		 1871 unsigned int c, total;
1872 u16 head, tail, tx_mask, spage, epage;
1873 u16 pageno, pageofs, bufhead;
1da177e4 1874
b4173f45
JS		 1875 ofsAddr = port->tableAddr;
1876 baseAddr = port->board->basemem;
1da177e4
LT		 1877 tx_mask = readw(ofsAddr + TX_mask);
1878 spage = readw(ofsAddr + Page_txb);
1879 epage = readw(ofsAddr + EndPage_txb);
1880 tail = readw(ofsAddr + TXwptr);
1881 head = readw(ofsAddr + TXrptr);
2108eba5 1882 c = (head > tail) ? (head - tail - 1) : (head - tail + tx_mask);
1da177e4
LT		 1883 if (c > len)
1884 c = len;
9de6a51f 1885 moxaLog.txcnt[port->port.tty->index] += c;
1da177e4
LT		 1886 total = c;
1887 if (spage == epage) {
1888 bufhead = readw(ofsAddr + Ofs_txb);
1889 writew(spage, baseAddr + Control_reg);
1890 while (c > 0) {
1891 if (head > tail)
1892 len = head - tail - 1;
1893 else
1894 len = tx_mask + 1 - tail;
1895 len = (c > len) ? len : c;
1896 ofs = baseAddr + DynPage_addr + bufhead + tail;
2108eba5
JS		 1897 memcpy_toio(ofs, buffer, len);
1898 buffer += len;
1da177e4
LT		 1899 tail = (tail + len) & tx_mask;
1900 c -= len;
1901 }
1da177e4 1902 } else {
1da177e4
LT		 1903 pageno = spage + (tail >> 13);
1904 pageofs = tail & Page_mask;
2108eba5
JS		 1905 while (c > 0) {
1906 len = Page_size - pageofs;
1907 if (len > c)
1908 len = c;
1da177e4
LT		 1909 writeb(pageno, baseAddr + Control_reg);
1910 ofs = baseAddr + DynPage_addr + pageofs;
2108eba5
JS		 1911 memcpy_toio(ofs, buffer, len);
1912 buffer += len;
1da177e4
LT		 1913 if (++pageno == epage)
1914 pageno = spage;
1915 pageofs = 0;
2108eba5
JS		 1916 c -= len;
1917 }
1918 tail = (tail + total) & tx_mask;
1da177e4 1919 }
2108eba5 1920 writew(tail, ofsAddr + TXwptr);
1da177e4 1921 writeb(1, ofsAddr + CD180TXirq); /* start to send */
2108eba5 1922 return total;
1da177e4
LT		 1923}
1924
7bcf97d1 1925static int MoxaPortReadData(struct moxa_port *port)
1da177e4 1926{
9de6a51f 1927 struct tty_struct *tty = port->port.tty;
2108eba5 1928 unsigned char *dst;
1da177e4 1929 void __iomem *baseAddr, *ofsAddr, *ofs;
2108eba5
JS		 1930 unsigned int count, len, total;
1931 u16 tail, rx_mask, spage, epage;
1932 u16 pageno, pageofs, bufhead, head;
1da177e4 1933
b4173f45
JS		 1934 ofsAddr = port->tableAddr;
1935 baseAddr = port->board->basemem;
1da177e4
LT		 1936 head = readw(ofsAddr + RXrptr);
1937 tail = readw(ofsAddr + RXwptr);
1938 rx_mask = readw(ofsAddr + RX_mask);
1939 spage = readw(ofsAddr + Page_rxb);
1940 epage = readw(ofsAddr + EndPage_rxb);
2108eba5 1941 count = (tail >= head) ? (tail - head) : (tail - head + rx_mask + 1);
1da177e4 1942 if (count == 0)
33f0f88f 1943 return 0;
1da177e4 1944
33f0f88f 1945 total = count;
7bcf97d1 1946 moxaLog.rxcnt[tty->index] += total;
1da177e4
LT		 1947 if (spage == epage) {
1948 bufhead = readw(ofsAddr + Ofs_rxb);
1949 writew(spage, baseAddr + Control_reg);
1950 while (count > 0) {
1da177e4 1951 ofs = baseAddr + DynPage_addr + bufhead + head;
2108eba5
JS		 1952 len = (tail >= head) ? (tail - head) :
1953 (rx_mask + 1 - head);
2f693357 1954 len = tty_prepare_flip_string(&port->port, &dst,
2108eba5
JS		 1955 min(len, count));
1956 memcpy_fromio(dst, ofs, len);
1da177e4
LT		 1957 head = (head + len) & rx_mask;
1958 count -= len;
1959 }
1da177e4 1960 } else {
1da177e4
LT		 1961 pageno = spage + (head >> 13);
1962 pageofs = head & Page_mask;
2108eba5 1963 while (count > 0) {
1da177e4
LT		 1964 writew(pageno, baseAddr + Control_reg);
1965 ofs = baseAddr + DynPage_addr + pageofs;
2f693357 1966 len = tty_prepare_flip_string(&port->port, &dst,
2108eba5
JS		 1967 min(Page_size - pageofs, count));
1968 memcpy_fromio(dst, ofs, len);
1969
1970 count -= len;
1971 pageofs = (pageofs + len) & Page_mask;
1972 if (pageofs == 0 && ++pageno == epage)
1da177e4 1973 pageno = spage;
2108eba5
JS		 1974 }
1975 head = (head + total) & rx_mask;
1da177e4 1976 }
2108eba5
JS		 1977 writew(head, ofsAddr + RXrptr);
1978 if (readb(ofsAddr + FlagStat) & Xoff_state) {
1da177e4 1979 moxaLowWaterChk = 1;
b4173f45 1980 port->lowChkFlag = 1;
1da177e4 1981 }
2108eba5 1982 return total;
1da177e4
LT		 1983}
1984
1985
b4173f45 1986static int MoxaPortTxQueue(struct moxa_port *port)
1da177e4 1987{
b4173f45 1988 void __iomem *ofsAddr = port->tableAddr;
2108eba5 1989 u16 rptr, wptr, mask;
1da177e4 1990
1da177e4
LT		 1991 rptr = readw(ofsAddr + TXrptr);
1992 wptr = readw(ofsAddr + TXwptr);
1993 mask = readw(ofsAddr + TX_mask);
2108eba5 1994 return (wptr - rptr) & mask;
1da177e4
LT		 1995}
1996
b4173f45 1997static int MoxaPortTxFree(struct moxa_port *port)
1da177e4 1998{
b4173f45 1999 void __iomem *ofsAddr = port->tableAddr;
2108eba5 2000 u16 rptr, wptr, mask;
1da177e4 2001
1da177e4
LT		 2002 rptr = readw(ofsAddr + TXrptr);
2003 wptr = readw(ofsAddr + TXwptr);
2004 mask = readw(ofsAddr + TX_mask);
2108eba5 2005 return mask - ((wptr - rptr) & mask);
1da177e4
LT		 2006}
2007
b4173f45 2008static int MoxaPortRxQueue(struct moxa_port *port)
1da177e4 2009{
b4173f45 2010 void __iomem *ofsAddr = port->tableAddr;
2108eba5 2011 u16 rptr, wptr, mask;
1da177e4 2012
1da177e4
LT		 2013 rptr = readw(ofsAddr + RXrptr);
2014 wptr = readw(ofsAddr + RXwptr);
2015 mask = readw(ofsAddr + RX_mask);
2108eba5 2016 return (wptr - rptr) & mask;
1da177e4
LT		 2017}
2018
b4173f45 2019static void MoxaPortTxDisable(struct moxa_port *port)
1da177e4 2020{
b4173f45 2021 moxafunc(port->tableAddr, FC_SetXoffState, Magic_code);
1da177e4
LT		 2022}
2023
b4173f45 2024static void MoxaPortTxEnable(struct moxa_port *port)
1da177e4 2025{
b4173f45 2026 moxafunc(port->tableAddr, FC_SetXonState, Magic_code);
1da177e4
LT		 2027}
2028
1c729ab1
AV		 2029static int moxa_get_serial_info(struct tty_struct *tty,
2030 struct serial_struct *ss)
1da177e4 2031{
1c729ab1
AV		 2032 struct moxa_port *info = tty->driver_data;
2033
2034 if (tty->index == MAX_PORTS)
2035 return -EINVAL;
2036 if (!info)
2037 return -ENODEV;
2038 mutex_lock(&info->port.mutex);
2039 ss->type = info->type,
2040 ss->line = info->port.tty->index,
2041 ss->flags = info->port.flags,
2042 ss->baud_base = 921600,
2043 ss->close_delay = info->port.close_delay;
2044 mutex_unlock(&info->port.mutex);
2045 return 0;
1da177e4
LT		 2046}
2047
2048
1c729ab1
AV		 2049static int moxa_set_serial_info(struct tty_struct *tty,
2050 struct serial_struct *ss)
1da177e4 2051{
1c729ab1 2052 struct moxa_port *info = tty->driver_data;
1da177e4 2053
1c729ab1
AV		 2054 if (tty->index == MAX_PORTS)
2055 return -EINVAL;
2056 if (!info)
2057 return -ENODEV;
1da177e4 2058
1c729ab1
AV		 2059 if (ss->irq != 0 || ss->port != 0 ||
2060 ss->custom_divisor != 0 ||
2061 ss->baud_base != 921600)
eaa95a8d 2062 return -EPERM;
1da177e4 2063
1c729ab1 2064 mutex_lock(&info->port.mutex);
1da177e4 2065 if (!capable(CAP_SYS_ADMIN)) {
1c729ab1
AV		 2066 if (((ss->flags & ~ASYNC_USR_MASK) !=
2067 (info->port.flags & ~ASYNC_USR_MASK))) {
2068 mutex_unlock(&info->port.mutex);
eaa95a8d 2069 return -EPERM;
1c729ab1
AV		 2070 }
2071 }
2072 info->port.close_delay = ss->close_delay * HZ / 100;
1da177e4 2073
1c729ab1 2074 MoxaSetFifo(info, ss->type == PORT_16550A);
1da177e4 2075
1c729ab1
AV		 2076 info->type = ss->type;
2077 mutex_unlock(&info->port.mutex);
eaa95a8d 2078 return 0;
1da177e4
LT		 2079}
2080
2081
2082
2083/*****************************************************************************
2084 * Static local functions: *
2085 *****************************************************************************/
1da177e4 2086
b4173f45 2087static void MoxaSetFifo(struct moxa_port *port, int enable)
1da177e4 2088{
b4173f45 2089 void __iomem *ofsAddr = port->tableAddr;
1da177e4
LT		 2090
2091 if (!enable) {
2092 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 0);
2093 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 1);
2094 } else {
2095 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 3);
2096 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 16);
2097 }
2098}
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