[linux.git] / drivers / rtc / rtc-hym8563.c

/*
 * Haoyu HYM8563 RTC driver
 *
 * Copyright (C) 2013 MundoReader S.L.
 * Author: Heiko Stuebner <[email protected]>
 *
 * based on rtc-HYM8563
 * Copyright (C) 2010 ROCKCHIP, Inc.
 *
 * This software is licensed under the terms of the GNU General Public
 * License version 2, as published by the Free Software Foundation, and
 * may be copied, distributed, and modified under those terms.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/module.h>
#include <linux/clk-provider.h>
#include <linux/i2c.h>
#include <linux/bcd.h>
#include <linux/rtc.h>

#define HYM8563_CTL1		0x00
#define HYM8563_CTL1_TEST	BIT(7)
#define HYM8563_CTL1_STOP	BIT(5)
#define HYM8563_CTL1_TESTC	BIT(3)

#define HYM8563_CTL2		0x01
#define HYM8563_CTL2_TI_TP	BIT(4)
#define HYM8563_CTL2_AF		BIT(3)
#define HYM8563_CTL2_TF		BIT(2)
#define HYM8563_CTL2_AIE	BIT(1)
#define HYM8563_CTL2_TIE	BIT(0)

#define HYM8563_SEC		0x02
#define HYM8563_SEC_VL		BIT(7)
#define HYM8563_SEC_MASK	0x7f

#define HYM8563_MIN		0x03
#define HYM8563_MIN_MASK	0x7f

#define HYM8563_HOUR		0x04
#define HYM8563_HOUR_MASK	0x3f

#define HYM8563_DAY		0x05
#define HYM8563_DAY_MASK	0x3f

#define HYM8563_WEEKDAY		0x06
#define HYM8563_WEEKDAY_MASK	0x07

#define HYM8563_MONTH		0x07
#define HYM8563_MONTH_CENTURY	BIT(7)
#define HYM8563_MONTH_MASK	0x1f

#define HYM8563_YEAR		0x08

#define HYM8563_ALM_MIN		0x09
#define HYM8563_ALM_HOUR	0x0a
#define HYM8563_ALM_DAY		0x0b
#define HYM8563_ALM_WEEK	0x0c

/* Each alarm check can be disabled by setting this bit in the register */
#define HYM8563_ALM_BIT_DISABLE	BIT(7)

#define HYM8563_CLKOUT		0x0d
#define HYM8563_CLKOUT_ENABLE	BIT(7)
#define HYM8563_CLKOUT_32768	0
#define HYM8563_CLKOUT_1024	1
#define HYM8563_CLKOUT_32	2
#define HYM8563_CLKOUT_1	3
#define HYM8563_CLKOUT_MASK	3

#define HYM8563_TMR_CTL		0x0e
#define HYM8563_TMR_CTL_ENABLE	BIT(7)
#define HYM8563_TMR_CTL_4096	0
#define HYM8563_TMR_CTL_64	1
#define HYM8563_TMR_CTL_1	2
#define HYM8563_TMR_CTL_1_60	3
#define HYM8563_TMR_CTL_MASK	3

#define HYM8563_TMR_CNT		0x0f

struct hym8563 {
	struct i2c_client	*client;
	struct rtc_device	*rtc;
	bool			valid;
#ifdef CONFIG_COMMON_CLK
	struct clk_hw		clkout_hw;
#endif
};

/*
 * RTC handling
 */

static int hym8563_rtc_read_time(struct device *dev, struct rtc_time *tm)
{
	struct i2c_client *client = to_i2c_client(dev);
	struct hym8563 *hym8563 = i2c_get_clientdata(client);
	u8 buf[7];
	int ret;

	if (!hym8563->valid) {
		dev_warn(&client->dev, "no valid clock/calendar values available\n");
		return -EPERM;
	}

	ret = i2c_smbus_read_i2c_block_data(client, HYM8563_SEC, 7, buf);

	tm->tm_sec = bcd2bin(buf[0] & HYM8563_SEC_MASK);
	tm->tm_min = bcd2bin(buf[1] & HYM8563_MIN_MASK);
	tm->tm_hour = bcd2bin(buf[2] & HYM8563_HOUR_MASK);
	tm->tm_mday = bcd2bin(buf[3] & HYM8563_DAY_MASK);
	tm->tm_wday = bcd2bin(buf[4] & HYM8563_WEEKDAY_MASK); /* 0 = Sun */
	tm->tm_mon = bcd2bin(buf[5] & HYM8563_MONTH_MASK) - 1; /* 0 = Jan */
	tm->tm_year = bcd2bin(buf[6]) + 100;

	return 0;
}

static int hym8563_rtc_set_time(struct device *dev, struct rtc_time *tm)
{
	struct i2c_client *client = to_i2c_client(dev);
	struct hym8563 *hym8563 = i2c_get_clientdata(client);
	u8 buf[7];
	int ret;

	/* Years >= 2100 are to far in the future, 19XX is to early */
	if (tm->tm_year < 100 || tm->tm_year >= 200)
		return -EINVAL;

	buf[0] = bin2bcd(tm->tm_sec);
	buf[1] = bin2bcd(tm->tm_min);
	buf[2] = bin2bcd(tm->tm_hour);
	buf[3] = bin2bcd(tm->tm_mday);
	buf[4] = bin2bcd(tm->tm_wday);
	buf[5] = bin2bcd(tm->tm_mon + 1);

	/*
	 * While the HYM8563 has a century flag in the month register,
	 * it does not seem to carry it over a subsequent write/read.
	 * So we'll limit ourself to 100 years, starting at 2000 for now.
	 */
	buf[6] = bin2bcd(tm->tm_year - 100);

	/*
	 * CTL1 only contains TEST-mode bits apart from stop,
	 * so no need to read the value first
	 */
	ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1,
						HYM8563_CTL1_STOP);
	if (ret < 0)
		return ret;

	ret = i2c_smbus_write_i2c_block_data(client, HYM8563_SEC, 7, buf);
	if (ret < 0)
		return ret;

	ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1, 0);
	if (ret < 0)
		return ret;

	hym8563->valid = true;

	return 0;
}

static int hym8563_rtc_alarm_irq_enable(struct device *dev,
					unsigned int enabled)
{
	struct i2c_client *client = to_i2c_client(dev);
	int data;

	data = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
	if (data < 0)
		return data;

	if (enabled)
		data |= HYM8563_CTL2_AIE;
	else
		data &= ~HYM8563_CTL2_AIE;

	return i2c_smbus_write_byte_data(client, HYM8563_CTL2, data);
};

static int hym8563_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
{
	struct i2c_client *client = to_i2c_client(dev);
	struct rtc_time *alm_tm = &alm->time;
	u8 buf[4];
	int ret;

	ret = i2c_smbus_read_i2c_block_data(client, HYM8563_ALM_MIN, 4, buf);
	if (ret < 0)
		return ret;

	/* The alarm only has a minute accuracy */
	alm_tm->tm_sec = 0;

	alm_tm->tm_min = (buf[0] & HYM8563_ALM_BIT_DISABLE) ?
					-1 :
					bcd2bin(buf[0] & HYM8563_MIN_MASK);
	alm_tm->tm_hour = (buf[1] & HYM8563_ALM_BIT_DISABLE) ?
					-1 :
					bcd2bin(buf[1] & HYM8563_HOUR_MASK);
	alm_tm->tm_mday = (buf[2] & HYM8563_ALM_BIT_DISABLE) ?
					-1 :
					bcd2bin(buf[2] & HYM8563_DAY_MASK);
	alm_tm->tm_wday = (buf[3] & HYM8563_ALM_BIT_DISABLE) ?
					-1 :
					bcd2bin(buf[3] & HYM8563_WEEKDAY_MASK);

	ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
	if (ret < 0)
		return ret;

	if (ret & HYM8563_CTL2_AIE)
		alm->enabled = 1;

	return 0;
}

static int hym8563_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
{
	struct i2c_client *client = to_i2c_client(dev);
	struct rtc_time *alm_tm = &alm->time;
	u8 buf[4];
	int ret;

	/*
	 * The alarm has no seconds so deal with it
	 */
	if (alm_tm->tm_sec) {
		alm_tm->tm_sec = 0;
		alm_tm->tm_min++;
		if (alm_tm->tm_min >= 60) {
			alm_tm->tm_min = 0;
			alm_tm->tm_hour++;
			if (alm_tm->tm_hour >= 24) {
				alm_tm->tm_hour = 0;
				alm_tm->tm_mday++;
				if (alm_tm->tm_mday > 31)
					alm_tm->tm_mday = 0;
			}
		}
	}

	ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
	if (ret < 0)
		return ret;

	ret &= ~HYM8563_CTL2_AIE;

	ret = i2c_smbus_write_byte_data(client, HYM8563_CTL2, ret);
	if (ret < 0)
		return ret;

	buf[0] = (alm_tm->tm_min < 60 && alm_tm->tm_min >= 0) ?
			bin2bcd(alm_tm->tm_min) : HYM8563_ALM_BIT_DISABLE;

	buf[1] = (alm_tm->tm_hour < 24 && alm_tm->tm_hour >= 0) ?
			bin2bcd(alm_tm->tm_hour) : HYM8563_ALM_BIT_DISABLE;

	buf[2] = (alm_tm->tm_mday <= 31 && alm_tm->tm_mday >= 1) ?
			bin2bcd(alm_tm->tm_mday) : HYM8563_ALM_BIT_DISABLE;

	buf[3] = (alm_tm->tm_wday < 7 && alm_tm->tm_wday >= 0) ?
			bin2bcd(alm_tm->tm_wday) : HYM8563_ALM_BIT_DISABLE;

	ret = i2c_smbus_write_i2c_block_data(client, HYM8563_ALM_MIN, 4, buf);
	if (ret < 0)
		return ret;

	return hym8563_rtc_alarm_irq_enable(dev, alm->enabled);
}

static const struct rtc_class_ops hym8563_rtc_ops = {
	.read_time		= hym8563_rtc_read_time,
	.set_time		= hym8563_rtc_set_time,
	.alarm_irq_enable	= hym8563_rtc_alarm_irq_enable,
	.read_alarm		= hym8563_rtc_read_alarm,
	.set_alarm		= hym8563_rtc_set_alarm,
};

/*
 * Handling of the clkout
 */

#ifdef CONFIG_COMMON_CLK
#define clkout_hw_to_hym8563(_hw) container_of(_hw, struct hym8563, clkout_hw)

static int clkout_rates[] = {
	32768,
	1024,
	32,
	1,
};

static unsigned long hym8563_clkout_recalc_rate(struct clk_hw *hw,
						unsigned long parent_rate)
{
	struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
	struct i2c_client *client = hym8563->client;
	int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);

	if (ret < 0)
		return 0;

	ret &= HYM8563_CLKOUT_MASK;
	return clkout_rates[ret];
}

static long hym8563_clkout_round_rate(struct clk_hw *hw, unsigned long rate,
				      unsigned long *prate)
{
	int i;

	for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
		if (clkout_rates[i] <= rate)
			return clkout_rates[i];

	return 0;
}

static int hym8563_clkout_set_rate(struct clk_hw *hw, unsigned long rate,
				   unsigned long parent_rate)
{
	struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
	struct i2c_client *client = hym8563->client;
	int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
	int i;

	if (ret < 0)
		return ret;

	for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
		if (clkout_rates[i] == rate) {
			ret &= ~HYM8563_CLKOUT_MASK;
			ret |= i;
			return i2c_smbus_write_byte_data(client,
							 HYM8563_CLKOUT, ret);
		}

	return -EINVAL;
}

static int hym8563_clkout_control(struct clk_hw *hw, bool enable)
{
	struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
	struct i2c_client *client = hym8563->client;
	int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);

	if (ret < 0)
		return ret;

	if (enable)
		ret |= HYM8563_CLKOUT_ENABLE;
	else
		ret &= ~HYM8563_CLKOUT_ENABLE;

	return i2c_smbus_write_byte_data(client, HYM8563_CLKOUT, ret);
}

static int hym8563_clkout_prepare(struct clk_hw *hw)
{
	return hym8563_clkout_control(hw, 1);
}

static void hym8563_clkout_unprepare(struct clk_hw *hw)
{
	hym8563_clkout_control(hw, 0);
}

static int hym8563_clkout_is_prepared(struct clk_hw *hw)
{
	struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
	struct i2c_client *client = hym8563->client;
	int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);

	if (ret < 0)
		return ret;

	return !!(ret & HYM8563_CLKOUT_ENABLE);
}

static const struct clk_ops hym8563_clkout_ops = {
	.prepare = hym8563_clkout_prepare,
	.unprepare = hym8563_clkout_unprepare,
	.is_prepared = hym8563_clkout_is_prepared,
	.recalc_rate = hym8563_clkout_recalc_rate,
	.round_rate = hym8563_clkout_round_rate,
	.set_rate = hym8563_clkout_set_rate,
};

static struct clk *hym8563_clkout_register_clk(struct hym8563 *hym8563)
{
	struct i2c_client *client = hym8563->client;
	struct device_node *node = client->dev.of_node;
	struct clk *clk;
	struct clk_init_data init;
	int ret;

	ret = i2c_smbus_write_byte_data(client, HYM8563_CLKOUT,
						0);
	if (ret < 0)
		return ERR_PTR(ret);

	init.name = "hym8563-clkout";
	init.ops = &hym8563_clkout_ops;
	init.flags = 0;
	init.parent_names = NULL;
	init.num_parents = 0;
	hym8563->clkout_hw.init = &init;

	/* optional override of the clockname */
	of_property_read_string(node, "clock-output-names", &init.name);

	/* register the clock */
	clk = clk_register(&client->dev, &hym8563->clkout_hw);

	if (!IS_ERR(clk))
		of_clk_add_provider(node, of_clk_src_simple_get, clk);

	return clk;
}
#endif

/*
 * The alarm interrupt is implemented as a level-low interrupt in the
 * hym8563, while the timer interrupt uses a falling edge.
 * We don't use the timer at all, so the interrupt is requested to
 * use the level-low trigger.
 */
static irqreturn_t hym8563_irq(int irq, void *dev_id)
{
	struct hym8563 *hym8563 = (struct hym8563 *)dev_id;
	struct i2c_client *client = hym8563->client;
	struct mutex *lock = &hym8563->rtc->ops_lock;
	int data, ret;

	mutex_lock(lock);

	/* Clear the alarm flag */

	data = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
	if (data < 0) {
		dev_err(&client->dev, "%s: error reading i2c data %d\n",
			__func__, data);
		goto out;
	}

	data &= ~HYM8563_CTL2_AF;

	ret = i2c_smbus_write_byte_data(client, HYM8563_CTL2, data);
	if (ret < 0) {
		dev_err(&client->dev, "%s: error writing i2c data %d\n",
			__func__, ret);
	}

out:
	mutex_unlock(lock);
	return IRQ_HANDLED;
}

static int hym8563_init_device(struct i2c_client *client)
{
	int ret;

	/* Clear stop flag if present */
	ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1, 0);
	if (ret < 0)
		return ret;

	ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
	if (ret < 0)
		return ret;

	/* Disable alarm and timer interrupts */
	ret &= ~HYM8563_CTL2_AIE;
	ret &= ~HYM8563_CTL2_TIE;

	/* Clear any pending alarm and timer flags */
	if (ret & HYM8563_CTL2_AF)
		ret &= ~HYM8563_CTL2_AF;

	if (ret & HYM8563_CTL2_TF)
		ret &= ~HYM8563_CTL2_TF;

	ret &= ~HYM8563_CTL2_TI_TP;

	return i2c_smbus_write_byte_data(client, HYM8563_CTL2, ret);
}

#ifdef CONFIG_PM_SLEEP
static int hym8563_suspend(struct device *dev)
{
	struct i2c_client *client = to_i2c_client(dev);
	int ret;

	if (device_may_wakeup(dev)) {
		ret = enable_irq_wake(client->irq);
		if (ret) {
			dev_err(dev, "enable_irq_wake failed, %d\n", ret);
			return ret;
		}
	}

	return 0;
}

static int hym8563_resume(struct device *dev)
{
	struct i2c_client *client = to_i2c_client(dev);

	if (device_may_wakeup(dev))
		disable_irq_wake(client->irq);

	return 0;
}
#endif

static SIMPLE_DEV_PM_OPS(hym8563_pm_ops, hym8563_suspend, hym8563_resume);

static int hym8563_probe(struct i2c_client *client,
			 const struct i2c_device_id *id)
{
	struct hym8563 *hym8563;
	int ret;

	hym8563 = devm_kzalloc(&client->dev, sizeof(*hym8563), GFP_KERNEL);
	if (!hym8563)
		return -ENOMEM;

	hym8563->client = client;
	i2c_set_clientdata(client, hym8563);

	device_set_wakeup_capable(&client->dev, true);

	ret = hym8563_init_device(client);
	if (ret) {
		dev_err(&client->dev, "could not init device, %d\n", ret);
		return ret;
	}

	if (client->irq > 0) {
		ret = devm_request_threaded_irq(&client->dev, client->irq,
						NULL, hym8563_irq,
						IRQF_TRIGGER_LOW | IRQF_ONESHOT,
						client->name, hym8563);
		if (ret < 0) {
			dev_err(&client->dev, "irq %d request failed, %d\n",
				client->irq, ret);
			return ret;
		}
	}

	/* check state of calendar information */
	ret = i2c_smbus_read_byte_data(client, HYM8563_SEC);
	if (ret < 0)
		return ret;

	hym8563->valid = !(ret & HYM8563_SEC_VL);
	dev_dbg(&client->dev, "rtc information is %s\n",
		hym8563->valid ? "valid" : "invalid");

	hym8563->rtc = devm_rtc_device_register(&client->dev, client->name,
						&hym8563_rtc_ops, THIS_MODULE);
	if (IS_ERR(hym8563->rtc))
		return PTR_ERR(hym8563->rtc);

	/* the hym8563 alarm only supports a minute accuracy */
	hym8563->rtc->uie_unsupported = 1;

#ifdef CONFIG_COMMON_CLK
	hym8563_clkout_register_clk(hym8563);
#endif

	return 0;
}

static const struct i2c_device_id hym8563_id[] = {
	{ "hym8563", 0 },
	{},
};
MODULE_DEVICE_TABLE(i2c, hym8563_id);

static const struct of_device_id hym8563_dt_idtable[] = {
	{ .compatible = "haoyu,hym8563" },
	{},
};
MODULE_DEVICE_TABLE(of, hym8563_dt_idtable);

static struct i2c_driver hym8563_driver = {
	.driver		= {
		.name	= "rtc-hym8563",
		.pm	= &hym8563_pm_ops,
		.of_match_table	= hym8563_dt_idtable,
	},
	.probe		= hym8563_probe,
	.id_table	= hym8563_id,
};

module_i2c_driver(hym8563_driver);

MODULE_AUTHOR("Heiko Stuebner <[email protected]>");
MODULE_DESCRIPTION("HYM8563 RTC driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
dcaf0384 HS	1	/*
	2	* Haoyu HYM8563 RTC driver
	3	*
	4	* Copyright (C) 2013 MundoReader S.L.
	5	* Author: Heiko Stuebner <[email protected]>
	6	*
	7	* based on rtc-HYM8563
	8	* Copyright (C) 2010 ROCKCHIP, Inc.
	9	*
	10	* This software is licensed under the terms of the GNU General Public
	11	* License version 2, as published by the Free Software Foundation, and
	12	* may be copied, distributed, and modified under those terms.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*/
	19
	20	#include <linux/module.h>
	21	#include <linux/clk-provider.h>
	22	#include <linux/i2c.h>
	23	#include <linux/bcd.h>
	24	#include <linux/rtc.h>
	25
	26	#define HYM8563_CTL1 0x00
	27	#define HYM8563_CTL1_TEST BIT(7)
	28	#define HYM8563_CTL1_STOP BIT(5)
	29	#define HYM8563_CTL1_TESTC BIT(3)
	30
	31	#define HYM8563_CTL2 0x01
	32	#define HYM8563_CTL2_TI_TP BIT(4)
	33	#define HYM8563_CTL2_AF BIT(3)
	34	#define HYM8563_CTL2_TF BIT(2)
	35	#define HYM8563_CTL2_AIE BIT(1)
	36	#define HYM8563_CTL2_TIE BIT(0)
	37
	38	#define HYM8563_SEC 0x02
	39	#define HYM8563_SEC_VL BIT(7)
	40	#define HYM8563_SEC_MASK 0x7f
	41
	42	#define HYM8563_MIN 0x03
	43	#define HYM8563_MIN_MASK 0x7f
	44
	45	#define HYM8563_HOUR 0x04
	46	#define HYM8563_HOUR_MASK 0x3f
	47
	48	#define HYM8563_DAY 0x05
	49	#define HYM8563_DAY_MASK 0x3f
	50
	51	#define HYM8563_WEEKDAY 0x06
	52	#define HYM8563_WEEKDAY_MASK 0x07
	53
	54	#define HYM8563_MONTH 0x07
	55	#define HYM8563_MONTH_CENTURY BIT(7)
	56	#define HYM8563_MONTH_MASK 0x1f
	57
	58	#define HYM8563_YEAR 0x08
	59
	60	#define HYM8563_ALM_MIN 0x09
	61	#define HYM8563_ALM_HOUR 0x0a
	62	#define HYM8563_ALM_DAY 0x0b
	63	#define HYM8563_ALM_WEEK 0x0c
	64
65	/* Each alarm check can be disabled by setting this bit in the register */
66	#define HYM8563_ALM_BIT_DISABLE BIT(7)
67
68	#define HYM8563_CLKOUT 0x0d
f539a8ac	69	#define HYM8563_CLKOUT_ENABLE BIT(7)
dcaf0384 HS	70	#define HYM8563_CLKOUT_32768 0
	71	#define HYM8563_CLKOUT_1024 1
	72	#define HYM8563_CLKOUT_32 2
	73	#define HYM8563_CLKOUT_1 3
	74	#define HYM8563_CLKOUT_MASK 3
	75
	76	#define HYM8563_TMR_CTL 0x0e
	77	#define HYM8563_TMR_CTL_ENABLE BIT(7)
	78	#define HYM8563_TMR_CTL_4096 0
	79	#define HYM8563_TMR_CTL_64 1
	80	#define HYM8563_TMR_CTL_1 2
	81	#define HYM8563_TMR_CTL_1_60 3
	82	#define HYM8563_TMR_CTL_MASK 3
	83
	84	#define HYM8563_TMR_CNT 0x0f
	85
	86	struct hym8563 {
	87	struct i2c_client *client;
	88	struct rtc_device *rtc;
	89	bool valid;
	90	#ifdef CONFIG_COMMON_CLK
	91	struct clk_hw clkout_hw;
	92	#endif
	93	};
	94
	95	/*
	96	* RTC handling
	97	*/
	98
	99	static int hym8563_rtc_read_time(struct device dev, struct rtc_time tm)
	100	{
	101	struct i2c_client *client = to_i2c_client(dev);
	102	struct hym8563 *hym8563 = i2c_get_clientdata(client);
	103	u8 buf[7];
	104	int ret;
	105
	106	if (!hym8563->valid) {
	107	dev_warn(&client->dev, "no valid clock/calendar values available\n");
	108	return -EPERM;
	109	}
	110
	111	ret = i2c_smbus_read_i2c_block_data(client, HYM8563_SEC, 7, buf);
	112
	113	tm->tm_sec = bcd2bin(buf[0] & HYM8563_SEC_MASK);
	114	tm->tm_min = bcd2bin(buf[1] & HYM8563_MIN_MASK);
	115	tm->tm_hour = bcd2bin(buf[2] & HYM8563_HOUR_MASK);
	116	tm->tm_mday = bcd2bin(buf[3] & HYM8563_DAY_MASK);
	117	tm->tm_wday = bcd2bin(buf[4] & HYM8563_WEEKDAY_MASK); /* 0 = Sun */
	118	tm->tm_mon = bcd2bin(buf[5] & HYM8563_MONTH_MASK) - 1; /* 0 = Jan */
	119	tm->tm_year = bcd2bin(buf[6]) + 100;
	120
	121	return 0;
	122	}
	123
	124	static int hym8563_rtc_set_time(struct device dev, struct rtc_time tm)
	125	{
	126	struct i2c_client *client = to_i2c_client(dev);
	127	struct hym8563 *hym8563 = i2c_get_clientdata(client);
	128	u8 buf[7];
	129	int ret;
	130
	131	/* Years >= 2100 are to far in the future, 19XX is to early */
	132	if (tm->tm_year < 100 \|\| tm->tm_year >= 200)
	133	return -EINVAL;
134
135	buf[0] = bin2bcd(tm->tm_sec);
136	buf[1] = bin2bcd(tm->tm_min);
137	buf[2] = bin2bcd(tm->tm_hour);
138	buf[3] = bin2bcd(tm->tm_mday);
139	buf[4] = bin2bcd(tm->tm_wday);
140	buf[5] = bin2bcd(tm->tm_mon + 1);
141
142	/*
143	* While the HYM8563 has a century flag in the month register,
144	* it does not seem to carry it over a subsequent write/read.
145	* So we'll limit ourself to 100 years, starting at 2000 for now.
146	*/
d5861262	147	buf[6] = bin2bcd(tm->tm_year - 100);
dcaf0384 HS	148
	149	/*
	150	* CTL1 only contains TEST-mode bits apart from stop,
	151	* so no need to read the value first
	152	*/
	153	ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1,
	154	HYM8563_CTL1_STOP);
	155	if (ret < 0)
	156	return ret;
	157
	158	ret = i2c_smbus_write_i2c_block_data(client, HYM8563_SEC, 7, buf);
	159	if (ret < 0)
	160	return ret;
	161
	162	ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1, 0);
	163	if (ret < 0)
	164	return ret;
	165
	166	hym8563->valid = true;
	167
	168	return 0;
	169	}
	170
	171	static int hym8563_rtc_alarm_irq_enable(struct device *dev,
	172	unsigned int enabled)
	173	{
	174	struct i2c_client *client = to_i2c_client(dev);
	175	int data;
	176
	177	data = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
	178	if (data < 0)
	179	return data;
	180
	181	if (enabled)
	182	data \|= HYM8563_CTL2_AIE;
	183	else
	184	data &= ~HYM8563_CTL2_AIE;
	185
	186	return i2c_smbus_write_byte_data(client, HYM8563_CTL2, data);
	187	};
	188
	189	static int hym8563_rtc_read_alarm(struct device dev, struct rtc_wkalrm alm)
	190	{
	191	struct i2c_client *client = to_i2c_client(dev);
	192	struct rtc_time *alm_tm = &alm->time;
	193	u8 buf[4];
	194	int ret;
	195
	196	ret = i2c_smbus_read_i2c_block_data(client, HYM8563_ALM_MIN, 4, buf);
	197	if (ret < 0)
	198	return ret;
	199
	200	/* The alarm only has a minute accuracy */
bb9dbb01	201	alm_tm->tm_sec = 0;
dcaf0384 HS	202
	203	alm_tm->tm_min = (buf[0] & HYM8563_ALM_BIT_DISABLE) ?
	204	-1 :
	205	bcd2bin(buf[0] & HYM8563_MIN_MASK);
	206	alm_tm->tm_hour = (buf[1] & HYM8563_ALM_BIT_DISABLE) ?
	207	-1 :
	208	bcd2bin(buf[1] & HYM8563_HOUR_MASK);
	209	alm_tm->tm_mday = (buf[2] & HYM8563_ALM_BIT_DISABLE) ?
	210	-1 :
	211	bcd2bin(buf[2] & HYM8563_DAY_MASK);
	212	alm_tm->tm_wday = (buf[3] & HYM8563_ALM_BIT_DISABLE) ?
	213	-1 :
	214	bcd2bin(buf[3] & HYM8563_WEEKDAY_MASK);
	215
dcaf0384 HS	216	ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
	217	if (ret < 0)
	218	return ret;
	219
	220	if (ret & HYM8563_CTL2_AIE)
	221	alm->enabled = 1;
	222
	223	return 0;
	224	}
	225
	226	static int hym8563_rtc_set_alarm(struct device dev, struct rtc_wkalrm alm)
	227	{
	228	struct i2c_client *client = to_i2c_client(dev);
	229	struct rtc_time *alm_tm = &alm->time;
	230	u8 buf[4];
	231	int ret;
	232
	233	/*
	234	* The alarm has no seconds so deal with it
	235	*/
	236	if (alm_tm->tm_sec) {
	237	alm_tm->tm_sec = 0;
	238	alm_tm->tm_min++;
	239	if (alm_tm->tm_min >= 60) {
	240	alm_tm->tm_min = 0;
	241	alm_tm->tm_hour++;
	242	if (alm_tm->tm_hour >= 24) {
	243	alm_tm->tm_hour = 0;
	244	alm_tm->tm_mday++;
	245	if (alm_tm->tm_mday > 31)
	246	alm_tm->tm_mday = 0;
	247	}
	248	}
	249	}
	250
	251	ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
	252	if (ret < 0)
	253	return ret;
	254
	255	ret &= ~HYM8563_CTL2_AIE;
	256
	257	ret = i2c_smbus_write_byte_data(client, HYM8563_CTL2, ret);
	258	if (ret < 0)
	259	return ret;
	260
	261	buf[0] = (alm_tm->tm_min < 60 && alm_tm->tm_min >= 0) ?
	262	bin2bcd(alm_tm->tm_min) : HYM8563_ALM_BIT_DISABLE;
	263
	264	buf[1] = (alm_tm->tm_hour < 24 && alm_tm->tm_hour >= 0) ?
	265	bin2bcd(alm_tm->tm_hour) : HYM8563_ALM_BIT_DISABLE;
	266
	267	buf[2] = (alm_tm->tm_mday <= 31 && alm_tm->tm_mday >= 1) ?
	268	bin2bcd(alm_tm->tm_mday) : HYM8563_ALM_BIT_DISABLE;
	269
	270	buf[3] = (alm_tm->tm_wday < 7 && alm_tm->tm_wday >= 0) ?
	271	bin2bcd(alm_tm->tm_wday) : HYM8563_ALM_BIT_DISABLE;
	272
	273	ret = i2c_smbus_write_i2c_block_data(client, HYM8563_ALM_MIN, 4, buf);
	274	if (ret < 0)
	275	return ret;
	276
	277	return hym8563_rtc_alarm_irq_enable(dev, alm->enabled);
	278	}
	279
280	static const struct rtc_class_ops hym8563_rtc_ops = {
281	.read_time = hym8563_rtc_read_time,
282	.set_time = hym8563_rtc_set_time,
283	.alarm_irq_enable = hym8563_rtc_alarm_irq_enable,
284	.read_alarm = hym8563_rtc_read_alarm,
285	.set_alarm = hym8563_rtc_set_alarm,
286	};
287
288	/*
289	* Handling of the clkout
290	*/
291
292	#ifdef CONFIG_COMMON_CLK
293	#define clkout_hw_to_hym8563(_hw) container_of(_hw, struct hym8563, clkout_hw)
294
295	static int clkout_rates[] = {
296	32768,
297	1024,
298	32,
299	1,
300	};
301
302	static unsigned long hym8563_clkout_recalc_rate(struct clk_hw *hw,
303	unsigned long parent_rate)
304	{
305	struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
306	struct i2c_client *client = hym8563->client;
307	int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
308
b3288a43	309	if (ret < 0)
dcaf0384 HS	310	return 0;
	311
	312	ret &= HYM8563_CLKOUT_MASK;
	313	return clkout_rates[ret];
	314	}
	315
	316	static long hym8563_clkout_round_rate(struct clk_hw *hw, unsigned long rate,
	317	unsigned long *prate)
	318	{
	319	int i;
	320
	321	for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
	322	if (clkout_rates[i] <= rate)
	323	return clkout_rates[i];
	324
	325	return 0;
	326	}
	327
	328	static int hym8563_clkout_set_rate(struct clk_hw *hw, unsigned long rate,
	329	unsigned long parent_rate)
	330	{
	331	struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
	332	struct i2c_client *client = hym8563->client;
	333	int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
	334	int i;
	335
	336	if (ret < 0)
	337	return ret;
	338
	339	for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
	340	if (clkout_rates[i] == rate) {
	341	ret &= ~HYM8563_CLKOUT_MASK;
	342	ret \|= i;
	343	return i2c_smbus_write_byte_data(client,
	344	HYM8563_CLKOUT, ret);
	345	}
	346
	347	return -EINVAL;
	348	}
	349
	350	static int hym8563_clkout_control(struct clk_hw *hw, bool enable)
	351	{
	352	struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
	353	struct i2c_client *client = hym8563->client;
	354	int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
	355
	356	if (ret < 0)
	357	return ret;
	358
	359	if (enable)
f539a8ac	360	ret \|= HYM8563_CLKOUT_ENABLE;
dcaf0384	361	else
f539a8ac	362	ret &= ~HYM8563_CLKOUT_ENABLE;
dcaf0384 HS	363
	364	return i2c_smbus_write_byte_data(client, HYM8563_CLKOUT, ret);
	365	}
	366
	367	static int hym8563_clkout_prepare(struct clk_hw *hw)
	368	{
	369	return hym8563_clkout_control(hw, 1);
	370	}
	371
	372	static void hym8563_clkout_unprepare(struct clk_hw *hw)
	373	{
	374	hym8563_clkout_control(hw, 0);
	375	}
	376
	377	static int hym8563_clkout_is_prepared(struct clk_hw *hw)
	378	{
	379	struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
	380	struct i2c_client *client = hym8563->client;
	381	int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
	382
	383	if (ret < 0)
	384	return ret;
	385
f539a8ac	386	return !!(ret & HYM8563_CLKOUT_ENABLE);
dcaf0384 HS	387	}
dcaf0384 HS	388
28ed893c	389	static const struct clk_ops hym8563_clkout_ops = {
dcaf0384 HS	390	.prepare = hym8563_clkout_prepare,
	391	.unprepare = hym8563_clkout_unprepare,
	392	.is_prepared = hym8563_clkout_is_prepared,
	393	.recalc_rate = hym8563_clkout_recalc_rate,
	394	.round_rate = hym8563_clkout_round_rate,
	395	.set_rate = hym8563_clkout_set_rate,
	396	};
	397
	398	static struct clk hym8563_clkout_register_clk(struct hym8563 hym8563)
	399	{
	400	struct i2c_client *client = hym8563->client;
	401	struct device_node *node = client->dev.of_node;
	402	struct clk *clk;
	403	struct clk_init_data init;
	404	int ret;
	405
	406	ret = i2c_smbus_write_byte_data(client, HYM8563_CLKOUT,
f539a8ac	407	0);
dcaf0384 HS	408	if (ret < 0)
	409	return ERR_PTR(ret);
	410
	411	init.name = "hym8563-clkout";
	412	init.ops = &hym8563_clkout_ops;
bdcaace5	413	init.flags = 0;
dcaf0384 HS	414	init.parent_names = NULL;
	415	init.num_parents = 0;
	416	hym8563->clkout_hw.init = &init;
	417
68164a73 HS	418	/* optional override of the clockname */
	419	of_property_read_string(node, "clock-output-names", &init.name);
	420
dcaf0384 HS	421	/* register the clock */
	422	clk = clk_register(&client->dev, &hym8563->clkout_hw);
	423
	424	if (!IS_ERR(clk))
	425	of_clk_add_provider(node, of_clk_src_simple_get, clk);
	426
	427	return clk;
	428	}
	429	#endif
	430
	431	/*
	432	* The alarm interrupt is implemented as a level-low interrupt in the
	433	* hym8563, while the timer interrupt uses a falling edge.
	434	* We don't use the timer at all, so the interrupt is requested to
	435	* use the level-low trigger.
	436	*/
	437	static irqreturn_t hym8563_irq(int irq, void *dev_id)
	438	{
	439	struct hym8563 hym8563 = (struct hym8563 )dev_id;
	440	struct i2c_client *client = hym8563->client;
	441	struct mutex *lock = &hym8563->rtc->ops_lock;
	442	int data, ret;
	443
	444	mutex_lock(lock);
	445
	446	/* Clear the alarm flag */
	447
	448	data = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
	449	if (data < 0) {
	450	dev_err(&client->dev, "%s: error reading i2c data %d\n",
	451	__func__, data);
	452	goto out;
	453	}
	454
	455	data &= ~HYM8563_CTL2_AF;
	456
	457	ret = i2c_smbus_write_byte_data(client, HYM8563_CTL2, data);
	458	if (ret < 0) {
	459	dev_err(&client->dev, "%s: error writing i2c data %d\n",
	460	__func__, ret);
	461	}
	462
	463	out:
	464	mutex_unlock(lock);
	465	return IRQ_HANDLED;
	466	}
	467
	468	static int hym8563_init_device(struct i2c_client *client)
	469	{
	470	int ret;
	471
	472	/* Clear stop flag if present */
	473	ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1, 0);
	474	if (ret < 0)
	475	return ret;
	476
	477	ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
	478	if (ret < 0)
	479	return ret;
	480
	481	/* Disable alarm and timer interrupts */
	482	ret &= ~HYM8563_CTL2_AIE;
	483	ret &= ~HYM8563_CTL2_TIE;
	484
485	/* Clear any pending alarm and timer flags */
486	if (ret & HYM8563_CTL2_AF)
487	ret &= ~HYM8563_CTL2_AF;
488
489	if (ret & HYM8563_CTL2_TF)
490	ret &= ~HYM8563_CTL2_TF;
491
492	ret &= ~HYM8563_CTL2_TI_TP;
493
494	return i2c_smbus_write_byte_data(client, HYM8563_CTL2, ret);
495	}
496
497	#ifdef CONFIG_PM_SLEEP
498	static int hym8563_suspend(struct device *dev)
499	{
500	struct i2c_client *client = to_i2c_client(dev);
501	int ret;
502
503	if (device_may_wakeup(dev)) {
504	ret = enable_irq_wake(client->irq);
505	if (ret) {
506	dev_err(dev, "enable_irq_wake failed, %d\n", ret);
507	return ret;
508	}
509	}
510
511	return 0;
512	}
513
514	static int hym8563_resume(struct device *dev)
515	{
516	struct i2c_client *client = to_i2c_client(dev);
517
518	if (device_may_wakeup(dev))
519	disable_irq_wake(client->irq);
520
521	return 0;
522	}
523	#endif
524
525	static SIMPLE_DEV_PM_OPS(hym8563_pm_ops, hym8563_suspend, hym8563_resume);
526
527	static int hym8563_probe(struct i2c_client *client,
528	const struct i2c_device_id *id)
529	{
530	struct hym8563 *hym8563;
531	int ret;
532
533	hym8563 = devm_kzalloc(&client->dev, sizeof(*hym8563), GFP_KERNEL);
534	if (!hym8563)
535	return -ENOMEM;
536
537	hym8563->client = client;
538	i2c_set_clientdata(client, hym8563);
539
540	device_set_wakeup_capable(&client->dev, true);
541
542	ret = hym8563_init_device(client);
543	if (ret) {
544	dev_err(&client->dev, "could not init device, %d\n", ret);
545	return ret;
546	}
547
4be1f6bb HS	548	if (client->irq > 0) {
	549	ret = devm_request_threaded_irq(&client->dev, client->irq,
	550	NULL, hym8563_irq,
	551	IRQF_TRIGGER_LOW \| IRQF_ONESHOT,
	552	client->name, hym8563);
	553	if (ret < 0) {
	554	dev_err(&client->dev, "irq %d request failed, %d\n",
	555	client->irq, ret);
	556	return ret;
	557	}
dcaf0384 HS	558	}
	559
	560	/* check state of calendar information */
	561	ret = i2c_smbus_read_byte_data(client, HYM8563_SEC);
	562	if (ret < 0)
	563	return ret;
	564
	565	hym8563->valid = !(ret & HYM8563_SEC_VL);
	566	dev_dbg(&client->dev, "rtc information is %s\n",
	567	hym8563->valid ? "valid" : "invalid");
	568
	569	hym8563->rtc = devm_rtc_device_register(&client->dev, client->name,
	570	&hym8563_rtc_ops, THIS_MODULE);
	571	if (IS_ERR(hym8563->rtc))
	572	return PTR_ERR(hym8563->rtc);
	573
282cba6b HS	574	/* the hym8563 alarm only supports a minute accuracy */
	575	hym8563->rtc->uie_unsupported = 1;
	576
dcaf0384 HS	577	#ifdef CONFIG_COMMON_CLK
	578	hym8563_clkout_register_clk(hym8563);
	579	#endif
	580
	581	return 0;
	582	}
	583
	584	static const struct i2c_device_id hym8563_id[] = {
	585	{ "hym8563", 0 },
	586	{},
	587	};
	588	MODULE_DEVICE_TABLE(i2c, hym8563_id);
	589
e524360b	590	static const struct of_device_id hym8563_dt_idtable[] = {
dcaf0384 HS	591	{ .compatible = "haoyu,hym8563" },
	592	{},
	593	};
	594	MODULE_DEVICE_TABLE(of, hym8563_dt_idtable);
	595
	596	static struct i2c_driver hym8563_driver = {
	597	.driver = {
	598	.name = "rtc-hym8563",
dcaf0384	599	.pm = &hym8563_pm_ops,
156e3526	600	.of_match_table = hym8563_dt_idtable,
dcaf0384 HS	601	},
	602	.probe = hym8563_probe,
	603	.id_table = hym8563_id,
	604	};
	605
	606	module_i2c_driver(hym8563_driver);
	607
	608	MODULE_AUTHOR("Heiko Stuebner <[email protected]>");
	609	MODULE_DESCRIPTION("HYM8563 RTC driver");
	610	MODULE_LICENSE("GPL");