[linux.git] / drivers / mfd / wm8994-irq.c

/*
 * wm8994-irq.c  --  Interrupt controller support for Wolfson WM8994
 *
 * Copyright 2010 Wolfson Microelectronics PLC.
 *
 * Author: Mark Brown <[email protected]>
 *
 *  This program is free software; you can redistribute  it and/or modify it
 *  under  the terms of  the GNU General  Public License as published by the
 *  Free Software Foundation;  either version 2 of the  License, or (at your
 *  option) any later version.
 *
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/gpio.h>
#include <linux/i2c.h>
#include <linux/irq.h>
#include <linux/mfd/core.h>
#include <linux/interrupt.h>
#include <linux/irqdomain.h>
#include <linux/regmap.h>

#include <linux/mfd/wm8994/core.h>
#include <linux/mfd/wm8994/pdata.h>
#include <linux/mfd/wm8994/registers.h>

#include <linux/delay.h>

static const struct regmap_irq wm8994_irqs[] = {
	[WM8994_IRQ_TEMP_SHUT] = {
		.reg_offset = 1,
		.mask = WM8994_TEMP_SHUT_EINT,
	},
	[WM8994_IRQ_MIC1_DET] = {
		.reg_offset = 1,
		.mask = WM8994_MIC1_DET_EINT,
	},
	[WM8994_IRQ_MIC1_SHRT] = {
		.reg_offset = 1,
		.mask = WM8994_MIC1_SHRT_EINT,
	},
	[WM8994_IRQ_MIC2_DET] = {
		.reg_offset = 1,
		.mask = WM8994_MIC2_DET_EINT,
	},
	[WM8994_IRQ_MIC2_SHRT] = {
		.reg_offset = 1,
		.mask = WM8994_MIC2_SHRT_EINT,
	},
	[WM8994_IRQ_FLL1_LOCK] = {
		.reg_offset = 1,
		.mask = WM8994_FLL1_LOCK_EINT,
	},
	[WM8994_IRQ_FLL2_LOCK] = {
		.reg_offset = 1,
		.mask = WM8994_FLL2_LOCK_EINT,
	},
	[WM8994_IRQ_SRC1_LOCK] = {
		.reg_offset = 1,
		.mask = WM8994_SRC1_LOCK_EINT,
	},
	[WM8994_IRQ_SRC2_LOCK] = {
		.reg_offset = 1,
		.mask = WM8994_SRC2_LOCK_EINT,
	},
	[WM8994_IRQ_AIF1DRC1_SIG_DET] = {
		.reg_offset = 1,
		.mask = WM8994_AIF1DRC1_SIG_DET,
	},
	[WM8994_IRQ_AIF1DRC2_SIG_DET] = {
		.reg_offset = 1,
		.mask = WM8994_AIF1DRC2_SIG_DET_EINT,
	},
	[WM8994_IRQ_AIF2DRC_SIG_DET] = {
		.reg_offset = 1,
		.mask = WM8994_AIF2DRC_SIG_DET_EINT,
	},
	[WM8994_IRQ_FIFOS_ERR] = {
		.reg_offset = 1,
		.mask = WM8994_FIFOS_ERR_EINT,
	},
	[WM8994_IRQ_WSEQ_DONE] = {
		.reg_offset = 1,
		.mask = WM8994_WSEQ_DONE_EINT,
	},
	[WM8994_IRQ_DCS_DONE] = {
		.reg_offset = 1,
		.mask = WM8994_DCS_DONE_EINT,
	},
	[WM8994_IRQ_TEMP_WARN] = {
		.reg_offset = 1,
		.mask = WM8994_TEMP_WARN_EINT,
	},
	[WM8994_IRQ_GPIO(1)] = {
		.mask = WM8994_GP1_EINT,
	},
	[WM8994_IRQ_GPIO(2)] = {
		.mask = WM8994_GP2_EINT,
	},
	[WM8994_IRQ_GPIO(3)] = {
		.mask = WM8994_GP3_EINT,
	},
	[WM8994_IRQ_GPIO(4)] = {
		.mask = WM8994_GP4_EINT,
	},
	[WM8994_IRQ_GPIO(5)] = {
		.mask = WM8994_GP5_EINT,
	},
	[WM8994_IRQ_GPIO(6)] = {
		.mask = WM8994_GP6_EINT,
	},
	[WM8994_IRQ_GPIO(7)] = {
		.mask = WM8994_GP7_EINT,
	},
	[WM8994_IRQ_GPIO(8)] = {
		.mask = WM8994_GP8_EINT,
	},
	[WM8994_IRQ_GPIO(9)] = {
		.mask = WM8994_GP8_EINT,
	},
	[WM8994_IRQ_GPIO(10)] = {
		.mask = WM8994_GP10_EINT,
	},
	[WM8994_IRQ_GPIO(11)] = {
		.mask = WM8994_GP11_EINT,
	},
};

static const struct regmap_irq_chip wm8994_irq_chip = {
	.name = "wm8994",
	.irqs = wm8994_irqs,
	.num_irqs = ARRAY_SIZE(wm8994_irqs),

	.num_regs = 2,
	.status_base = WM8994_INTERRUPT_STATUS_1,
	.mask_base = WM8994_INTERRUPT_STATUS_1_MASK,
	.ack_base = WM8994_INTERRUPT_STATUS_1,
	.runtime_pm = true,
};

static void wm8994_edge_irq_enable(struct irq_data *data)
{
}

static void wm8994_edge_irq_disable(struct irq_data *data)
{
}

static struct irq_chip wm8994_edge_irq_chip = {
	.name			= "wm8994_edge",
	.irq_disable		= wm8994_edge_irq_disable,
	.irq_enable		= wm8994_edge_irq_enable,
};

static irqreturn_t wm8994_edge_irq(int irq, void *data)
{
	struct wm8994 *wm8994 = data;

	while (gpio_get_value_cansleep(wm8994->pdata.irq_gpio))
		handle_nested_irq(irq_create_mapping(wm8994->edge_irq, 0));

	return IRQ_HANDLED;
}

static int wm8994_edge_irq_map(struct irq_domain *h, unsigned int virq,
			       irq_hw_number_t hw)
{
	struct wm8994 *wm8994 = h->host_data;

	irq_set_chip_data(virq, wm8994);
	irq_set_chip_and_handler(virq, &wm8994_edge_irq_chip, handle_edge_irq);
	irq_set_nested_thread(virq, 1);
	irq_set_noprobe(virq);

	return 0;
}

static const struct irq_domain_ops wm8994_edge_irq_ops = {
	.map	= wm8994_edge_irq_map,
	.xlate	= irq_domain_xlate_twocell,
};

int wm8994_irq_init(struct wm8994 *wm8994)
{
	int ret;
	unsigned long irqflags;
	struct wm8994_pdata *pdata = &wm8994->pdata;

	if (!wm8994->irq) {
		dev_warn(wm8994->dev,
			 "No interrupt specified, no interrupts\n");
		wm8994->irq_base = 0;
		return 0;
	}

	/* select user or default irq flags */
	irqflags = IRQF_TRIGGER_HIGH | IRQF_ONESHOT;
	if (pdata->irq_flags)
		irqflags = pdata->irq_flags;

	/* use a GPIO for edge triggered controllers */
	if (irqflags & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
		if (gpio_to_irq(pdata->irq_gpio) != wm8994->irq) {
			dev_warn(wm8994->dev, "IRQ %d is not GPIO %d (%d)\n",
				 wm8994->irq, pdata->irq_gpio,
				 gpio_to_irq(pdata->irq_gpio));
			wm8994->irq = gpio_to_irq(pdata->irq_gpio);
		}

		ret = devm_gpio_request_one(wm8994->dev, pdata->irq_gpio,
					    GPIOF_IN, "WM8994 IRQ");

		if (ret != 0) {
			dev_err(wm8994->dev, "Failed to get IRQ GPIO: %d\n",
				ret);
			return ret;
		}

		wm8994->edge_irq = irq_domain_add_linear(NULL, 1,
							 &wm8994_edge_irq_ops,
							 wm8994);

		ret = regmap_add_irq_chip(wm8994->regmap,
					  irq_create_mapping(wm8994->edge_irq,
							     0),
					  IRQF_ONESHOT,
					  wm8994->irq_base, &wm8994_irq_chip,
					  &wm8994->irq_data);
		if (ret != 0) {
			dev_err(wm8994->dev, "Failed to get IRQ: %d\n",
				ret);
			return ret;
		}

		ret = request_threaded_irq(wm8994->irq,
					   NULL, wm8994_edge_irq,
					   irqflags,
					   "WM8994 edge", wm8994);
	} else {
		ret = regmap_add_irq_chip(wm8994->regmap, wm8994->irq,
					  irqflags,
					  wm8994->irq_base, &wm8994_irq_chip,
					  &wm8994->irq_data);
	}

	if (ret != 0) {
		dev_err(wm8994->dev, "Failed to register IRQ chip: %d\n", ret);
		return ret;
	}

	/* Enable top level interrupt if it was masked */
	wm8994_reg_write(wm8994, WM8994_INTERRUPT_CONTROL, 0);

	return 0;
}
EXPORT_SYMBOL(wm8994_irq_init);

void wm8994_irq_exit(struct wm8994 *wm8994)
{
	regmap_del_irq_chip(wm8994->irq, wm8994->irq_data);
}
EXPORT_SYMBOL(wm8994_irq_exit);
Commit	Line	Data
c9fbf7e0 MB	1	/*
	2	* wm8994-irq.c -- Interrupt controller support for Wolfson WM8994
	3	*
	4	* Copyright 2010 Wolfson Microelectronics PLC.
	5	*
	6	* Author: Mark Brown <[email protected]>
	7	*
	8	* This program is free software; you can redistribute it and/or modify it
	9	* under the terms of the GNU General Public License as published by the
	10	* Free Software Foundation; either version 2 of the License, or (at your
	11	* option) any later version.
	12	*
	13	*/
	14
	15	#include <linux/kernel.h>
	16	#include <linux/module.h>
7c884448	17	#include <linux/gpio.h>
c9fbf7e0 MB	18	#include <linux/i2c.h>
	19	#include <linux/irq.h>
	20	#include <linux/mfd/core.h>
	21	#include <linux/interrupt.h>
7c884448	22	#include <linux/irqdomain.h>
8ab30691	23	#include <linux/regmap.h>
c9fbf7e0 MB	24
c9fbf7e0 MB	25	#include <linux/mfd/wm8994/core.h>
b0ab907d	26	#include <linux/mfd/wm8994/pdata.h>
c9fbf7e0 MB	27	#include <linux/mfd/wm8994/registers.h>
	28
	29	#include <linux/delay.h>
	30
7ce7b26f	31	static const struct regmap_irq wm8994_irqs[] = {
c9fbf7e0	32	[WM8994_IRQ_TEMP_SHUT] = {
8ab30691	33	.reg_offset = 1,
c9fbf7e0 MB	34	.mask = WM8994_TEMP_SHUT_EINT,
	35	},
	36	[WM8994_IRQ_MIC1_DET] = {
8ab30691	37	.reg_offset = 1,
c9fbf7e0 MB	38	.mask = WM8994_MIC1_DET_EINT,
	39	},
	40	[WM8994_IRQ_MIC1_SHRT] = {
8ab30691	41	.reg_offset = 1,
c9fbf7e0 MB	42	.mask = WM8994_MIC1_SHRT_EINT,
	43	},
	44	[WM8994_IRQ_MIC2_DET] = {
8ab30691	45	.reg_offset = 1,
c9fbf7e0 MB	46	.mask = WM8994_MIC2_DET_EINT,
	47	},
	48	[WM8994_IRQ_MIC2_SHRT] = {
8ab30691	49	.reg_offset = 1,
c9fbf7e0 MB	50	.mask = WM8994_MIC2_SHRT_EINT,
	51	},
	52	[WM8994_IRQ_FLL1_LOCK] = {
8ab30691	53	.reg_offset = 1,
c9fbf7e0 MB	54	.mask = WM8994_FLL1_LOCK_EINT,
	55	},
	56	[WM8994_IRQ_FLL2_LOCK] = {
8ab30691	57	.reg_offset = 1,
c9fbf7e0 MB	58	.mask = WM8994_FLL2_LOCK_EINT,
	59	},
	60	[WM8994_IRQ_SRC1_LOCK] = {
8ab30691	61	.reg_offset = 1,
c9fbf7e0 MB	62	.mask = WM8994_SRC1_LOCK_EINT,
	63	},
	64	[WM8994_IRQ_SRC2_LOCK] = {
8ab30691	65	.reg_offset = 1,
c9fbf7e0 MB	66	.mask = WM8994_SRC2_LOCK_EINT,
	67	},
	68	[WM8994_IRQ_AIF1DRC1_SIG_DET] = {
8ab30691	69	.reg_offset = 1,
c9fbf7e0 MB	70	.mask = WM8994_AIF1DRC1_SIG_DET,
	71	},
	72	[WM8994_IRQ_AIF1DRC2_SIG_DET] = {
8ab30691	73	.reg_offset = 1,
c9fbf7e0 MB	74	.mask = WM8994_AIF1DRC2_SIG_DET_EINT,
	75	},
	76	[WM8994_IRQ_AIF2DRC_SIG_DET] = {
8ab30691	77	.reg_offset = 1,
c9fbf7e0 MB	78	.mask = WM8994_AIF2DRC_SIG_DET_EINT,
	79	},
	80	[WM8994_IRQ_FIFOS_ERR] = {
8ab30691	81	.reg_offset = 1,
c9fbf7e0 MB	82	.mask = WM8994_FIFOS_ERR_EINT,
	83	},
	84	[WM8994_IRQ_WSEQ_DONE] = {
8ab30691	85	.reg_offset = 1,
c9fbf7e0 MB	86	.mask = WM8994_WSEQ_DONE_EINT,
	87	},
	88	[WM8994_IRQ_DCS_DONE] = {
8ab30691	89	.reg_offset = 1,
c9fbf7e0 MB	90	.mask = WM8994_DCS_DONE_EINT,
	91	},
	92	[WM8994_IRQ_TEMP_WARN] = {
8ab30691	93	.reg_offset = 1,
c9fbf7e0 MB	94	.mask = WM8994_TEMP_WARN_EINT,
	95	},
	96	[WM8994_IRQ_GPIO(1)] = {
c9fbf7e0 MB	97	.mask = WM8994_GP1_EINT,
	98	},
	99	[WM8994_IRQ_GPIO(2)] = {
c9fbf7e0 MB	100	.mask = WM8994_GP2_EINT,
	101	},
	102	[WM8994_IRQ_GPIO(3)] = {
c9fbf7e0 MB	103	.mask = WM8994_GP3_EINT,
	104	},
	105	[WM8994_IRQ_GPIO(4)] = {
c9fbf7e0 MB	106	.mask = WM8994_GP4_EINT,
	107	},
	108	[WM8994_IRQ_GPIO(5)] = {
c9fbf7e0 MB	109	.mask = WM8994_GP5_EINT,
	110	},
	111	[WM8994_IRQ_GPIO(6)] = {
c9fbf7e0 MB	112	.mask = WM8994_GP6_EINT,
	113	},
	114	[WM8994_IRQ_GPIO(7)] = {
c9fbf7e0 MB	115	.mask = WM8994_GP7_EINT,
	116	},
	117	[WM8994_IRQ_GPIO(8)] = {
c9fbf7e0 MB	118	.mask = WM8994_GP8_EINT,
	119	},
	120	[WM8994_IRQ_GPIO(9)] = {
c9fbf7e0 MB	121	.mask = WM8994_GP8_EINT,
	122	},
	123	[WM8994_IRQ_GPIO(10)] = {
c9fbf7e0 MB	124	.mask = WM8994_GP10_EINT,
	125	},
	126	[WM8994_IRQ_GPIO(11)] = {
c9fbf7e0 MB	127	.mask = WM8994_GP11_EINT,
	128	},
	129	};
	130
7ce7b26f	131	static const struct regmap_irq_chip wm8994_irq_chip = {
8ab30691 MB	132	.name = "wm8994",
	133	.irqs = wm8994_irqs,
	134	.num_irqs = ARRAY_SIZE(wm8994_irqs),
c9fbf7e0	135
8ab30691 MB	136	.num_regs = 2,
	137	.status_base = WM8994_INTERRUPT_STATUS_1,
	138	.mask_base = WM8994_INTERRUPT_STATUS_1_MASK,
	139	.ack_base = WM8994_INTERRUPT_STATUS_1,
7a976379	140	.runtime_pm = true,
c9fbf7e0 MB	141	};
c9fbf7e0 MB	142
7c884448 MB	143	static void wm8994_edge_irq_enable(struct irq_data *data)
	144	{
	145	}
	146
	147	static void wm8994_edge_irq_disable(struct irq_data *data)
	148	{
	149	}
	150
	151	static struct irq_chip wm8994_edge_irq_chip = {
	152	.name = "wm8994_edge",
	153	.irq_disable = wm8994_edge_irq_disable,
	154	.irq_enable = wm8994_edge_irq_enable,
	155	};
	156
	157	static irqreturn_t wm8994_edge_irq(int irq, void *data)
	158	{
	159	struct wm8994 *wm8994 = data;
	160
	161	while (gpio_get_value_cansleep(wm8994->pdata.irq_gpio))
	162	handle_nested_irq(irq_create_mapping(wm8994->edge_irq, 0));
	163
	164	return IRQ_HANDLED;
	165	}
	166
	167	static int wm8994_edge_irq_map(struct irq_domain *h, unsigned int virq,
	168	irq_hw_number_t hw)
	169	{
	170	struct wm8994 *wm8994 = h->host_data;
	171
	172	irq_set_chip_data(virq, wm8994);
	173	irq_set_chip_and_handler(virq, &wm8994_edge_irq_chip, handle_edge_irq);
	174	irq_set_nested_thread(virq, 1);
7c884448	175	irq_set_noprobe(virq);
7c884448 MB	176
	177	return 0;
	178	}
	179
7ce7b26f	180	static const struct irq_domain_ops wm8994_edge_irq_ops = {
7c884448 MB	181	.map = wm8994_edge_irq_map,
	182	.xlate = irq_domain_xlate_twocell,
	183	};
	184
c9fbf7e0 MB	185	int wm8994_irq_init(struct wm8994 *wm8994)
c9fbf7e0 MB	186	{
8ab30691	187	int ret;
b0ab907d	188	unsigned long irqflags;
dd30acc8	189	struct wm8994_pdata *pdata = &wm8994->pdata;
c9fbf7e0 MB	190
	191	if (!wm8994->irq) {
	192	dev_warn(wm8994->dev,
	193	"No interrupt specified, no interrupts\n");
	194	wm8994->irq_base = 0;
	195	return 0;
	196	}
	197
b0ab907d MB	198	/* select user or default irq flags */
	199	irqflags = IRQF_TRIGGER_HIGH \| IRQF_ONESHOT;
	200	if (pdata->irq_flags)
	201	irqflags = pdata->irq_flags;
	202
7c884448 MB	203	/* use a GPIO for edge triggered controllers */
	204	if (irqflags & (IRQF_TRIGGER_RISING \| IRQF_TRIGGER_FALLING)) {
	205	if (gpio_to_irq(pdata->irq_gpio) != wm8994->irq) {
	206	dev_warn(wm8994->dev, "IRQ %d is not GPIO %d (%d)\n",
	207	wm8994->irq, pdata->irq_gpio,
	208	gpio_to_irq(pdata->irq_gpio));
	209	wm8994->irq = gpio_to_irq(pdata->irq_gpio);
	210	}
	211
	212	ret = devm_gpio_request_one(wm8994->dev, pdata->irq_gpio,
	213	GPIOF_IN, "WM8994 IRQ");
	214
	215	if (ret != 0) {
	216	dev_err(wm8994->dev, "Failed to get IRQ GPIO: %d\n",
	217	ret);
	218	return ret;
	219	}
	220
	221	wm8994->edge_irq = irq_domain_add_linear(NULL, 1,
	222	&wm8994_edge_irq_ops,
	223	wm8994);
	224
	225	ret = regmap_add_irq_chip(wm8994->regmap,
	226	irq_create_mapping(wm8994->edge_irq,
	227	0),
	228	IRQF_ONESHOT,
	229	wm8994->irq_base, &wm8994_irq_chip,
	230	&wm8994->irq_data);
	231	if (ret != 0) {
	232	dev_err(wm8994->dev, "Failed to get IRQ: %d\n",
	233	ret);
	234	return ret;
	235	}
	236
	237	ret = request_threaded_irq(wm8994->irq,
	238	NULL, wm8994_edge_irq,
	239	irqflags,
	240	"WM8994 edge", wm8994);
	241	} else {
	242	ret = regmap_add_irq_chip(wm8994->regmap, wm8994->irq,
	243	irqflags,
	244	wm8994->irq_base, &wm8994_irq_chip,
	245	&wm8994->irq_data);
	246	}
	247
c9fbf7e0	248	if (ret != 0) {
8ab30691	249	dev_err(wm8994->dev, "Failed to register IRQ chip: %d\n", ret);
c9fbf7e0 MB	250	return ret;
	251	}
	252
	253	/* Enable top level interrupt if it was masked */
	254	wm8994_reg_write(wm8994, WM8994_INTERRUPT_CONTROL, 0);
	255
	256	return 0;
	257	}
7821d9b2	258	EXPORT_SYMBOL(wm8994_irq_init);
c9fbf7e0 MB	259
	260	void wm8994_irq_exit(struct wm8994 *wm8994)
	261	{
8ab30691	262	regmap_del_irq_chip(wm8994->irq, wm8994->irq_data);
c9fbf7e0	263	}
7821d9b2	264	EXPORT_SYMBOL(wm8994_irq_exit);