[linux.git] / arch / arc / kernel / setup.c

/*
 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/seq_file.h>
#include <linux/fs.h>
#include <linux/delay.h>
#include <linux/root_dev.h>
#include <linux/console.h>
#include <linux/module.h>
#include <linux/cpu.h>
#include <linux/of_fdt.h>
#include <linux/cache.h>
#include <asm/sections.h>
#include <asm/arcregs.h>
#include <asm/tlb.h>
#include <asm/setup.h>
#include <asm/page.h>
#include <asm/irq.h>
#include <asm/unwind.h>
#include <asm/clk.h>
#include <asm/mach_desc.h>

#define FIX_PTR(x)  __asm__ __volatile__(";" : "+r"(x))

int running_on_hw = 1;	/* vs. on ISS */

char __initdata command_line[COMMAND_LINE_SIZE];
const struct machine_desc *machine_desc;

struct task_struct *_current_task[NR_CPUS];	/* For stack switching */

struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];

static void read_arc_build_cfg_regs(void)
{
	struct bcr_perip uncached_space;
	struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
	FIX_PTR(cpu);

	READ_BCR(AUX_IDENTITY, cpu->core);

	cpu->timers = read_aux_reg(ARC_REG_TIMERS_BCR);
	cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);

	READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space);
	cpu->uncached_base = uncached_space.start << 24;

	cpu->extn.mul = read_aux_reg(ARC_REG_MUL_BCR);
	cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR);
	cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR);
	cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR);
	cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR);
	READ_BCR(ARC_REG_MAC_BCR, cpu->extn_mac_mul);

	cpu->extn.ext_arith = read_aux_reg(ARC_REG_EXTARITH_BCR);
	cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR);

	/* Note that we read the CCM BCRs independent of kernel config
	 * This is to catch the cases where user doesn't know that
	 * CCMs are present in hardware build
	 */
	{
		struct bcr_iccm iccm;
		struct bcr_dccm dccm;
		struct bcr_dccm_base dccm_base;
		unsigned int bcr_32bit_val;

		bcr_32bit_val = read_aux_reg(ARC_REG_ICCM_BCR);
		if (bcr_32bit_val) {
			iccm = *((struct bcr_iccm *)&bcr_32bit_val);
			cpu->iccm.base_addr = iccm.base << 16;
			cpu->iccm.sz = 0x2000 << (iccm.sz - 1);
		}

		bcr_32bit_val = read_aux_reg(ARC_REG_DCCM_BCR);
		if (bcr_32bit_val) {
			dccm = *((struct bcr_dccm *)&bcr_32bit_val);
			cpu->dccm.sz = 0x800 << (dccm.sz);

			READ_BCR(ARC_REG_DCCMBASE_BCR, dccm_base);
			cpu->dccm.base_addr = dccm_base.addr << 8;
		}
	}

	READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);

	read_decode_mmu_bcr();
	read_decode_cache_bcr();

	READ_BCR(ARC_REG_FP_BCR, cpu->fp);
	READ_BCR(ARC_REG_DPFP_BCR, cpu->dpfp);
}

static const struct cpuinfo_data arc_cpu_tbl[] = {
	{ {0x10, "ARCTangent A5"}, 0x1F},
	{ {0x20, "ARC 600"      }, 0x2F},
	{ {0x30, "ARC 700"      }, 0x33},
	{ {0x34, "ARC 700 R4.10"}, 0x34},
	{ {0x00, NULL		} }
};

static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
{
	int n = 0;
	struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
	struct bcr_identity *core = &cpu->core;
	const struct cpuinfo_data *tbl;
	int be = 0;
#ifdef CONFIG_CPU_BIG_ENDIAN
	be = 1;
#endif
	FIX_PTR(cpu);

	n += scnprintf(buf + n, len - n,
		       "\nARC IDENTITY\t: Family [%#02x]"
		       " Cpu-id [%#02x] Chip-id [%#4x]\n",
		       core->family, core->cpu_id,
		       core->chip_id);

	for (tbl = &arc_cpu_tbl[0]; tbl->info.id != 0; tbl++) {
		if ((core->family >= tbl->info.id) &&
		    (core->family <= tbl->up_range)) {
			n += scnprintf(buf + n, len - n,
				       "processor\t: %s %s\n",
				       tbl->info.str,
				       be ? "[Big Endian]" : "");
			break;
		}
	}

	if (tbl->info.id == 0)
		n += scnprintf(buf + n, len - n, "UNKNOWN ARC Processor\n");

	n += scnprintf(buf + n, len - n, "CPU speed\t: %u.%02u Mhz\n",
		       (unsigned int)(arc_get_core_freq() / 1000000),
		       (unsigned int)(arc_get_core_freq() / 10000) % 100);

	n += scnprintf(buf + n, len - n, "Timers\t\t: %s %s\n",
		       (cpu->timers & 0x200) ? "TIMER1" : "",
		       (cpu->timers & 0x100) ? "TIMER0" : "");

	n += scnprintf(buf + n, len - n, "Vect Tbl Base\t: %#x\n",
		       cpu->vec_base);

	n += scnprintf(buf + n, len - n, "UNCACHED Base\t: %#x\n",
		       cpu->uncached_base);

	return buf;
}

static const struct id_to_str mul_type_nm[] = {
	{ 0x0, "N/A"},
	{ 0x1, "32x32 (spl Result Reg)" },
	{ 0x2, "32x32 (ANY Result Reg)" }
};

static const struct id_to_str mac_mul_nm[] = {
	{0x0, "N/A"},
	{0x1, "N/A"},
	{0x2, "Dual 16 x 16"},
	{0x3, "N/A"},
	{0x4, "32x16"},
	{0x5, "N/A"},
	{0x6, "Dual 16x16 and 32x16"}
};

static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
{
	int n = 0;
	struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];

	FIX_PTR(cpu);
#define IS_AVAIL1(var, str)	((var) ? str : "")
#define IS_AVAIL2(var, str)	((var == 0x2) ? str : "")
#define IS_USED(cfg)		(IS_ENABLED(cfg) ? "(in-use)" : "(not used)")

	n += scnprintf(buf + n, len - n,
		       "Extn [700-Base]\t: %s %s %s %s %s %s\n",
		       IS_AVAIL2(cpu->extn.norm, "norm,"),
		       IS_AVAIL2(cpu->extn.barrel, "barrel-shift,"),
		       IS_AVAIL1(cpu->extn.swap, "swap,"),
		       IS_AVAIL2(cpu->extn.minmax, "minmax,"),
		       IS_AVAIL1(cpu->extn.crc, "crc,"),
		       IS_AVAIL2(cpu->extn.ext_arith, "ext-arith"));

	n += scnprintf(buf + n, len - n, "Extn [700-MPY]\t: %s",
		       mul_type_nm[cpu->extn.mul].str);

	n += scnprintf(buf + n, len - n, "   MAC MPY: %s\n",
		       mac_mul_nm[cpu->extn_mac_mul.type].str);

	if (cpu->core.family == 0x34) {
		n += scnprintf(buf + n, len - n,
		"Extn [700-4.10]\t: LLOCK/SCOND %s, SWAPE %s, RTSC %s\n",
			       IS_USED(CONFIG_ARC_HAS_LLSC),
			       IS_USED(CONFIG_ARC_HAS_SWAPE),
			       IS_USED(CONFIG_ARC_HAS_RTSC));
	}

	n += scnprintf(buf + n, len - n, "Extn [CCM]\t: %s",
		       !(cpu->dccm.sz || cpu->iccm.sz) ? "N/A" : "");

	if (cpu->dccm.sz)
		n += scnprintf(buf + n, len - n, "DCCM: @ %x, %d KB ",
			       cpu->dccm.base_addr, TO_KB(cpu->dccm.sz));

	if (cpu->iccm.sz)
		n += scnprintf(buf + n, len - n, "ICCM: @ %x, %d KB",
			       cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));

	n += scnprintf(buf + n, len - n, "\nExtn [FPU]\t: %s",
		       !(cpu->fp.ver || cpu->dpfp.ver) ? "N/A" : "");

	if (cpu->fp.ver)
		n += scnprintf(buf + n, len - n, "SP [v%d] %s",
			       cpu->fp.ver, cpu->fp.fast ? "(fast)" : "");

	if (cpu->dpfp.ver)
		n += scnprintf(buf + n, len - n, "DP [v%d] %s",
			       cpu->dpfp.ver, cpu->dpfp.fast ? "(fast)" : "");

	n += scnprintf(buf + n, len - n, "\n");

	n += scnprintf(buf + n, len - n,
		       "OS ABI [v3]\t: no-legacy-syscalls\n");

	return buf;
}

static void arc_chk_ccms(void)
{
#if defined(CONFIG_ARC_HAS_DCCM) || defined(CONFIG_ARC_HAS_ICCM)
	struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];

#ifdef CONFIG_ARC_HAS_DCCM
	/*
	 * DCCM can be arbit placed in hardware.
	 * Make sure it's placement/sz matches what Linux is built with
	 */
	if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
		panic("Linux built with incorrect DCCM Base address\n");

	if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz)
		panic("Linux built with incorrect DCCM Size\n");
#endif

#ifdef CONFIG_ARC_HAS_ICCM
	if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz)
		panic("Linux built with incorrect ICCM Size\n");
#endif
#endif
}

/*
 * Ensure that FP hardware and kernel config match
 * -If hardware contains DPFP, kernel needs to save/restore FPU state
 *  across context switches
 * -If hardware lacks DPFP, but kernel configured to save FPU state then
 *  kernel trying to access non-existant DPFP regs will crash
 *
 * We only check for Dbl precision Floating Point, because only DPFP
 * hardware has dedicated regs which need to be saved/restored on ctx-sw
 * (Single Precision uses core regs), thus kernel is kind of oblivious to it
 */
static void arc_chk_fpu(void)
{
	struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];

	if (cpu->dpfp.ver) {
#ifndef CONFIG_ARC_FPU_SAVE_RESTORE
		pr_warn("DPFP support broken in this kernel...\n");
#endif
	} else {
#ifdef CONFIG_ARC_FPU_SAVE_RESTORE
		panic("H/w lacks DPFP support, apps won't work\n");
#endif
	}
}

/*
 * Initialize and setup the processor core
 * This is called by all the CPUs thus should not do special case stuff
 *    such as only for boot CPU etc
 */

void setup_processor(void)
{
	char str[512];
	int cpu_id = smp_processor_id();

	read_arc_build_cfg_regs();
	arc_init_IRQ();

	printk(arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));

	arc_mmu_init();
	arc_cache_init();
	arc_chk_ccms();

	printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));

#ifdef CONFIG_SMP
	printk(arc_platform_smp_cpuinfo());
#endif

	arc_chk_fpu();
}

void __init setup_arch(char **cmdline_p)
{
	/* This also populates @boot_command_line from /bootargs */
	machine_desc = setup_machine_fdt(__dtb_start);
	if (!machine_desc)
		panic("Embedded DT invalid\n");

	/* Append any u-boot provided cmdline */
#ifdef CONFIG_CMDLINE_UBOOT
	/* Add a whitespace seperator between the 2 cmdlines */
	strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
	strlcat(boot_command_line, command_line, COMMAND_LINE_SIZE);
#endif

	/* Save unparsed command line copy for /proc/cmdline */
	*cmdline_p = boot_command_line;

	/* To force early parsing of things like mem=xxx */
	parse_early_param();

	/* Platform/board specific: e.g. early console registration */
	if (machine_desc->init_early)
		machine_desc->init_early();

	setup_processor();

#ifdef CONFIG_SMP
	smp_init_cpus();
#endif

	setup_arch_memory();

	/* copy flat DT out of .init and then unflatten it */
	unflatten_and_copy_device_tree();

	/* Can be issue if someone passes cmd line arg "ro"
	 * But that is unlikely so keeping it as it is
	 */
	root_mountflags &= ~MS_RDONLY;

#if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
	conswitchp = &dummy_con;
#endif

	arc_unwind_init();
	arc_unwind_setup();
}

static int __init customize_machine(void)
{
	/* Add platform devices */
	if (machine_desc->init_machine)
		machine_desc->init_machine();

	return 0;
}
arch_initcall(customize_machine);

static int __init init_late_machine(void)
{
	if (machine_desc->init_late)
		machine_desc->init_late();

	return 0;
}
late_initcall(init_late_machine);
/*
 *  Get CPU information for use by the procfs.
 */

#define cpu_to_ptr(c)	((void *)(0xFFFF0000 | (unsigned int)(c)))
#define ptr_to_cpu(p)	(~0xFFFF0000UL & (unsigned int)(p))

static int show_cpuinfo(struct seq_file *m, void *v)
{
	char *str;
	int cpu_id = ptr_to_cpu(v);

	str = (char *)__get_free_page(GFP_TEMPORARY);
	if (!str)
		goto done;

	seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));

	seq_printf(m, "Bogo MIPS : \t%lu.%02lu\n",
		   loops_per_jiffy / (500000 / HZ),
		   (loops_per_jiffy / (5000 / HZ)) % 100);

	seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));

	seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));

	seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));

#ifdef CONFIG_SMP
	seq_printf(m, arc_platform_smp_cpuinfo());
#endif

	free_page((unsigned long)str);
done:
	seq_printf(m, "\n\n");

	return 0;
}

static void *c_start(struct seq_file *m, loff_t *pos)
{
	/*
	 * Callback returns cpu-id to iterator for show routine, NULL to stop.
	 * However since NULL is also a valid cpu-id (0), we use a round-about
	 * way to pass it w/o having to kmalloc/free a 2 byte string.
	 * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
	 */
	return *pos < num_possible_cpus() ? cpu_to_ptr(*pos) : NULL;
}

static void *c_next(struct seq_file *m, void *v, loff_t *pos)
{
	++*pos;
	return c_start(m, pos);
}

static void c_stop(struct seq_file *m, void *v)
{
}

const struct seq_operations cpuinfo_op = {
	.start	= c_start,
	.next	= c_next,
	.stop	= c_stop,
	.show	= show_cpuinfo
};

static DEFINE_PER_CPU(struct cpu, cpu_topology);

static int __init topology_init(void)
{
	int cpu;

	for_each_present_cpu(cpu)
	    register_cpu(&per_cpu(cpu_topology, cpu), cpu);

	return 0;
}

subsys_initcall(topology_init);
Commit	Line	Data
c121c506 VG	1	/*
	2	* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 as
	6	* published by the Free Software Foundation.
	7	*/
	8
	9	#include <linux/seq_file.h>
	10	#include <linux/fs.h>
	11	#include <linux/delay.h>
	12	#include <linux/root_dev.h>
	13	#include <linux/console.h>
	14	#include <linux/module.h>
	15	#include <linux/cpu.h>
999159a5	16	#include <linux/of_fdt.h>
1ec9db10	17	#include <linux/cache.h>
999159a5	18	#include <asm/sections.h>
c121c506 VG	19	#include <asm/arcregs.h>
c121c506 VG	20	#include <asm/tlb.h>
c121c506 VG	21	#include <asm/setup.h>
	22	#include <asm/page.h>
	23	#include <asm/irq.h>
854a0d95	24	#include <asm/unwind.h>
af617428	25	#include <asm/clk.h>
03a6d28c	26	#include <asm/mach_desc.h>
c121c506 VG	27
	28	#define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x))
	29
	30	int running_on_hw = 1; /* vs. on ISS */
	31
	32	char __initdata command_line[COMMAND_LINE_SIZE];
880beb88	33	const struct machine_desc *machine_desc;
c121c506 VG	34
	35	struct task_struct _current_task[NR_CPUS]; / For stack switching */
	36
	37	struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
	38
8e457d6a	39	static void read_arc_build_cfg_regs(void)
c121c506	40	{
af617428 VG	41	struct bcr_perip uncached_space;
	42	struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
	43	FIX_PTR(cpu);
	44
	45	READ_BCR(AUX_IDENTITY, cpu->core);
	46
	47	cpu->timers = read_aux_reg(ARC_REG_TIMERS_BCR);
af617428	48	cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
af617428 VG	49
	50	READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space);
	51	cpu->uncached_base = uncached_space.start << 24;
	52
	53	cpu->extn.mul = read_aux_reg(ARC_REG_MUL_BCR);
	54	cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR);
	55	cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR);
	56	cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR);
	57	cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR);
	58	READ_BCR(ARC_REG_MAC_BCR, cpu->extn_mac_mul);
	59
	60	cpu->extn.ext_arith = read_aux_reg(ARC_REG_EXTARITH_BCR);
	61	cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR);
	62
8b5850f8 VG	63	/* Note that we read the CCM BCRs independent of kernel config
	64	* This is to catch the cases where user doesn't know that
	65	* CCMs are present in hardware build
	66	*/
	67	{
	68	struct bcr_iccm iccm;
	69	struct bcr_dccm dccm;
	70	struct bcr_dccm_base dccm_base;
	71	unsigned int bcr_32bit_val;
	72
	73	bcr_32bit_val = read_aux_reg(ARC_REG_ICCM_BCR);
	74	if (bcr_32bit_val) {
	75	iccm = ((struct bcr_iccm )&bcr_32bit_val);
	76	cpu->iccm.base_addr = iccm.base << 16;
	77	cpu->iccm.sz = 0x2000 << (iccm.sz - 1);
	78	}
	79
	80	bcr_32bit_val = read_aux_reg(ARC_REG_DCCM_BCR);
	81	if (bcr_32bit_val) {
	82	dccm = ((struct bcr_dccm )&bcr_32bit_val);
	83	cpu->dccm.sz = 0x800 << (dccm.sz);
	84
	85	READ_BCR(ARC_REG_DCCMBASE_BCR, dccm_base);
	86	cpu->dccm.base_addr = dccm_base.addr << 8;
	87	}
	88	}
	89
af617428 VG	90	READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
af617428 VG	91
c121c506 VG	92	read_decode_mmu_bcr();
c121c506 VG	93	read_decode_cache_bcr();
af617428 VG	94
	95	READ_BCR(ARC_REG_FP_BCR, cpu->fp);
	96	READ_BCR(ARC_REG_DPFP_BCR, cpu->dpfp);
	97	}
	98
	99	static const struct cpuinfo_data arc_cpu_tbl[] = {
	100	{ {0x10, "ARCTangent A5"}, 0x1F},
	101	{ {0x20, "ARC 600" }, 0x2F},
	102	{ {0x30, "ARC 700" }, 0x33},
	103	{ {0x34, "ARC 700 R4.10"}, 0x34},
	104	{ {0x00, NULL } }
	105	};
	106
8e457d6a	107	static char arc_cpu_mumbojumbo(int cpu_id, char buf, int len)
af617428 VG	108	{
	109	int n = 0;
	110	struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
	111	struct bcr_identity *core = &cpu->core;
	112	const struct cpuinfo_data *tbl;
	113	int be = 0;
	114	#ifdef CONFIG_CPU_BIG_ENDIAN
	115	be = 1;
	116	#endif
	117	FIX_PTR(cpu);
	118
	119	n += scnprintf(buf + n, len - n,
	120	"\nARC IDENTITY\t: Family [%#02x]"
	121	" Cpu-id [%#02x] Chip-id [%#4x]\n",
	122	core->family, core->cpu_id,
	123	core->chip_id);
	124
	125	for (tbl = &arc_cpu_tbl[0]; tbl->info.id != 0; tbl++) {
	126	if ((core->family >= tbl->info.id) &&
	127	(core->family <= tbl->up_range)) {
	128	n += scnprintf(buf + n, len - n,
	129	"processor\t: %s %s\n",
	130	tbl->info.str,
	131	be ? "[Big Endian]" : "");
	132	break;
	133	}
	134	}
	135
	136	if (tbl->info.id == 0)
	137	n += scnprintf(buf + n, len - n, "UNKNOWN ARC Processor\n");
	138
	139	n += scnprintf(buf + n, len - n, "CPU speed\t: %u.%02u Mhz\n",
	140	(unsigned int)(arc_get_core_freq() / 1000000),
	141	(unsigned int)(arc_get_core_freq() / 10000) % 100);
	142
	143	n += scnprintf(buf + n, len - n, "Timers\t\t: %s %s\n",
	144	(cpu->timers & 0x200) ? "TIMER1" : "",
	145	(cpu->timers & 0x100) ? "TIMER0" : "");
	146
	147	n += scnprintf(buf + n, len - n, "Vect Tbl Base\t: %#x\n",
	148	cpu->vec_base);
	149
	150	n += scnprintf(buf + n, len - n, "UNCACHED Base\t: %#x\n",
	151	cpu->uncached_base);
	152
	153	return buf;
	154	}
	155
	156	static const struct id_to_str mul_type_nm[] = {
	157	{ 0x0, "N/A"},
	158	{ 0x1, "32x32 (spl Result Reg)" },
	159	{ 0x2, "32x32 (ANY Result Reg)" }
	160	};
	161
	162	static const struct id_to_str mac_mul_nm[] = {
	163	{0x0, "N/A"},
	164	{0x1, "N/A"},
	165	{0x2, "Dual 16 x 16"},
	166	{0x3, "N/A"},
	167	{0x4, "32x16"},
	168	{0x5, "N/A"},
	169	{0x6, "Dual 16x16 and 32x16"}
	170	};
	171
8e457d6a	172	static char arc_extn_mumbojumbo(int cpu_id, char buf, int len)
af617428 VG	173	{
	174	int n = 0;
	175	struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
	176
	177	FIX_PTR(cpu);
	178	#define IS_AVAIL1(var, str) ((var) ? str : "")
	179	#define IS_AVAIL2(var, str) ((var == 0x2) ? str : "")
8235703e	180	#define IS_USED(cfg) (IS_ENABLED(cfg) ? "(in-use)" : "(not used)")
af617428 VG	181
	182	n += scnprintf(buf + n, len - n,
	183	"Extn [700-Base]\t: %s %s %s %s %s %s\n",
	184	IS_AVAIL2(cpu->extn.norm, "norm,"),
	185	IS_AVAIL2(cpu->extn.barrel, "barrel-shift,"),
	186	IS_AVAIL1(cpu->extn.swap, "swap,"),
	187	IS_AVAIL2(cpu->extn.minmax, "minmax,"),
	188	IS_AVAIL1(cpu->extn.crc, "crc,"),
	189	IS_AVAIL2(cpu->extn.ext_arith, "ext-arith"));
	190
	191	n += scnprintf(buf + n, len - n, "Extn [700-MPY]\t: %s",
	192	mul_type_nm[cpu->extn.mul].str);
	193
	194	n += scnprintf(buf + n, len - n, " MAC MPY: %s\n",
	195	mac_mul_nm[cpu->extn_mac_mul.type].str);
	196
	197	if (cpu->core.family == 0x34) {
	198	n += scnprintf(buf + n, len - n,
	199	"Extn [700-4.10]\t: LLOCK/SCOND %s, SWAPE %s, RTSC %s\n",
8235703e VG	200	IS_USED(CONFIG_ARC_HAS_LLSC),
	201	IS_USED(CONFIG_ARC_HAS_SWAPE),
	202	IS_USED(CONFIG_ARC_HAS_RTSC));
af617428 VG	203	}
	204
	205	n += scnprintf(buf + n, len - n, "Extn [CCM]\t: %s",
	206	!(cpu->dccm.sz \|\| cpu->iccm.sz) ? "N/A" : "");
	207
	208	if (cpu->dccm.sz)
	209	n += scnprintf(buf + n, len - n, "DCCM: @ %x, %d KB ",
	210	cpu->dccm.base_addr, TO_KB(cpu->dccm.sz));
	211
	212	if (cpu->iccm.sz)
	213	n += scnprintf(buf + n, len - n, "ICCM: @ %x, %d KB",
	214	cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
	215
	216	n += scnprintf(buf + n, len - n, "\nExtn [FPU]\t: %s",
	217	!(cpu->fp.ver \|\| cpu->dpfp.ver) ? "N/A" : "");
	218
	219	if (cpu->fp.ver)
	220	n += scnprintf(buf + n, len - n, "SP [v%d] %s",
	221	cpu->fp.ver, cpu->fp.fast ? "(fast)" : "");
	222
	223	if (cpu->dpfp.ver)
	224	n += scnprintf(buf + n, len - n, "DP [v%d] %s",
	225	cpu->dpfp.ver, cpu->dpfp.fast ? "(fast)" : "");
	226
	227	n += scnprintf(buf + n, len - n, "\n");
	228
af617428	229	n += scnprintf(buf + n, len - n,
8ff14bbc	230	"OS ABI [v3]\t: no-legacy-syscalls\n");
af617428 VG	231
	232	return buf;
	233	}
	234
8e457d6a	235	static void arc_chk_ccms(void)
8b5850f8 VG	236	{
	237	#if defined(CONFIG_ARC_HAS_DCCM) \|\| defined(CONFIG_ARC_HAS_ICCM)
	238	struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
	239
	240	#ifdef CONFIG_ARC_HAS_DCCM
	241	/*
	242	* DCCM can be arbit placed in hardware.
	243	* Make sure it's placement/sz matches what Linux is built with
	244	*/
	245	if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
	246	panic("Linux built with incorrect DCCM Base address\n");
	247
	248	if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz)
	249	panic("Linux built with incorrect DCCM Size\n");
	250	#endif
	251
	252	#ifdef CONFIG_ARC_HAS_ICCM
	253	if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz)
	254	panic("Linux built with incorrect ICCM Size\n");
	255	#endif
	256	#endif
	257	}
	258
af617428 VG	259	/*
	260	* Ensure that FP hardware and kernel config match
	261	* -If hardware contains DPFP, kernel needs to save/restore FPU state
	262	* across context switches
	263	* -If hardware lacks DPFP, but kernel configured to save FPU state then
	264	* kernel trying to access non-existant DPFP regs will crash
	265	*
	266	* We only check for Dbl precision Floating Point, because only DPFP
	267	* hardware has dedicated regs which need to be saved/restored on ctx-sw
	268	* (Single Precision uses core regs), thus kernel is kind of oblivious to it
	269	*/
8e457d6a	270	static void arc_chk_fpu(void)
af617428 VG	271	{
	272	struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
	273
	274	if (cpu->dpfp.ver) {
	275	#ifndef CONFIG_ARC_FPU_SAVE_RESTORE
	276	pr_warn("DPFP support broken in this kernel...\n");
	277	#endif
	278	} else {
	279	#ifdef CONFIG_ARC_FPU_SAVE_RESTORE
	280	panic("H/w lacks DPFP support, apps won't work\n");
	281	#endif
	282	}
c121c506 VG	283	}
	284
	285	/*
	286	* Initialize and setup the processor core
	287	* This is called by all the CPUs thus should not do special case stuff
	288	* such as only for boot CPU etc
	289	*/
	290
ce759956	291	void setup_processor(void)
c121c506	292	{
af617428 VG	293	char str[512];
	294	int cpu_id = smp_processor_id();
	295
c121c506 VG	296	read_arc_build_cfg_regs();
c121c506 VG	297	arc_init_IRQ();
af617428 VG	298
	299	printk(arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));
	300
c121c506 VG	301	arc_mmu_init();
c121c506 VG	302	arc_cache_init();
8b5850f8	303	arc_chk_ccms();
af617428 VG	304
	305	printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
	306
	307	#ifdef CONFIG_SMP
	308	printk(arc_platform_smp_cpuinfo());
	309	#endif
	310
	311	arc_chk_fpu();
c121c506 VG	312	}
c121c506 VG	313
c121c506 VG	314	void __init setup_arch(char **cmdline_p)
c121c506 VG	315	{
9593a933 VG	316	/* This also populates @boot_command_line from /bootargs */
	317	machine_desc = setup_machine_fdt(__dtb_start);
	318	if (!machine_desc)
	319	panic("Embedded DT invalid\n");
	320
	321	/* Append any u-boot provided cmdline */
c121c506	322	#ifdef CONFIG_CMDLINE_UBOOT
9593a933 VG	323	/* Add a whitespace seperator between the 2 cmdlines */
	324	strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
	325	strlcat(boot_command_line, command_line, COMMAND_LINE_SIZE);
c121c506	326	#endif
c121c506 VG	327
c121c506 VG	328	/* Save unparsed command line copy for /proc/cmdline */
9593a933	329	*cmdline_p = boot_command_line;
999159a5	330
c121c506 VG	331	/* To force early parsing of things like mem=xxx */
	332	parse_early_param();
	333
	334	/* Platform/board specific: e.g. early console registration */
03a6d28c VG	335	if (machine_desc->init_early)
03a6d28c VG	336	machine_desc->init_early();
c121c506 VG	337
	338	setup_processor();
	339
41195d23 VG	340	#ifdef CONFIG_SMP
	341	smp_init_cpus();
	342	#endif
	343
c121c506 VG	344	setup_arch_memory();
c121c506 VG	345
eab6a08c	346	/* copy flat DT out of .init and then unflatten it */
1efc959e	347	unflatten_and_copy_device_tree();
999159a5	348
c121c506 VG	349	/* Can be issue if someone passes cmd line arg "ro"
	350	* But that is unlikely so keeping it as it is
	351	*/
	352	root_mountflags &= ~MS_RDONLY;
	353
c121c506 VG	354	#if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
	355	conswitchp = &dummy_con;
	356	#endif
	357
854a0d95 VG	358	arc_unwind_init();
854a0d95 VG	359	arc_unwind_setup();
c121c506 VG	360	}
c121c506 VG	361
03a6d28c VG	362	static int __init customize_machine(void)
	363	{
	364	/* Add platform devices */
	365	if (machine_desc->init_machine)
	366	machine_desc->init_machine();
	367
	368	return 0;
	369	}
	370	arch_initcall(customize_machine);
	371
	372	static int __init init_late_machine(void)
	373	{
	374	if (machine_desc->init_late)
	375	machine_desc->init_late();
	376
	377	return 0;
	378	}
	379	late_initcall(init_late_machine);
c121c506 VG	380	/*
	381	* Get CPU information for use by the procfs.
	382	*/
	383
	384	#define cpu_to_ptr(c) ((void *)(0xFFFF0000 \| (unsigned int)(c)))
	385	#define ptr_to_cpu(p) (~0xFFFF0000UL & (unsigned int)(p))
	386
	387	static int show_cpuinfo(struct seq_file m, void v)
	388	{
	389	char *str;
	390	int cpu_id = ptr_to_cpu(v);
	391
	392	str = (char *)__get_free_page(GFP_TEMPORARY);
	393	if (!str)
	394	goto done;
	395
af617428	396	seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
c121c506 VG	397
	398	seq_printf(m, "Bogo MIPS : \t%lu.%02lu\n",
	399	loops_per_jiffy / (500000 / HZ),
	400	(loops_per_jiffy / (5000 / HZ)) % 100);
	401
af617428 VG	402	seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
	403
	404	seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
	405
	406	seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
	407
	408	#ifdef CONFIG_SMP
	409	seq_printf(m, arc_platform_smp_cpuinfo());
	410	#endif
	411
c121c506 VG	412	free_page((unsigned long)str);
	413	done:
	414	seq_printf(m, "\n\n");
	415
	416	return 0;
	417	}
	418
	419	static void c_start(struct seq_file m, loff_t *pos)
	420	{
	421	/*
	422	* Callback returns cpu-id to iterator for show routine, NULL to stop.
	423	* However since NULL is also a valid cpu-id (0), we use a round-about
	424	* way to pass it w/o having to kmalloc/free a 2 byte string.
	425	* Encode cpu-id as 0xFFcccc, which is decoded by show routine.
	426	*/
	427	return pos < num_possible_cpus() ? cpu_to_ptr(pos) : NULL;
	428	}
	429
	430	static void c_next(struct seq_file m, void v, loff_t pos)
	431	{
	432	++*pos;
	433	return c_start(m, pos);
	434	}
	435
	436	static void c_stop(struct seq_file m, void v)
	437	{
	438	}
	439
	440	const struct seq_operations cpuinfo_op = {
	441	.start = c_start,
	442	.next = c_next,
	443	.stop = c_stop,
	444	.show = show_cpuinfo
	445	};
	446
	447	static DEFINE_PER_CPU(struct cpu, cpu_topology);
	448
	449	static int __init topology_init(void)
	450	{
	451	int cpu;
	452
	453	for_each_present_cpu(cpu)
	454	register_cpu(&per_cpu(cpu_topology, cpu), cpu);
	455
	456	return 0;
	457	}
	458
	459	subsys_initcall(topology_init);