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Commit | Line | Data |
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1da177e4 LT |
1 | /* Functions internal to the PCI core code */ |
2 | ||
312c004d KS |
3 | extern int pci_uevent(struct device *dev, char **envp, int num_envp, |
4 | char *buffer, int buffer_size); | |
1da177e4 LT |
5 | extern int pci_create_sysfs_dev_files(struct pci_dev *pdev); |
6 | extern void pci_remove_sysfs_dev_files(struct pci_dev *pdev); | |
7 | extern void pci_cleanup_rom(struct pci_dev *dev); | |
8 | extern int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res, | |
e31dd6e4 GKH |
9 | resource_size_t size, resource_size_t align, |
10 | resource_size_t min, unsigned int type_mask, | |
1da177e4 | 11 | void (*alignf)(void *, struct resource *, |
e31dd6e4 | 12 | resource_size_t, resource_size_t), |
1da177e4 | 13 | void *alignf_data); |
0f64474b DSL |
14 | /* Firmware callbacks */ |
15 | extern int (*platform_pci_choose_state)(struct pci_dev *dev, pm_message_t state); | |
b913100d | 16 | extern int (*platform_pci_set_power_state)(struct pci_dev *dev, pci_power_t state); |
0f64474b | 17 | |
e04b0ea2 BK |
18 | extern int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val); |
19 | extern int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val); | |
20 | extern int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val); | |
21 | extern int pci_user_write_config_byte(struct pci_dev *dev, int where, u8 val); | |
22 | extern int pci_user_write_config_word(struct pci_dev *dev, int where, u16 val); | |
23 | extern int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val); | |
24 | ||
1da177e4 LT |
25 | /* PCI /proc functions */ |
26 | #ifdef CONFIG_PROC_FS | |
27 | extern int pci_proc_attach_device(struct pci_dev *dev); | |
28 | extern int pci_proc_detach_device(struct pci_dev *dev); | |
1da177e4 LT |
29 | extern int pci_proc_detach_bus(struct pci_bus *bus); |
30 | #else | |
31 | static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; } | |
32 | static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; } | |
1da177e4 LT |
33 | static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; } |
34 | #endif | |
35 | ||
36 | /* Functions for PCI Hotplug drivers to use */ | |
1da177e4 | 37 | extern unsigned int pci_do_scan_bus(struct pci_bus *bus); |
1da177e4 LT |
38 | extern int pci_bus_find_capability (struct pci_bus *bus, unsigned int devfn, int cap); |
39 | ||
1da177e4 LT |
40 | extern void pci_remove_legacy_files(struct pci_bus *bus); |
41 | ||
42 | /* Lock for read/write access to pci device and bus lists */ | |
d71374da | 43 | extern struct rw_semaphore pci_bus_sem; |
1da177e4 | 44 | |
3f79e107 | 45 | #ifdef CONFIG_PCI_MSI |
1da177e4 LT |
46 | extern int pci_msi_quirk; |
47 | #else | |
48 | #define pci_msi_quirk 0 | |
49 | #endif | |
ffadcc2f | 50 | extern unsigned int pci_pm_d3_delay; |
4b47b0ee | 51 | #ifdef CONFIG_PCI_MSI |
4602b88d | 52 | void disable_msi_mode(struct pci_dev *dev, int pos, int type); |
309e57df | 53 | void pci_no_msi(void); |
4b47b0ee AM |
54 | #else |
55 | static inline void disable_msi_mode(struct pci_dev *dev, int pos, int type) { } | |
309e57df | 56 | static inline void pci_no_msi(void) { } |
4b47b0ee | 57 | #endif |
41017f0c SL |
58 | #if defined(CONFIG_PCI_MSI) && defined(CONFIG_PM) |
59 | int pci_save_msi_state(struct pci_dev *dev); | |
60 | int pci_save_msix_state(struct pci_dev *dev); | |
61 | void pci_restore_msi_state(struct pci_dev *dev); | |
62 | void pci_restore_msix_state(struct pci_dev *dev); | |
63 | #else | |
64 | static inline int pci_save_msi_state(struct pci_dev *dev) { return 0; } | |
65 | static inline int pci_save_msix_state(struct pci_dev *dev) { return 0; } | |
66 | static inline void pci_restore_msi_state(struct pci_dev *dev) {} | |
67 | static inline void pci_restore_msix_state(struct pci_dev *dev) {} | |
68 | #endif | |
ffadcc2f KCA |
69 | static inline int pci_no_d1d2(struct pci_dev *dev) |
70 | { | |
71 | unsigned int parent_dstates = 0; | |
4b47b0ee | 72 | |
ffadcc2f KCA |
73 | if (dev->bus->self) |
74 | parent_dstates = dev->bus->self->no_d1d2; | |
75 | return (dev->no_d1d2 || parent_dstates); | |
76 | ||
77 | } | |
1da177e4 LT |
78 | extern int pcie_mch_quirk; |
79 | extern struct device_attribute pci_dev_attrs[]; | |
80 | extern struct class_device_attribute class_device_attr_cpuaffinity; | |
81 | ||
82 | /** | |
83 | * pci_match_one_device - Tell if a PCI device structure has a matching | |
84 | * PCI device id structure | |
85 | * @id: single PCI device id structure to match | |
86 | * @dev: the PCI device structure to match against | |
87 | * | |
88 | * Returns the matching pci_device_id structure or %NULL if there is no match. | |
89 | */ | |
90 | static inline const struct pci_device_id * | |
91 | pci_match_one_device(const struct pci_device_id *id, const struct pci_dev *dev) | |
92 | { | |
93 | if ((id->vendor == PCI_ANY_ID || id->vendor == dev->vendor) && | |
94 | (id->device == PCI_ANY_ID || id->device == dev->device) && | |
95 | (id->subvendor == PCI_ANY_ID || id->subvendor == dev->subsystem_vendor) && | |
96 | (id->subdevice == PCI_ANY_ID || id->subdevice == dev->subsystem_device) && | |
97 | !((id->class ^ dev->class) & id->class_mask)) | |
98 | return id; | |
99 | return NULL; | |
100 | } | |
101 |