[linux.git] / arch / arm / mach-pxa / cm-x2xx.c

/*
 * linux/arch/arm/mach-pxa/cm-x2xx.c
 *
 * Copyright (C) 2008 CompuLab, Ltd.
 * Mike Rapoport <[email protected]>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/platform_device.h>
#include <linux/syscore_ops.h>
#include <linux/irq.h>
#include <linux/gpio.h>

#include <linux/dm9000.h>
#include <linux/leds.h>

#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <asm/mach/map.h>

#include <mach/pxa25x.h>
#include <mach/pxa27x.h>
#include <mach/audio.h>
#include <mach/pxafb.h>
#include <mach/smemc.h>

#include <asm/hardware/it8152.h>

#include "generic.h"
#include "cm-x2xx-pci.h"

extern void cmx255_init(void);
extern void cmx270_init(void);

/* reserve IRQs for IT8152 */
#define CMX2XX_NR_IRQS		(IRQ_BOARD_START + 40)

/* virtual addresses for statically mapped regions */
#define CMX2XX_VIRT_BASE	(void __iomem *)(0xe8000000)
#define CMX2XX_IT8152_VIRT	(CMX2XX_VIRT_BASE)

/* physical address if local-bus attached devices */
#define CMX255_DM9000_PHYS_BASE (PXA_CS1_PHYS + (8 << 22))
#define CMX270_DM9000_PHYS_BASE	(PXA_CS1_PHYS + (6 << 22))

/* leds */
#define CMX255_GPIO_RED		(27)
#define CMX255_GPIO_GREEN	(32)
#define CMX270_GPIO_RED		(93)
#define CMX270_GPIO_GREEN	(94)

/* GPIO IRQ usage */
#define GPIO22_ETHIRQ		(22)
#define GPIO10_ETHIRQ		(10)
#define CMX255_GPIO_IT8152_IRQ	(0)
#define CMX270_GPIO_IT8152_IRQ	(22)

#define CMX255_ETHIRQ		PXA_GPIO_TO_IRQ(GPIO22_ETHIRQ)
#define CMX270_ETHIRQ		PXA_GPIO_TO_IRQ(GPIO10_ETHIRQ)

#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
static struct resource cmx255_dm9000_resource[] = {
	[0] = {
		.start = CMX255_DM9000_PHYS_BASE,
		.end   = CMX255_DM9000_PHYS_BASE + 3,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = CMX255_DM9000_PHYS_BASE + 4,
		.end   = CMX255_DM9000_PHYS_BASE + 4 + 500,
		.flags = IORESOURCE_MEM,
	},
	[2] = {
		.start = CMX255_ETHIRQ,
		.end   = CMX255_ETHIRQ,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
	}
};

static struct resource cmx270_dm9000_resource[] = {
	[0] = {
		.start = CMX270_DM9000_PHYS_BASE,
		.end   = CMX270_DM9000_PHYS_BASE + 3,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = CMX270_DM9000_PHYS_BASE + 8,
		.end   = CMX270_DM9000_PHYS_BASE + 8 + 500,
		.flags = IORESOURCE_MEM,
	},
	[2] = {
		.start = CMX270_ETHIRQ,
		.end   = CMX270_ETHIRQ,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
	}
};

static struct dm9000_plat_data cmx270_dm9000_platdata = {
	.flags		= DM9000_PLATF_32BITONLY | DM9000_PLATF_NO_EEPROM,
};

static struct platform_device cmx2xx_dm9000_device = {
	.name		= "dm9000",
	.id		= 0,
	.num_resources	= ARRAY_SIZE(cmx270_dm9000_resource),
	.dev		= {
		.platform_data = &cmx270_dm9000_platdata,
	}
};

static void __init cmx2xx_init_dm9000(void)
{
	if (cpu_is_pxa25x())
		cmx2xx_dm9000_device.resource = cmx255_dm9000_resource;
	else
		cmx2xx_dm9000_device.resource = cmx270_dm9000_resource;
	platform_device_register(&cmx2xx_dm9000_device);
}
#else
static inline void cmx2xx_init_dm9000(void) {}
#endif

/* UCB1400 touchscreen controller */
#if defined(CONFIG_TOUCHSCREEN_UCB1400) || defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
static struct platform_device cmx2xx_ts_device = {
	.name		= "ucb1400_core",
	.id		= -1,
};

static void __init cmx2xx_init_touchscreen(void)
{
	platform_device_register(&cmx2xx_ts_device);
}
#else
static inline void cmx2xx_init_touchscreen(void) {}
#endif

/* CM-X270 LEDs */
#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
static struct gpio_led cmx2xx_leds[] = {
	[0] = {
		.name = "cm-x2xx:red",
		.default_trigger = "nand-disk",
		.active_low = 1,
	},
	[1] = {
		.name = "cm-x2xx:green",
		.default_trigger = "heartbeat",
		.active_low = 1,
	},
};

static struct gpio_led_platform_data cmx2xx_gpio_led_pdata = {
	.num_leds = ARRAY_SIZE(cmx2xx_leds),
	.leds = cmx2xx_leds,
};

static struct platform_device cmx2xx_led_device = {
	.name		= "leds-gpio",
	.id		= -1,
	.dev		= {
		.platform_data = &cmx2xx_gpio_led_pdata,
	},
};

static void __init cmx2xx_init_leds(void)
{
	if (cpu_is_pxa25x()) {
		cmx2xx_leds[0].gpio = CMX255_GPIO_RED;
		cmx2xx_leds[1].gpio = CMX255_GPIO_GREEN;
	} else {
		cmx2xx_leds[0].gpio = CMX270_GPIO_RED;
		cmx2xx_leds[1].gpio = CMX270_GPIO_GREEN;
	}
	platform_device_register(&cmx2xx_led_device);
}
#else
static inline void cmx2xx_init_leds(void) {}
#endif

#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
/*
  Display definitions
  keep these for backwards compatibility, although symbolic names (as
  e.g. in lpd270.c) looks better
*/
#define MTYPE_STN320x240	0
#define MTYPE_TFT640x480	1
#define MTYPE_CRT640x480	2
#define MTYPE_CRT800x600	3
#define MTYPE_TFT320x240	6
#define MTYPE_STN640x480	7

static struct pxafb_mode_info generic_stn_320x240_mode = {
	.pixclock	= 76923,
	.bpp		= 8,
	.xres		= 320,
	.yres		= 240,
	.hsync_len	= 3,
	.vsync_len	= 2,
	.left_margin	= 3,
	.upper_margin	= 0,
	.right_margin	= 3,
	.lower_margin	= 0,
	.sync		= (FB_SYNC_HOR_HIGH_ACT |
			   FB_SYNC_VERT_HIGH_ACT),
	.cmap_greyscale = 0,
};

static struct pxafb_mach_info generic_stn_320x240 = {
	.modes		= &generic_stn_320x240_mode,
	.num_modes	= 1,
	.lcd_conn	= LCD_COLOR_STN_8BPP | LCD_PCLK_EDGE_FALL |\
			  LCD_AC_BIAS_FREQ(0xff),
	.cmap_inverse	= 0,
	.cmap_static	= 0,
};

static struct pxafb_mode_info generic_tft_640x480_mode = {
	.pixclock	= 38461,
	.bpp		= 8,
	.xres		= 640,
	.yres		= 480,
	.hsync_len	= 60,
	.vsync_len	= 2,
	.left_margin	= 70,
	.upper_margin	= 10,
	.right_margin	= 70,
	.lower_margin	= 5,
	.sync		= 0,
	.cmap_greyscale = 0,
};

static struct pxafb_mach_info generic_tft_640x480 = {
	.modes		= &generic_tft_640x480_mode,
	.num_modes	= 1,
	.lcd_conn	= LCD_COLOR_TFT_8BPP | LCD_PCLK_EDGE_FALL |\
			  LCD_AC_BIAS_FREQ(0xff),
	.cmap_inverse	= 0,
	.cmap_static	= 0,
};

static struct pxafb_mode_info generic_crt_640x480_mode = {
	.pixclock	= 38461,
	.bpp		= 8,
	.xres		= 640,
	.yres		= 480,
	.hsync_len	= 63,
	.vsync_len	= 2,
	.left_margin	= 81,
	.upper_margin	= 33,
	.right_margin	= 16,
	.lower_margin	= 10,
	.sync		= (FB_SYNC_HOR_HIGH_ACT |
			   FB_SYNC_VERT_HIGH_ACT),
	.cmap_greyscale = 0,
};

static struct pxafb_mach_info generic_crt_640x480 = {
	.modes		= &generic_crt_640x480_mode,
	.num_modes	= 1,
	.lcd_conn	= LCD_COLOR_TFT_8BPP | LCD_AC_BIAS_FREQ(0xff),
	.cmap_inverse	= 0,
	.cmap_static	= 0,
};

static struct pxafb_mode_info generic_crt_800x600_mode = {
	.pixclock	= 28846,
	.bpp		= 8,
	.xres		= 800,
	.yres	  	= 600,
	.hsync_len	= 63,
	.vsync_len	= 2,
	.left_margin	= 26,
	.upper_margin	= 21,
	.right_margin	= 26,
	.lower_margin	= 11,
	.sync		= (FB_SYNC_HOR_HIGH_ACT |
			   FB_SYNC_VERT_HIGH_ACT),
	.cmap_greyscale = 0,
};

static struct pxafb_mach_info generic_crt_800x600 = {
	.modes		= &generic_crt_800x600_mode,
	.num_modes	= 1,
	.lcd_conn	= LCD_COLOR_TFT_8BPP | LCD_AC_BIAS_FREQ(0xff),
	.cmap_inverse	= 0,
	.cmap_static	= 0,
};

static struct pxafb_mode_info generic_tft_320x240_mode = {
	.pixclock	= 134615,
	.bpp		= 16,
	.xres		= 320,
	.yres		= 240,
	.hsync_len	= 63,
	.vsync_len	= 7,
	.left_margin	= 75,
	.upper_margin	= 0,
	.right_margin	= 15,
	.lower_margin	= 15,
	.sync		= 0,
	.cmap_greyscale = 0,
};

static struct pxafb_mach_info generic_tft_320x240 = {
	.modes		= &generic_tft_320x240_mode,
	.num_modes	= 1,
	.lcd_conn	= LCD_COLOR_TFT_16BPP | LCD_AC_BIAS_FREQ(0xff),
	.cmap_inverse	= 0,
	.cmap_static	= 0,
};

static struct pxafb_mode_info generic_stn_640x480_mode = {
	.pixclock	= 57692,
	.bpp		= 8,
	.xres		= 640,
	.yres		= 480,
	.hsync_len	= 4,
	.vsync_len	= 2,
	.left_margin	= 10,
	.upper_margin	= 5,
	.right_margin	= 10,
	.lower_margin	= 5,
	.sync		= (FB_SYNC_HOR_HIGH_ACT |
			   FB_SYNC_VERT_HIGH_ACT),
	.cmap_greyscale = 0,
};

static struct pxafb_mach_info generic_stn_640x480 = {
	.modes		= &generic_stn_640x480_mode,
	.num_modes	= 1,
	.lcd_conn	= LCD_COLOR_STN_8BPP | LCD_AC_BIAS_FREQ(0xff),
	.cmap_inverse	= 0,
	.cmap_static	= 0,
};

static struct pxafb_mach_info *cmx2xx_display = &generic_crt_640x480;

static int __init cmx2xx_set_display(char *str)
{
	int disp_type = simple_strtol(str, NULL, 0);
	switch (disp_type) {
	case MTYPE_STN320x240:
		cmx2xx_display = &generic_stn_320x240;
		break;
	case MTYPE_TFT640x480:
		cmx2xx_display = &generic_tft_640x480;
		break;
	case MTYPE_CRT640x480:
		cmx2xx_display = &generic_crt_640x480;
		break;
	case MTYPE_CRT800x600:
		cmx2xx_display = &generic_crt_800x600;
		break;
	case MTYPE_TFT320x240:
		cmx2xx_display = &generic_tft_320x240;
		break;
	case MTYPE_STN640x480:
		cmx2xx_display = &generic_stn_640x480;
		break;
	default: /* fallback to CRT 640x480 */
		cmx2xx_display = &generic_crt_640x480;
		break;
	}
	return 1;
}

/*
   This should be done really early to get proper configuration for
   frame buffer.
   Indeed, pxafb parameters can be used istead, but CM-X2XX bootloader
   has limitied line length for kernel command line, and also it will
   break compatibitlty with proprietary releases already in field.
*/
__setup("monitor=", cmx2xx_set_display);

static void __init cmx2xx_init_display(void)
{
	pxa_set_fb_info(NULL, cmx2xx_display);
}
#else
static inline void cmx2xx_init_display(void) {}
#endif

#ifdef CONFIG_PM
static unsigned long sleep_save_msc[10];

static int cmx2xx_suspend(void)
{
	cmx2xx_pci_suspend();

	/* save MSC registers */
	sleep_save_msc[0] = __raw_readl(MSC0);
	sleep_save_msc[1] = __raw_readl(MSC1);
	sleep_save_msc[2] = __raw_readl(MSC2);

	/* setup power saving mode registers */
	PCFR = 0x0;
	PSLR = 0xff400000;
	PMCR  = 0x00000005;
	PWER  = 0x80000000;
	PFER  = 0x00000000;
	PRER  = 0x00000000;
	PGSR0 = 0xC0018800;
	PGSR1 = 0x004F0002;
	PGSR2 = 0x6021C000;
	PGSR3 = 0x00020000;

	return 0;
}

static void cmx2xx_resume(void)
{
	cmx2xx_pci_resume();

	/* restore MSC registers */
	__raw_writel(sleep_save_msc[0], MSC0);
	__raw_writel(sleep_save_msc[1], MSC1);
	__raw_writel(sleep_save_msc[2], MSC2);
}

static struct syscore_ops cmx2xx_pm_syscore_ops = {
	.resume = cmx2xx_resume,
	.suspend = cmx2xx_suspend,
};

static int __init cmx2xx_pm_init(void)
{
	register_syscore_ops(&cmx2xx_pm_syscore_ops);

	return 0;
}
#else
static int __init cmx2xx_pm_init(void) { return 0; }
#endif

#if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE)
static void __init cmx2xx_init_ac97(void)
{
	pxa_set_ac97_info(NULL);
}
#else
static inline void cmx2xx_init_ac97(void) {}
#endif

static void __init cmx2xx_init(void)
{
	pxa_set_ffuart_info(NULL);
	pxa_set_btuart_info(NULL);
	pxa_set_stuart_info(NULL);

	cmx2xx_pm_init();

	if (cpu_is_pxa25x())
		cmx255_init();
	else
		cmx270_init();

	cmx2xx_init_dm9000();
	cmx2xx_init_display();
	cmx2xx_init_ac97();
	cmx2xx_init_touchscreen();
	cmx2xx_init_leds();
}

static void __init cmx2xx_init_irq(void)
{
	if (cpu_is_pxa25x()) {
		pxa25x_init_irq();
		cmx2xx_pci_init_irq(CMX255_GPIO_IT8152_IRQ);
	} else {
		pxa27x_init_irq();
		cmx2xx_pci_init_irq(CMX270_GPIO_IT8152_IRQ);
	}
}

#ifdef CONFIG_PCI
/* Map PCI companion statically */
static struct map_desc cmx2xx_io_desc[] __initdata = {
	[0] = { /* PCI bridge */
		.virtual	= (unsigned long)CMX2XX_IT8152_VIRT,
		.pfn		= __phys_to_pfn(PXA_CS4_PHYS),
		.length		= SZ_64M,
		.type		= MT_DEVICE
	},
};

static void __init cmx2xx_map_io(void)
{
	if (cpu_is_pxa25x())
		pxa25x_map_io();

	if (cpu_is_pxa27x())
		pxa27x_map_io();

	iotable_init(cmx2xx_io_desc, ARRAY_SIZE(cmx2xx_io_desc));

	it8152_base_address = CMX2XX_IT8152_VIRT;
}
#else
static void __init cmx2xx_map_io(void)
{
	if (cpu_is_pxa25x())
		pxa25x_map_io();

	if (cpu_is_pxa27x())
		pxa27x_map_io();
}
#endif

MACHINE_START(ARMCORE, "Compulab CM-X2XX")
	.atag_offset	= 0x100,
	.map_io		= cmx2xx_map_io,
	.nr_irqs	= CMX2XX_NR_IRQS,
	.init_irq	= cmx2xx_init_irq,
	/* NOTE: pxa25x_handle_irq() works on PXA27x w/o camera support */
	.handle_irq	= pxa25x_handle_irq,
	.timer		= &pxa_timer,
	.init_machine	= cmx2xx_init,
#ifdef CONFIG_PCI
	.dma_zone_size	= SZ_64M,
#endif
	.restart	= pxa_restart,
MACHINE_END
Commit	Line	Data
3696a8a4	1	/*
da591937	2	* linux/arch/arm/mach-pxa/cm-x2xx.c
3696a8a4	3	*
4adc5fb6	4	* Copyright (C) 2008 CompuLab, Ltd.
3696a8a4 MR	5	* Mike Rapoport <[email protected]>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*/
	11
3696a8a4	12	#include <linux/platform_device.h>
2eaa03b5	13	#include <linux/syscore_ops.h>
2f01a973 MR	14	#include <linux/irq.h>
2f01a973 MR	15	#include <linux/gpio.h>
3696a8a4 MR	16
3696a8a4 MR	17	#include <linux/dm9000.h>
2f01a973	18	#include <linux/leds.h>
3696a8a4 MR	19
	20	#include <asm/mach/arch.h>
	21	#include <asm/mach-types.h>
	22	#include <asm/mach/map.h>
	23
ca0e687c EM	24	#include <mach/pxa25x.h>
ca0e687c EM	25	#include <mach/pxa27x.h>
a09e64fb RK	26	#include <mach/audio.h>
a09e64fb RK	27	#include <mach/pxafb.h>
ad68bb9f	28	#include <mach/smemc.h>
3696a8a4 MR	29
	30	#include <asm/hardware/it8152.h>
	31
	32	#include "generic.h"
7d76e3f1	33	#include "cm-x2xx-pci.h"
3696a8a4	34
a7f3f030	35	extern void cmx255_init(void);
4adc5fb6 MR	36	extern void cmx270_init(void);
4adc5fb6 MR	37
6ac6b817 HZ	38	/* reserve IRQs for IT8152 */
	39	#define CMX2XX_NR_IRQS (IRQ_BOARD_START + 40)
	40
2f01a973	41	/* virtual addresses for statically mapped regions */
97b09da4	42	#define CMX2XX_VIRT_BASE (void __iomem *)(0xe8000000)
da591937	43	#define CMX2XX_IT8152_VIRT (CMX2XX_VIRT_BASE)
2f01a973	44
4adc5fb6	45	/* physical address if local-bus attached devices */
a7f3f030	46	#define CMX255_DM9000_PHYS_BASE (PXA_CS1_PHYS + (8 << 22))
da591937 MR	47	#define CMX270_DM9000_PHYS_BASE (PXA_CS1_PHYS + (6 << 22))
	48
	49	/* leds */
a7f3f030 MR	50	#define CMX255_GPIO_RED (27)
a7f3f030 MR	51	#define CMX255_GPIO_GREEN (32)
da591937 MR	52	#define CMX270_GPIO_RED (93)
da591937 MR	53	#define CMX270_GPIO_GREEN (94)
3696a8a4	54
2f01a973	55	/* GPIO IRQ usage */
a7f3f030	56	#define GPIO22_ETHIRQ (22)
2f01a973	57	#define GPIO10_ETHIRQ (10)
a7f3f030	58	#define CMX255_GPIO_IT8152_IRQ (0)
da591937	59	#define CMX270_GPIO_IT8152_IRQ (22)
2f01a973	60
6384fdad HZ	61	#define CMX255_ETHIRQ PXA_GPIO_TO_IRQ(GPIO22_ETHIRQ)
6384fdad HZ	62	#define CMX270_ETHIRQ PXA_GPIO_TO_IRQ(GPIO10_ETHIRQ)
2f01a973 MR	63
2f01a973 MR	64	#if defined(CONFIG_DM9000) \|\| defined(CONFIG_DM9000_MODULE)
a7f3f030 MR	65	static struct resource cmx255_dm9000_resource[] = {
	66	[0] = {
	67	.start = CMX255_DM9000_PHYS_BASE,
	68	.end = CMX255_DM9000_PHYS_BASE + 3,
	69	.flags = IORESOURCE_MEM,
	70	},
	71	[1] = {
	72	.start = CMX255_DM9000_PHYS_BASE + 4,
	73	.end = CMX255_DM9000_PHYS_BASE + 4 + 500,
	74	.flags = IORESOURCE_MEM,
	75	},
	76	[2] = {
	77	.start = CMX255_ETHIRQ,
	78	.end = CMX255_ETHIRQ,
	79	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHEDGE,
	80	}
	81	};
	82
2f01a973	83	static struct resource cmx270_dm9000_resource[] = {
3696a8a4	84	[0] = {
da591937 MR	85	.start = CMX270_DM9000_PHYS_BASE,
da591937 MR	86	.end = CMX270_DM9000_PHYS_BASE + 3,
3696a8a4 MR	87	.flags = IORESOURCE_MEM,
	88	},
	89	[1] = {
da591937 MR	90	.start = CMX270_DM9000_PHYS_BASE + 8,
da591937 MR	91	.end = CMX270_DM9000_PHYS_BASE + 8 + 500,
3696a8a4 MR	92	.flags = IORESOURCE_MEM,
	93	},
	94	[2] = {
	95	.start = CMX270_ETHIRQ,
	96	.end = CMX270_ETHIRQ,
2f01a973	97	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHEDGE,
3696a8a4 MR	98	}
	99	};
	100
2f01a973	101	static struct dm9000_plat_data cmx270_dm9000_platdata = {
bff22c9b	102	.flags = DM9000_PLATF_32BITONLY \| DM9000_PLATF_NO_EEPROM,
3696a8a4 MR	103	};
3696a8a4 MR	104
da591937	105	static struct platform_device cmx2xx_dm9000_device = {
3696a8a4 MR	106	.name = "dm9000",
3696a8a4 MR	107	.id = 0,
2f01a973	108	.num_resources = ARRAY_SIZE(cmx270_dm9000_resource),
3696a8a4	109	.dev = {
2f01a973	110	.platform_data = &cmx270_dm9000_platdata,
3696a8a4 MR	111	}
	112	};
	113
da591937	114	static void __init cmx2xx_init_dm9000(void)
2f01a973	115	{
a7f3f030 MR	116	if (cpu_is_pxa25x())
	117	cmx2xx_dm9000_device.resource = cmx255_dm9000_resource;
	118	else
	119	cmx2xx_dm9000_device.resource = cmx270_dm9000_resource;
da591937	120	platform_device_register(&cmx2xx_dm9000_device);
2f01a973 MR	121	}
2f01a973 MR	122	#else
da591937	123	static inline void cmx2xx_init_dm9000(void) {}
2f01a973 MR	124	#endif
	125
	126	/* UCB1400 touchscreen controller */
	127	#if defined(CONFIG_TOUCHSCREEN_UCB1400) \|\| defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
da591937	128	static struct platform_device cmx2xx_ts_device = {
50f6bb0a	129	.name = "ucb1400_core",
3696a8a4 MR	130	.id = -1,
	131	};
	132
da591937	133	static void __init cmx2xx_init_touchscreen(void)
2f01a973	134	{
da591937	135	platform_device_register(&cmx2xx_ts_device);
2f01a973 MR	136	}
2f01a973 MR	137	#else
da591937	138	static inline void cmx2xx_init_touchscreen(void) {}
2f01a973 MR	139	#endif
2f01a973 MR	140
2f01a973 MR	141	/* CM-X270 LEDs */
2f01a973 MR	142	#if defined(CONFIG_LEDS_GPIO) \|\| defined(CONFIG_LEDS_GPIO_MODULE)
da591937	143	static struct gpio_led cmx2xx_leds[] = {
2f01a973	144	[0] = {
da591937	145	.name = "cm-x2xx:red",
2f01a973	146	.default_trigger = "nand-disk",
2f01a973 MR	147	.active_low = 1,
	148	},
	149	[1] = {
da591937	150	.name = "cm-x2xx:green",
2f01a973	151	.default_trigger = "heartbeat",
2f01a973 MR	152	.active_low = 1,
	153	},
	154	};
	155
da591937 MR	156	static struct gpio_led_platform_data cmx2xx_gpio_led_pdata = {
	157	.num_leds = ARRAY_SIZE(cmx2xx_leds),
	158	.leds = cmx2xx_leds,
2f01a973 MR	159	};
2f01a973 MR	160
da591937	161	static struct platform_device cmx2xx_led_device = {
2f01a973	162	.name = "leds-gpio",
3696a8a4	163	.id = -1,
2f01a973	164	.dev = {
da591937	165	.platform_data = &cmx2xx_gpio_led_pdata,
2f01a973	166	},
3696a8a4 MR	167	};
3696a8a4 MR	168
da591937	169	static void __init cmx2xx_init_leds(void)
2f01a973	170	{
a7f3f030 MR	171	if (cpu_is_pxa25x()) {
	172	cmx2xx_leds[0].gpio = CMX255_GPIO_RED;
	173	cmx2xx_leds[1].gpio = CMX255_GPIO_GREEN;
	174	} else {
	175	cmx2xx_leds[0].gpio = CMX270_GPIO_RED;
	176	cmx2xx_leds[1].gpio = CMX270_GPIO_GREEN;
	177	}
da591937	178	platform_device_register(&cmx2xx_led_device);
2f01a973 MR	179	}
2f01a973 MR	180	#else
da591937	181	static inline void cmx2xx_init_leds(void) {}
2f01a973 MR	182	#endif
2f01a973 MR	183
2f01a973	184	#if defined(CONFIG_FB_PXA) \|\| defined(CONFIG_FB_PXA_MODULE)
3696a8a4 MR	185	/*
	186	Display definitions
	187	keep these for backwards compatibility, although symbolic names (as
	188	e.g. in lpd270.c) looks better
	189	*/
	190	#define MTYPE_STN320x240 0
	191	#define MTYPE_TFT640x480 1
	192	#define MTYPE_CRT640x480 2
	193	#define MTYPE_CRT800x600 3
	194	#define MTYPE_TFT320x240 6
	195	#define MTYPE_STN640x480 7
	196
	197	static struct pxafb_mode_info generic_stn_320x240_mode = {
	198	.pixclock = 76923,
	199	.bpp = 8,
	200	.xres = 320,
	201	.yres = 240,
	202	.hsync_len = 3,
	203	.vsync_len = 2,
	204	.left_margin = 3,
	205	.upper_margin = 0,
	206	.right_margin = 3,
	207	.lower_margin = 0,
	208	.sync = (FB_SYNC_HOR_HIGH_ACT \|
	209	FB_SYNC_VERT_HIGH_ACT),
	210	.cmap_greyscale = 0,
	211	};
	212
	213	static struct pxafb_mach_info generic_stn_320x240 = {
	214	.modes = &generic_stn_320x240_mode,
	215	.num_modes = 1,
9587319b EM	216	.lcd_conn = LCD_COLOR_STN_8BPP \| LCD_PCLK_EDGE_FALL \|\
9587319b EM	217	LCD_AC_BIAS_FREQ(0xff),
3696a8a4 MR	218	.cmap_inverse = 0,
	219	.cmap_static = 0,
	220	};
	221
	222	static struct pxafb_mode_info generic_tft_640x480_mode = {
	223	.pixclock = 38461,
	224	.bpp = 8,
	225	.xres = 640,
	226	.yres = 480,
	227	.hsync_len = 60,
	228	.vsync_len = 2,
	229	.left_margin = 70,
	230	.upper_margin = 10,
	231	.right_margin = 70,
	232	.lower_margin = 5,
	233	.sync = 0,
	234	.cmap_greyscale = 0,
	235	};
	236
	237	static struct pxafb_mach_info generic_tft_640x480 = {
	238	.modes = &generic_tft_640x480_mode,
	239	.num_modes = 1,
9587319b EM	240	.lcd_conn = LCD_COLOR_TFT_8BPP \| LCD_PCLK_EDGE_FALL \|\
9587319b EM	241	LCD_AC_BIAS_FREQ(0xff),
3696a8a4 MR	242	.cmap_inverse = 0,
	243	.cmap_static = 0,
	244	};
	245
	246	static struct pxafb_mode_info generic_crt_640x480_mode = {
	247	.pixclock = 38461,
	248	.bpp = 8,
	249	.xres = 640,
	250	.yres = 480,
	251	.hsync_len = 63,
	252	.vsync_len = 2,
	253	.left_margin = 81,
	254	.upper_margin = 33,
	255	.right_margin = 16,
	256	.lower_margin = 10,
	257	.sync = (FB_SYNC_HOR_HIGH_ACT \|
	258	FB_SYNC_VERT_HIGH_ACT),
	259	.cmap_greyscale = 0,
	260	};
	261
	262	static struct pxafb_mach_info generic_crt_640x480 = {
	263	.modes = &generic_crt_640x480_mode,
	264	.num_modes = 1,
9587319b	265	.lcd_conn = LCD_COLOR_TFT_8BPP \| LCD_AC_BIAS_FREQ(0xff),
3696a8a4 MR	266	.cmap_inverse = 0,
	267	.cmap_static = 0,
	268	};
	269
	270	static struct pxafb_mode_info generic_crt_800x600_mode = {
	271	.pixclock = 28846,
	272	.bpp = 8,
	273	.xres = 800,
	274	.yres = 600,
	275	.hsync_len = 63,
	276	.vsync_len = 2,
	277	.left_margin = 26,
	278	.upper_margin = 21,
	279	.right_margin = 26,
	280	.lower_margin = 11,
	281	.sync = (FB_SYNC_HOR_HIGH_ACT \|
	282	FB_SYNC_VERT_HIGH_ACT),
	283	.cmap_greyscale = 0,
	284	};
	285
	286	static struct pxafb_mach_info generic_crt_800x600 = {
	287	.modes = &generic_crt_800x600_mode,
	288	.num_modes = 1,
9587319b	289	.lcd_conn = LCD_COLOR_TFT_8BPP \| LCD_AC_BIAS_FREQ(0xff),
3696a8a4 MR	290	.cmap_inverse = 0,
	291	.cmap_static = 0,
	292	};
	293
	294	static struct pxafb_mode_info generic_tft_320x240_mode = {
	295	.pixclock = 134615,
	296	.bpp = 16,
	297	.xres = 320,
	298	.yres = 240,
	299	.hsync_len = 63,
	300	.vsync_len = 7,
	301	.left_margin = 75,
	302	.upper_margin = 0,
	303	.right_margin = 15,
	304	.lower_margin = 15,
	305	.sync = 0,
	306	.cmap_greyscale = 0,
	307	};
	308
	309	static struct pxafb_mach_info generic_tft_320x240 = {
	310	.modes = &generic_tft_320x240_mode,
	311	.num_modes = 1,
9587319b	312	.lcd_conn = LCD_COLOR_TFT_16BPP \| LCD_AC_BIAS_FREQ(0xff),
3696a8a4 MR	313	.cmap_inverse = 0,
	314	.cmap_static = 0,
	315	};
	316
	317	static struct pxafb_mode_info generic_stn_640x480_mode = {
	318	.pixclock = 57692,
	319	.bpp = 8,
	320	.xres = 640,
	321	.yres = 480,
	322	.hsync_len = 4,
	323	.vsync_len = 2,
	324	.left_margin = 10,
	325	.upper_margin = 5,
	326	.right_margin = 10,
	327	.lower_margin = 5,
	328	.sync = (FB_SYNC_HOR_HIGH_ACT \|
	329	FB_SYNC_VERT_HIGH_ACT),
	330	.cmap_greyscale = 0,
	331	};
	332
	333	static struct pxafb_mach_info generic_stn_640x480 = {
	334	.modes = &generic_stn_640x480_mode,
	335	.num_modes = 1,
9587319b	336	.lcd_conn = LCD_COLOR_STN_8BPP \| LCD_AC_BIAS_FREQ(0xff),
3696a8a4 MR	337	.cmap_inverse = 0,
	338	.cmap_static = 0,
	339	};
	340
da591937	341	static struct pxafb_mach_info *cmx2xx_display = &generic_crt_640x480;
3696a8a4	342
da591937	343	static int __init cmx2xx_set_display(char *str)
3696a8a4 MR	344	{
	345	int disp_type = simple_strtol(str, NULL, 0);
	346	switch (disp_type) {
	347	case MTYPE_STN320x240:
da591937	348	cmx2xx_display = &generic_stn_320x240;
3696a8a4 MR	349	break;
3696a8a4 MR	350	case MTYPE_TFT640x480:
da591937	351	cmx2xx_display = &generic_tft_640x480;
3696a8a4 MR	352	break;
3696a8a4 MR	353	case MTYPE_CRT640x480:
da591937	354	cmx2xx_display = &generic_crt_640x480;
3696a8a4 MR	355	break;
3696a8a4 MR	356	case MTYPE_CRT800x600:
da591937	357	cmx2xx_display = &generic_crt_800x600;
3696a8a4 MR	358	break;
3696a8a4 MR	359	case MTYPE_TFT320x240:
da591937	360	cmx2xx_display = &generic_tft_320x240;
3696a8a4 MR	361	break;
3696a8a4 MR	362	case MTYPE_STN640x480:
da591937	363	cmx2xx_display = &generic_stn_640x480;
3696a8a4 MR	364	break;
3696a8a4 MR	365	default: /* fallback to CRT 640x480 */
da591937	366	cmx2xx_display = &generic_crt_640x480;
3696a8a4 MR	367	break;
	368	}
	369	return 1;
	370	}
	371
	372	/*
	373	This should be done really early to get proper configuration for
	374	frame buffer.
da591937	375	Indeed, pxafb parameters can be used istead, but CM-X2XX bootloader
3696a8a4 MR	376	has limitied line length for kernel command line, and also it will
	377	break compatibitlty with proprietary releases already in field.
	378	*/
da591937	379	__setup("monitor=", cmx2xx_set_display);
3696a8a4	380
da591937	381	static void __init cmx2xx_init_display(void)
2f01a973	382	{
4321e1a1	383	pxa_set_fb_info(NULL, cmx2xx_display);
2f01a973 MR	384	}
2f01a973 MR	385	#else
da591937	386	static inline void cmx2xx_init_display(void) {}
2f01a973 MR	387	#endif
2f01a973 MR	388
3696a8a4 MR	389	#ifdef CONFIG_PM
	390	static unsigned long sleep_save_msc[10];
	391
2eaa03b5	392	static int cmx2xx_suspend(void)
3696a8a4	393	{
da591937	394	cmx2xx_pci_suspend();
3696a8a4 MR	395
3696a8a4 MR	396	/* save MSC registers */
ad68bb9f MV	397	sleep_save_msc[0] = __raw_readl(MSC0);
	398	sleep_save_msc[1] = __raw_readl(MSC1);
	399	sleep_save_msc[2] = __raw_readl(MSC2);
3696a8a4 MR	400
	401	/* setup power saving mode registers */
	402	PCFR = 0x0;
	403	PSLR = 0xff400000;
	404	PMCR = 0x00000005;
	405	PWER = 0x80000000;
	406	PFER = 0x00000000;
	407	PRER = 0x00000000;
	408	PGSR0 = 0xC0018800;
	409	PGSR1 = 0x004F0002;
	410	PGSR2 = 0x6021C000;
	411	PGSR3 = 0x00020000;
	412
	413	return 0;
	414	}
	415
2eaa03b5	416	static void cmx2xx_resume(void)
3696a8a4	417	{
da591937	418	cmx2xx_pci_resume();
3696a8a4 MR	419
3696a8a4 MR	420	/* restore MSC registers */
ad68bb9f MV	421	__raw_writel(sleep_save_msc[0], MSC0);
	422	__raw_writel(sleep_save_msc[1], MSC1);
	423	__raw_writel(sleep_save_msc[2], MSC2);
3696a8a4 MR	424	}
3696a8a4 MR	425
2eaa03b5	426	static struct syscore_ops cmx2xx_pm_syscore_ops = {
da591937 MR	427	.resume = cmx2xx_resume,
da591937 MR	428	.suspend = cmx2xx_suspend,
3696a8a4 MR	429	};
3696a8a4 MR	430
da591937	431	static int __init cmx2xx_pm_init(void)
3696a8a4	432	{
2eaa03b5 RW	433	register_syscore_ops(&cmx2xx_pm_syscore_ops);
	434
	435	return 0;
3696a8a4 MR	436	}
3696a8a4 MR	437	#else
da591937	438	static int __init cmx2xx_pm_init(void) { return 0; }
3696a8a4 MR	439	#endif
3696a8a4 MR	440
2f01a973	441	#if defined(CONFIG_SND_PXA2XX_AC97) \|\| defined(CONFIG_SND_PXA2XX_AC97_MODULE)
da591937	442	static void __init cmx2xx_init_ac97(void)
3696a8a4	443	{
9f19d638	444	pxa_set_ac97_info(NULL);
2f01a973 MR	445	}
2f01a973 MR	446	#else
da591937	447	static inline void cmx2xx_init_ac97(void) {}
2f01a973	448	#endif
3696a8a4	449
da591937 MR	450	static void __init cmx2xx_init(void)
da591937 MR	451	{
cc155c6f RK	452	pxa_set_ffuart_info(NULL);
	453	pxa_set_btuart_info(NULL);
	454	pxa_set_stuart_info(NULL);
	455
da591937 MR	456	cmx2xx_pm_init();
da591937 MR	457
a7f3f030 MR	458	if (cpu_is_pxa25x())
	459	cmx255_init();
	460	else
	461	cmx270_init();
da591937 MR	462
	463	cmx2xx_init_dm9000();
	464	cmx2xx_init_display();
	465	cmx2xx_init_ac97();
	466	cmx2xx_init_touchscreen();
	467	cmx2xx_init_leds();
	468	}
	469
	470	static void __init cmx2xx_init_irq(void)
3696a8a4	471	{
a7f3f030 MR	472	if (cpu_is_pxa25x()) {
	473	pxa25x_init_irq();
	474	cmx2xx_pci_init_irq(CMX255_GPIO_IT8152_IRQ);
	475	} else {
	476	pxa27x_init_irq();
	477	cmx2xx_pci_init_irq(CMX270_GPIO_IT8152_IRQ);
	478	}
2f01a973	479	}
3696a8a4	480
2f01a973 MR	481	#ifdef CONFIG_PCI
2f01a973 MR	482	/* Map PCI companion statically */
da591937	483	static struct map_desc cmx2xx_io_desc[] __initdata = {
2f01a973	484	[0] = { /* PCI bridge */
97b09da4	485	.virtual = (unsigned long)CMX2XX_IT8152_VIRT,
2f01a973 MR	486	.pfn = __phys_to_pfn(PXA_CS4_PHYS),
	487	.length = SZ_64M,
	488	.type = MT_DEVICE
	489	},
	490	};
3696a8a4	491
da591937	492	static void __init cmx2xx_map_io(void)
2f01a973	493	{
851982c1 MV	494	if (cpu_is_pxa25x())
	495	pxa25x_map_io();
	496
	497	if (cpu_is_pxa27x())
	498	pxa27x_map_io();
	499
da591937	500	iotable_init(cmx2xx_io_desc, ARRAY_SIZE(cmx2xx_io_desc));
3696a8a4	501
da591937	502	it8152_base_address = CMX2XX_IT8152_VIRT;
3696a8a4	503	}
2f01a973	504	#else
da591937	505	static void __init cmx2xx_map_io(void)
3696a8a4	506	{
851982c1 MV	507	if (cpu_is_pxa25x())
	508	pxa25x_map_io();
	509
	510	if (cpu_is_pxa27x())
	511	pxa27x_map_io();
3696a8a4	512	}
2f01a973	513	#endif
3696a8a4	514
da591937	515	MACHINE_START(ARMCORE, "Compulab CM-X2XX")
7375aba6	516	.atag_offset = 0x100,
da591937	517	.map_io = cmx2xx_map_io,
6ac6b817	518	.nr_irqs = CMX2XX_NR_IRQS,
da591937	519	.init_irq = cmx2xx_init_irq,
8a97ae2f EM	520	/* NOTE: pxa25x_handle_irq() works on PXA27x w/o camera support */
8a97ae2f EM	521	.handle_irq = pxa25x_handle_irq,
3696a8a4	522	.timer = &pxa_timer,
da591937	523	.init_machine = cmx2xx_init,
805e88dc NP	524	#ifdef CONFIG_PCI
	525	.dma_zone_size = SZ_64M,
	526	#endif
271a74fc	527	.restart = pxa_restart,
3696a8a4	528	MACHINE_END