projects / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| a23eefa2 RZ |
1 | /* |
| 2 | * Copyright 2015 Advanced Micro Devices, Inc. | |
| 3 | * | |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
| 5 | * copy of this software and associated documentation files (the "Software"), | |
| 6 | * to deal in the Software without restriction, including without limitation | |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the | |
| 9 | * Software is furnished to do so, subject to the following conditions: | |
| 10 | * | |
| 11 | * The above copyright notice and this permission notice shall be included in | |
| 12 | * all copies or substantial portions of the Software. | |
| 13 | * | |
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
| 20 | * OTHER DEALINGS IN THE SOFTWARE. | |
| 21 | * | |
| 22 | */ | |
| 2cc0c0b5 FC |
23 | #ifndef POLARIS10_POWERTUNE_H |
| 24 | #define POLARIS10_POWERTUNE_H | |
| a23eefa2 | 25 | |
| 2cc0c0b5 FC |
26 | enum polaris10_pt_config_reg_type { |
| 27 | POLARIS10_CONFIGREG_MMR = 0, | |
| 28 | POLARIS10_CONFIGREG_SMC_IND, | |
| 29 | POLARIS10_CONFIGREG_DIDT_IND, | |
| 36e6b912 | 30 | POLARIS10_CONFIGREG_GC_CAC_IND, |
| 2cc0c0b5 FC |
31 | POLARIS10_CONFIGREG_CACHE, |
| 32 | POLARIS10_CONFIGREG_MAX | |
| a23eefa2 RZ |
33 | }; |
| 34 | ||
| 5e037834 RZ |
35 | #define DIDT_SQ_CTRL0__UNUSED_0_MASK 0xfffc0000 |
| 36 | #define DIDT_SQ_CTRL0__UNUSED_0__SHIFT 0x12 | |
| 37 | #define DIDT_TD_CTRL0__UNUSED_0_MASK 0xfffc0000 | |
| 38 | #define DIDT_TD_CTRL0__UNUSED_0__SHIFT 0x12 | |
| 39 | #define DIDT_TCP_CTRL0__UNUSED_0_MASK 0xfffc0000 | |
| 40 | #define DIDT_TCP_CTRL0__UNUSED_0__SHIFT 0x12 | |
| 41 | #define DIDT_SQ_TUNING_CTRL__UNUSED_0_MASK 0xc0000000 | |
| 42 | #define DIDT_SQ_TUNING_CTRL__UNUSED_0__SHIFT 0x0000001e | |
| 43 | #define DIDT_TD_TUNING_CTRL__UNUSED_0_MASK 0xc0000000 | |
| 44 | #define DIDT_TD_TUNING_CTRL__UNUSED_0__SHIFT 0x0000001e | |
| 45 | #define DIDT_TCP_TUNING_CTRL__UNUSED_0_MASK 0xc0000000 | |
| 46 | #define DIDT_TCP_TUNING_CTRL__UNUSED_0__SHIFT 0x0000001e | |
| 47 | ||
| a23eefa2 RZ |
48 | /* PowerContainment Features */ |
| 49 | #define POWERCONTAINMENT_FEATURE_DTE 0x00000001 | |
| 50 | #define POWERCONTAINMENT_FEATURE_TDCLimit 0x00000002 | |
| 51 | #define POWERCONTAINMENT_FEATURE_PkgPwrLimit 0x00000004 | |
| 52 | ||
| 36e6b912 RZ |
53 | #define ixGC_CAC_CNTL 0x0000 |
| 54 | #define ixDIDT_SQ_STALL_CTRL 0x0004 | |
| 55 | #define ixDIDT_SQ_TUNING_CTRL 0x0005 | |
| 56 | #define ixDIDT_TD_STALL_CTRL 0x0044 | |
| 57 | #define ixDIDT_TD_TUNING_CTRL 0x0045 | |
| 58 | #define ixDIDT_TCP_STALL_CTRL 0x0064 | |
| 59 | #define ixDIDT_TCP_TUNING_CTRL 0x0065 | |
| 60 | ||
| 2cc0c0b5 | 61 | struct polaris10_pt_config_reg { |
| a23eefa2 RZ |
62 | uint32_t offset; |
| 63 | uint32_t mask; | |
| 64 | uint32_t shift; | |
| 65 | uint32_t value; | |
| 2cc0c0b5 | 66 | enum polaris10_pt_config_reg_type type; |
| a23eefa2 RZ |
67 | }; |
| 68 | ||
| a23eefa2 | 69 | |
| 2cc0c0b5 FC |
70 | void polaris10_initialize_power_tune_defaults(struct pp_hwmgr *hwmgr); |
| 71 | int polaris10_populate_bapm_parameters_in_dpm_table(struct pp_hwmgr *hwmgr); | |
| 72 | int polaris10_populate_pm_fuses(struct pp_hwmgr *hwmgr); | |
| 73 | int polaris10_enable_smc_cac(struct pp_hwmgr *hwmgr); | |
| c27371b8 | 74 | int polaris10_disable_smc_cac(struct pp_hwmgr *hwmgr); |
| 2cc0c0b5 | 75 | int polaris10_enable_power_containment(struct pp_hwmgr *hwmgr); |
| c27371b8 | 76 | int polaris10_disable_power_containment(struct pp_hwmgr *hwmgr); |
| 2cc0c0b5 FC |
77 | int polaris10_set_power_limit(struct pp_hwmgr *hwmgr, uint32_t n); |
| 78 | int polaris10_power_control_set_level(struct pp_hwmgr *hwmgr); | |
| 36e6b912 | 79 | int polaris10_enable_didt_config(struct pp_hwmgr *hwmgr); |
| 2cc0c0b5 | 80 | #endif /* POLARIS10_POWERTUNE_H */ |
| a23eefa2 | 81 |