Jeff Law [Fri, 30 Aug 1996 16:35:10 +0000 (16:35 +0000)]
* interp.c (hash): Fix.
* interp.c (do_format_8): Get operands correctly and
call the target function.
* simops.c: Rough cut at "clr1", "not1", "set1", and "tst1".
Jeff Law [Fri, 30 Aug 1996 05:49:07 +0000 (05:49 +0000)]
* interp.c (do_format_4): Get operands correctly and
call the target function.
* simops.c: Rough cut at "sld.b", "sld.h", "sld.w", "sst.b",
"sst.h", and "sst.w".
Jeff Law [Fri, 30 Aug 1996 04:27:48 +0000 (04:27 +0000)]
* interp.c (do_format_5): Get operands correctly and
call the target function.
(sim_resume): Don't do a PC update for format 5 instructions.
* simops.c: Handle "jarl" and "jmp" instructions.
Jeff Law [Thu, 29 Aug 1996 23:39:23 +0000 (23:39 +0000)]
* interp.c (hash): Update to be more accurate.
(lookup_hash): Call hash rather than computing the hash
code here.
(do_format_1_2): Handle format 1 and format 2 instructions.
Get operands correctly and call the target function.
(do_format_6): Get operands correctly and call the target
function.
(do_formats_9_10): Rough cut so shift ops will work.
(sim_resume): Tweak to deal with format 1 and format 2
handling in a single funtion. Don't update the PC
for format 3 insns. Fix typos.
* simops.c: Slightly reorganize. Add condition code handling
to "add", "addi", "and", "andi", "or", "ori", "xor", "xori"
and "not" instructions.
* v850_sim.h (reg_t): Registers are 32bits.
(_state): The V850 has 32 general registers. Add a 32bit
psw and pc register too. Add accessor macros
Fixing lots of stuff. Starting to add condition code support. Basically
check pointing the work to date.
* config/tc-d10v.c (find_opcode): Fix a bug which could generate
the wrong opcode for cases like st2w where there are many forms
of the same instruction.
Ian Lance Taylor [Tue, 27 Aug 1996 17:56:47 +0000 (17:56 +0000)]
* expr.c (operand): If md_parse_name is defined, call it before
calling symbol_find_or_make.
* config/tc-ppc.h (md_parse_name): Define.
(ppc_parse_name): Declare.
* config/tc-ppc.c (reg_name_search): Add regs and regcount
parameters.
(register_name): Update call to reg_name_search.
(cr_operand): New static variable.
(cr_names): New static const array.
(ppc_parse_name): New function.
(md_assemble): If PPC_OPERAND_CR is set in the operand flags, set
cr_operand before calling expression.
PR 10460.
* configure.in: work around host_alias configure bug.
AC_CANONICAL_HOST is called twice (first by AC_CHECK_TOOL
and second by AC_CANONICAL_SYSTEM). The second clobbers the
previous setting. Circumventing by moving the second check
to before the first.
* configure: regenerated
Ian Lance Taylor [Tue, 27 Aug 1996 04:14:13 +0000 (04:14 +0000)]
* elf32-mips.c (mips_elf_check_relocs): Set dynobj if needed for
R_MIPS_32 and R_MIPS_REL32. Set sgot and g as soon as possible.
(mips_elf_size_dynamic_sections): Don't require .got to exist.
(mips_elf_finish_dynamic_sections): Likewise.
* config/tc-d10v.c: Fixed ".word". Fixed problem with range checking
on addresses. Improved error messages.
* doc/c-d10v.texi: Added docs for register pairs.
Ian Lance Taylor [Mon, 26 Aug 1996 19:07:06 +0000 (19:07 +0000)]
* ecoff.c (init_file): Initialize fMerge to 1.
(add_file): Restore old file merging code, but only merge files if
fMerge is set.
(ecoff_directive_loc): Clear fMerge field of current file.
(ecoff_generate_asm_lineno): Likewise.
Jeff Law [Fri, 23 Aug 1996 20:58:13 +0000 (20:58 +0000)]
* config/tc-v850.c (md_assemble): Rough cut at demanding
"ep" or "r30" in sst and sld instructions.
(md_apply_fix3): Don't abort. Just warn that we don't
have relocs yet.
Jeff Law [Fri, 23 Aug 1996 19:35:05 +0000 (19:35 +0000)]
* gas/v850/basic.exp (mem_tests): Test instruction bit patterns.
xfail sst and sld tests.
(mov_tests): Remove bogus xfail.
* gas/v850/mem.s: sst and sld instructions can only index from
"ep" register.
Jeff Law [Fri, 23 Aug 1996 17:39:43 +0000 (17:39 +0000)]
* config/tc-v850.c (reg_name_search): Generalize to search
any given register table.
(register_name): Pass appropriate table and size to reg_name_search.
(system_register_name): New function.
(SYSREG_NAME_CNT): Define.
(md_assemble): Handle operands which are system registers.
Still working on the parser..
Jeff Law [Fri, 23 Aug 1996 17:35:11 +0000 (17:35 +0000)]
* v850-opc.c (v850_operands): Add "SR1" and "SR2" for system
register source and destination operands.
(v850_opcodes): Use SR1 and SR2 for "ldsr" and "stsr".
More parsing fixes.
Jeff Law [Fri, 23 Aug 1996 16:43:23 +0000 (16:43 +0000)]
* config/tc-v850.c (md_assemble): If we find a register, but the
opcode doesn't want a register, then we don't have a match.
(md_assemble): Get size of the instruction from the opcode table.
So we choose the right opcode and so that we get the sizes right.
Jeff Law [Fri, 23 Aug 1996 15:41:30 +0000 (15:41 +0000)]
* v850-opc.c (v850_operands): D6 -> DS7. References changed.
Add D8 for 8-bit unsigned field in short load/store insns.
(IF4A, IF4D): These both need two registers.
(IF4C, IF4D): Define. Use 8-bit unsigned field.
(v850_opcodes): For "sld.h", "sld.w", "sst.h", "sst.w", use
IF4C & IF4D. For "trap" use I5U, not I5. Add IF1 operand
for "ldsr" and "stsr".
* v850-opc.c (v850_operands): 3-bit immediate for bit insns
is unsigned.
Fixing up the parser again.