Alan Modra [Mon, 3 Jul 2017 12:30:32 +0000 (22:00 +0930)]
strings: remove section/file size check
This reverts most of 06803313754, 2005-07-05 Dmitry V. Levin change
adding a check that section size doesn't exceed file size. As we've
seen recently with mmo tests, decoded section size can easily exceed
file size with formats that encode section data.
I've also changed "strings" to use bfd_malloc_and_get_section, so that
"strings" won't die on a malloc failure. I think it's better to
continue on looking at other sections after failing to dump a section
with fuzzed size.
The testcases at https://bugzilla.altlinux.org/show_bug.cgi?id=5871
on a 32-bit host now produce
$ strings -d --target=a.out-i386 /tmp/bfdkiller.dat
strings: error: /tmp/bfdkiller.dat(.text) is too large (0xffffffff bytes)
strings: /tmp/bfdkiller.dat: Reading section .text failed: Memory exhausted
strings: /tmp/bfdkiller.dat: Reading section .data failed: File truncated
org.ec
$ strings -d --target=a.out-i386 /tmp/eclipse-state
strings: /tmp/eclipse-state: Reading section .text failed: File truncated
org.eclipse.osgi
System Bundle
[snip]
* strings.c (filename_and_size_t): Delete.
(strings_a_section): Don't check section size against file size.
Use bdf_malloc_and_get_section. Report an error on failures.
Replace arg param with filename and got_a_section param.
(got_a_section): Move to..
(strings_object_file): ..an auto var here. Iterate over sections
rather than calling bfd_map_over_sections. Adjust strings_a_section
call.
Alan Modra [Mon, 3 Jul 2017 12:29:45 +0000 (21:59 +0930)]
Support %Lx, %Lu, %Ld in _bfd_error_handler format
One way to print 64-bit bfd_vma or bfd_size_type values on 32-bit
hosts is to cast the value to long long and use the 'll' modifier in
printf format strings. However, that's awkward because we also
support the Microsoft C library printf that uses 'I64' as a modifier
instead, and having variants of translated strings would not endear us
to the translation project. So, rewrite the 'll' modifier in
_doprint for Microsoft. Even with that capability it's not so nice
for 32-bit code to need casts to long long, so this patch makes 'L' a
modifier for bfd_vma rather than an alias for 'll'.
I've then used the new 'L' modifier to fix selected format strings.
* bfd.c (_doprnt): Rewrite "ll" and "L" modifiers to "I64" for
__MSVCRT__. Support "L" modifier for bfd_vma. Formatting.
* elf.c (setup_group): Use "Lx" to print sh_size.
(_bfd_elf_setup_sections): Remove unnecessary cast and print
unknown section type in hex.
(copy_special_section_fields): Style fix.
(bfd_section_from_shdr): Correct format for sh_link. Use a
common error message for all the variants of unrecognized
section types.
(assign_file_positions_for_load_sections): Use "Lx" for lma
adjust error message.
(assign_file_positions_for_non_load_sections): Formatting.
(rewrite_elf_program_header): Formatting. Use "Lx" for
bfd_vma values in error messages.
* elfcode.h (elf_slurp_reloc_table_from_section): Cast
ELF_R_SYM value to type expected by format.
* elflink.c (elf_link_read_relocs_from_section): Use "Lx"
in error messages.
(elf_link_add_object_symbols): Use "Lu" for symbol sizes.
(elf_link_input_bfd): Use "Lx" for r_info.
(bfd_elf_gc_record_vtinherit): Use "Lx" for offset.
Alan Modra [Mon, 3 Jul 2017 12:29:30 +0000 (21:59 +0930)]
BFD long long cleanup
long long isn't supposed to be used without a configure test, to
support ancient compilers. Probably not terribly important nowadays.
* bfd.c (bfd_scan_vma): Don't use long long unless HAVE_LONG_LONG.
* coff-rs6000.c (FMT20): Handle hosts with 64-bit long and
Microsoft C library variant of long long format specifier.
(PRINT20): Cast value to bfd_uint64_t not long long.
* coffcode.h (coff_print_aux): Use BFD_VMA_FMT.
* coff-x86_64.c (coff_amd64_reloc): Use bfd_uint64_t rather than
long long. Don't cast to bfd_vma.
* elf32-score.c (score3_bfd_getl48): Likewise.
* vms-alpha.c (_bfd_vms_slurp_eisd): Likewise.
Alan Modra [Sat, 1 Jul 2017 12:28:10 +0000 (21:58 +0930)]
Use bfd_malloc_and_get_section
It's nicer than xmalloc followed by bfd_get_section_contents, since
xmalloc exits on failure and needs a check that its size_t arg doesn't
lose high bits when converted from bfd_size_type.
PR binutils/21665
* objdump.c (strtab): Make var a bfd_byte*.
(disassemble_section): Don't limit malloc size. Instead, use
bfd_malloc_and_get_section.
(read_section_stabs): Use bfd_malloc_and_get_section. Return
bfd_byte*.
(find_stabs_section): Remove now unnecessary cast.
* objcopy.c (copy_object): Use bfd_malloc_and_get_section. Free
contents on error return.
* nlmconv.c (copy_sections): Use bfd_malloc_and_get_section.
MIPS/GAS: Use a switch on relaxation type in microMIPS fixup creation
Use a switch on the relaxation type rather than a chain of conditionals
in microMIPS fixup creation, improving source code structure and aiding
the compiler with code generation.
gas/
* config/tc-mips.c (md_convert_frag): Use a switch on the
microMIPS relaxation type rather than a chain of conditionals.
MIPS/GAS: Use frag symbol/offset directly in fixup creation
There is no need to use a helper expression in the creation of fixups
made from a frag's symbol and offset, because a simple `symbol+offset'
expression can be handled directly, with the use of a `fix_new' rather
than a `fix_new_exp' call. Rewrite `md_convert_frag' using `fix_new'
then and remove all the unneeded helper expressions, simplifying code.
gas/
* config/tc-mips.c (md_convert_frag): Rewrite `fix_new_exp'
calls in terms of `fix_new'.
MIPS/GAS: Use non-zero frag offset directly in PIC branch relaxation
Use frag symbols with a non-zero offset directly in `fix_new_exp' calls
made in PIC branch relaxation. There is no need here to make a helper
symbol to hold the result of a `symbol+offset' calculation requested as
only branches to local symbols are relaxed and in this case the LO16
part of the PIC address load sequence will have the offset accounted for
in calculation against the local GOT entry retrieved as the GOT16 high
part. Consequently actual code produed is identical whether a helper
symbol is used or the original `symbol+offset' expression used directly.
Verify that this is indeed the case with GAS and LD tests.
gas/
* config/tc-mips.c (md_convert_frag): Don't make a helper
expression symbol for `fix_new_exp' called with a non-zero
offset.
* testsuite/gas/mips/relax-offset.d: New test.
* testsuite/gas/mips/[email protected]: New test.
* testsuite/gas/mips/[email protected]: New test.
* testsuite/gas/mips/[email protected]: New test.
* testsuite/gas/mips/[email protected]: New test.
* testsuite/gas/mips/relax-offset.l: New stderr output.
* testsuite/gas/mips/relax-offset.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
ld/
* testsuite/ld-mips-elf/relax-offset.dd: New test.
* testsuite/ld-mips-elf/relax-offset.gd: New test.
* testsuite/ld-mips-elf/relax-offset-umips.dd: New test.
* testsuite/ld-mips-elf/relax-offset-umips.gd: New test.
* testsuite/ld-mips-elf/relax-offset.ld: New test linker script.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
(prune_warnings): New temporary procedure.
Georg-Johann Lay [Fri, 30 Jun 2017 15:37:39 +0000 (16:37 +0100)]
Add support for a __gcc_isr pseudo isntruction to the AVR assembler.
PR gas/21683
include * opcode/avr.h (AVR_INSN): Add one for __gcc_isr.
gas * doc/c-avr.texi (AVR Options) <-mgcc-isr>: Document it.
(AVR Pseudo Instructions): New node.
* config/tc-avr.h (md_pre_output_hook): Define to avr_pre_output_hook.
(md_undefined_symbol): Define to avr_undefined_symbol.
(avr_pre_output_hook, avr_undefined_symbol): New protos.
* config/tc-avr.c (struc-symbol.h): Include it.
(ISR_CHUNK_Done, ISR_CHUNK_Prologue, ISR_CHUNK_Epilogue): New enums.
(avr_isr, avr_gccisr_opcode)
(avr_no_sreg_hash, avr_no_sreg): New static variables.
(avr_opt_s) <have_gccisr>: Add field.
(avr_opt): Add initializer for have_gccisr.
(enum options) <OPTION_HAVE_GCCISR>: Add enum.
(md_longopts) <"mgcc-isr">: Add entry.
(md_show_usage): Document -mgcc-isr.
(md_parse_option) [OPTION_HAVE_GCCISR]: Handle it.
(md_undefined_symbol): Remove.
(avr_undefined_symbol, avr_pre_output_hook): New fuctions.
(md_begin) <avr_no_sreg_hash, avr_gccisr_opcode>: Initialize them.
(avr_operand) <pregno>: Add argument and set *pregno if function
is called for a register constraint.
[N]: Handle constraint.
(avr_operands) <avr_operand>: Pass 5th parameter to calls.
[avr_opt.have_gccisr]: Call avr_update_gccisr. Call
avr_gccisr_operands instead of avr_operands.
(avr_update_gccisr, avr_emit_insn, avr_patch_gccisr_frag)
(avr_gccisr_operands, avr_check_gccisr_done): New static functions.
* testsuite/gas/avr/gccisr-01.d: New test.
* testsuite/gas/avr/gccisr-01.s: New test.
* testsuite/gas/avr/gccisr-02.d: New test.
* testsuite/gas/avr/gccisr-02.s: New test.
* testsuite/gas/avr/gccisr-03.d: New test.
* testsuite/gas/avr/gccisr-03.s: New test.
MIPS/GAS: Update `match_float_constant' and `match_operand' descriptions
Complement commit a92713e60ef4 ("Preparse MIPS instructions into
tokens"), <https://sourceware.org/ml/binutils/2013-07/msg00143.html>,
and update `match_float_constant' and `match_operand' function
descriptions according to semantics changes.
Correct an issue introduced with commit 7361da2c952e ("Add support for
MIPS R6.") and move the LSA and DLSA instructions back to the MSA ASE
instruction block in the regular MIPS opcode table. Adjust formatting
around the "MIPS r6" heading.
opcodes/
* mips-opc.c (mips_builtin_opcodes): Move "lsa" and "dlsa"
entries to the MSA ASE instruction block.
PR cli/21688: Detect aliases when issuing python/compile/guile commands (and fix last commit)
My last commit fixed a regression that happened when using
inline/multi-line commands for Python/Compile/Guile, but introduced
another regression: it is now not possible to use aliases for the
commands mentioned above. The fix is to almost revert the change I've
made and go back to using the 'struct cmd_list_element *', but at the
same time make sure that we advance the 'cmd_name' variable past all
the whitespace characters after the command name. If, after skipping
the whitespace, we encounter a '\0', it means that the command is not
inline. Otherwise, it is.
This patch also expands the testcase in order to check for aliases and
for trailing whitespace after the command name.
PR cli/21688
* cli/cli-script.c (command_name_equals_not_inline): Remove function.
(process_next_line): New variable 'inline_cmd'.
Adjust 'if' clauses for "python", "compile" and "guile" to use
'command_name_equals' and check for '!inline_cmd'.
The problem happens because, on cli/cli-script.c:process_next_line,
GDB is not using the command line string to identify which command to
run, but it instead using the 'struct cmd_list_element *' that is
obtained by using the mentioned string. The problem with that is that
the 'struct cmd_list_element *' doesn't have any information on
whether the command issued by the user is a multi-line or inline one.
A multi-line command is a command that will necessarily be composed of
more than 1 line. For example:
(gdb) if 1
>python
>print ('hello')
>end
>end
As can be seen in the example above, the 'python' command actually
"opens" a new command line (represented by the change in the
indentation) that will then be used to enter Python code. OTOH, an
inline command is a command that is "self-contained" in a single line,
for example:
(gdb) if 1
>python print ('hello')
>end
This Python command is a one-liner, and therefore there is no other
Python code that can be entered for this same block. There is also no
change in the indentation.
So, the fix is somewhat simple: we have to revert the change and use
the full command line string passed to process_next_line in order to
identify whether we're dealing with a multi-line or an inline command.
This commit does just that. As can be seen, this regression also
affects other languages, like guile or the compile framework. To make
things clearer, I decided to create a new helper function responsible
for identifying a non-inline command.
PR cli/21688
* cli/cli-script.c (command_name_equals_not_inline): New function.
(process_next_line): Adjust 'if' clauses for "python", "compile"
and "guile" to use command_name_equals_not_inline.
Nick Clifton [Fri, 30 Jun 2017 10:03:37 +0000 (11:03 +0100)]
Fix failures in MMIX linker tests introduced by fix for PR 21665.
PR binutils/21665
* objdump.c (disassemble_section): Move check for an overlarge
section to just before the allocation of memory. Do not check
section size against file size, but instead use an arbitrary 2Gb
limit. Issue a warning message if the section is too big.
Add support for the base and Virtualization ASE microMIPS instructions
as per the architecture specifications[1][2][3][4].
Most of this change by Andrew Bennett.
[1] "MIPS Architecture for Programmers Volume II-B: The microMIPS32
Instruction Set", MIPS Technologies, Inc., Document Number: MD00582,
Revision 5.04, January 15, 2014, Section 5.5 "Recoded 32-Bit
Instructions", p. 340
[2] "microMIPS32 Architecture for Programmers Volume IV-i:
Virtualization Module of the microMIPS32 Architecture", MIPS
Technologies, Inc., Document Number: MD00848, Revision 1.06,
December 10, 2013, Section 6.1 "Overview", pp. 133, 136
[3] "MIPS Architecture for Programmers Volume II-B: The microMIPS64
Instruction Set", MIPS Technologies, Inc., Document Number: MD00594,
Revision 5.04, January 15, 2014, Section 5.5 "Recoded 32-Bit
Instructions", pp. 415, 444
[4] "microMIPS64 Architecture for Programmers Volume IV-i:
Virtualization Module of the microMIPS64 Architecture", MIPS
Technologies, Inc., Document Number: MD00849, Revision 1.06,
December 10, 2013, Section 6.1 "Overview", pp. 134-135, 139-140
binutils/
* NEWS: Mention microMIPS XPA support.
opcodes/
* micromips-opc.c (XPA, XPAVZ): New macros.
(micromips_opcodes): Add "mfhc0", "mfhgc0", "mthc0" and
"mthgc0".
gas/
* config/tc-mips.c (mips_ases): Add microMIPS XPA support.
* testsuite/gas/mips/[email protected]: New test.
* testsuite/gas/mips/mips.exp: Run the new test. Enable
`xpa-virt-err' test for `micromips'.
MIPS: Fix XPA base and Virtualization ASE instruction handling
Correct a commit 7d64c587c15f ("Add support for the MIPS eXtended
Physical Address (XPA) ASE.") bug, causing XPA base and Virtualization
ASE instructions to be wrongly always enabled with the selection of the
MIPS32r2 or higher ISA.
For example this source assembles successfully as shown below:
$ cat xpa.s
mfhc0 $2, $1
$ as -32 -mips32 -o xpa.o xpa.s
xpa.s: Assembler messages:
xpa.s:1: Error: opcode not supported on this processor: mips32 (mips32) `mfhc0 $2,$1'
$ as -32 -mips32r2 -o xpa.o xpa.s
$ objdump -d xpa.o
To address this issue remove the I33 (INSN_ISA32R2) marking from all XPA
instructions in the opcode table. Additionally, for XPA Virtualization
ASE instructions implement an XPAVZ (ASE_XPA_VIRT) combination ASE flag
and use it in place of IVIRT|XPA (ASE_VIRT|ASE_XPA).
Now the same source is correctly rejected unless the `-mxpa' option is
also used:
$ as -32 -mips32r2 -o xpa.o xpa.s
xpa.s: Assembler messages:
xpa.s:1: Error: opcode not supported on this processor: mips32r2 (mips32r2) `mfhc0 $2,$1'
$ as -32 -mips32r2 -mxpa -o xpa.o xpa.s
$
Add test cases for XPA base and XPA Virtualization ASE instructions.
Parts of this change by Andrew Bennett.
include/
* opcode/mips.h (ASE_XPA_VIRT): New macro.
opcodes/
* mips-dis.c (mips_calculate_combination_ases): Handle the
ASE_XPA_VIRT flag.
(parse_mips_ase_option): New function.
(parse_mips_dis_option): Factor out ASE option handling to the
new function. Call `mips_calculate_combination_ases'.
* mips-opc.c (XPAVZ): New macro.
(mips_builtin_opcodes): Correct ISA and ASE flags for "mfhc0",
"mfhgc0", "mthc0" and "mthgc0".
gas/
* config/tc-mips.c (mips_set_ase): Handle the ASE_XPA_VIRT flag.
* testsuite/gas/mips/xpa.d: Remove `xpa' from `-M' in `objdump'
flags. Add `-mvirt' to `as' flags.
* testsuite/gas/mips/xpa-err.d: New test.
* testsuite/gas/mips/xpa-virt-err.d: New test.
* testsuite/gas/mips/xpa-err.l: New stderr output.
* testsuite/gas/mips/xpa-virt-err.l: New stderr output.
* testsuite/gas/mips/xpa-err.s: New test source.
* testsuite/gas/mips/xpa-virt-err.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
binutils/
* testsuite/binutils-all/mips/mips-xpa-virt-1.d: New test.
* testsuite/binutils-all/mips/mips-xpa-virt-2.d: New test.
* testsuite/binutils-all/mips/mips-xpa-virt-3.d: New test.
* testsuite/binutils-all/mips/mips-xpa-virt-4.d: New test.
* testsuite/binutils-all/mips/mips-xpa-virt.s: New test source.
* testsuite/binutils-all/mips/mips.exp: Run the new tests.
MIPS/opcodes: Correctly combine ASE flags for ASE_MIPS16E2_MT calculation
Correct a commit 25499ac7ee92 ("MIPS16e2: Add MIPS16e2 ASE support")
disassembler bug with the handling of the ASE_MIPS16E2_MT combination
ASE flag, where the calculation uses MIPS ABI Flags directly rather than
calculated internal ASE flags. Consequently code does not correctly set
the ASE_MIPS16E2_MT flag when the MIPS16e2 ASE flag and the MT ASE flag
come from different sources, i.e. one from the BFD chosen and the other
one from MIPS ABI Flags.
Fix this by using internal ASE_MT and ASE_MIPS16E2 flags in a separate
subsequent step, factored out to a dedicated function for use with
future combination ASE flags. Adjust the `[email protected]'
test case accordingly, where the MT flag comes from the BFD selected for
the disassembler and the MIPS16e2 flag comes from the ELF binary itself.
opcodes/
* mips-dis.c (mips_calculate_combination_ases): New function.
(mips_convert_abiflags_ases): Factor out ASE_MIPS16E2_MT
calculation to the new function.
(set_default_mips_dis_options): Call the new function.
gas/
* testsuite/gas/mips/[email protected]: Adjust for the
ASE_MIPS16E2_MT flag disassembler fix.
* testsuite/gas/mips/[email protected]:
Likewise.
MIPS/GAS: Clear the ASE_MIPS16E2_MT flag for recalculation
Correct a commit 25499ac7ee92 ("MIPS16e2: Add MIPS16e2 ASE support") GAS
bug with the handling of the ASE_MIPS16E2_MT combination ASE flag, which
is not correctly calculated as `.set nomips16e2' and `.set nomt'
pseudo-ops are processed. This leads to code like:
This happens because ASE_MIPS16E2_MT once set in `mips_set_ase' is never
cleared. Fix the problem by clearing it there before it is calculated
based on the ASE_MT and ASE_MIPS16E2 flags, making assembly fail as
expected:
$ as -32 -mips32r3 -mmt -mips16 -mmips16e2 -o foo.o foo.s
foo.s: Assembler messages:
foo.s:2: Error: opcode not supported on this processor: mips32r3 (mips32r3) `evpe'
$ as -32 -mips32r3 -mmt -mips16 -mmips16e2 -o bar.o bar.s
bar.s: Assembler messages:
bar.s:2: Error: opcode not supported on this processor: mips32r3 (mips32r3) `dvpe'
$
gas/
* config/tc-mips.c (mips_set_ase): Clear the ASE_MIPS16E2_MT
flag before recalculating.
* testsuite/gas/mips/mips16e2-mt-err.d: New test.
* testsuite/gas/mips/mips16e2-mt-err.l: New stderr output.
* testsuite/gas/mips/mips16e2-mt-err.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new test.
Pedro Alves [Thu, 29 Jun 2017 14:52:38 +0000 (15:52 +0100)]
Expression completer should not match explicit location options
This commit fixes a mismatch between what "print" command completer
thinks the command understands, and what the command actually
understands.
The explicit location options are understood by commands that take
(linespecs and) explicit locations as argument. I.e, breakpoint
commands, and "list". For example:
(gdb) b -source file.c -function my_func
So for those commands, it makes sense that the completer
completes:
However, completion for commands that take expressions (not
linespecs/locations) as arguments, such as the "print" command, also
completes the explicit location options, even though those switches
aren't really understood by these commands. Instead, "-foo" is
understood as an expression applying unary minus on a symbol named
"foo" (think "print -1"):
(gdb) p -func[TAB]
(gdb) p -function [RET]
No symbol "function" in current context.
The patch fixes this by having the expression_completer function
bypass the function that completes explicit locations.
"The fix is to make sure that the entire expression is passed to
expression_completer, then duplicate some logic there in the case
where location_completer is called."
The logic that was duplicated was much later on removed by the
original explicit locations patch:
Anton Kolesov [Mon, 19 Jun 2017 10:27:52 +0000 (13:27 +0300)]
[ARC] Use FOR_EACH_DISASSEMBLER_OPTION to iterate over options
This patch updates arc-dis.c:parse_disassembler_options to use a macro
FOR_EACH_DISASSEMBLER_OPTION, which has been introduced in [1], instead of a
homegrown solution to split option string.
Anton Kolesov [Thu, 15 Jun 2017 12:58:32 +0000 (15:58 +0300)]
[ARC] Fix handling of cpu=... disassembler option value
There is a bug in handling of cpu=... disassembler option in case there are
other options after it, for example, `cpu=EM,dsp'. In this case `EM,dsp' is
treated as an option value, and strcasecmp reports is as non-equal to "EM".
This is fixed by using disassembler_options_cmp function, which compares string
treating `,' the same way as `\0'.
This function also solves a problem with option order in parse_option.
Previously, if several option had same prefix (e.g. fpud, fpuda), then the
longer one should have been compared first, otherwise when longer option is
passed it would be treated as a short one, because
CONST_STRNEQ ("fpud", "fpuda")
would be true. The order of options was correct for ARC, so there were no
bugs per se, but with disassembler_option_cmp there is no risk of such a bug
being introduced in the future.
* testsuite/binutils-all/arc/double_store.s: New file.
* testsuite/binutils-all/arc/objdump.exp: Tests for disassembler
options.
(do_objfile): New function.
(check_assembly): Likewise.
Yao Qi [Thu, 29 Jun 2017 11:41:50 +0000 (12:41 +0100)]
Use target_desc fields expedite_regs and xmltarget ifndef IN_PROCESS_AGENT
struct target_desc is used by both GDBserver and IPA, but fields
expedite_regs and xmltarget are only used in GDBserver, so this patch wraps
these two fields by ifndef IN_PROCESS_AGENT. This patch also changes
regformats/regdat.sh to generate .c files in this way too.
* elfxx-sparc.c (allocate_dynrelocs): Don't make a symbol dynamic
unless it is undefined weak.
* elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Set the flag
relative_reloc to direct non-dynamic symbols to R_SPARC_RELATIVE
relocation.
* elfxx-sparc.c (_bfd_sparc_elf_finish_dynamic_symbol): If symbol
is not dynamic in PIC, abort.
These relocation types are supposed to be used for large memory model PIC/pic
mode under which we will have an initialized GP register points to the base of
GOT table, then these relocations are supposed to put the distance between GOT
entry and GOT table base address into the related instructions.
So, the parameters required to calculate the relocation should be the same as
BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15 etc, all of them are require the GOT entry
address and GOT table base address to perform the relocation.
This patch has removed those duplicated code when handling above listed
relocation types, grouped them with others as relocation types that are
require GOT table base address during performing relocation, reused the
existed GOT handling code.
The relocation calculation for these types before and after this patch should be
identical.
bfd/
* elfnn-aarch64.c (aarch64_relocation_aginst_gp_p): New function.
(elfNN_aarch64_final_link_relocate): Delete duplicated code for
BFD_RELOC_AARCH64_LD64_GOTOFF_LO15, BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC,
BFD_RELOC_AARCH64_MOVW_GOTOFF_G1.
* elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Optimize the
support for them.
Andreas Arnez [Thu, 29 Jun 2017 08:30:09 +0000 (10:30 +0200)]
S390: Support guarded-storage core note sections
Newer Linux kernel versions offer two new register sets in support of the
z/Architecture's guarded storage facility: NT_S390_GS_CB, the
"guarded-storage registers", and NT_S390_GS_BC, the "guarded-storage
broadcast control block". This patch adds support for the respective core
notes sections to binutils.
bfd/ChangeLog:
* elf-bfd.h (elfcore_write_s390_gs_cb): Add prototype.
(elfcore_write_s390_gs_bc): Likewise.
* elf.c (elfcore_grok_s390_gs_cb): New function.
(elfcore_grok_s390_gs_bc): New function.
(elfcore_grok_note): Call them.
(elfcore_write_s390_gs_cb): New function.
(elfcore_write_s390_gs_bc): New function.
(elfcore_write_register_note): Call them.
binutils/ChangeLog:
* readelf.c (get_note_type): Add NT_S390_GS_CB and NT_S390_GS_BC.
include/ChangeLog:
* elf/common.h (NT_S390_GS_CB): New macro.
(NT_S390_GS_BC): Likewise.
But doesn't include the corresponding header
("common/scoped_restore.h"). We haven't noticed a problem because
utils.h includes scoped_restore.h, and defs.h includes utils.h.
However, a patch that makes "symtab.h" include "completer.h", exposed
the issue:
https://sourceware.org/ml/gdb-patches/2017-06/msg00023.html.
Without this fix that would break building all .o files like this:
In file included from src/gdb/completer.h:21:0,
from src/gdb/symtab.h:28,
from src/gdb/language.h:26,
from src/gdb/frame.h:72,
from src/gdb/gdbarch.h:39,
from src/gdb/defs.h:636,
from src/gdb/top.c:20:
src/gdb/command.h:434:8: error: ‘scoped_restore_tmpl’ does not name a type
extern scoped_restore_tmpl<int> prevent_dont_repeat (void);
^
Makefile:1911: recipe for target 'top.o' failed
because defs.h includes gdbarch.h before it includes utils.h.
Jiong Wang [Wed, 28 Jun 2017 10:00:55 +0000 (11:00 +0100)]
[ARM] Assembler and disassembler support Dot Product Extension
This patch add assembler and disassembler support for new Dot Product
Extension.
The support can be enabled through the new "+dotprod" extension.
include/
* opcode/arm.h (FPU_NEON_EXT_DOTPROD): New macro.
(FPU_ARCH_DOTPROD_NEON_VFP_ARMV8): New macro.
gas/
* config/tc-arm.c (fpu_neon_ext_dotprod): New variable.
(neon_scalar_for_mul): Improve comments.
(do_neon_dotproduct): New function to encode Dot Product instructions.
(do_neon_dotproduct_s): Wrapper function for signed Dot Product
instructions.
(do_neon_dotproduct_u): Wrapper function for unsigned Dot Product
instructions.
(insns): New entries for vsdot and vudot.
(arm_extensions): New entry for "dotprod".
* doc/c-arm.texi: Document new "dotprod" extension.
* testsuite/gas/arm/dotprod.s: New test source.
* testsuite/gas/arm/dotprod-illegal.s: New test source.
* testsuite/gas/arm/dotprod.d: New test.
* testsuite/gas/arm/dotprod-thumb2.d: New test.
* testsuite/gas/arm/dotprod-illegal.d: New test.
* testsuite/gas/arm/dotprod-legacy-arch.d: New test.
* testsuite/gas/arm/dotprod-illegal.l: New error file.
* testsuite/gas/arm/dotprod-legacy-arch.l: New error file.
opcodes/
* arm-dis.c (coprocessor_opcodes): New entries for vsdot and vudot.
The basic issue is that section data referenced through an objfile
pointer can also be referenced via the program-space data pointer,
although via a separate mapping mechanism, which is set up by
update_section_map. Thus once section data attached to an objfile
pointer is released, the section map associated with the program-space
data pointer must be marked dirty to ensure that update_section_map is
called to prevent stale data being referenced. For the matter at hand
this marking is being done via a call to objfiles_changed.
Before commit 3e29f34 objfiles_changed could be called after all of
the objfile pointers were processed in reread_symbols since section
data references via the program-space data pointer would not occur in
the calls of read_symbols performed by reread_symbols.
With commit 3e29f34 MIPS target specific calls to find_pc_section were
added to the code for DWARF information processing, which is called
via read_symbols. Thus in reread_symbols the call to objfiles_changed
needs to be called before calling read_symbols, otherwise stale
section data can be referenced.
Thanks to Luis Machado for providing text for the main comment
associated with the change.
gdb/
2017-06-28 Doug Gilmore <[email protected]>
PR gdb/21337
* symfile.c (reread_symbols): Call objfiles_changed just before
read_symbols.
gdb/testsuite/
2017-06-28 Doug Gilmore <[email protected]>
PR gdb/21337
* gdb.base/reread-readsym.exp: New file.
* gdb.base/reread-readsym.c: New file.
MIPS: Add new Imagination interAptiv MR2 GAS and LD tests
Add GAS tests to verify Imagination interAptiv MR2 instruction assembly,
disassembly and ELF object file flags.
Add LD tests to verify Imagination interAptiv MR2 ELF object file
link-time compatibility and flag merging/propagation. Use the framework
enhancement added with commit 7575e6a752ec ("MIPS/LD/testsuite:
mips-elf-flags: Add MIPS ABI Flags handling").
gas/
* testsuite/gas/mips/elf_mach_interaptiv-mr2.d: New test.
* testsuite/gas/mips/save-err.d: New test.
* testsuite/gas/mips/save-sub.d: New test.
* testsuite/gas/mips/[email protected]: New test.
* testsuite/gas/mips/[email protected]: New test.
* testsuite/gas/mips/[email protected]: New test.
* testsuite/gas/mips/[email protected]: New test.
* testsuite/gas/mips/[email protected]: New test.
* testsuite/gas/mips/[email protected]: New test.
* testsuite/gas/mips/[email protected]: New test.
* testsuite/gas/mips/[email protected]: New test.
* testsuite/gas/mips/[email protected]: New test.
* testsuite/gas/mips/[email protected]: New test.
* testsuite/gas/mips/[email protected]: New test.
* testsuite/gas/mips/[email protected]: New test.
* testsuite/gas/mips/[email protected]: New test.
* testsuite/gas/mips/[email protected]: New test.
* testsuite/gas/mips/[email protected]: New test.
* testsuite/gas/mips/[email protected]: New test.
* testsuite/gas/mips/[email protected]: New test.
* testsuite/gas/mips/[email protected]: New test.
* testsuite/gas/mips/[email protected]: New test.
* testsuite/gas/mips/[email protected]: New test.
* testsuite/gas/mips/mips16e2-copy.d: New test.
* testsuite/gas/mips/mips16e2-copy-err.d: New test.
* testsuite/gas/mips/save.d: Remove `MIPS16e' from the `name'
option. Adjust for trailing padding change.
* testsuite/gas/mips/mips16e2-copy-err.l: New stderr output.
* testsuite/gas/mips/save-sub.s: New test source.
* testsuite/gas/mips/mips16e2-copy.s: New test source.
* testsuite/gas/mips/mips16e2-copy-err.s: New test source.
* testsuite/gas/mips/save.s: Update description, change trailing
padding and remove trailing white space.
* testsuite/gas/mips/mips.exp: Expand `save' and `save-err'
tests across the regular MIPS interAptiv MR2 architecture. Run
the new tests.
with the `mips-sgi-irix5' and `mips-sgi-irix6' targets, which are
consistent with the remaining architecture results for these cases, that
do not take into account the lack of R_MIPS_JALR relocations produced by
GAS for these targets. As a preexisting issue these failures are not
addressed with this change.
gas/
* testsuite/gas/mips/mips.exp (interaptiv-mr2): New architecture.
(mips16e2-interaptiv-mr2): Likewise.
* testsuite/gas/mips/[email protected]: New
test.
* testsuite/gas/mips/[email protected]:
New test.
* testsuite/gas/mips/[email protected]:
New test.
* testsuite/gas/mips/[email protected]:
New test.
* testsuite/gas/mips/[email protected]:
New test.
* testsuite/gas/mips/[email protected]: New
test.
* testsuite/gas/mips/[email protected]: New
test.
* testsuite/gas/mips/[email protected]: New
test.
* testsuite/gas/mips/[email protected]:
New test.
* testsuite/gas/mips/[email protected]:
New test.
* testsuite/gas/mips/[email protected]:
New test.
* testsuite/gas/mips/[email protected]: New test.
* testsuite/gas/mips/[email protected]: New test.
* testsuite/gas/mips/[email protected]: New test.
* testsuite/gas/mips/attr-gnu-4-5.d: Ignore any number of ASE
flag lines present rather than just one.
* testsuite/gas/mips/attr-gnu-4-6.d: Likewise.
* testsuite/gas/mips/attr-gnu-4-7.d: Likewise.
* testsuite/gas/mips/attr-none-o32-fp64-nooddspreg.d: Likewise.
* testsuite/gas/mips/attr-none-o32-fp64.d: Likewise.
* testsuite/gas/mips/attr-none-o32-fpxx.d: Likewise.
* testsuite/gas/mips/[email protected]: New
stderr output.
* testsuite/gas/mips/[email protected]:
New stderr output.
* testsuite/gas/mips/[email protected]:
New stderr output.
* testsuite/gas/mips/[email protected]:
New stderr output.
* testsuite/gas/mips/[email protected]:
New stderr output.
* testsuite/gas/mips/[email protected]: New
stderr output.
* testsuite/gas/mips/[email protected]: New
stderr output.
* testsuite/gas/mips/[email protected]:
New stderr output.
* testsuite/gas/mips/[email protected]: New stderr
output.
* testsuite/gas/mips/[email protected]: New stderr
output.
MIPS: Add Imagination interAptiv MR2 MIPS32r3 processor support
Add support for the Imagination interAptiv MR2 MIPS32r3 processor with
the MIPS16e2 ASE as per documentation, including in particular:
1. Support for implementation-specific interAptiv MR2 COPYW and UCOPYW
MIPS16e2 instructions[1], for assembly and disassembly,
2. Support for implementation-specific interAptiv MR2 SAVE and RESTORE
regular MIPS instructions[2], for assembly and disassembly,
3. ELF binary file annotation for the interAptiv MR2 MIPS architecture
extension.
4. Support for interAptiv MR2 architecture selection for assembly, in
the form of the `-march=interaptiv-mr2' command-line option and its
corresponding `arch=interaptiv-mr2' setting for the `.set' and
`.module' pseudo-ops.
5. Support for interAptiv MR2 architecture selection for disassembly,
in the form of the `mips:interaptiv-mr2' target architecture, for
use e.g. with the `-m' command-line option for `objdump'.
Parts of this change by Matthew Fortune and Andrew Bennett.
References:
[1] "MIPS32 interAptiv Multiprocessing System Software User's Manual",
Imagination Technologies Ltd., Document Number: MD00904, Revision
02.01, June 15, 2016, Section 24.3 "MIPS16e2 Implementation Specific
Instructions", pp. 878-883
[2] same, Chapter 25 "Implementation-specific Instructions", pp. 911-917
include/
* elf/mips.h (E_MIPS_MACH_IAMR2): New macro.
(AFL_EXT_INTERAPTIV_MR2): Likewise.
* opcode/mips.h: Document new operand codes defined.
(INSN_INTERAPTIV_MR2): New macro.
(INSN_CHIP_MASK): Adjust accordingly.
(CPU_INTERAPTIV_MR2): New macro.
(cpu_is_member) <CPU_INTERAPTIV_MR2>: New case.
(MIPS16_ALL_ARGS): Rename to...
(MIPS_SVRS_ALL_ARGS): ... this.
(MIPS16_ALL_STATICS): Rename to...
(MIPS_SVRS_ALL_STATICS): ... this.
bfd/
* archures.c (bfd_mach_mips_interaptiv_mr2): New macro.
* cpu-mips.c (I_interaptiv_mr2): New enum value.
(arch_info_struct): Add "mips:interaptiv-mr2" entry.
* elfxx-mips.c (_bfd_elf_mips_mach) <E_MIPS_MACH_IAMR2>: New
case.
(mips_set_isa_flags) <bfd_mach_mips_interaptiv_mr2>: Likewise.
(bfd_mips_isa_ext) <bfd_mach_mips_interaptiv_mr2>: Likewise.
(print_mips_isa_ext) <AFL_EXT_INTERAPTIV_MR2>: Likewise.
(mips_mach_extensions): Add `bfd_mach_mipsisa32r3' and
`bfd_mach_mips_interaptiv_mr2' entries.
* bfd-in2.h: Regenerate.
opcodes/
* mips-formats.h (INT_BIAS): New macro.
(INT_ADJ): Redefine in INT_BIAS terms.
* mips-dis.c (mips_arch_choices): Add "interaptiv-mr2" entry.
(mips_print_save_restore): New function.
(print_insn_arg) <OP_SAVE_RESTORE_LIST>: Update comment.
(validate_insn_args) <OP_SAVE_RESTORE_LIST>: Remove `abort'
call.
(print_insn_args): Handle OP_SAVE_RESTORE_LIST.
(print_mips16_insn_arg): Call `mips_print_save_restore' for
OP_SAVE_RESTORE_LIST handling, factored out from here.
* mips-opc.c (decode_mips_operand) <'-'> <'m'>: New case.
(RD_31, RD_SP, WR_SP, MOD_SP, IAMR2): New macros.
(mips_builtin_opcodes): Add "restore" and "save" entries.
* mips16-opc.c (decode_mips16_operand) <'n', 'o'>: New cases.
(IAMR2): New macro.
(mips16_opcodes): Add "copyw" and "ucopyw" entries.
gas/
* config/tc-mips.c (validate_mips_insn): Handle
OP_SAVE_RESTORE_LIST specially.
(mips_encode_save_restore, mips16_encode_save_restore): New
functions.
(match_save_restore_list_operand): Factor out SAVE/RESTORE
operand insertion into the instruction word or halfword to these
new functions.
(mips_cpu_info_table): Add "interaptiv-mr2" entry.
* doc/c-mips.texi (MIPS Options): Add `interaptiv-mr2' to the
`-march=' argument list.
Pedro Alves [Tue, 27 Jun 2017 15:22:08 +0000 (16:22 +0100)]
objfile_per_bfd_storage non-POD
A following patch will want to add a std::vector to
objfile_per_bfd_storage. That makes it non-trivially
constructible/destructible. Since objfile_per_bfd_storage objects are
allocated on an obstack, we need to call their ctors/dtors manually.
This is what this patch does. And then since we can now rely on
ctors/dtors being run, make objfile_per_bfd_storage::storage_obstack
be an auto_obstack.
Here, the 'name_obstack' variable is a global. The change means that
the obstack's contents from a previous parse will stay around until
the next parsing starts. I.e., memory won't be reclaimed until then.
I don't think that's a problem, these objects don't really grow much
at all.
The other option I tried was to add a separate type that is like
auto_obstack but manages an external obstack, just for those cases. I
like the current approach better as that other approach adds more
boilerplate and yet another type to learn.
* c-exp.y (name_obstack): Now an auto_obstack.
(yylex): Use auto_obstack::clear.
(c_parse): Use auto_obstack::clear instead of reinitializing and
freeing the obstack.
* c-lang.c (evaluate_subexp_c): Use auto_obstack.
* d-exp.y (name_obstack): Now an auto_obstack.
(yylex): Use auto_obstack::clear.
(d_parse): Use auto_obstack::clear instead of reinitializing and
freeing the obstack.
* dwarf2loc.c (fetch_const_value_from_synthetic_pointer): Use
auto_obstack.
* dwarf2read.c (create_addrmap_from_index)
(dwarf2_build_psymtabs_hard)
(update_enumeration_type_from_children): Likewise.
* gdb_obstack.h (auto_obstack): New type.
* go-exp.y (name_obstack): Now an auto_obstack.
(build_packaged_name): Use auto_obstack::clear.
(go_parse): Use auto_obstack::clear instead of reinitializing and
freeing the obstack.
* linux-tdep.c (linux_make_mappings_corefile_notes): Use
auto_obstack.
* printcmd.c (printf_wide_c_string, ui_printf): Use auto_obstack.
* rust-exp.y (work_obstack): Now an auto_obstack.
(rust_parse, rust_lex_tests): Use auto_obstack::clear instead of
reinitializing and freeing the obstack.
* utils.c (do_obstack_free, make_cleanup_obstack_free): Delete.
(host_char_to_target): Use auto_obstack.
* utils.h (make_cleanup_obstack_free): Delete declaration.
* valprint.c (generic_emit_char, generic_printstr): Use
auto_obstack.
Fix incorrect adjustment of diff relocs when relaxing, and thus the
resulting source line to address mismatch.
Fix two issues when adjusting diff relocs to account for
deleted bytes.
1. Don't adjust the difference if the end address is the shrinked
insn's address i.e. use < instead of <=. The relaxation code deletes
count bytes from or after shrinked_insn_address, so the difference
between start_address and end_address should remain unchanged in this
case.
2. Adjust the reloc addend if the difference is to be adjusted and
symval + reloc addend is past the shrinked insn address. This is
because for a typical sym1 - sym2 diff reloc, sym1 is .text +
irel->r_addend, and the addend should be reduced to account for the
shrinked insn.
For example, assume the reloc value is .text + 0x8 with .text = 0, the
diff value in the object file = 0x4, and shrinked_insn_address = 0x4
with count = 0x2. Then the existing code writes 0x2 into the object
file to account for the deleted bytes, as shrinked_insn_address lies
between 0x8 and 0x8 - 0x4 = 0x4, but leaves the addend as is. The next
time the reloc is looked at, the code sees if a shrinked_insn_address
lies between 0x8 and 0x8 - 0x2 = 0x6, instead of 0x6 and 0x4. If there
happens to be one, then the diff value in the object file ends up
getting reduced again.
with the corresponding partial backtrace (sorry, taken with lldb,
because well, gdb is broken :)):
frame #9: 0x000000010004605a gdb`darwin_check_new_threads(inf=0x0000000100edf670) at darwin-nat.c:383
frame #10: 0x0000000100045848 gdb`darwin_init_thread_list(inf=0x0000000100edf670) at darwin-nat.c:1710
frame #11: 0x00000001000452f8 gdb`darwin_ptrace_him(pid=8375) at darwin-nat.c:1792
frame #12: 0x0000000100041d95 gdb`fork_inferior(...) at fork-inferior.c:440
frame #13: 0x0000000100043f82 gdb`darwin_create_inferior(...) at darwin-nat.c:1841
frame #14: 0x000000010034ac32 gdb`run_command_1(args=0x0000000000000000, from_tty=1, tbreak_at_main=1) at infcmd.c:611
The issue was introduced by commit
"Share fork_inferior et al with gdbserver"
because it changed the place where the dummy thread (pid, 0, 0) is added,
relative to the call to the init_trace_fun callback. In this callback, darwin
checks for new threads in the program (there should be exactly one) in order to
update this dummy thread with the right tid. Previously, things happened in
this order:
- fork_inferior calls fork()
- fork_inferior adds dummy thread
- fork_inferior calls init_trace_fun callback, which updates the dummy
thread info
Following the commit mentioned above, the new thread is added in the
darwin-nat code, after having called fork_inferior (in
darwin_create_inferior). So gdb tries to do things in this order:
- fork_inferior calls fork()
- fork_inferior calls init_trace_fun callback, which tries to update
the dummy thread info
- darwin_create_inferior adds the dummy thread
The error happens while trying to update the dummy thread that has not
been added yet.
I don't think this dummy thread is necessary for darwin. Previously, it
was fork_inferior that was adding this thread, for all targets, so
darwin had to deal with it. Now that it's done by targets themselves,
we can just skip that on darwin. darwin_check_new_threads called
indirectly by init_trace_fun/darwin_ptrace_him will simply notice the
new thread and add it with the right information.
My level of testing was: try to start a process and try to attach to a
process, and it seems to work somewhat like it did before. I tried to
run the testsuite, but it leaves a huge amount of zombie processes that
launchd doesn't seem to reap, leading to exhaustion of system resources
(number of processes).
MIPS/LD/testsuite: mips-elf-flags: Add MIPS ABI Flags handling
Complement commit 351cdf24d223 ("[MIPS] Implement O32 FPXX, FP64 and
FP64A ABI extensions") and add optional MIPS ABI Flags handling to
`good_combination' in the `mips-elf-flags.exp' test script. This lets
callers of this procedure request to examine MIPS ABI Flags in addition
to the `e_flags' member of the ELF file header so as to verify that
flags are merged correctly by LD. The presence of further arguments
triggers this verification, in which case `readelf' is called with the
`-A' option additionally specified and the ISA member, the ISA Extension
member and the ASEs member will be examined as per the arguments.
Unlike with `readelf -h' output consider a failure to retrieve the
member requested a test case failure rather than an unresolved result.
This is because unlike with the `e_flags' member of the ELF file header
which is always there in any valid ELF file the MIPS ABI Flags structure
is optional in LD output and the absence of this structure when expected
is surely a bug in LD.
ld/
* testsuite/ld-mips-elf/mips-elf-flags.exp (good_combination):
Add an `args' final argument and examination code for `readelf
-A' output. Update procedure description accordingly.
MIPS/LD/testsuite: mips-elf-flags: Use `remote_exec' to call `readelf'
For ELF file header flag verification done in `good_combination' in the
`mips-elf-flags.exp' test script the version of `readelf' built along
with the rest of binutils has to be used rather than any such executable
already present on the build system, so that flags recognized by the
tool match those supported by LD being tested. Use `remote_exec' as
elsewhere in the LD test framework and also with GAS and LD used here,
getting and arranging for extra reporting of `readelf' calls included in
test logs on this occasion as well.
ld/
* testsuite/ld-mips-elf/mips-elf-flags.exp (good_combination):
Use `remote_exec' to call `readelf'. Log the command issued.
MIPS/LD/testsuite: mips-elf-flags: Use `-h' only with `readelf'
For the purpose of link-time object compatibility handling verification
code in the `good_combination' procedure from the `mips-elf-flags.exp'
test script only examines the `e_flags' member of the ELF file header
and ignores data from any ELF program or section headers present. Use
`readelf -h' rather than `readelf --headers' then to obtain data for
examination, avoiding unnecessary processing to extract this extraneous
information.
ld/
* testsuite/ld-mips-elf/mips-elf-flags.exp (good_combination):
Use `readelf -h' rather than `readelf --headers'.
Kuan-Lin Chen [Thu, 8 Jun 2017 18:54:14 +0000 (11:54 -0700)]
RISC-V: Use pc-relative relocation for FDE initial location
The symbol address in .eh_frame may be adjusted in
_bfd_elf_discard_section_eh_frame, and the content of .eh_frame will be
adjusted in _bfd_elf_write_section_eh_frame. Therefore, we cannot insert
a relocation whose addend symbol is in .eh_frame. Othrewise, the value
may be adjusted twice.
MIPS/BFD: Consistently mark the LSI CW4010 as a MIPS II processor
Make BFD agree with GAS and mark the LSI MiniRISC CW4010 processor core
(for an odd reason referred to as LSI R4010 across our code base) as a
MIPS II processor in BFD as well, fixing a bug that has been there since
forever and addressing linker warnings like:
$ as -m4010 empty.s -o 4010.o
$ ld -r 4010.o -o 4010-r.o
ld: 4010.o: warning: Inconsistent ISA between e_flags and .MIPS.abiflags
$
due to the ISA level being recorded as MIPS III in ELF file header's
`e_flags' vs MIPS II in the MIPS ABI Flags section:
$ readelf -Ah 4010.o
ELF Header:
Magic: 7f 45 4c 46 01 02 01 00 00 00 00 00 00 00 00 00
Class: ELF32
Data: 2's complement, big endian
Version: 1 (current)
OS/ABI: UNIX - System V
ABI Version: 0
Type: REL (Relocatable file)
Machine: MIPS R3000
Version: 0x1
Entry point address: 0x0
Start of program headers: 0 (bytes into file)
Start of section headers: 348 (bytes into file)
Flags: 0x20821000, 4010, o32, mips3
Size of this header: 52 (bytes)
Size of program headers: 0 (bytes)
Number of program headers: 0
Size of section headers: 40 (bytes)
Number of section headers: 11
Section header string table index: 10
Attribute Section: gnu
File Attributes
Tag_GNU_MIPS_ABI_FP: Hard float (double precision)
Available documentation[1][2] clearly indicates the LSI CW4010 processor
is only backwards compatible with the MIPS R4000 processor as far as the
latter's 32-bit instructions are concerned and consequently can only be
considered a MIPS II ISA implementation (with vendor extensions).
triggered for the `mips-sgi-irix5' and `mips-sgi-irix6' targets.
References:
[1] Paul Cobb, Bob Caulk, Joe Cesana, "The MiniRISC CW4010: A
Superscalar MIPS Processor ASIC Core", LSI Logic, July 1995,
presented at Hot Chips VII, Stanford University, Stanford,
California, August 1995
[2] "MiniRISC MR4010 Superscalar Microprocessor Reference Device", LSI
Logic, November 1996, Doc. No. DB09-000028-00, Order No. C15017
bfd/
* cpu-mips.c (arch_info_struct): Mark the 4010 32-bit.
* elfxx-mips.c (mips_set_isa_flags) <bfd_mach_mips4010>: Set
E_MIPS_ARCH_2 rather than E_MIPS_ARCH_3 in `e_flags'.
(mips_mach_extensions): Mark `bfd_mach_mips4010' as extending
`bfd_mach_mips6000' rather than `bfd_mach_mips4000'.
ld/
* testsuite/ld-mips-elf/lsi-4010-isa.d: New test.
* ld/testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
H.J. Lu [Mon, 26 Jun 2017 16:24:49 +0000 (09:24 -0700)]
Check file size before getting section contents
Don't check the section size in bfd_get_full_section_contents since
the size of a decompressed section may be larger than the file size.
Instead, check file size in _bfd_generic_get_section_contents.
PR binutils/21665
* compress.c (bfd_get_full_section_contents): Don't check the
file size here.
* libbfd.c (_bfd_generic_get_section_contents): Check for and
reject a section whoes size + offset is greater than the size
of the entire file.
(_bfd_generic_get_section_contents_in_window): Likewise.
LD: Fix .startof.SECNAME/.sizeof.SECNAME tests for MIPS/IRIX
Correct .startof.SECNAME/.sizeof.SECNAME tests for MIPS/IRIX targets,
complementing commit dc74becf498f ("ld: Add tests for -Ur") and commit da614360f520 ("ld: Add tests for .startof.SECNAME/.sizeof.SECNAME") with
subsequent updates, and in reference to commit cbd0eecf261c ("Always
define referenced __start_SECNAME/__stop_SECNAME") and commit 7dba9362c172 ("Rewrite __start and __stop symbol handling").
These targets set the STT_OBJECT type for non-function symbol
references, according to `elf_frob_symbol' code in gas/config/obj-elf.c:
/* The Irix 5 and 6 assemblers set the type of any common symbol and
any undefined non-function symbol to STT_OBJECT. We try to be
compatible, since newer Irix 5 and 6 linkers care. However, we
only set undefined symbols to be STT_OBJECT if we are on Irix,
because that is the only time gcc will generate the necessary
.global directives to mark functions. */
if (S_IS_COMMON (symp))
symbol_get_bfdsym (symp)->flags |= BSF_OBJECT;
and consequently entries in the symbol table listing from `readelf'
produced with these tests do not match the NOTYPE pattern expected,
causing test suite failures:
specifically with the `mips-sgi-irix5' and `mips-sgi-irix6' targets.
Given that it does not matter for the feature covered by these tests
whether the type of the symbols produced is STT_NOTYPE or STT_OBJECT
adjust the problematic cases to accept either type, removing the
failures observed.
ld/
* testsuite/ld-elf/sizeofa.d: Also accept the OBJECT type for
the symbols examined.
* testsuite/ld-elf/sizeofc.d: Likewise.
* testsuite/ld-elf/startofa.d: Likewise.
* testsuite/ld-elf/startofc.d: Likewise.
Simon Marchi [Mon, 26 Jun 2017 13:08:36 +0000 (15:08 +0200)]
record-full: Remove unused function netorder16
clang shows this warning:
/home/emaisin/src/binutils-gdb/gdb/record-full.c:2344:1: error: unused function 'netorder16' [-Werror,-Wunused-function]
netorder16 (uint16_t input)
^
Remove this function, which, AFAIK, has never been used. Note that GCC
doesn't warn about this, because the function is marked as inline.
According to gcc's man page, it should ideed not warn:
-Wunused-function
Warn whenever a static function is declared but not defined or a non-inline static function is unused. This warning is enabled by -Wall.
So it's probably not a GCC bug that it doesn't find this unused function, but a
different definition of "unused".
Simon Marchi [Mon, 26 Jun 2017 13:08:35 +0000 (15:08 +0200)]
vec: Silence -Wunused-function warnings on clang
clang has a too aggressive (or broken, depends on how you want to see
it) -Wunused-function warning, which is triggered by the functions
defined by DEF_VEC_* but not used in the current source file. Normally,
it won't warn about unused static inline functions defined in header
files, because it's expected that a source file won't use all functions
defined in a header file it includes. However, if the DEF_VEC_* macro
is used in a source file, it considers those functions as defined in the
source file, which leads it to think that we should remove those
functions. It is therefore missing a check to see whether those
functions are resulting from macro expansion. A bug already exists for
that:
https://bugs.llvm.org//show_bug.cgi?id=22712
It's quite easy to silence this warning in a localized way, that is in
the DEF_VEC_* macros.
gdb/ChangeLog:
* common/diagnostics.h: Define macros for GCC.
(DIAGNOSTIC_IGNORE_UNUSED_FUNCTION): New macro.
* common/vec.h: Include diagnostics.h.
(DIAGNOSTIC_IGNORE_UNUSED_VEC_FUNCTION): New macro.
(DEF_VEC_I, DEF_VEC_P, DEF_VEC_O): Ignore -Wunused-function
warning.
Simon Marchi [Mon, 26 Jun 2017 13:08:35 +0000 (15:08 +0200)]
ada-lex: Ignore warnings about register keyword
Some older versions of flex (such as the one shipped with macOS) generate
code that use the register keyword, which clang warns about. This patch
makes the compiler ignore those warnings for the portion of the code
generated by flex.
Nick Clifton [Mon, 26 Jun 2017 14:25:08 +0000 (15:25 +0100)]
Fix address violations when atempting to parse fuzzed binaries.
PR binutils/21665
bfd * opncls.c (get_build_id): Check that the section is beig enough
to contain the whole note.
* compress.c (bfd_get_full_section_contents): Check for and reject
a section whoes size is greater than the size of the entire file.
* elf32-v850.c (v850_elf_copy_notes): Allow for the ouput to not
contain a notes section.
binutils* objdump.c (disassemble_section): Skip any section that is bigger
than the entire file.
* /config/tc-arc.c (is_br_jmp_insn_p): Update macro with known
instructions to be accounted as jumps.
(assemble_insn): Check for limms into the delay slots. Emit an
error if so.
* testsuite/gas/arc/asm-errors-3.d: New file.
* testsuite/gas/arc/asm-errors-3.err: Likewise.
* testsuite/gas/arc/asm-errors-3.s: Likewise.
Alan Modra [Sun, 25 Jun 2017 23:40:22 +0000 (09:10 +0930)]
Don't attach linker created section to --just-syms bfd
All sections on a --just-syms bfd are discarded from the output, so
attaching linker created sections to such a bfd results in errors.
In other cases, like the .note.GNU-stack check, it's wrong to have a
--just-syms object potentially affect the output.
bfd/
* elflink.c (_bfd_elf_link_create_dynstrtab): Don't make dynobj
a --just-syms bfd.
(_bfd_elf_size_group_sections): Skip --just-syms bfds.
(bfd_elf_size_dynamic_sections): Ignore .note.GNU-stack and
.preinit_array on --just-syms bfds.
(_bfd_elf_gc_mark_extra_sections): Skip --just-syms bfds.
(elf_gc_sweep, bfd_elf_parse_eh_frame_entries): Likewise.
(bfd_elf_gc_sections, bfd_elf_discard_info): Likewise.
ld/
* emultempl/elf32.em (gld${EMULATION_NAME}_after_open): Skip
--just-syms bfds when looking for a place to attach .note.gnu.build-id
and .eh_frame_hdr sections. Delete dead code.
Simon Marchi [Sun, 25 Jun 2017 10:57:13 +0000 (12:57 +0200)]
main: Don't add int to string
clang shows this warning:
/home/emaisin/src/binutils-gdb/gdb/main.c:227:56: error: adding 'int' to a string does not append to the string [-Werror,-Wstring-plus-int]
char *tmp_sys_gdbinit = xstrdup (SYSTEM_GDBINIT + datadir_len);
~~~~~~~~~~~~~~~^~~~~~~~~~~~~
/home/emaisin/src/binutils-gdb/gdb/main.c:227:56: note: use array indexing to silence this warning
char *tmp_sys_gdbinit = xstrdup (SYSTEM_GDBINIT + datadir_len);
^
& [ ]
It's quite easy to get rid of it by using &foo[len] instead of foo + len.
I think this warning is relevant to keep enabled, because it can be an
easy mistake to do.
This warning is already discussed here in GCC bugzilla:
Simon Marchi [Sun, 25 Jun 2017 10:49:19 +0000 (12:49 +0200)]
dtrace-probe: Put semicolon after while on its own line
clang shows this warning.
/home/emaisin/src/binutils-gdb/gdb/dtrace-probe.c:424:52: error: while loop has empty body [-Werror,-Wempty-body]
while (*p++ != '\0' && p - strtab < strtab_size);
^
/home/emaisin/src/binutils-gdb/gdb/dtrace-probe.c:424:52: note: put the semicolon on a separate line to silence this warning
Putting the semicolon on its own line is not a big sacrifice to get rid of this
warning. I think it's also useful to keep this, because it can catch errors
like this:
while (something);
{
...
}
although gcc would warn about it in a different way (misleading indentation).
This warning is already discussed here in the GCC bugzilla:
Simon Marchi [Sun, 25 Jun 2017 10:38:59 +0000 (12:38 +0200)]
x86-dregs: Print debug registers one per line
This get around this warning given by clang...
/home/emaisin/src/binutils-gdb/gdb/nat/x86-dregs.c:209:7: error: variable 'i' is incremented both in the loop header and in the loop body [-Werror,-Wfor-loop-analysis]
i++;
^
/home/emaisin/src/binutils-gdb/gdb/nat/x86-dregs.c:199:32: note: incremented here
ALL_DEBUG_ADDRESS_REGISTERS (i)
^
... I decided in the end to simply print the debug registers one per
line. I don't think it particularly helps readability to have them two
per line anyway.
gdb/ChangeLog:
* nat/x86-dregs.c (x86_show_dr): Print registers one per line.
* d-demangle.c (dlang_call_convention_p): Move declaration
before dlang_type.
(dlang_type): Handle function types.
* testsuite/d-demangle-expected: Add tests.
* d-demangle.c (dlang_parse_real): Remove stack buffer, write
the demangled hexadecimal directly to string.
* testsuite/d-demangle-expected: Add tests.
* d-demangle.c (dlang_hexdigit): New function.
(ascii2hex): Remove function.
(dlang_parse_string): Update to call dlang_hexdigit.
* testsuite/d-demangle-expected: Add tests.
* d-demangle.c (strtol): Remove declaration.
Updated all callers to use dlang_number.
(dlang_number): New function.
(dlang_value): Moved check for ISDIGIT into dlang_parse_integer.
* testsuite/d-demangle-expected: Add tests.
* d-demangle.c (dlang_parse_symbol): Remove function.
(dlang_parse_qualified): New function.
(dlang_parse_mangle): New function.
(dlang_type): Update to call dlang_parse_qualified.
(dlang_identifier): Update to call either dlang_parse_qualified or
dlang_parse_mangle.
(dlang_type_modifier_p): Remove function.
(dlang_call_convention_p): Don't allow type modifiers in mangle.
(dlang_template_args): Update to call dlang_identifier.
(dlang_demangle): Update to call dlang_parse_mangle.
* testsuite/d-demangle-expected: Add tests.
* d-demangle.c (dlang_value): Add comment explaining why cases for
digits are required.
* testsuite/d-demangle-expected: Update integer value tests.
* d-demangle.c (dlang_identifier): Handle template constraint symbols.
(dlang_parse_template): Only advance if template symbol prefix is
followed by a digit.
* testsuite/d-demangle-expected: Add tests.
gas/
* NEWS: Mention support of ARM Cortex-R52 processor.
* config/tc-arm.c (arm_cpus): Add entry for ARM Cortex-R52 processor.
* doc/c-arm.texi: Mention support for -mcpu=cortex-r52.
This patch is part of a patch series to add support for ARMv8-R
architecture. Its purpose is to add support for ARMv8-R in the linker.
=== Patch description ===
This patch is composed of 3 changes:
1) The main change is the addition of the logic for merging a file whose
Tag_CPU_arch build attribute is 15 (ARMv8-R). Namely, all pre-ARMv8 are
merged into ARMv8-R as well as ARMv8-R itself. ARMv8-A (14) merges into
ARMv8-A. ARMv8-M Baseline (16) and Mainline (17) are not allowed to
merge merge with ARMv8-R. Note that merging only occurs if the two
profiles are identical or one is S (Application or Realtime) and the
other is R.
2) using_thumb_only, using_thumb2_bl, using_thumb2 and arch_has_arm_nop
are updated according to capabilities of ARMv8-R and their BFD_ASSERT
updated to reflect that the logic is valid for ARMv8-R.
3) 2 build attribute merging tests are added to test the first change.
bfd/
* elf32-arm.c (using_thumb_only): Update list of architectures in
BFD_ASSERT for which the logic is valid.
(using_thumb2_bl): Likewise.
(using_thumb2): Likewise and return true for ARMv8-R.
(arch_has_arm_nop): Likewise.
(tag_cpu_arch_combine): New v8r table for ARMv8-R Tag_CPU_arch
merging logic. Update commentis for value 15 of v8m_baseline,
v8m_mainline and v4t_plus_v6_m arrays. Use v8r array to decide
merging of value 15 of Tag_CPU_arch.
ld/
* testsuite/ld-arm/arm-elf.exp (EABI attribute merging 11): New test.
(EABI attribute merging 12): Likewise.
* testsuite/ld-arm/attr-merge-11a.s: New file.
* testsuite/ld-arm/attr-merge-11b.s: New file.
* testsuite/ld-arm/attr-merge-11.attr: New file.
* testsuite/ld-arm/attr-merge-12a.s: New file.
* testsuite/ld-arm/attr-merge-12b.s: New file.
* testsuite/ld-arm/attr-merge-12.attr: New file.
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