/* tc-fr30.c -- Assembler for the Fujitsu FR30.
- Copyright (C) 1998 Free Software Foundation.
+ Copyright (C) 1998, 1999, 2000 Free Software Foundation.
This file is part of GAS, the GNU Assembler.
#include <stdio.h>
#include <ctype.h>
#include "as.h"
-#include "subsegs.h"
+#include "subsegs.h"
#include "symcat.h"
-#include "cgen-opc.h"
+#include "opcodes/fr30-desc.h"
+#include "opcodes/fr30-opc.h"
#include "cgen.h"
/* Structure to hold all of the different components describing
const char comment_chars[] = ";";
const char line_comment_chars[] = "#";
-const char line_separator_chars[] = "";
+const char line_separator_chars[] = "|";
const char EXP_CHARS[] = "eE";
const char FLT_CHARS[] = "dD";
\f
FILE * stream;
{
fprintf (stream, _(" FR30 specific command line options:\n"));
-}
+}
/* The target specific pseudo-ops which we support. */
const pseudo_typeS md_pseudo_table[] =
subsegT subseg;
/* Initialize the `cgen' interface. */
-
+
/* Set the machine number and endian. */
- gas_cgen_opcode_desc = fr30_cgen_opcode_open (bfd_mach_fr30, CGEN_ENDIAN_BIG);
- fr30_cgen_init_asm (gas_cgen_opcode_desc);
+ gas_cgen_cpu_desc = fr30_cgen_cpu_open (CGEN_CPU_OPEN_MACHS, 0,
+ CGEN_CPU_OPEN_ENDIAN,
+ CGEN_ENDIAN_BIG,
+ CGEN_CPU_OPEN_END);
+ fr30_cgen_init_asm (gas_cgen_cpu_desc);
/* This is a callback from cgen to gas to parse operands. */
- cgen_set_parse_operand_fn (gas_cgen_opcode_desc, gas_cgen_parse_operand);
+ cgen_set_parse_operand_fn (gas_cgen_cpu_desc, gas_cgen_parse_operand);
}
void
md_assemble (str)
char * str;
{
+ static int last_insn_had_delay_slot = 0;
fr30_insn insn;
char * errmsg;
char * str2 = NULL;
gas_cgen_init_parse ();
insn.insn = fr30_cgen_assemble_insn
- (gas_cgen_opcode_desc, str, & insn.fields, insn.buffer, & errmsg);
-
+ (gas_cgen_cpu_desc, str, & insn.fields, insn.buffer, & errmsg);
+
if (!insn.insn)
{
as_bad (errmsg);
/* Doesn't really matter what we pass for RELAX_P here. */
gas_cgen_finish_insn (insn.insn, insn.buffer,
CGEN_FIELDS_BITSIZE (& insn.fields), 1, NULL);
+
+ /* Warn about invalid insns in delay slots. */
+ if (last_insn_had_delay_slot
+ && CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_NOT_IN_DELAY_SLOT))
+ as_warn (_("Instruction %s not allowed in a delay slot."),
+ CGEN_INSN_NAME (insn.insn));
+
+ last_insn_had_delay_slot
+ = CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_DELAY_SLOT);
}
/* The syntax in the manual says constants begin with '#'.
We just ignore it. */
-void
+void
md_operand (expressionP)
expressionS * expressionP;
{
all further handling to md_convert_frag. */
fragP->fr_subtype = 2;
-#if 0 /* Can't use this, but leave in for illustration. */
+#if 0 /* Can't use this, but leave in for illustration. */
/* Change 16 bit insn to 32 bit insn. */
fragP->fr_opcode[0] |= 0x80;
if ((strcmp (CGEN_INSN_MNEMONIC (insn),
CGEN_INSN_MNEMONIC (fragP->fr_cgen.insn))
== 0)
- && CGEN_INSN_ATTR (insn, CGEN_INSN_RELAX))
+ && CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX))
break;
}
if (i == 4)
}
return (fragP->fr_var + fragP->fr_fix - old_fr_fix);
-}
+}
/* *fragP has been relaxed to its final size, and now needs to have
the bytes inside it modified to conform to the new size.
{
/* Address we want to reach in file space. */
target_address = S_GET_VALUE (fragP->fr_symbol) + fragP->fr_offset;
- target_address += fragP->fr_symbol->sy_frag->fr_address;
+ target_address += symbol_get_frag (fragP->fr_symbol)->fr_address;
addend = (target_address - (opcode_address & -4)) >> 2;
}
return 0;
}
- return (fixP->fx_frag->fr_address + fixP->fx_where + 2) & ~1;
+ return (fixP->fx_frag->fr_address + fixP->fx_where) & ~1;
}
/* Return the bfd reloc type for OPERAND of INSN at fixup FIXP.
const CGEN_OPERAND * operand;
fixS * fixP;
{
- switch (CGEN_OPERAND_TYPE (operand))
+ switch (operand->type)
{
case FR30_OPERAND_LABEL9: fixP->fx_pcrel = 1; return BFD_RELOC_FR30_9_PCREL;
case FR30_OPERAND_LABEL12: fixP->fx_pcrel = 1; return BFD_RELOC_FR30_12_PCREL;
case FR30_OPERAND_DISP8: return BFD_RELOC_FR30_8_IN_8;
case FR30_OPERAND_UDISP6: return BFD_RELOC_FR30_6_IN_4;
case FR30_OPERAND_I8: return BFD_RELOC_8;
- case FR30_OPERAND_I32: return BFD_RELOC_32;
- /* waiting for this to be defined by Dave....
+ case FR30_OPERAND_I32: return BFD_RELOC_FR30_48;
case FR30_OPERAND_I20: return BFD_RELOC_FR30_20;
- */
default : /* avoid -Wall warning */
break;
}
return BFD_RELOC_NONE;
}
-
-/* Return BFD reloc type from opinfo field in a fixS.
- It's tricky using fx_r_type in fr30_frob_file because the values
- are BFD_RELOC_UNUSED + operand number. */
-#define FX_OPINFO_R_TYPE(f) ((f)->tc_fix_data.opinfo)
-
/* See whether we need to force a relocation into the output file.
This is used to force out switch and PC relative relocations when
relaxing. */
fr30_force_relocation (fix)
fixS * fix;
{
- if (fix->fx_r_type == BFD_RELOC_VTABLE_INHERIT
+ if ( fix->fx_r_type == BFD_RELOC_VTABLE_INHERIT
|| fix->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
return 1;
- return fix->fx_pcrel;
+ return 0;
}
\f
/* Write a value out to the object file, using the appropriate endianness. */
sizeof (LITTLENUM_TYPE));
litP += sizeof (LITTLENUM_TYPE);
}
-
+
return 0;
}
int advance_i_l_p_by;
{
char c;
-
+
/* Restore the colon, and advance input_line_pointer to
the end of the new symbol. */
* input_line_pointer = ':';
input_line_pointer += advance_i_l_p_by;
c = * input_line_pointer;
* input_line_pointer = 0;
-
+
return c;
}
if (start [len] != 0)
continue;
-
+
while (len --)
if (tolower (start [len]) != insn [len])
break;
-
+
if (len == -1)
return restore_colon (1);
}
return 0;
}
+
+boolean
+fr30_fix_adjustable (fixP)
+ fixS * fixP;
+{
+ if (fixP->fx_addsy == NULL)
+ return 1;
+
+#if 0
+ /* Prevent all adjustments to global symbols. */
+ if (S_IS_EXTERN (fixP->fx_addsy))
+ return 0;
+
+ if (S_IS_WEAK (fixP->fx_addsy))
+ return 0;
+#endif
+
+ /* We need the symbol name for the VTABLE entries */
+ if ( fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
+ || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
+ return 0;
+
+ return 1;
+}
projects / binutils.git / blobdiff