+
+ * config/tc-m68k.c (m68k_ip): Reject pc-relative addresses for the
+ 'p' operand specifier.
+
+
+ * config/tc-m68k.c (HAVE_LONG_BRANCH): New macro, returns true for
+ m68k family cpus which support long branch addressing modes.
+ (m68k_ip, md_convert_frag_1, md_estimate_size_before_relax,
+ md_create_long_jump): Use it.
+
+
+ * config/tc-mips.c (md_begin): Don't set SEC_ALLOC or SEC_LOAD for
+ the .reginfo or .MIPS.options section if configured for an
+ embedded target.
+
+ * config/tc-mips.c (md_begin): Don't set interlocks for
+ mips_4650.
+
+
+ * read.c (read_a_source_file): Make sure the symbol ends with
+ whitespace before checking whether the next character is '='.
+
+
+ * config/tc-i386.c (sco_id): Moved from here...
+ * config/obj-elf.c (sco_id): ...to here. Adding the identifier
+ really is an SCO ELF specific thing, not just a SCO x86 specific
+ thing.
+
+start-sanitize-tic80
+
+ * configure.in (tic80-*-*): Don't require 'coff'.
+ * configure: Regenerate.
+
+end-sanitize-tic80
+
+ * read.c (emit_expr): Check for overflow of a negative value
+ correctly.
+ * write.c (fixup_segment): Likewise.
+ * config/obj-coff.c (fixup_segment): Likewise.
+
+ * config/tc-m68k.c (struct label_line): Define.
+ (labels, current_label): New static variables.
+ (md_assemble): Mark current_label as text, and clear it.
+ (m68k_frob_label): New function.
+ (m68k_flush_pending_output): New function.
+ (m68k_frob_symbol): New function.
+ * config/tc-m68k.h (tc_frob_label): Define.
+ (md_flush_pending_output): Define.
+ (tc_frob_symbol): Don't warn, just call m68k_frob_symbol.
+ (tc_frob_coff_symbol): Likewise.
+
+ * read.c (read_a_source_file): When defining a macro in MRI mode,
+ don't add the symbol to the symbol table.
+
+
+ * config/tc-mn10300.c (tc_gen_reloc): Handle sym1-sym2 fixups
+ here since fixup_segment doesn't (linkrelax is set).
+ * config/tc-mn10200.c (tc_gen_reloc): Likewise.
+
+
+ * config/tc-mn10200.c (md_assemble): Tweak fx_offset for pc-relative
+ relocs.
+
+
+ * config/tc-hppa.c (struct hppa_fix_struct): Tweak fx_r_field's type
+ to avoid warnings with the native HP compiler.
+ (fix_new_hppa): Similarly for the r_type argument.
+ (pa_build_unwind_subspace, hppa_elf_mark_end_of_function): Enclose
+ in an #if OBJ_ELF to keep gcc -Wall quiet.
+ (md_apply_fix): Always initialize "result".
+
+ * config/tc-mn10200.c (md_assemble): Generate relocations.
+
+
+ * config/tc-m68k.c (s_even): Adjust the alignment of the current
+ section.
+
+
+ * config/obj-elf.c (elf_file_symbol): When using ECOFF debugging,
+ pass on the new file hook.
+
+ * config/tc-alpha.c (alpha_fix_adjustable): Not quite the same as
+ !alpha_force_relocation, as local LITERALs can be adjusted to be
+ relative to the section.
+
+
+ * config/obj-coff.c (yank_symbols): If tc_frob_coff_symbol is
+ defined, call it.
+ * config/tc-m68k.h (tc_frob_symbol): Check whether text label is
+ aligned to odd boundary.
+ (tc_frob_coff_symbol): Define.
+
+ * doc/as.texinfo (Set): Change parenthesized @xref to @pxref.
+
+ * macro.c (macro_expand_body): In MRI mode, just copy a single &.
+
+ * config/tc-m68k.c (m68k_ip): Call frag_grow before adding a
+
+ * config/tc-m68k.c (m68k_ip): Accept 'B' as a size for an
+ immediate value.
+ (md_assemble): If the size is 'B', set fx_signed.
+ (md_apply_fix_2): Use fx_signed when checking for overflow.
+
+ * write.h (struct fix): Add fx_signed field.
+ * write.c (fix_new_internal): Initialize fx_no_overflow and
+ fx_signed fields.
+ (fixup_segment): Use fx_signed when checking for overflow.
+ * config/obj-coff.c (fixup_segment): Check fx_no_overflow and
+ fx_signed when checking for overflow.
+
+
+ * NOTES, NOTES.config: Removed. These are rarely, if ever,
+ updated, and all the useful information is in doc/internals.texi.
+
+ * read.c (read_a_source_file): Check for conditional operators
+ before doing an MRI pending alignment.
+ * config/tc-m68k.h (m68k_conditional_pseudoop): Declare.
+ (tc_conditional_pseudop): Define.
+ * config/tc-m68k.c (m68k_conditional_pseudop): New function.
+ * doc/internals.texi (CPU backend): Describe
+ tc_conditional_pseudoop.
+
+ * config/tc-m68k.c (m68k_rel32_from_cmdline): New static
+ variable.
+ (md_begin): Check m68k_rel32_from_cmdline before setting
+ m68k_rel32.
+ (m68k_mri_mode_change): Likewise.
+ (md_longopts): Add --disp-size-default-16 and
+ --disp-size-default-32.
+ (md_parse_option): Handle new options.
+ (md_show_usage): Mention new options.
+ * doc/c-m68k.texi (M68K-Opts): Document new options.
+
+ * config/tc-m68k.c (m68k_index_width_default): New static
+ variable.
+ (m68k_ip): Use m68k_index_width_default to set the size of a base
+ register whose size was not given.
+ (md_longopts): Add --base-size-default-16 and
+ --base-size-default-32.
+ (md_parse_option): Handle new options.
+ (md_show_usage): Mention new options.
+ * doc/c-m68k.texi (M68K-Opts): Document new options.
+
+ * doc/c-mips.texi: Mention ISA level 4, and the -mips16 option.
+
+ * configure.in: Recognize mips-*-linux* target.
+ * configure: Rebuild.
+
+ * config/tc-mips.c (load_register): Rewrite 64 bit handling to
+ work if valueT is only 32 bits.
+
+ * config/tc-mips.c: Throughout, check target_big_endian rather
+ than byte_order.
+ (byte_order): Remove.
+ (mips_init_after_args): Remove.
+ * config/tc-mips.h (LITTLE_ENDIAN, BIG_ENDIAN): Don't define.
+ (mips_init_after_args): Don't declare.
+ (tc_init_after_args): Don't define.
+
+ * config/tc-mips.h (tc_frob_after_relocs): Define if
+ OBJ_MAYBE_ELF.
+ (mips_elf_final_processing): Likewise.
+ (ELF_TC_SPECIAL_SECTIONS): Likewise.
+
+start-sanitize-v850
+
+ * config/tc-v850.c (md_assemble): If this is sst.{h,w} or
+ sld.{h,w} and the operand is relocatable, adjust the adend by
+ shifting it right one bit.
+
+end-sanitize-v850
+
+ * read.c (read_a_source_file): Check mri_pending_align after
+ checking for a macro. From Ronald F. Guilmette
+
+ * Makefile.in (ALL_CFLAGS): Add -D_GNU_SOURCE.
+
+ * config/tc-sparc.c (md_apply_fix3): Rename from md_apply_fix, and
+ add segment argument. If OBJ_ELF, treat a relocation against a
+ symbol in a linkonce section like a relocation against an external
+ symbol.
+ * config/tc-sparc.h (MD_APPLY_FIX3): Define.
+
+
+ * config/tc-mips.c (mips16_macro): Add case for M_ABS.
+
+
+ * NOTES.config (Implementation): as.h #define's "GAS" not "gas",
+ includes config.h instead of host.h, tc.h instead of tp.h, and
+ targ-env.h instead of target-environment.h.
+ Also, obj-format.h includes targ-cpu.h instead of
+ target-processor.h.
+start-sanitize-tic80
+ * configure.in (case ${generic_target}): Add tic80-*-coff entry.
+ * configure: Rebuild with autoconf.
+ * config/obj-coff.h (coff/tic80.h): Include if TC_TIC80 defined.
+ (TARGET_FORMAT): Define to "coff-tic80".
+ * config/tc-tic80.c: New file for TIc80 support.
+ * config/tc-tic80.h: New file for TIc80 support.
+end-sanitize-tic80
+
+
+ * doc/as.texinfo (M): Mention explicitly that -M changes macro
+ handling.
+
+
+ * write.c (adjust_reloc_syms): If the fixup symbol has been
+ equated to an undefined symbol, convert the fixup to being against
+ the target symbol. Remove obsolete code handling a special case
+ for i386 PIC.
+
+
+ * mpw-make.sed: Use NewFolderRecursive for installation.
+
+start-sanitize-d10v
+
+ * config/tc-d10v.c (do_assemble): Correct previous bug fix.
+
+
+ * config/tc-d10v.c (md_assemble): Fix bug which caused
+ second instruction in a line to be case sensitize. PR11312
+
+end-sanitize-d10v
+
+ * config/tc-mn10200.c (mn10200_insert_operand): Don't
+ range check operands with MN10200_OPERAND_NOCHECK set.
+ (check_operand): Likewise.
+
+
+ * config/tc-mips.c: Undo part of last Friday's alignment changes.
+ (md_begin): Always align the text section to a four byte
+ boundary.
+ (append_insn): Remove call to record_align.
+
+ * config/tc-mips.c (insn_label): Remove.
+ (struct insn_label_list): Define.
+ (insn_labels, free_insn_labels): New static variables.
+ (mips_clear_insn_labels): New static function.
+ (append_insn): Mark all mips16 text labels, and make them odd.
+ Handle all labels after emitting a nop, not just one. Call
+ mips_clear_insn_labels rather than just clearing insn_label.
+ (mips_emit_delays): Add insns parameter, and use it to decide
+ whether to mark mips16 labels. Handle all labels, not just one.
+ Force mips16 labels to be odd. Change all callers.
+ (mips16_immed): Don't check for an odd branch target.
+ (md_apply_fix): Don't check mips16 mode for a branch reloc.
+ (mips16_extended_frag): Ignore the low bit in a branch target.
+ (md_convert_frag): Likewise.
+ (mips_no_prev_insn): Call mips_clear_insn_labels rather than just
+ clearing insn_label.
+ (mips_align, mips_flush_pending_output, s_cons): Likewise.
+ (s_float_cons, s_gpword): Likewise.
+ (s_align): Use insn_labels rather than insn_label.
+ (s_cons, s_float_cons, s_gpword): Likewise.
+ (mips_frob_file_after_relocs): New function.
+ (mips_define_label): Rewrite to add to insn_labels list.
+ * config/tc-mips.h (tc_frob_file_after_relocs): Define.
+ * ecoff.c (ecoff_build_symbols): If the size of a function comes
+ out odd, increment it.
+
+ * config/tc-mips.c (append_insn): Only update prev_insn when not
+ reordering if place is NULL.
+
+ * config/tc-mips.c (mips16_ip): Check for a missing expression
+ when using the register indirect addressing mode.
+
+
+ * config/tc-mn10200.c (mn10200_insert_operand): Don't
+ check 24bit operands for overflow.
+ (check_operand): Likewise.
+
+
+ * doc/as.texinfo (Section): Document how to use the .section
+ pseudo-op for COFF and ELF.
+
+
+ * write.c (adjust_reloc_syms): Fix linkonce check for ELF.
+
+
+ * config/tc-mips.c (prev_insn_reloc_type): New static variable.
+ (RELAX_MIPS16_ENCODE): Add dslot and jal_dslot arguments, and
+ store them. Adjust other RELAX_MIPS16 macros.
+ (RELAX_MIPS16_DSLOT): Define.
+ (RELAX_MIPS16_JAL_DSLOT): Define.
+ (append_insn): Pass new arguments to RELAX_MIPS16_ENCODE. Correct
+ handling of whether previous instruction has a fixup. Set
+ prev_insn_reloc_type.
+ (mips_no_prev_insn): Clear prev_insn_reloc_type.
+ (mips16_extended_frag): Use the right base address for a PC
+ relative add or load.
+ (md_convert_frag): Likewise. If a PC relative add or load is
+ used, record the alignment for the section.
+
+
+ * write.c (adjust_reloc_syms): Don't reduce a reloc against a
+ linkonce section into a reloc against the section symbol.
+
+ * config/tc-mips.c (mips16_macro): Remove nop instructions after
+ branch instructions.
+
+ * config/tc-mips.c (md_begin): If configured for an embedded ELF
+ system, don't set the section alignment to 2**4.
+ (s_change_sec): Likewise.
+ (append_insn): Call record_alignment for the section.
+ (md_section_align): Don't align the section size for an embedded
+ ELF system.
+
+
+ * write.c (adjust_reloc_syms): Make sure that symbols are
+ resolved; expression symbols may have been skipped.
+ * config/obj-coff.c (fixup_segment): Likewise.
+
+
+ * config/tc-ppc.c (ppc_elf_suffix): Move @plt to
+ BFD_RELOC_24_PLT_PCREL relocation.
+ (md_apply_fix3): Support BFD_RELOC_24_PLT_PCREL.
+
+start-sanitize-d10v
+
+ * config/tc-d10v.c (write_2_short): Remove code that called
+ parallel_ok() when the programmer specified parallel instructions.
+
+end-sanitize-d10v
+
+ * config/tc-mn10300.c (md_assemble): Update to handle endianness
+ issues correctly.
+
+ * config/tc-mn10200.c (md_assemble): Opcode 0x0 is valid!
+ * config/tc-mn10300.c (md_assemble): Likewise.
+
+
+ * config/tc-mips.c (append_insn): Make sure there is enough room
+ in a frag after a mips16 instruction to switch it with a jump
+ instruction.
+
+ * config/tc-mips.c (mips16_extended_frag): Give an error for an
+ attempt to use a non absolute symbol in an extending frag.
+
+
+ * config/tc-mn10200.c: Flesh out assembler support for MN10200.
+ * config/tc-mn10200.h: Likewise.
+
+
+ * app.c (do_scrub_chars): At the end of a C comment, pass space to
+ UNGET rather than PUT. Set old_state before setting state to -2.
+
+ * config/tc-mips.c (mips16_extended_frag): Avoid an infinite loop
+ when extending because the value is exactly maxtiny + 1.
+
+ * config/tc-mips.c (RELAX_MIPS16_ENCODE): Add small and ext
+ arguments, and store them. Adjust other RELAX_MIPS16 macros.
+ (RELAX_MIPS16_USER_SMALL): Define.
+ (RELAX_MIPS16_USER_EXT): Define.
+ (mips16_small, mips16_ext): New static variables.
+ (append_insn): Pass mips16_small and mips16_ext to
+ RELAX_MIPS16_ENCODE.
+ (mips16_ip): Set mips16_small and mips16_ext.
+ (mips16_immed): Don't check mips16_autoextend.
+ (mips16_extended_frag): Check USER_SMALL and USER_EXT.
+
+ * write.c (write_relocs): Print an error for an out of range
+ fixup, rather than calling abort.
+
+ * as.c (main): Unlink the output file if there are errors while
+ generating the fixups.
+
+
+ * config/tc-mips.c (mips16_extended_frag): Don't call
+ S_GET_VALUE.
+ (md_convert_frag): Call resolve_symbol_value before calling
+ S_GET_VALUE, and don't add in the frag address.
+
+ * config/tc-mips.c (mips16_immed): Add file and line parameters,
+ and use them when reporting errors. Change all callers.
+
+
+ * config/tc-mn10300.c: Fix various gcc -Wall warnings.
+ Remove '$' prefixing for registers.
+
+start-sanitize-d10v
+
+ * config/tc-d10v.c (md_assemble): Check to see if prev_seg
+ is initialized before using it.
+ (d10v_cleanup): No longer uses its argument, so make it void.
+
+ * config/tc-d10v.h (d10v_cleanup): Change prototype.
+
+end-sanitize-d10v
+
+ * write.c (fixup_segment): Don't discard the symbol for a PC
+ relative fixup to an absolute symbol.
+
+start-sanitize-d10v
+
+ * config/tc-d10v.c (md_assemble, d10v_cleanup): Fix bug
+ with multiple sections.
+
+end-sanitize-d10v
+
+ * config/tc-mips.c (md_longopts): Rename mips-16 to mips16, and
+ no-mips-16 to no-mips16.
+ (s_mipsset): Accept .set mips16 and .set nomips16.
+
+
+ * config/tc-ppc.c (ppc_elf_suffix): Take expressionS pointer
+ argument, and check for +/- constant following the suffix, folding
+ it into the expression.
+ (ppc_elf_cons): Change ppc_elf_suffix calls.
+ (md_assemble): Ditto.
+ (shlib): Replace boolean mrelocatable with enumeration shlib.
+ (md_parse_option): Discriminate between PIC style shared libraries
+ and -mrelocatable.
+ (ppc_elf_validate_fix): Don't report warnings for PIC style shared
+ libraries.
+
+
+ * config/tc-ppc.h ({tc,ppc}_comment_chars): Define, so that we can
+ change the comment characters.
+
+ * config/tc-ppc.c (comment_chars): Delete in favor of
+ tc_comment_chars.
+ (ppc_{eabi,solaris}_comment_chars): Eabi and Solaris versions of
+ comment chars.
+ (ppc_comment_chars): Select appropriate comment chars by default.
+ (msolaris): New flag for -m{,no-}solaris.
+ (md_parse_option): Recognize -K pic. Add support for
+ -m{,no-}solaris.
+ (md_show_usage): Update.
+ (md_begin): Do not set ELF flags if Solaris.
+ (ppc_elf_suffix): @local sets R_PPC_LOCAL24PC relocation.
+ (md_apply_fix3): Add support for R_PPC_LOCAL24PC.
+
+
+ * as.c (main): Correct handling of flag_always_generate_output.
+
+
+ * config/tc-mn10300.c (tc_gen_reloc): Get the addend from
+ fx_offset, not fx_addnumber.
+
+ * config/tc-mn10300.h (tc_fix_adjustable): Don't do any
+ reloc adjustments.
+
+
+ * config/tc-i386.c: Correct misspelling: balenced to balanced.
+
+
+ * config/tc-mips.c (md_section_align): Check for an alignment of
+ 4, not an alignment of 16. Corrects August 7 patch.
+
+
+ * configure, conf.in: Rebuild with autoconf 2.12.
+
+ * config/tc-ppc.c (ppc_elf_lcomm): Don't give an error if no
+ alignment is specified.
+
+ Add support for mips16 (16 bit MIPS implementation):
+ * config/tc-mips.c: Extensive additions for mips16 support, not
+ listed here.
+ (RELAX_OLD, RELAX_NEW): Use only 7 bits each.
+ (insn_uses_reg): Change last parameter to an enum.
+ * config/tc-mips.h (LOCAL_LABELS_DOLLAR): Define as 0.
+ (md_relax_frag): Define as mips_relax_frag.
+ (mips_relax_frag): Declare.
+ (struct mips_cl_insn): Add use_extend and extend fields.
+ (tc_fix_adjustable): Define.
+ * config/obj-elf.h (S_GET_OTHER): Define.
+ (S_SET_OTHER): Define.
+
+
+ * config/tc-m68k.c (m68k_ip): Implement cases for new <, >, m, n,
+ o and p operand specifiers.
+
+
+ * write.c: Delete "ifndef md_relax_frag" around is_dnrange.
+ (relax_segment, case rs_org): Move code inside braces. Move locals
+ target,after inside too.
+ (relax_segment, case rs_machine_dependent): Guts moved to ...
+ (relax_frag): New function.
+ Call md_prepare_relax_scan if defined.
+ * config/tc-m68k.h (md_prepare_relax_scan): Renamed from
+ M68K_AIM_KLUDGE.
+
+
+ * config/tc-mn10300.c (address_registers): Use '$' as register
+ prefix instead of '%'.
+ (data_registers, other_registers, md_assemble): Likewise.
+
+ * config/tc-mn10300.c (address_registers): Use '%' prefix for regs.
+ (data_registers, other_registers, md_assemble): Likewise.
+
+ * config/tc-mn10300.c (md_assemble): Correctly determine the
+ correct location and type for each relocation.
+ (md_pcrel_from): Simplify.
+
+
+ * config/tc-sh.c (md_convert_frag): Improve warning when branch is
+ converted into branch around branch.
+
+
+ * config/tc-mn10300.h (DIFF_EXPR_OK): Don't define this.
+ (tc_fix_adjustable): Don't adjust relocs against weak symbols or
+ pc-relative relocs.
+ * config/tc-mn10300.c (md_begin): Set linkrelax.
+ (md_assemble): Create fixups as needed.
+ (md_apply_fix3): Gut. It shouldn't ever get called anymore.
+
+start-sanitize-d10v
+
+ * config/tc-d10v.c (parallel_ok): When automatically converting
+ serial ops to parallel, do not consider a branch as the first
+ instruction.
+
+end-sanitize-d10v
+
+ * config/tc-mn10300.c (md_assemble): Handle MN10300_OPERAND_REG_LIST.
+
+
+ * config/tc-mn10300.c (mn10300_insert_operand): Provide prototype
+ via PARAMS.
+ (check_operand): Likewise.
+
start-sanitize-d10v
projects / binutils.git / blobdiff