import gdb-19990422 snapshot

[binutils.git] / sim / mips / mips.igen

diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen
index ba02a9b77a6b3376516af574a9360865e8998a43..66c475a7e428ae4004a13f052f7e390ce7782935 100644 (file)
--- a/sim/mips/mips.igen
+++ b/sim/mips/mips.igen
@@ -40,24 +40,8 @@
 :model:::mipsIII:mips4000:
 :model:::mipsIV:mips8000:
 :model:::mips16:mips16:
-// start-sanitize-r5900
-:model:::r5900:mips5900:
-// end-sanitize-r5900
 :model:::r3900:mips3900:
-// start-sanitize-tx19
-:model:::tx19:tx19:
-// end-sanitize-tx19
 :model:::vr4100:mips4100:
-// start-sanitize-vr4xxx
-:model:::vr4121:mips4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-:model:::vr4320:mips4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-:model:::vr5400:mips5400:
-:model:::mdmx:mdmx:
-// end-sanitize-cygnus
 :model:::vr5000:mips5000:
 
 
@@ -104,27 +88,6 @@
   return CIA + 8;
 }
 
-// start-sanitize-branchbug4011
-:function:::void:check_4011_branch_bug:
-{
-  if (BRANCHBUG4011_OPTION == 2 && BRANCHBUG4011_LAST_TARGET == CIA)
-    sim_engine_abort (SD, CPU, CIA, "4011 BRANCH BUG: %s at 0x%08lx was target of branch at 0x%08lx\n",
-                     itable[MY_INDEX].name,
-                     (long) CIA,
-                     (long) BRANCHBUG4011_LAST_CIA);
-}
-
-:function:::void:mark_4011_branch_bug:address_word target
-{
-  if (BRANCHBUG4011_OPTION)
-    {
-      BRANCHBUG4011_OPTION = 2;
-      BRANCHBUG4011_LAST_TARGET = target;
-      BRANCHBUG4011_LAST_CIA = CIA;
-    }
-}
-
-// end-sanitize-branchbug4011
 // Helper:
 // 
 // Check that an access to a HI/LO register meets timing requirements
@@ -154,15 +117,6 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   signed64 time = sim_events_time (SD);
   int ok = check_mf_cycles (SD_, history, time, "MT");
@@ -173,12 +127,6 @@
 
 :function:::int:check_mt_hilo:hilo_history *history
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   signed64 time = sim_events_time (SD);
   history->mt.timestamp = time;
@@ -191,19 +139,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   signed64 time = sim_events_time (SD);
   int ok = 1;
@@ -229,37 +165,12 @@
   return ok;
 }
 
-// start-sanitize-r5900
-// The r5900 mfhi et.al insns _can_ be exectuted immediatly after a div
-:function:::int:check_mf_hilo:hilo_history *history, hilo_history *peer
-// end-sanitize-r5900
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-r5900
-{
-  /* FIXME: could record the fact that a stall occured if we want */
-  signed64 time = sim_events_time (SD);
-  history->mf.timestamp = time;
-  history->mf.cia = CIA;
-  return 1;
-}
-// end-sanitize-r5900
 
 
 :function:::int:check_mult_hilo:hilo_history *hi, hilo_history *lo
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   signed64 time = sim_events_time (SD);
   int ok = (check_mf_cycles (SD_, hi, time, "OP")
@@ -275,12 +186,6 @@
 // a mf{hi,lo}
 :function:::int:check_mult_hilo:hilo_history *hi, hilo_history *lo
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   /* FIXME: could record the fact that a stall occured if we want */
   signed64 time = sim_events_time (SD);
@@ -296,19 +201,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   signed64 time = sim_events_time (SD);
   int ok = (check_mf_cycles (SD_, hi, time, "OP")
@@ -321,25 +214,6 @@
 }
 
 
-// start-sanitize-r5900
-// The r5900 div et.al insns _can_ be exectuted immediatly after
-// a mf{hi,lo}
-:function:::int:check_div_hilo:hilo_history *hi, hilo_history *lo
-// end-sanitize-r5900
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-r5900
-{
-  /* FIXME: could record the fact that a stall occured if we want */
-  signed64 time = sim_events_time (SD);
-  hi->op.timestamp = time;
-  lo->op.timestamp = time;
-  hi->op.cia = CIA;
-  lo->op.cia = CIA;
-  return 1;
-}
-// end-sanitize-r5900
 
 
 
@@ -356,22 +230,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   TRACE_ALU_INPUT2 (GPR[RS], GPR[RT]);
   {
@@ -389,22 +248,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   TRACE_ALU_INPUT2 (GPR[RS], EXTEND16 (IMMEDIATE));
   {
@@ -429,22 +273,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_addiu (SD_, RS, RT, IMMEDIATE);
 }
@@ -463,22 +292,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_addu (SD_, RS, RT, RD);
 }
@@ -497,22 +311,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_and (SD_, RS, RT, RD);
 }
@@ -524,22 +323,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   TRACE_ALU_INPUT2 (GPR[RS], IMMEDIATE);
   GPR[RT] = GPR[RS] & IMMEDIATE;
@@ -553,22 +337,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word offset = EXTEND16 (OFFSET) << 2;
   check_branch_bug ();
@@ -588,22 +357,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word offset = EXTEND16 (OFFSET) << 2;
   check_branch_bug ();
@@ -623,22 +377,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word offset = EXTEND16 (OFFSET) << 2;
   check_branch_bug ();
@@ -656,22 +395,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word offset = EXTEND16 (OFFSET) << 2;
   check_branch_bug ();
@@ -692,22 +416,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word offset = EXTEND16 (OFFSET) << 2;
   check_branch_bug ();
@@ -732,22 +441,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word offset = EXTEND16 (OFFSET) << 2;
   check_branch_bug ();
@@ -767,22 +461,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word offset = EXTEND16 (OFFSET) << 2;
   check_branch_bug ();
@@ -802,22 +481,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word offset = EXTEND16 (OFFSET) << 2;
   check_branch_bug ();
@@ -839,22 +503,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word offset = EXTEND16 (OFFSET) << 2;
   check_branch_bug ();
@@ -876,22 +525,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word offset = EXTEND16 (OFFSET) << 2;
   check_branch_bug ();
@@ -911,22 +545,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word offset = EXTEND16 (OFFSET) << 2;
   check_branch_bug ();
@@ -944,22 +563,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word offset = EXTEND16 (OFFSET) << 2;
   check_branch_bug ();
@@ -982,22 +586,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word offset = EXTEND16 (OFFSET) << 2;
   check_branch_bug ();
@@ -1020,22 +609,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word offset = EXTEND16 (OFFSET) << 2;
   check_branch_bug ();
@@ -1057,22 +631,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word offset = EXTEND16 (OFFSET) << 2;
   check_branch_bug ();
@@ -1092,22 +651,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word offset = EXTEND16 (OFFSET) << 2;
   check_branch_bug ();
@@ -1127,22 +671,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   /* Check for some break instruction which are reserved for use by the simulator.  */
   unsigned int break_code = instruction_0 & HALT_INSTRUCTION_MASK;
@@ -1159,54 +688,8 @@
         PC = cia - 4; /* reference the branch instruction */
       else
         PC = cia;
-      sim_engine_halt (SD, CPU, NULL, cia, sim_stopped, SIM_SIGTRAP);
-    }
-// start-sanitize-sky
-#ifdef TARGET_SKY
-  else if (break_code == (HALT_INSTRUCTION_PASS & HALT_INSTRUCTION_MASK))
-    {
-      sim_engine_halt (SD, CPU, NULL, cia, sim_exited, 0);
-    }
-  else if (break_code == (HALT_INSTRUCTION_FAIL & HALT_INSTRUCTION_MASK))
-    {
-      sim_engine_halt (SD, CPU, NULL, cia, sim_exited, 15);
-    }
-  else if (break_code == (PRINTF_INSTRUCTION & HALT_INSTRUCTION_MASK))
-    {
-      sim_monitor(SD, CPU, cia, 316);  /* Magic number for idt printf routine. */
-    }
-  else if (break_code == (LOAD_INSTRUCTION & HALT_INSTRUCTION_MASK))
-    {
-      /* This is a multi-phase load instruction.  Load next configured
-        executable and return its starting PC in A0 ($4). */
-      
-      if (STATE_MLOAD_INDEX (SD) == STATE_MLOAD_COUNT (SD))
-       {
-         sim_io_eprintf (SD, "Cannot load program %d.  Not enough load-next options.\n",
-                         STATE_MLOAD_COUNT (SD));
-         A0 = 0;
-       }
-      else
-       {
-         char* next = STATE_MLOAD_NAME (SD) [STATE_MLOAD_INDEX (SD)];
-         SIM_RC rc;
-         
-         STATE_MLOAD_INDEX (SD) ++;
-         
-         /* call sim_load_file, preserving most previous state */
-         rc = sim_load (SD, next, NULL, 0);
-         if(rc != SIM_RC_OK)
-           {
-             sim_io_eprintf (SD, "Error during multi-phase load #%d.\n",
-                             STATE_MLOAD_INDEX (SD));
-             A0 = 0;
-           }
-         else
-           A0 = STATE_START_ADDR (SD);
-       }
+      SignalException(BreakPoint, instruction_0);
     }
-#endif TARGET_SKY
-// end-sanitize-sky
 
   else
     {
@@ -1227,21 +710,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   /* this check's for overflow */
   TRACE_ALU_INPUT2 (GPR[RS], GPR[RT]);
@@ -1261,21 +729,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   TRACE_ALU_INPUT2 (GPR[RS], EXTEND16 (IMMEDIATE));
   {
@@ -1288,7 +741,7 @@
 
 
 
-:function:64::void:do_daddiu:int rs, int rt, unsigned16 immediate
+:function:::void:do_daddiu:int rs, int rt, unsigned16 immediate
 {
   TRACE_ALU_INPUT2 (GPR[rs], EXTEND16 (immediate));
   GPR[rt] = GPR[rs] + EXTEND16 (immediate);
@@ -1301,21 +754,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_daddiu (SD_, RS, RT, IMMEDIATE);
 }
@@ -1335,49 +773,38 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_daddu (SD_, RS, RT, RD);
 }
 
 
 
-:function:64::void:do_ddiv:int rs, int rt
+:function:::void:do_ddiv:int rs, int rt
 {
   check_div_hilo (SD_, HIHISTORY, LOHISTORY);
   TRACE_ALU_INPUT2 (GPR[rs], GPR[rt]);
   {
     signed64 n = GPR[rs];
     signed64 d = GPR[rt];
+    signed64 hi;
+    signed64 lo;
     if (d == 0)
       {
-       LO = SIGNED64 (0x8000000000000000);
-       HI = 0;
+       lo = SIGNED64 (0x8000000000000000);
+       hi = 0;
       }
     else if (d == -1 && n == SIGNED64 (0x8000000000000000))
       {
-       LO = SIGNED64 (0x8000000000000000);
-       HI = 0;
+       lo = SIGNED64 (0x8000000000000000);
+       hi = 0;
       }
     else
       {
-       LO = (n / d);
-       HI = (n % d);
+       lo = (n / d);
+       hi = (n % d);
       }
+    HI = hi;
+    LO = lo;
   }
   TRACE_ALU_RESULT2 (HI, LO);
 }
@@ -1388,44 +815,33 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_ddiv (SD_, RS, RT);
 }
 
 
 
-:function:64::void:do_ddivu:int rs, int rt
+:function:::void:do_ddivu:int rs, int rt
 {
   check_div_hilo (SD_, HIHISTORY, LOHISTORY);
   TRACE_ALU_INPUT2 (GPR[rs], GPR[rt]);
   {
     unsigned64 n = GPR[rs];
     unsigned64 d = GPR[rt];
+    unsigned64 hi;
+    unsigned64 lo;
     if (d == 0)
       {
-       LO = SIGNED64 (0x8000000000000000);
-       HI = 0;
+       lo = SIGNED64 (0x8000000000000000);
+       hi = 0;
       }
     else
       {
-       LO = (n / d);
-       HI = (n % d);
+       lo = (n / d);
+       hi = (n % d);
       }
+    HI = hi;
+    LO = lo;
   }
   TRACE_ALU_RESULT2 (HI, LO);
 }
@@ -1436,18 +852,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_ddivu (SD_, RS, RT);
 }
@@ -1485,22 +889,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_div (SD_, RS, RT);
 }
@@ -1533,22 +922,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_divu (SD_, RS, RT);
 }
@@ -1624,15 +998,6 @@
 "dmult r<RS>, r<RT>"
 *mipsIII,mipsIV:
 *vr4100:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
 {
   do_dmult (SD_, RS, RT, 0);
 }
@@ -1641,9 +1006,6 @@
 "dmult r<RS>, r<RT>":RD == 0
 "dmult r<RD>, r<RS>, r<RT>"
 *vr5000:
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   do_dmult (SD_, RS, RT, RD);
 }
@@ -1659,15 +1021,6 @@
 "dmultu r<RS>, r<RT>"
 *mipsIII,mipsIV:
 *vr4100:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
 {
   do_dmultu (SD_, RS, RT, 0);
 }
@@ -1676,13 +1029,20 @@
 "dmultu r<RD>, r<RS>, r<RT>":RD == 0
 "dmultu r<RS>, r<RT>"
 *vr5000:
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   do_dmultu (SD_, RS, RT, RD);
 }
 
+:function:::void:do_dsll:int rt, int rd, int shift
+{
+  GPR[rd] = GPR[rt] << shift;
+}
+
+:function:::void:do_dsllv:int rs, int rt, int rd
+{
+  int s = MASKED64 (GPR[rs], 5, 0);
+  GPR[rd] = GPR[rt] << s;
+}
 
 
 00000000000,5.RT,5.RD,5.SHIFT,111000:SPECIAL:64::DSLL
@@ -1691,24 +1051,8 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
-{
-  int s = SHIFT;
-  GPR[RD] = GPR[RT] << s;
+{
+  do_dsll (SD_, RT, RD, SHIFT);
 }
 
 
@@ -1718,54 +1062,25 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   int s = 32 + SHIFT;
   GPR[RD] = GPR[RT] << s;
 }
 
-
-
 000000,5.RS,5.RT,5.RD,00000010100:SPECIAL:64::DSLLV
 "dsllv r<RD>, r<RT>, r<RS>"
 *mipsIII:
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
-{
-  int s = MASKED64 (GPR[RS], 5, 0);
-  GPR[RD] = GPR[RT] << s;
+{
+  do_dsllv (SD_, RS, RT, RD);
 }
 
+:function:::void:do_dsra:int rt, int rd, int shift
+{
+  GPR[rd] = ((signed64) GPR[rt]) >> shift;
+}
 
 
 00000000000,5.RT,5.RD,5.SHIFT,111011:SPECIAL:64::DSRA
@@ -1774,24 +1089,8 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
-{
-  int s = SHIFT;
-  GPR[RD] = ((signed64) GPR[RT]) >> s;
+{
+  do_dsra (SD_, RT, RD, SHIFT);
 }
 
 
@@ -1801,21 +1100,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   int s = 32 + SHIFT;
   GPR[RD] = ((signed64) GPR[RT]) >> s;
@@ -1836,25 +1120,15 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_dsrav (SD_, RS, RT, RD);
 }
 
+:function:::void:do_dsrl:int rt, int rd, int shift
+{
+  GPR[rd] = (unsigned64) GPR[rt] >> shift;
+}
+
 
 00000000000,5.RT,5.RD,5.SHIFT,111010:SPECIAL:64::DSRL
 "dsrl r<RD>, r<RT>, <SHIFT>"
@@ -1862,24 +1136,8 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
-{
-  int s = SHIFT;
-  GPR[RD] = (unsigned64) GPR[RT] >> s;
+{
+  do_dsrl (SD_, RT, RD, SHIFT);
 }
 
 
@@ -1889,51 +1147,28 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   int s = 32 + SHIFT;
   GPR[RD] = (unsigned64) GPR[RT] >> s;
 }
 
 
+:function:::void:do_dsrlv:int rs, int rt, int rd
+{
+  int s = MASKED64 (GPR[rs], 5, 0);
+  GPR[rd] = (unsigned64) GPR[rt] >> s;
+}
+
+
+
 000000,5.RS,5.RT,5.RD,00000010110:SPECIAL:64::DSRLV
 "dsrl32 r<RD>, r<RT>, r<RS>"
 *mipsIII:
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
-{
-  int s = MASKED64 (GPR[RS], 5, 0);
-  GPR[RD] = (unsigned64) GPR[RT] >> s;
+{
+  do_dsrlv (SD_, RS, RT, RD);
 }
 
 
@@ -1943,21 +1178,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   TRACE_ALU_INPUT2 (GPR[RS], GPR[RT]);
   {
@@ -1982,21 +1202,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_dsubu (SD_, RS, RT, RD);
 }
@@ -2007,22 +1212,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   /* NOTE: The region used is that of the delay slot NIA and NOT the
      current instruction */
@@ -2036,22 +1226,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   /* NOTE: The region used is that of the delay slot and NOT the
      current instruction */
@@ -2060,29 +1235,13 @@
   DELAY_SLOT (region | (INSTR_INDEX << 2));
 }
 
-
 000000,5.RS,00000,5.RD,00000001001:SPECIAL:32::JALR
 "jalr r<RS>":RD == 31
 "jalr r<RD>, r<RS>"
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word temp = GPR[RS];
   GPR[RD] = CIA + 8;
@@ -2095,22 +1254,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   DELAY_SLOT (GPR[RS]);
 }
@@ -2129,7 +1273,9 @@
 
   vaddr = base + offset;
   if ((vaddr & access) != 0)
-    SignalExceptionAddressLoad ();
+    {
+      SIM_CORE_SIGNAL (SD, STATE_CPU (SD, 0), cia, read_map, access+1, vaddr, read_transfer, sim_core_unaligned_signal);
+    }
   AddressTranslation (vaddr, isDATA, isLOAD, &paddr, &uncached, isTARGET, isREAL);
   paddr = ((paddr & ~mask) | ((paddr & mask) ^ reverseendian));
   LoadMemory (&memval, NULL, uncached, access, paddr, vaddr, isDATA, isREAL);
@@ -2143,22 +1289,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   GPR[RT] = EXTEND8 (do_load (SD_, AccessLength_BYTE, GPR[BASE], EXTEND16 (OFFSET)));
 }
@@ -2169,22 +1300,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   GPR[RT] = do_load (SD_, AccessLength_BYTE, GPR[BASE], EXTEND16 (OFFSET));
 }
@@ -2196,21 +1312,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   GPR[RT] = EXTEND64 (do_load (SD_, AccessLength_DOUBLEWORD, GPR[BASE], EXTEND16 (OFFSET)));
 }
@@ -2223,19 +1324,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   COP_LD (ZZ, RT, do_load (SD_, AccessLength_DOUBLEWORD, GPR[BASE], EXTEND16 (OFFSET)));
 }
@@ -2249,21 +1338,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   GPR[RT] = do_load_left (SD_, AccessLength_DOUBLEWORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]);
 }
@@ -2275,21 +1349,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   GPR[RT] = do_load_right (SD_, AccessLength_DOUBLEWORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]);
 }
@@ -2300,22 +1359,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   GPR[RT] = EXTEND16 (do_load (SD_, AccessLength_HALFWORD, GPR[BASE], EXTEND16 (OFFSET)));
 }
@@ -2326,22 +1370,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   GPR[RT] = do_load (SD_, AccessLength_HALFWORD, GPR[BASE], EXTEND16 (OFFSET));
 }
@@ -2354,21 +1383,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   signed_word offset = SIGNEXTEND((signed_word)((instruction >> 0) & 0x0000FFFF),16);
@@ -2379,7 +1393,9 @@
     address_word paddr;
     int uncached;
     if ((vaddr & 3) != 0)
-      SignalExceptionAddressLoad();
+      {
+        SIM_CORE_SIGNAL (SD, CPU, cia, read_map, 4, vaddr, read_transfer, sim_core_unaligned_signal);
+      }
     else
       {
        if (AddressTranslation(vaddr,isDATA,isLOAD,&paddr,&uncached,isTARGET,isREAL))
@@ -2408,21 +1424,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   signed_word offset = SIGNEXTEND((signed_word)((instruction >> 0) & 0x0000FFFF),16);
@@ -2433,7 +1434,9 @@
     address_word paddr;
     int uncached;
     if ((vaddr & 7) != 0)
-      SignalExceptionAddressLoad();
+      {
+       SIM_CORE_SIGNAL (SD, CPU, cia, read_map, 8, vaddr, read_transfer, sim_core_unaligned_signal);
+      }
     else
       {
        if (AddressTranslation(vaddr,isDATA,isLOAD,&paddr,&uncached,isTARGET,isREAL))
@@ -2454,22 +1457,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   TRACE_ALU_INPUT1 (IMMEDIATE);
   GPR[RT] = EXTEND32 (IMMEDIATE << 16);
@@ -2482,22 +1470,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   GPR[RT] = EXTEND32 (do_load (SD_, AccessLength_WORD, GPR[BASE], EXTEND16 (OFFSET)));
 }
@@ -2508,22 +1481,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   COP_LW (ZZ, RT, do_load (SD_, AccessLength_WORD, GPR[BASE], EXTEND16 (OFFSET)));
 }
@@ -2591,24 +1549,9 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
-  GPR[RT] = EXTEND32 (do_load_left (SD_, AccessLength_WORD, GPR[BASE], EXTEND32 (OFFSET), GPR[RT]));
+  GPR[RT] = EXTEND32 (do_load_left (SD_, AccessLength_WORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]));
 }
 
 
@@ -2648,22 +1591,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   GPR[RT] = EXTEND32 (do_load_right (SD_, AccessLength_WORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]));
 }
@@ -2675,21 +1603,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   GPR[RT] = do_load (SD_, AccessLength_WORD, GPR[BASE], EXTEND16 (OFFSET));
 }
@@ -2708,22 +1621,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_mfhi (SD_, RD);
 }
@@ -2743,22 +1641,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_mflo (SD_, RD);
 }
@@ -2769,18 +1652,6 @@
 "movn r<RD>, r<RS>, r<RT>"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   if (GPR[RT] != 0)
     GPR[RD] = GPR[RS];
@@ -2792,15 +1663,6 @@
 "movz r<RD>, r<RS>, r<RT>"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   if (GPR[RT] == 0)
     GPR[RD] = GPR[RS];
@@ -2813,22 +1675,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   check_mt_hilo (SD_, HIHISTORY);
   HI = GPR[RS];
@@ -2841,22 +1688,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   check_mt_hilo (SD_, LOHISTORY);
   LO = GPR[RS];
@@ -2882,12 +1714,6 @@
 "mult r<RS>, r<RT>"
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
 {
   do_mult (SD_, RS, RT, 0);
 }
@@ -2896,16 +1722,7 @@
 000000,5.RS,5.RT,5.RD,00000011000:SPECIAL:32::MULT
 "mult r<RD>, r<RS>, r<RT>"
 *vr5000:
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_mult (SD_, RS, RT, RD);
 }
@@ -2929,12 +1746,6 @@
 "multu r<RS>, r<RT>"
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
 {
   do_multu (SD_, RS, RT, 0);
 }
@@ -2942,16 +1753,7 @@
 000000,5.RS,5.RT,5.RD,00000011001:SPECIAL:32::MULTU
 "multu r<RD>, r<RS>, r<RT>"
 *vr5000:
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_multu (SD_, RS, RT, 0);
 }
@@ -2969,22 +1771,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_nor (SD_, RS, RT, RD);
 }
@@ -3002,22 +1789,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_or (SD_, RS, RT, RD);
 }
@@ -3036,22 +1808,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_ori (SD_, RS, RT, IMMEDIATE);
 }
@@ -3060,15 +1817,6 @@
 110011,5.RS,nnnnn,16.OFFSET:NORMAL:32::PREF
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   unsigned32 instruction = instruction_0;
   signed_word offset = SIGNEXTEND((signed_word)((instruction >> 0) & 0x0000FFFF),16);
@@ -3098,7 +1846,9 @@
 
   vaddr = base + offset;
   if ((vaddr & access) != 0)
-    SignalExceptionAddressStore ();
+    {
+      SIM_CORE_SIGNAL (SD, STATE_CPU(SD, 0), cia, read_map, access+1, vaddr, write_transfer, sim_core_unaligned_signal);
+    }
   AddressTranslation (vaddr, isDATA, isSTORE, &paddr, &uncached, isTARGET, isREAL);
   paddr = ((paddr & ~mask) | ((paddr & mask) ^ reverseendian));
   byte = ((vaddr & mask) ^ bigendiancpu);
@@ -3112,22 +1862,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_store (SD_, AccessLength_BYTE, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]);
 }
@@ -3140,21 +1875,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   signed_word offset = SIGNEXTEND((signed_word)((instruction >> 0) & 0x0000FFFF),16);
@@ -3165,7 +1885,9 @@
     address_word paddr;
     int uncached;
     if ((vaddr & 3) != 0)
-      SignalExceptionAddressStore();
+      {
+       SIM_CORE_SIGNAL (SD, CPU, cia, read_map, 4, vaddr, write_transfer, sim_core_unaligned_signal);
+      }
     else
       {
        if (AddressTranslation(vaddr,isDATA,isSTORE,&paddr,&uncached,isTARGET,isREAL))
@@ -3194,21 +1916,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   signed_word offset = SIGNEXTEND((signed_word)((instruction >> 0) & 0x0000FFFF),16);
@@ -3219,7 +1926,9 @@
     address_word paddr;
     int uncached;
     if ((vaddr & 7) != 0)
-      SignalExceptionAddressStore();
+      {
+       SIM_CORE_SIGNAL (SD, CPU, cia, read_map, 8, vaddr, write_transfer, sim_core_unaligned_signal);
+      }
     else
       {
        if (AddressTranslation(vaddr,isDATA,isSTORE,&paddr,&uncached,isTARGET,isREAL))
@@ -3244,21 +1953,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_store (SD_, AccessLength_DOUBLEWORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]);
 }
@@ -3271,18 +1965,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_store (SD_, AccessLength_DOUBLEWORD, GPR[BASE], EXTEND16 (OFFSET), COP_SD (ZZ, RT));
 }
@@ -3294,21 +1976,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_store_left (SD_, AccessLength_DOUBLEWORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]);
 }
@@ -3320,21 +1987,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_store_right (SD_, AccessLength_DOUBLEWORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]);
 }
@@ -3345,22 +1997,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_store (SD_, AccessLength_HALFWORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]);
 }
@@ -3379,22 +2016,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_sll (SD_, RT, RD, SHIFT);
 }
@@ -3414,22 +2036,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_sllv (SD_, RS, RT, RD);
 }
@@ -3447,22 +2054,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_slt (SD_, RS, RT, RD);
 }
@@ -3480,22 +2072,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_slti (SD_, RS, RT, IMMEDIATE);
 }
@@ -3513,22 +2090,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_sltiu (SD_, RS, RT, IMMEDIATE);
 }
@@ -3547,22 +2109,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_sltu (SD_, RS, RT, RD);
 }
@@ -3581,22 +2128,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_sra (SD_, RT, RD, SHIFT);
 }
@@ -3617,22 +2149,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_srav (SD_, RS, RT, RD);
 }
@@ -3652,22 +2169,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_srl (SD_, RT, RD, SHIFT);
 }
@@ -3687,22 +2189,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_srlv (SD_, RS, RT, RD);
 }
@@ -3713,22 +2200,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   TRACE_ALU_INPUT2 (GPR[RS], GPR[RT]);
   {
@@ -3752,22 +2224,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_subu (SD_, RS, RT, RD);
 }
@@ -3777,23 +2234,8 @@
 "sw r<RT>, <OFFSET>(r<BASE>)"
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 *r3900:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
 *vr5000:
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   do_store (SD_, AccessLength_WORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]);
 }
@@ -3804,19 +2246,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_store (SD_, AccessLength_WORD, GPR[BASE], EXTEND16 (OFFSET), COP_SW (ZZ, RT));
 }
@@ -3874,22 +2304,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_store_left (SD_, AccessLength_WORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]);
 }
@@ -3921,22 +2336,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_store_right (SD_, AccessLength_WORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]);
 }
@@ -3950,22 +2350,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   SyncOperation (STYPE);
 }
@@ -3976,22 +2361,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   SignalException(SystemCall, instruction_0);
 }
@@ -4004,21 +2374,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   if ((signed_word) GPR[RS] == (signed_word) GPR[RT])
     SignalException(Trap, instruction_0);
@@ -4032,21 +2387,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   if ((signed_word) GPR[RS] == (signed_word) EXTEND16 (IMMEDIATE))
     SignalException(Trap, instruction_0);
@@ -4060,21 +2400,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   if ((signed_word) GPR[RS] >= (signed_word) GPR[RT])
     SignalException(Trap, instruction_0);
@@ -4088,21 +2413,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   if ((signed_word) GPR[RS] >= (signed_word) EXTEND16 (IMMEDIATE))
     SignalException(Trap, instruction_0);
@@ -4116,21 +2426,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   if ((unsigned_word) GPR[RS] >= (unsigned_word) EXTEND16 (IMMEDIATE))
     SignalException(Trap, instruction_0);
@@ -4144,21 +2439,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   if ((unsigned_word) GPR[RS] >= (unsigned_word) GPR[RT])
     SignalException(Trap, instruction_0);
@@ -4172,21 +2452,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   if ((signed_word) GPR[RS] < (signed_word) GPR[RT])
     SignalException(Trap, instruction_0);
@@ -4200,21 +2465,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   if ((signed_word) GPR[RS] < (signed_word) EXTEND16 (IMMEDIATE))
     SignalException(Trap, instruction_0);
@@ -4228,21 +2478,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   if ((unsigned_word) GPR[RS] < (unsigned_word) EXTEND16 (IMMEDIATE))
     SignalException(Trap, instruction_0);
@@ -4256,21 +2491,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   if ((unsigned_word) GPR[RS] < (unsigned_word) GPR[RT])
     SignalException(Trap, instruction_0);
@@ -4284,21 +2504,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   if ((signed_word) GPR[RS] != (signed_word) GPR[RT])
     SignalException(Trap, instruction_0);
@@ -4312,21 +2517,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   if ((signed_word) GPR[RS] != (signed_word) EXTEND16 (IMMEDIATE))
     SignalException(Trap, instruction_0);
@@ -4345,22 +2535,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_xor (SD_, RS, RT, RD);
 }
@@ -4378,22 +2553,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_xori (SD_, RS, RT, IMMEDIATE);
 }
@@ -4474,19 +2634,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -4507,19 +2655,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -4544,16 +2680,6 @@
 010001,01000,3.0,1.ND,1.TF,16.OFFSET:COP1S:32,f::BC1a
 "bc1%s<TF>%s<ND> <OFFSET>"
 *mipsI,mipsII,mipsIII:
-*vr4100:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   check_branch_bug ();
   TRACE_BRANCH_INPUT (PREVCOC1());
@@ -4580,13 +2706,8 @@
 "bc1%s<TF>%s<ND> <CC>, <OFFSET>"
 *mipsIV:
 *vr5000:
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
+#*vr4100:
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   check_branch_bug ();
   if (GETFCC(CC) == TF)
@@ -4659,19 +2780,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_c_cond_fmt (SD_, FMT, FT, FS, CC, COND, instruction_0);
 }
@@ -4683,22 +2792,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -4719,22 +2813,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -4751,7 +2830,7 @@
 
 // CFC1
 // CTC1
-010001,00,X,10,5.RT,5.FS,00000000000:COP1S:32::CxC1
+010001,00,X,10,5.RT,5.FS,00000000000:COP1Sa:32::CxC1
 "c%s<X>c1 r<RT>, f<FS>"
 *mipsI:
 *mipsII:
@@ -4775,24 +2854,12 @@
       /* else NOP */
     }
 }
-010001,00,X,10,5.RT,5.FS,00000000000:COP1S:32::CxC1
+010001,00,X,10,5.RT,5.FS,00000000000:COP1Sb:32::CxC1
 "c%s<X>c1 r<RT>, f<FS>"
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   if (X)
     {
@@ -4841,19 +2908,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -4874,19 +2929,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -4909,19 +2952,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -4941,19 +2972,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -4973,19 +2992,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5003,7 +3010,7 @@
 
 // DMFC1
 // DMTC1
-010001,00,X,01,5.RT,5.FS,00000000000:COP1S:64::DMxC1
+010001,00,X,01,5.RT,5.FS,00000000000:COP1Sa:64::DMxC1
 "dm%s<X>c1 r<RT>, f<FS>"
 *mipsIII:
 {
@@ -5027,27 +3034,12 @@
        PENDING_FILL(RT,SET64HI(0xDEADC0DE) | 0xBAD0BAD0);
     }
 }
-010001,00,X,01,5.RT,5.FS,00000000000:COP1S:64::DMxC1
+010001,00,X,01,5.RT,5.FS,00000000000:COP1Sb:64::DMxC1
 "dm%s<X>c1 r<RT>, f<FS>"
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   if (X)
     {
@@ -5074,22 +3066,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5111,22 +3088,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5148,19 +3110,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   COP_LD (1, FT, do_load (SD_, AccessLength_DOUBLEWORD, GPR[BASE], EXTEND16 (OFFSET)));
 }
@@ -5170,12 +3120,6 @@
 "ldxc1 f<FD>, r<INDEX>(r<BASE>)"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   COP_LD (1, FD, do_load (SD_, AccessLength_DOUBLEWORD, GPR[BASE], GPR[INDEX]));
 }
@@ -5187,22 +3131,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   COP_LW (1, FT, do_load (SD_, AccessLength_WORD, GPR[BASE], EXTEND16 (OFFSET)));
 }
@@ -5212,12 +3141,6 @@
 "lwxc1 f<FD>, r<INDEX>(r<BASE>)"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   COP_LW (1, FD, do_load (SD_, AccessLength_WORD, GPR[BASE], GPR[INDEX]));
 }
@@ -5231,12 +3154,6 @@
 "madd.d f<FD>, f<FR>, f<FS>, f<FT>"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5253,12 +3170,6 @@
 "madd.s f<FD>, f<FR>, f<FS>, f<FT>"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5273,7 +3184,7 @@
 
 // MFC1
 // MTC1
-010001,00,X,00,5.RT,5.FS,00000000000:COP1S:32::MxC1
+010001,00,X,00,5.RT,5.FS,00000000000:COP1Sa:32::MxC1
 "m%s<X>c1 r<RT>, f<FS>"
 *mipsI:
 *mipsII:
@@ -5289,24 +3200,12 @@
   else /*MFC1*/
     PENDING_FILL (RT, SIGNEXTEND(FGR[FS],32));
 }
-010001,00,X,00,5.RT,5.FS,00000000000:COP1S:32::MxC1
+010001,00,X,00,5.RT,5.FS,00000000000:COP1Sb:32::MxC1
 "m%s<X>c1 r<RT>, f<FS>"
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   int fs = FS;
   if (X)
@@ -5322,19 +3221,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5351,15 +3238,6 @@
 "mov%s<TF> r<RD>, r<RS>, <CC>"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   if (GETFCC(CC) == TF)
     GPR[RD] = GPR[RS];
@@ -5371,15 +3249,6 @@
 "mov%s<TF>.%s<FMT> f<FD>, f<FS>, <CC>"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   unsigned32 instruction = instruction_0;
   int format = ((instruction >> 21) & 0x00000007);
@@ -5395,15 +3264,6 @@
 010001,10,3.FMT,5.RT,5.FS,5.FD,010011:COP1:32::MOVN.fmt
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5426,15 +3286,6 @@
 "movz.%s<FMT> f<FD>, f<FS>, r<RT>"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5451,15 +3302,6 @@
 "msub.d f<FD>, f<FR>, f<FS>, f<FT>"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5477,15 +3319,6 @@
 "msub.s f<FD>, f<FR>, f<FS>, f<FT>"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5506,19 +3339,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5539,19 +3360,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5571,12 +3380,6 @@
 "nmadd.d f<FD>, f<FR>, f<FS>, f<FT>"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5594,12 +3397,6 @@
 "nmadd.s f<FD>, f<FR>, f<FS>, f<FT>"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5617,12 +3414,6 @@
 "nmsub.d f<FD>, f<FR>, f<FS>, f<FT>"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5640,12 +3431,6 @@
 "nmsub.s f<FD>, f<FR>, f<FS>, f<FT>"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5662,12 +3447,6 @@
 "prefx <HINT>, r<INDEX>(r<BASE>)"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   unsigned32 instruction = instruction_0;
   int fs = ((instruction >> 11) & 0x0000001F);
@@ -5686,12 +3465,6 @@
 *mipsIV:
 "recip.%s<FMT> f<FD>, f<FS>"
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5712,22 +3485,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5749,22 +3507,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5783,12 +3526,6 @@
 *mipsIV:
 "rsqrt.%s<FMT> f<FD>, f<FS>"
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5810,19 +3547,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_store (SD_, AccessLength_DOUBLEWORD, GPR[BASE], EXTEND16 (OFFSET), COP_SD (1, FT));
 }
@@ -5832,12 +3557,6 @@
 "ldxc1 f<FS>, r<INDEX>(r<BASE>)"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   do_store (SD_, AccessLength_DOUBLEWORD, GPR[BASE], GPR[INDEX], COP_SD (1, FS));
 }
@@ -5850,19 +3569,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5882,19 +3589,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5916,22 +3611,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   signed_word offset = EXTEND16 (OFFSET);
@@ -5942,7 +3622,9 @@
     address_word paddr;
     int uncached;
     if ((vaddr & 3) != 0)
-      SignalExceptionAddressStore();
+      {
+       SIM_CORE_SIGNAL (SD, CPU, cia, read_map, AccessLength_WORD+1, vaddr, write_transfer, sim_core_unaligned_signal);
+      }
     else
       {
        if (AddressTranslation(vaddr,isDATA,isSTORE,&paddr,&uncached,isTARGET,isREAL))
@@ -5967,12 +3649,6 @@
 "swxc1 f<FS>, r<INDEX>(r<BASE>)"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   unsigned32 instruction = instruction_0;
   int fs = ((instruction >> 11) & 0x0000001F);
@@ -5983,7 +3659,9 @@
    address_word paddr;
    int uncached;
    if ((vaddr & 3) != 0)
-    SignalExceptionAddressStore();
+     {
+       SIM_CORE_SIGNAL (SD, CPU, cia, read_map, 4, vaddr, write_transfer, sim_core_unaligned_signal);
+     }
    else
    {
     if (AddressTranslation(vaddr,isDATA,isSTORE,&paddr,&uncached,isTARGET,isREAL))
@@ -6010,22 +3688,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -6047,22 +3710,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -6089,15 +3737,14 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
+
+010000,01000,00000,16.OFFSET:COP0:32::BC0F
+"bc0f <OFFSET>"
+// stub needed for eCos as tx39 hardware bug workaround
+*r3900:
+{
+  /* do nothing */
+}
 
 
 010000,01000,00010,16.OFFSET:COP0:32::BC0FL
@@ -6105,24 +3752,12 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 
 
 010000,01000,00001,16.OFFSET:COP0:32::BC0T
 "bc0t <OFFSET>"
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
 
 
 010000,01000,00011,16.OFFSET:COP0:32::BC0TL
@@ -6130,15 +3765,6 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 
 
 101111,5.BASE,5.OP,16.OFFSET:NORMAL:32::CACHE
@@ -6146,19 +3772,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   signed_word offset = SIGNEXTEND((signed_word)((instruction >> 0) & 0x0000FFFF),16);
@@ -6179,15 +3793,6 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 
 
 010000,10000,000000000000000,111000:COP0:32::EI
@@ -6195,15 +3800,6 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 
 
 010000,10000,000000000000000,011000:COP0:32::ERET
@@ -6212,18 +3808,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   if (SR & status_ERL)
     {
@@ -6246,18 +3830,6 @@
 *r3900:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   TRACE_ALU_INPUT0 ();
   DecodeCoproc (instruction_0);
@@ -6267,24 +3839,9 @@
 010000,00100,5.RT,5.RD,00000,6.REGX:COP0:32::MTC0
 "mtc0 r<RT>, r<RD> # <REGX>"
 *mipsI,mipsII,mipsIII,mipsIV:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 *r3900:
 *vr4100:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
 *vr5000:
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   DecodeCoproc (instruction_0);
 }
@@ -6293,24 +3850,9 @@
 010000,10000,000000000000000,010000:COP0:32::RFE
 "rfe"
 *mipsI,mipsII,mipsIII,mipsIV:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 *r3900:
 *vr4100:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
 *vr5000:
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   DecodeCoproc (instruction_0);
 }
@@ -6320,16 +3862,7 @@
 "cop<ZZ> <COP_FUN0><COP_FUN1><COP_FUN2>"
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   DecodeCoproc (instruction_0);
 }
@@ -6341,15 +3874,6 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 
 
 010000,10000,000000000000000,000001:COP0:32::TLBR
@@ -6357,15 +3881,6 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 
 
 010000,10000,000000000000000,000010:COP0:32::TLBWI
@@ -6373,15 +3888,6 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 
 
 010000,10000,000000000000000,000110:COP0:32::TLBWR
@@ -6389,81 +3895,9 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4xxx
-*vr4121:
-// end-sanitize-vr4xxx
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 
 \f
 :include:::m16.igen
-// start-sanitize-cygnus
-:include:64,f::mdmx.igen
-// end-sanitize-cygnus
-// start-sanitize-r5900
-:include::r5900:r5900.igen
-// end-sanitize-r5900
 :include:::tx.igen
 :include:::vr.igen
 \f
-// start-sanitize-cygnus-never
-
-// // FIXME FIXME FIXME What is this instruction?
-// 111011,5.RS,5.RT,16.OFFSET:NORMAL:32::<INT>
-// *mipsI:
-// *mipsII:
-// *mipsIII:
-// *mipsIV:
-// // start-sanitize-r5900
-// *r5900:
-// // end-sanitize-r5900
-// *r3900:
-// // start-sanitize-tx19
-// *tx19:
-// // end-sanitize-tx19
-// {
-//   unsigned32 instruction = instruction_0;
-//   signed_word offset = SIGNEXTEND((signed_word)((instruction >> 0) & 0x0000FFFF),16);
-//   signed_word op2 = GPR[((instruction >> 16) & 0x0000001F)];
-//   signed_word op1 = GPR[((instruction >> 21) & 0x0000001F)];
-//   {
-//     if (CoProcPresent(3))
-//       SignalException(CoProcessorUnusable);
-//     else
-//       SignalException(ReservedInstruction,instruction);
-//   }
-// }
-
-// end-sanitize-cygnus-never
-// start-sanitize-cygnus-never
-
-// // FIXME FIXME FIXME What is this?
-// 11100,******,00001:RR:16::SDBBP
-// *mips16:
-// {
-//   unsigned32 instruction = instruction_0;
-//   if (have_extendval)
-//     SignalException (ReservedInstruction, instruction);
-//   {
-//     SignalException(DebugBreakPoint,instruction);
-//   }
-// }
-
-// end-sanitize-cygnus-never
-// start-sanitize-cygnus-never
-
-// // FIXME FIXME FIXME What is this?
-// 000000,********************,001110:SPECIAL:32::SDBBP
-// *r3900:
-// {
-//   unsigned32 instruction = instruction_0;
-//   {
-//     SignalException(DebugBreakPoint,instruction);
-//   }
-// }
-
-// end-sanitize-cygnus-never