/* Assembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
-THIS FILE IS USED TO GENERATE m32r-asm.c.
+ THIS FILE IS MACHINE GENERATED WITH CGEN.
+ - the resultant file is machine generated, cgen-asm.in isn't
-Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005, 2007
+ Free Software Foundation, Inc.
-This file is part of the GNU Binutils and GDB, the GNU debugger.
+ This file is part of libopcodes.
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
+ This library is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
-You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+
+
+/* ??? Eventually more and more of this stuff can go to cpu-independent files.
+ Keep that in mind. */
#include "sysdep.h"
-#include <ctype.h>
#include <stdio.h>
#include "ansidecl.h"
#include "bfd.h"
#include "symcat.h"
+#include "m32r-desc.h"
#include "m32r-opc.h"
#include "opintl.h"
+#include "xregex.h"
+#include "libiberty.h"
+#include "safe-ctype.h"
-#undef min
+#undef min
#define min(a,b) ((a) < (b) ? (a) : (b))
-#undef max
+#undef max
#define max(a,b) ((a) > (b) ? (a) : (b))
-#undef INLINE
-#ifdef __GNUC__
-#define INLINE __inline__
-#else
-#define INLINE
-#endif
-
-static const char * insert_normal
- PARAMS ((CGEN_OPCODE_DESC, long, unsigned int, int, int, int,
- CGEN_INSN_BYTES_PTR));
static const char * parse_insn_normal
- PARAMS ((CGEN_OPCODE_DESC, const CGEN_INSN *,
- const char **, CGEN_FIELDS *));
-static const char * insert_insn_normal
- PARAMS ((CGEN_OPCODE_DESC, const CGEN_INSN *,
- CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma));
+ (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *);
\f
-/* -- assembler routines inserted here */
+/* -- assembler routines inserted here. */
+
/* -- asm.c */
+static const char * MISSING_CLOSING_PARENTHESIS = N_("missing `)'");
/* Handle '#' prefixes (i.e. skip over them). */
static const char *
-parse_hash (od, strp, opindex, valuep)
- CGEN_OPCODE_DESC od;
- const char **strp;
- int opindex;
- unsigned long *valuep;
+parse_hash (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ const char **strp,
+ int opindex ATTRIBUTE_UNUSED,
+ long *valuep ATTRIBUTE_UNUSED)
{
if (**strp == '#')
++*strp;
/* Handle shigh(), high(). */
static const char *
-parse_hi16 (od, strp, opindex, valuep)
- CGEN_OPCODE_DESC od;
- const char **strp;
- int opindex;
- unsigned long *valuep;
+parse_hi16 (CGEN_CPU_DESC cd,
+ const char **strp,
+ int opindex,
+ unsigned long *valuep)
{
const char *errmsg;
enum cgen_parse_operand_result result_type;
if (strncasecmp (*strp, "high(", 5) == 0)
{
*strp += 5;
- errmsg = cgen_parse_address (od, strp, opindex, BFD_RELOC_M32R_HI16_ULO,
- &result_type, &value);
+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_ULO,
+ & result_type, & value);
if (**strp != ')')
- return "missing `)'";
+ return MISSING_CLOSING_PARENTHESIS;
++*strp;
if (errmsg == NULL
- && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
- value >>= 16;
+ && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
+ {
+ value >>= 16;
+ value &= 0xffff;
+ }
*valuep = value;
return errmsg;
}
else if (strncasecmp (*strp, "shigh(", 6) == 0)
{
*strp += 6;
- errmsg = cgen_parse_address (od, strp, opindex, BFD_RELOC_M32R_HI16_SLO,
- &result_type, &value);
+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_SLO,
+ & result_type, & value);
if (**strp != ')')
- return "missing `)'";
+ return MISSING_CLOSING_PARENTHESIS;
++*strp;
if (errmsg == NULL
&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
- value = (value >> 16) + (value & 0x8000 ? 1 : 0);
+ {
+ value += 0x8000;
+ value >>= 16;
+ value &= 0xffff;
+ }
*valuep = value;
return errmsg;
}
- return cgen_parse_unsigned_integer (od, strp, opindex, valuep);
+ return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
}
/* Handle low() in a signed context. Also handle sda().
handles the case where low() isn't present. */
static const char *
-parse_slo16 (od, strp, opindex, valuep)
- CGEN_OPCODE_DESC od;
- const char **strp;
- int opindex;
- long *valuep;
+parse_slo16 (CGEN_CPU_DESC cd,
+ const char ** strp,
+ int opindex,
+ long * valuep)
{
const char *errmsg;
enum cgen_parse_operand_result result_type;
if (strncasecmp (*strp, "low(", 4) == 0)
{
*strp += 4;
- errmsg = cgen_parse_address (od, strp, opindex, BFD_RELOC_M32R_LO16,
- &result_type, &value);
+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16,
+ & result_type, & value);
if (**strp != ')')
- return "missing `)'";
+ return MISSING_CLOSING_PARENTHESIS;
++*strp;
if (errmsg == NULL
&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
- value &= 0xffff;
+ value = ((value & 0xffff) ^ 0x8000) - 0x8000;
*valuep = value;
return errmsg;
}
if (strncasecmp (*strp, "sda(", 4) == 0)
{
*strp += 4;
- errmsg = cgen_parse_address (od, strp, opindex, BFD_RELOC_M32R_SDA16,
- NULL, &value);
+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_SDA16,
+ NULL, & value);
if (**strp != ')')
- return "missing `)'";
+ return MISSING_CLOSING_PARENTHESIS;
++*strp;
*valuep = value;
return errmsg;
}
- return cgen_parse_signed_integer (od, strp, opindex, valuep);
+ return cgen_parse_signed_integer (cd, strp, opindex, valuep);
}
/* Handle low() in an unsigned context.
handles the case where low() isn't present. */
static const char *
-parse_ulo16 (od, strp, opindex, valuep)
- CGEN_OPCODE_DESC od;
- const char **strp;
- int opindex;
- unsigned long *valuep;
+parse_ulo16 (CGEN_CPU_DESC cd,
+ const char **strp,
+ int opindex,
+ unsigned long *valuep)
{
const char *errmsg;
enum cgen_parse_operand_result result_type;
if (strncasecmp (*strp, "low(", 4) == 0)
{
*strp += 4;
- errmsg = cgen_parse_address (od, strp, opindex, BFD_RELOC_M32R_LO16,
- &result_type, &value);
+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16,
+ & result_type, & value);
if (**strp != ')')
- return "missing `)'";
+ return MISSING_CLOSING_PARENTHESIS;
++*strp;
if (errmsg == NULL
&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
return errmsg;
}
- return cgen_parse_unsigned_integer (od, strp, opindex, valuep);
+ return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
}
/* -- */
+const char * m32r_cgen_parse_operand
+ (CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *);
+
/* Main entry point for operand parsing.
This function is basically just a big switch statement. Earlier versions
This function could be moved into `parse_insn_normal', but keeping it
separate makes clear the interface between `parse_insn_normal' and each of
- the handlers.
-*/
+ the handlers. */
const char *
-m32r_cgen_parse_operand (od, opindex, strp, fields)
- CGEN_OPCODE_DESC od;
- int opindex;
- const char ** strp;
- CGEN_FIELDS * fields;
+m32r_cgen_parse_operand (CGEN_CPU_DESC cd,
+ int opindex,
+ const char ** strp,
+ CGEN_FIELDS * fields)
{
- const char * errmsg;
+ const char * errmsg = NULL;
+ /* Used by scalar operands that still need to be parsed. */
+ long junk ATTRIBUTE_UNUSED;
switch (opindex)
{
- case M32R_OPERAND_SR :
- errmsg = cgen_parse_keyword (od, strp, & m32r_cgen_opval_h_gr, & fields->f_r2);
- break;
- case M32R_OPERAND_DR :
- errmsg = cgen_parse_keyword (od, strp, & m32r_cgen_opval_h_gr, & fields->f_r1);
- break;
- case M32R_OPERAND_SRC1 :
- errmsg = cgen_parse_keyword (od, strp, & m32r_cgen_opval_h_gr, & fields->f_r1);
- break;
- case M32R_OPERAND_SRC2 :
- errmsg = cgen_parse_keyword (od, strp, & m32r_cgen_opval_h_gr, & fields->f_r2);
- break;
- case M32R_OPERAND_SCR :
- errmsg = cgen_parse_keyword (od, strp, & m32r_cgen_opval_h_cr, & fields->f_r2);
- break;
- case M32R_OPERAND_DCR :
- errmsg = cgen_parse_keyword (od, strp, & m32r_cgen_opval_h_cr, & fields->f_r1);
- break;
- case M32R_OPERAND_SIMM8 :
- errmsg = cgen_parse_signed_integer (od, strp, M32R_OPERAND_SIMM8, &fields->f_simm8);
- break;
- case M32R_OPERAND_SIMM16 :
- errmsg = cgen_parse_signed_integer (od, strp, M32R_OPERAND_SIMM16, &fields->f_simm16);
- break;
- case M32R_OPERAND_UIMM4 :
- errmsg = cgen_parse_unsigned_integer (od, strp, M32R_OPERAND_UIMM4, &fields->f_uimm4);
- break;
- case M32R_OPERAND_UIMM5 :
- errmsg = cgen_parse_unsigned_integer (od, strp, M32R_OPERAND_UIMM5, &fields->f_uimm5);
- break;
- case M32R_OPERAND_UIMM16 :
- errmsg = cgen_parse_unsigned_integer (od, strp, M32R_OPERAND_UIMM16, &fields->f_uimm16);
- break;
-/* start-sanitize-m32rx */
- case M32R_OPERAND_IMM1 :
- errmsg = cgen_parse_unsigned_integer (od, strp, M32R_OPERAND_IMM1, &fields->f_imm1);
+ case M32R_OPERAND_ACC :
+ errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_acc);
break;
-/* end-sanitize-m32rx */
-/* start-sanitize-m32rx */
case M32R_OPERAND_ACCD :
- errmsg = cgen_parse_keyword (od, strp, & m32r_cgen_opval_h_accums, & fields->f_accd);
+ errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_accd);
break;
-/* end-sanitize-m32rx */
-/* start-sanitize-m32rx */
case M32R_OPERAND_ACCS :
- errmsg = cgen_parse_keyword (od, strp, & m32r_cgen_opval_h_accums, & fields->f_accs);
- break;
-/* end-sanitize-m32rx */
-/* start-sanitize-m32rx */
- case M32R_OPERAND_ACC :
- errmsg = cgen_parse_keyword (od, strp, & m32r_cgen_opval_h_accums, & fields->f_acc);
+ errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_accs);
break;
-/* end-sanitize-m32rx */
- case M32R_OPERAND_HASH :
- errmsg = parse_hash (od, strp, M32R_OPERAND_HASH, &fields->f_nil);
- break;
- case M32R_OPERAND_HI16 :
- errmsg = parse_hi16 (od, strp, M32R_OPERAND_HI16, &fields->f_hi16);
- break;
- case M32R_OPERAND_SLO16 :
- errmsg = parse_slo16 (od, strp, M32R_OPERAND_SLO16, &fields->f_simm16);
- break;
- case M32R_OPERAND_ULO16 :
- errmsg = parse_ulo16 (od, strp, M32R_OPERAND_ULO16, &fields->f_uimm16);
- break;
- case M32R_OPERAND_UIMM24 :
- {
- bfd_vma value;
- errmsg = cgen_parse_address (od, strp, M32R_OPERAND_UIMM24, 0, NULL, & value);
- fields->f_uimm24 = value;
- }
- break;
- case M32R_OPERAND_DISP8 :
- {
- bfd_vma value;
- errmsg = cgen_parse_address (od, strp, M32R_OPERAND_DISP8, 0, NULL, & value);
- fields->f_disp8 = value;
- }
+ case M32R_OPERAND_DCR :
+ errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_cr_names, & fields->f_r1);
break;
case M32R_OPERAND_DISP16 :
{
- bfd_vma value;
- errmsg = cgen_parse_address (od, strp, M32R_OPERAND_DISP16, 0, NULL, & value);
+ bfd_vma value = 0;
+ errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP16, 0, NULL, & value);
fields->f_disp16 = value;
}
break;
case M32R_OPERAND_DISP24 :
{
- bfd_vma value;
- errmsg = cgen_parse_address (od, strp, M32R_OPERAND_DISP24, 0, NULL, & value);
+ bfd_vma value = 0;
+ errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP24, 0, NULL, & value);
fields->f_disp24 = value;
}
break;
-
- default :
- /* xgettext:c-format */
- fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
- abort ();
- }
-
- return errmsg;
-}
-
-/* Main entry point for operand insertion.
-
- This function is basically just a big switch statement. Earlier versions
- used tables to look up the function to use, but
- - if the table contains both assembler and disassembler functions then
- the disassembler contains much of the assembler and vice-versa,
- - there's a lot of inlining possibilities as things grow,
- - using a switch statement avoids the function call overhead.
-
- This function could be moved into `parse_insn_normal', but keeping it
- separate makes clear the interface between `parse_insn_normal' and each of
- the handlers. It's also needed by GAS to insert operands that couldn't be
- resolved during parsing.
-*/
-
-const char *
-m32r_cgen_insert_operand (od, opindex, fields, buffer, pc)
- CGEN_OPCODE_DESC od;
- int opindex;
- CGEN_FIELDS * fields;
- CGEN_INSN_BYTES_PTR buffer;
- bfd_vma pc;
-{
- const char * errmsg;
-
- switch (opindex)
- {
- case M32R_OPERAND_SR :
- errmsg = insert_normal (od, fields->f_r2, 0|(1<<CGEN_OPERAND_UNSIGNED), 12, 4, CGEN_FIELDS_BITSIZE (fields), buffer);
+ case M32R_OPERAND_DISP8 :
+ {
+ bfd_vma value = 0;
+ errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP8, 0, NULL, & value);
+ fields->f_disp8 = value;
+ }
break;
case M32R_OPERAND_DR :
- errmsg = insert_normal (od, fields->f_r1, 0|(1<<CGEN_OPERAND_UNSIGNED), 4, 4, CGEN_FIELDS_BITSIZE (fields), buffer);
+ errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r1);
break;
- case M32R_OPERAND_SRC1 :
- errmsg = insert_normal (od, fields->f_r1, 0|(1<<CGEN_OPERAND_UNSIGNED), 4, 4, CGEN_FIELDS_BITSIZE (fields), buffer);
+ case M32R_OPERAND_HASH :
+ errmsg = parse_hash (cd, strp, M32R_OPERAND_HASH, (long *) (& junk));
break;
- case M32R_OPERAND_SRC2 :
- errmsg = insert_normal (od, fields->f_r2, 0|(1<<CGEN_OPERAND_UNSIGNED), 12, 4, CGEN_FIELDS_BITSIZE (fields), buffer);
+ case M32R_OPERAND_HI16 :
+ errmsg = parse_hi16 (cd, strp, M32R_OPERAND_HI16, (unsigned long *) (& fields->f_hi16));
+ break;
+ case M32R_OPERAND_IMM1 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_IMM1, (unsigned long *) (& fields->f_imm1));
break;
case M32R_OPERAND_SCR :
- errmsg = insert_normal (od, fields->f_r2, 0|(1<<CGEN_OPERAND_UNSIGNED), 12, 4, CGEN_FIELDS_BITSIZE (fields), buffer);
+ errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_cr_names, & fields->f_r2);
break;
- case M32R_OPERAND_DCR :
- errmsg = insert_normal (od, fields->f_r1, 0|(1<<CGEN_OPERAND_UNSIGNED), 4, 4, CGEN_FIELDS_BITSIZE (fields), buffer);
+ case M32R_OPERAND_SIMM16 :
+ errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM16, (long *) (& fields->f_simm16));
break;
case M32R_OPERAND_SIMM8 :
- errmsg = insert_normal (od, fields->f_simm8, 0|(1<<CGEN_OPERAND_HASH_PREFIX), 8, 8, CGEN_FIELDS_BITSIZE (fields), buffer);
+ errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM8, (long *) (& fields->f_simm8));
break;
- case M32R_OPERAND_SIMM16 :
- errmsg = insert_normal (od, fields->f_simm16, 0|(1<<CGEN_OPERAND_HASH_PREFIX), 16, 16, CGEN_FIELDS_BITSIZE (fields), buffer);
+ case M32R_OPERAND_SLO16 :
+ errmsg = parse_slo16 (cd, strp, M32R_OPERAND_SLO16, (long *) (& fields->f_simm16));
break;
- case M32R_OPERAND_UIMM4 :
- errmsg = insert_normal (od, fields->f_uimm4, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_UNSIGNED), 12, 4, CGEN_FIELDS_BITSIZE (fields), buffer);
+ case M32R_OPERAND_SR :
+ errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r2);
break;
- case M32R_OPERAND_UIMM5 :
- errmsg = insert_normal (od, fields->f_uimm5, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_UNSIGNED), 11, 5, CGEN_FIELDS_BITSIZE (fields), buffer);
+ case M32R_OPERAND_SRC1 :
+ errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r1);
+ break;
+ case M32R_OPERAND_SRC2 :
+ errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r2);
break;
case M32R_OPERAND_UIMM16 :
- errmsg = insert_normal (od, fields->f_uimm16, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_UNSIGNED), 16, 16, CGEN_FIELDS_BITSIZE (fields), buffer);
+ errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM16, (unsigned long *) (& fields->f_uimm16));
break;
-/* start-sanitize-m32rx */
- case M32R_OPERAND_IMM1 :
+ case M32R_OPERAND_UIMM24 :
{
- long value = fields->f_imm1;
- value = ((value) - (1));
- errmsg = insert_normal (od, value, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_UNSIGNED), 15, 1, CGEN_FIELDS_BITSIZE (fields), buffer);
+ bfd_vma value = 0;
+ errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_UIMM24, 0, NULL, & value);
+ fields->f_uimm24 = value;
}
break;
-/* end-sanitize-m32rx */
-/* start-sanitize-m32rx */
- case M32R_OPERAND_ACCD :
- errmsg = insert_normal (od, fields->f_accd, 0|(1<<CGEN_OPERAND_UNSIGNED), 4, 2, CGEN_FIELDS_BITSIZE (fields), buffer);
+ case M32R_OPERAND_UIMM3 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM3, (unsigned long *) (& fields->f_uimm3));
break;
-/* end-sanitize-m32rx */
-/* start-sanitize-m32rx */
- case M32R_OPERAND_ACCS :
- errmsg = insert_normal (od, fields->f_accs, 0|(1<<CGEN_OPERAND_UNSIGNED), 12, 2, CGEN_FIELDS_BITSIZE (fields), buffer);
- break;
-/* end-sanitize-m32rx */
-/* start-sanitize-m32rx */
- case M32R_OPERAND_ACC :
- errmsg = insert_normal (od, fields->f_acc, 0|(1<<CGEN_OPERAND_UNSIGNED), 8, 1, CGEN_FIELDS_BITSIZE (fields), buffer);
- break;
-/* end-sanitize-m32rx */
- case M32R_OPERAND_HASH :
- errmsg = insert_normal (od, fields->f_nil, 0, 0, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
+ case M32R_OPERAND_UIMM4 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM4, (unsigned long *) (& fields->f_uimm4));
break;
- case M32R_OPERAND_HI16 :
- errmsg = insert_normal (od, fields->f_hi16, 0|(1<<CGEN_OPERAND_SIGN_OPT)|(1<<CGEN_OPERAND_UNSIGNED), 16, 16, CGEN_FIELDS_BITSIZE (fields), buffer);
+ case M32R_OPERAND_UIMM5 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM5, (unsigned long *) (& fields->f_uimm5));
break;
- case M32R_OPERAND_SLO16 :
- errmsg = insert_normal (od, fields->f_simm16, 0, 16, 16, CGEN_FIELDS_BITSIZE (fields), buffer);
+ case M32R_OPERAND_UIMM8 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM8, (unsigned long *) (& fields->f_uimm8));
break;
case M32R_OPERAND_ULO16 :
- errmsg = insert_normal (od, fields->f_uimm16, 0|(1<<CGEN_OPERAND_UNSIGNED), 16, 16, CGEN_FIELDS_BITSIZE (fields), buffer);
- break;
- case M32R_OPERAND_UIMM24 :
- errmsg = insert_normal (od, fields->f_uimm24, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_ABS_ADDR)|(1<<CGEN_OPERAND_UNSIGNED), 8, 24, CGEN_FIELDS_BITSIZE (fields), buffer);
- break;
- case M32R_OPERAND_DISP8 :
- {
- long value = fields->f_disp8;
- value = ((int) (((value) - (((pc) & (-4))))) >> (2));
- errmsg = insert_normal (od, value, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), 8, 8, CGEN_FIELDS_BITSIZE (fields), buffer);
- }
- break;
- case M32R_OPERAND_DISP16 :
- {
- long value = fields->f_disp16;
- value = ((int) (((value) - (pc))) >> (2));
- errmsg = insert_normal (od, value, 0|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), 16, 16, CGEN_FIELDS_BITSIZE (fields), buffer);
- }
- break;
- case M32R_OPERAND_DISP24 :
- {
- long value = fields->f_disp24;
- value = ((int) (((value) - (pc))) >> (2));
- errmsg = insert_normal (od, value, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), 8, 24, CGEN_FIELDS_BITSIZE (fields), buffer);
- }
+ errmsg = parse_ulo16 (cd, strp, M32R_OPERAND_ULO16, (unsigned long *) (& fields->f_uimm16));
break;
default :
/* xgettext:c-format */
- fprintf (stderr, _("Unrecognized field %d while building insn.\n"),
- opindex);
+ fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
abort ();
}
cgen_parse_fn * const m32r_cgen_parse_handlers[] =
{
- 0, /* default */
parse_insn_normal,
};
-cgen_insert_fn * const m32r_cgen_insert_handlers[] =
-{
- 0, /* default */
- insert_insn_normal,
-};
-
void
-m32r_cgen_init_asm (od)
- CGEN_OPCODE_DESC od;
+m32r_cgen_init_asm (CGEN_CPU_DESC cd)
{
+ m32r_cgen_init_opcode_table (cd);
+ m32r_cgen_init_ibld_table (cd);
+ cd->parse_handlers = & m32r_cgen_parse_handlers[0];
+ cd->parse_operand = m32r_cgen_parse_operand;
+#ifdef CGEN_ASM_INIT_HOOK
+CGEN_ASM_INIT_HOOK
+#endif
}
\f
-#if ! CGEN_INT_INSN_P
-/* Subroutine of insert_normal. */
+/* Regex construction routine.
-static INLINE void
-insert_1 (od, value, start, length, word_length, bufp)
- CGEN_OPCODE_DESC od;
- unsigned long value;
- int start,length,word_length;
- unsigned char *bufp;
-{
- unsigned long x,mask;
- int shift;
- int big_p = CGEN_OPCODE_INSN_ENDIAN (od) == CGEN_ENDIAN_BIG;
+ This translates an opcode syntax string into a regex string,
+ by replacing any non-character syntax element (such as an
+ opcode) with the pattern '.*'
- switch (word_length)
- {
- case 8:
- x = *bufp;
- break;
- case 16:
- if (big_p)
- x = bfd_getb16 (bufp);
- else
- x = bfd_getl16 (bufp);
- break;
- case 24:
- /* ??? This may need reworking as these cases don't necessarily
- want the first byte and the last two bytes handled like this. */
- if (big_p)
- x = (bfd_getb8 (bufp) << 16) | bfd_getb16 (bufp + 1);
- else
- x = bfd_getl16 (bufp) | (bfd_getb8 (bufp + 2) << 16);
- break;
- case 32:
- if (big_p)
- x = bfd_getb32 (bufp);
- else
- x = bfd_getl32 (bufp);
- break;
- default :
- abort ();
- }
+ It then compiles the regex and stores it in the opcode, for
+ later use by m32r_cgen_assemble_insn
- /* Written this way to avoid undefined behaviour. */
- mask = (((1L << (length - 1)) - 1) << 1) | 1;
- if (CGEN_INSN_LSB0_P)
- shift = start;
- else
- shift = (word_length - (start + length));
- x = (x & ~(mask << shift)) | ((value & mask) << shift);
+ Returns NULL for success, an error message for failure. */
- switch (word_length)
- {
- case 8:
- *bufp = x;
- break;
- case 16:
- if (big_p)
- bfd_putb16 (x, bufp);
- else
- bfd_putl16 (x, bufp);
- break;
- case 24:
- /* ??? This may need reworking as these cases don't necessarily
- want the first byte and the last two bytes handled like this. */
- if (big_p)
- {
- bfd_putb8 (x >> 16, bufp);
- bfd_putb16 (x, bufp + 1);
- }
- else
- {
- bfd_putl16 (x, bufp);
- bfd_putb8 (x >> 16, bufp + 2);
- }
- break;
- case 32:
- if (big_p)
- bfd_putb32 (x, bufp);
- else
- bfd_putl32 (x, bufp);
- break;
- default :
- abort ();
- }
-}
-
-#endif /* ! CGEN_INT_INSN_P */
-
-/* Default insertion routine.
-
- ATTRS is a mask of the boolean attributes.
- START is the starting bit number, architecture origin.
- LENGTH is the length of VALUE in bits.
- TOTAL_LENGTH is the total length of the insn.
+char *
+m32r_cgen_build_insn_regex (CGEN_INSN *insn)
+{
+ CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
+ const char *mnem = CGEN_INSN_MNEMONIC (insn);
+ char rxbuf[CGEN_MAX_RX_ELEMENTS];
+ char *rx = rxbuf;
+ const CGEN_SYNTAX_CHAR_TYPE *syn;
+ int reg_err;
- The result is an error message or NULL if success. */
+ syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
-/* ??? May need to know word length in order to properly place values as
- an insn may be made of multiple words and the current bit number handling
- may be insufficient. Word length is an architectural attribute and thus
- methinks the way to go [if needed] is to fetch this value from OD or
- define a macro in <arch>-opc.h rather than adding an extra argument -
- after all that's how endianness is handled. */
-/* ??? This duplicates functionality with bfd's howto table and
- bfd_install_relocation. */
-/* ??? For architectures where insns can be representable as ints,
- store insn in `field' struct and add registers, etc. while parsing? */
-/* ??? This doesn't handle bfd_vma's. Create another function when
- necessary. */
-
-static const char *
-insert_normal (od, value, attrs, start, length, total_length, buffer)
- CGEN_OPCODE_DESC od;
- long value;
- unsigned int attrs;
- int start;
- int length;
- int total_length;
- CGEN_INSN_BYTES_PTR buffer;
-{
- static char errbuf[100];
- /* Written this way to avoid undefined behaviour. */
- unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
+ /* Mnemonics come first in the syntax string. */
+ if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
+ return _("missing mnemonic in syntax string");
+ ++syn;
- /* If LENGTH is zero, this operand doesn't contribute to the value. */
- if (length == 0)
- return NULL;
+ /* Generate a case sensitive regular expression that emulates case
+ insensitive matching in the "C" locale. We cannot generate a case
+ insensitive regular expression because in Turkish locales, 'i' and 'I'
+ are not equal modulo case conversion. */
- /* Ensure VALUE will fit. */
- if ((attrs & CGEN_ATTR_MASK (CGEN_OPERAND_UNSIGNED)) != 0)
+ /* Copy the literal mnemonic out of the insn. */
+ for (; *mnem; mnem++)
{
- unsigned long maxval = mask;
- if ((unsigned long) value > maxval)
+ char c = *mnem;
+
+ if (ISALPHA (c))
{
- /* xgettext:c-format */
- sprintf (errbuf,
- _("operand out of range (%lu not between 0 and %lu)"),
- value, maxval);
- return errbuf;
+ *rx++ = '[';
+ *rx++ = TOLOWER (c);
+ *rx++ = TOUPPER (c);
+ *rx++ = ']';
}
+ else
+ *rx++ = c;
}
- else
+
+ /* Copy any remaining literals from the syntax string into the rx. */
+ for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
{
- long minval = - (1L << (length - 1));
- long maxval = (1L << (length - 1)) - 1;
- if (value < minval || value > maxval)
+ if (CGEN_SYNTAX_CHAR_P (* syn))
{
- sprintf
- /* xgettext:c-format */
- (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
- value, minval, maxval);
- return errbuf;
- }
- }
+ char c = CGEN_SYNTAX_CHAR (* syn);
-#if CGEN_INT_INSN_P
-
- if (total_length > 32)
- abort ();
- {
- int shift;
-
- if (CGEN_INSN_LSB0_P)
- shift = start;
- else
- shift = total_length - (start + length);
- *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
- }
-
-#else
-
- /* FIXME: unfinished and untested */
-
-/* ??? To be defined in <arch>-opc.h as necessary. */
-#ifndef CGEN_WORD_ENDIAN
-#define CGEN_WORD_ENDIAN(od) CGEN_OPCODE_ENDIAN (od)
-#endif
-#ifndef CGEN_INSN_WORD_ENDIAN
-#define CGEN_INSN_WORD_ENDIAN(od) CGEN_WORD_ENDIAN (od)
+ switch (c)
+ {
+ /* Escape any regex metacharacters in the syntax. */
+ case '.': case '[': case '\\':
+ case '*': case '^': case '$':
+
+#ifdef CGEN_ESCAPE_EXTENDED_REGEX
+ case '?': case '{': case '}':
+ case '(': case ')': case '*':
+ case '|': case '+': case ']':
#endif
+ *rx++ = '\\';
+ *rx++ = c;
+ break;
- /* The hard case is probably too slow for the normal cases.
- It's certainly more difficult to understand than the normal case.
- Thus this is split into two. Keep it that way. The hard case is defined
- to be when a field straddles a (loosely defined) word boundary
- (??? which may require target specific help to determine). */
-
-#if 0 /*wip*/
-
-#define HARD_CASE_P 0 /* FIXME:wip */
-
- if (HARD_CASE_P)
- {
- unsigned char *bufp = (unsigned char *) buffer;
- int insn_length_left = total_length;
-
- if (CGEN_INSN_LSB0_P)
- {
- int word_offset = (CGEN_INSN_WORD_ENDIAN (od) == CGEN_ENDIAN_BIG
- ? ...
- : start / CGEN_BASE_INSN_BITSIZE);
- bufp += word_offset * (CGEN_BASE_INSN_BITSIZE / 8);
- if (CGEN_INSN_WORD_ENDIAN (od) == CGEN_ENDIAN_BIG)
- else
- start -= word_offset * CGEN_BASE_INSN_BITSIZE;
+ default:
+ if (ISALPHA (c))
+ {
+ *rx++ = '[';
+ *rx++ = TOLOWER (c);
+ *rx++ = TOUPPER (c);
+ *rx++ = ']';
+ }
+ else
+ *rx++ = c;
+ break;
+ }
}
else
{
- int word_offset = (CGEN_INSN_WORD_ENDIAN (od) == CGEN_ENDIAN_BIG
- ? start / CGEN_BASE_INSN_BITSIZE
- : ...);
- bufp += word_offset * (CGEN_BASE_INSN_BITSIZE / 8);
- if (CGEN_INSN_WORD_ENDIAN (od) == CGEN_ENDIAN_BIG)
- start -= word_offset * CGEN_BASE_INSN_BITSIZE;
- else
- }
-
- /* Loop so we handle a field straddling an insn word boundary
- (remember, "insn word boundary" is loosely defined here). */
-
- while (length > 0)
- {
- int this_pass_length = length;
- int this_pass_start = start;
- int this_pass_word_length = min (insn_length_left,
- (CGEN_BASE_INSN_BITSIZE == 8
- ? 32
- : CGEN_BASE_INSN_BITSIZE));
-
- insert_1 (od, value, attrs,
- this_pass_start, this_pass_length, this_pass_word_length,
- bufp);
-
- length -= this_pass_length;
- insn_length_left -= this_pass_word_length;
- if (???)
- {
- value >>= ???;
- start += ???;
- }
- else
- {
- value >>= ???;
- start += ???;
- }
- bufp += this_pass_word_length / 8;
+ /* Replace non-syntax fields with globs. */
+ *rx++ = '.';
+ *rx++ = '*';
}
}
- else
-#endif /* 0 */
- {
- unsigned char *bufp = (unsigned char *) buffer;
- if (length > 32)
- abort ();
+ /* Trailing whitespace ok. */
+ * rx++ = '[';
+ * rx++ = ' ';
+ * rx++ = '\t';
+ * rx++ = ']';
+ * rx++ = '*';
- /* Adjust start,total_length,bufp to point to the pseudo-word that holds
- the value. For example in a 48 bit insn where the value to insert
- (say an immediate value) is the last 16 bits then word_length here
- would be 16. To handle a 24 bit insn with an 18 bit immediate,
- insert_1 handles 24 bits (using a combination of bfd_get8,16). */
+ /* But anchor it after that. */
+ * rx++ = '$';
+ * rx = '\0';
- if (total_length > 32)
- {
- int needed_width = start % 8 + length;
- int fetch_length = (needed_width <= 8 ? 8
- : needed_width <= 16 ? 16
- : 32);
+ CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
+ reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
- if (CGEN_INSN_LSB0_P)
- {
- if (CGEN_INSN_WORD_ENDIAN (od) == CGEN_ENDIAN_BIG)
- {
- abort (); /* wip */
- }
- else
- {
- int offset = start & ~7;
-
- bufp += offset / 8;
- start -= offset;
- total_length -= offset;
- }
- }
- else
- {
- if (CGEN_INSN_WORD_ENDIAN (od) == CGEN_ENDIAN_BIG)
- {
- int offset = start & ~7;
-
- bufp += offset / 8;
- start -= offset;
- total_length -= offset;
- }
- else
- {
- abort (); /* wip */
- }
- }
- }
+ if (reg_err == 0)
+ return NULL;
+ else
+ {
+ static char msg[80];
- insert_1 (od, value, start, length, total_length, bufp);
+ regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
+ regfree ((regex_t *) CGEN_INSN_RX (insn));
+ free (CGEN_INSN_RX (insn));
+ (CGEN_INSN_RX (insn)) = NULL;
+ return msg;
}
-
-#endif /* ! CGEN_INT_INSN_P */
-
- return NULL;
}
+
\f
/* Default insn parser.
but that can be handled there. Not handling backtracking here may get
expensive in the case of the m68k. Deal with later.
- Returns NULL for success, an error message for failure.
-*/
+ Returns NULL for success, an error message for failure. */
static const char *
-parse_insn_normal (od, insn, strp, fields)
- CGEN_OPCODE_DESC od;
- const CGEN_INSN * insn;
- const char ** strp;
- CGEN_FIELDS * fields;
+parse_insn_normal (CGEN_CPU_DESC cd,
+ const CGEN_INSN *insn,
+ const char **strp,
+ CGEN_FIELDS *fields)
{
- const CGEN_SYNTAX * syntax = CGEN_INSN_SYNTAX (insn);
- const char * str = *strp;
- const char * errmsg;
- const char * p;
- const unsigned char * syn;
+ /* ??? Runtime added insns not handled yet. */
+ const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
+ const char *str = *strp;
+ const char *errmsg;
+ const char *p;
+ const CGEN_SYNTAX_CHAR_TYPE * syn;
#ifdef CGEN_MNEMONIC_OPERANDS
/* FIXME: wip */
int past_opcode_p;
GAS's input scrubber will ensure mnemonics are lowercase, but we may
not be called from GAS. */
p = CGEN_INSN_MNEMONIC (insn);
- while (*p && tolower (*p) == tolower (*str))
+ while (*p && TOLOWER (*p) == TOLOWER (*str))
++p, ++str;
-
- if (* p || (* str && !isspace (* str)))
+
+ if (* p)
return _("unrecognized instruction");
- CGEN_INIT_PARSE (od);
- cgen_init_parse_operand (od);
+#ifndef CGEN_MNEMONIC_OPERANDS
+ if (* str && ! ISSPACE (* str))
+ return _("unrecognized instruction");
+#endif
+
+ CGEN_INIT_PARSE (cd);
+ cgen_init_parse_operand (cd);
#ifdef CGEN_MNEMONIC_OPERANDS
past_opcode_p = 0;
#endif
/* Non operand chars must match exactly. */
if (CGEN_SYNTAX_CHAR_P (* syn))
{
- if (*str == CGEN_SYNTAX_CHAR (* syn))
+ /* FIXME: While we allow for non-GAS callers above, we assume the
+ first char after the mnemonic part is a space. */
+ /* FIXME: We also take inappropriate advantage of the fact that
+ GAS's input scrubber will remove extraneous blanks. */
+ if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn)))
{
#ifdef CGEN_MNEMONIC_OPERANDS
- if (* syn == ' ')
+ if (CGEN_SYNTAX_CHAR(* syn) == ' ')
past_opcode_p = 1;
#endif
++ syn;
++ str;
}
- else
+ else if (*str)
{
/* Syntax char didn't match. Can't be this insn. */
- /* FIXME: would like to return something like
- "expected char `c'" */
- return _("syntax error");
+ static char msg [80];
+
+ /* xgettext:c-format */
+ sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
+ CGEN_SYNTAX_CHAR(*syn), *str);
+ return msg;
+ }
+ else
+ {
+ /* Ran out of input. */
+ static char msg [80];
+
+ /* xgettext:c-format */
+ sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
+ CGEN_SYNTAX_CHAR(*syn));
+ return msg;
}
continue;
}
/* We have an operand of some sort. */
- errmsg = m32r_cgen_parse_operand (od, CGEN_SYNTAX_FIELD (*syn),
+ errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
&str, fields);
if (errmsg)
return errmsg;
}
/* If we're at the end of the syntax string, we're done. */
- if (* syn == '\0')
+ if (* syn == 0)
{
/* FIXME: For the moment we assume a valid `str' can only contain
blanks now. IE: We needn't try again with a longer version of
the insn and it is assumed that longer versions of insns appear
before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
- while (isspace (* str))
+ while (ISSPACE (* str))
++ str;
if (* str != '\0')
/* We couldn't parse it. */
return _("unrecognized instruction");
}
-
-/* Default insn builder (insert handler).
- The instruction is recorded in CGEN_INT_INSN_P byte order
- (meaning that if CGEN_INT_INSN_P BUFFER is an int * and thus the value is
- recorded in host byte order, otherwise BUFFER is an array of bytes and the
- value is recorded in target byte order).
- The result is an error message or NULL if success. */
-
-static const char *
-insert_insn_normal (od, insn, fields, buffer, pc)
- CGEN_OPCODE_DESC od;
- const CGEN_INSN * insn;
- CGEN_FIELDS * fields;
- CGEN_INSN_BYTES_PTR buffer;
- bfd_vma pc;
-{
- const CGEN_SYNTAX * syntax = CGEN_INSN_SYNTAX (insn);
- unsigned long value;
- const unsigned char * syn;
-
- CGEN_INIT_INSERT (od);
- value = CGEN_INSN_VALUE (insn);
-
- /* If we're recording insns as numbers (rather than a string of bytes),
- target byte order handling is deferred until later. */
-
-#if CGEN_INT_INSN_P
-
- *buffer = value;
-
-#else
-
- cgen_insn_put_value (od, buffer, min (CGEN_BASE_INSN_BITSIZE,
- CGEN_FIELDS_BITSIZE (fields)),
- value);
-
-#endif /* ! CGEN_INT_INSN_P */
-
- /* ??? Rather than scanning the syntax string again, we could store
- in `fields' a null terminated list of the fields that are present. */
-
- for (syn = CGEN_SYNTAX_STRING (syntax); * syn != '\0'; ++ syn)
- {
- const char *errmsg;
-
- if (CGEN_SYNTAX_CHAR_P (* syn))
- continue;
-
- errmsg = m32r_cgen_insert_operand (od, CGEN_SYNTAX_FIELD (*syn),
- fields, buffer, pc);
- if (errmsg)
- return errmsg;
- }
-
- return NULL;
-}
\f
/* Main entry point.
This routine is called for each instruction to be assembled.
printed).
Note that when processing (non-alias) macro-insns,
- this function recurses. */
+ this function recurses.
+
+ ??? It's possible to make this cpu-independent.
+ One would have to deal with a few minor things.
+ At this point in time doing so would be more of a curiosity than useful
+ [for example this file isn't _that_ big], but keeping the possibility in
+ mind helps keep the design clean. */
const CGEN_INSN *
-m32r_cgen_assemble_insn (od, str, fields, buf, errmsg)
- CGEN_OPCODE_DESC od;
- const char * str;
- CGEN_FIELDS * fields;
- CGEN_INSN_BYTES_PTR buf;
- char ** errmsg;
+m32r_cgen_assemble_insn (CGEN_CPU_DESC cd,
+ const char *str,
+ CGEN_FIELDS *fields,
+ CGEN_INSN_BYTES_PTR buf,
+ char **errmsg)
{
- const char * start;
- CGEN_INSN_LIST * ilist;
+ const char *start;
+ CGEN_INSN_LIST *ilist;
+ const char *parse_errmsg = NULL;
+ const char *insert_errmsg = NULL;
+ int recognized_mnemonic = 0;
/* Skip leading white space. */
- while (isspace (* str))
+ while (ISSPACE (* str))
++ str;
/* The instructions are stored in hashed lists.
Get the first in the list. */
- ilist = CGEN_ASM_LOOKUP_INSN (od, str);
+ ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
/* Keep looking until we find a match. */
-
start = str;
for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
{
const CGEN_INSN *insn = ilist->insn;
+ recognized_mnemonic = 1;
-#if 0 /* not needed as unsupported opcodes shouldn't be in the hash lists */
+#ifdef CGEN_VALIDATE_INSN_SUPPORTED
+ /* Not usually needed as unsupported opcodes
+ shouldn't be in the hash lists. */
/* Is this insn supported by the selected cpu? */
- if (! m32r_cgen_insn_supported (od, insn))
+ if (! m32r_cgen_insn_supported (cd, insn))
continue;
#endif
-
- /* If the RELAX attribute is set, this is an insn that shouldn't be
+ /* If the RELAXED attribute is set, this is an insn that shouldn't be
chosen immediately. Instead, it is used during assembler/linker
relaxation if possible. */
- if (CGEN_INSN_ATTR (insn, CGEN_INSN_RELAX) != 0)
+ if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
continue;
str = start;
- /* Record a default length for the insn. This will get set to the
- correct value while parsing. */
- /* FIXME: wip */
+ /* Skip this insn if str doesn't look right lexically. */
+ if (CGEN_INSN_RX (insn) != NULL &&
+ regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH)
+ continue;
+
+ /* Allow parse/insert handlers to obtain length of insn. */
CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
- if (! CGEN_PARSE_FN (insn) (od, insn, & str, fields))
- {
- /* ??? 0 is passed for `pc' */
- if (CGEN_INSERT_FN (insn) (od, insn, fields, buf, (bfd_vma) 0) != NULL)
- continue;
- /* It is up to the caller to actually output the insn and any
- queued relocs. */
- return insn;
- }
+ parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
+ if (parse_errmsg != NULL)
+ continue;
- /* Try the next entry. */
+ /* ??? 0 is passed for `pc'. */
+ insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
+ (bfd_vma) 0);
+ if (insert_errmsg != NULL)
+ continue;
+
+ /* It is up to the caller to actually output the insn and any
+ queued relocs. */
+ return insn;
}
- /* FIXME: We can return a better error message than this.
- Need to track why it failed and pick the right one. */
{
- static char errbuf[100];
+ static char errbuf[150];
+#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
+ const char *tmp_errmsg;
+
+ /* If requesting verbose error messages, use insert_errmsg.
+ Failing that, use parse_errmsg. */
+ tmp_errmsg = (insert_errmsg ? insert_errmsg :
+ parse_errmsg ? parse_errmsg :
+ recognized_mnemonic ?
+ _("unrecognized form of instruction") :
+ _("unrecognized instruction"));
+
+ if (strlen (start) > 50)
+ /* xgettext:c-format */
+ sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
+ else
+ /* xgettext:c-format */
+ sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
+#else
if (strlen (start) > 50)
/* xgettext:c-format */
sprintf (errbuf, _("bad instruction `%.50s...'"), start);
else
/* xgettext:c-format */
sprintf (errbuf, _("bad instruction `%.50s'"), start);
+#endif
*errmsg = errbuf;
return NULL;
}
}
-\f
-#if 0 /* This calls back to GAS which we can't do without care. */
-
-/* Record each member of OPVALS in the assembler's symbol table.
- This lets GAS parse registers for us.
- ??? Interesting idea but not currently used. */
-
-/* Record each member of OPVALS in the assembler's symbol table.
- FIXME: Not currently used. */
-
-void
-m32r_cgen_asm_hash_keywords (od, opvals)
- CGEN_OPCODE_DESC od;
- CGEN_KEYWORD * opvals;
-{
- CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL);
- const CGEN_KEYWORD_ENTRY * ke;
-
- while ((ke = cgen_keyword_search_next (& search)) != NULL)
- {
-#if 0 /* Unnecessary, should be done in the search routine. */
- if (! m32r_cgen_opval_supported (ke))
- continue;
-#endif
- cgen_asm_record_register (od, ke->name, ke->value);
- }
-}
-
-#endif /* 0 */
projects / binutils.git / blobdiff