+
+ * sparc-opc.c: Set F_FBR on floating point branch instructions.
+ Set F_FLOAT on other floating point instructions.
+
+
+ * ppc-opc.c (PPC860): Macro for 860/821 specific instructions and
+ registers.
+ (powerpc_opcodes): Add 860/821 specific SPRs.
+
+
+ * configure.in: Permit --enable-shared to specify a list of
+ directories. Set and substitute BFD_PICLIST.
+ * configure: Rebuild.
+ * Makefile.in (BFD_PICLIST): Rename from BFD_LIST. Change all
+ uses. Set to @BFD_PICLIST@.
+
+
+ * h8300-dis.c (bfd_h8_disassemble): Use "bit" for L_3 immediates,
+ not "abs", which may be needed for the absolute in something
+ like btst #0,@10:8. Print L_3 immediates separately from other
+ immediates. Change ABSMOV reference to ABS8MEM.
+
+
+ * sparc-dis.c (opcodes_initialized): Move inside print_insn_sparc.
+ (current_arch_mask): New static global.
+ (compute_arch_mask): New static function.
+ (print_insn_sparc): Delete sparc_v9_p. New static local
+ current_mach. Resort opcode table if current_mach changes.
+ Generalize "insn not supported" test.
+ (compare_opcodes): Prefer supported opcodes to nonsupported ones.
+ Delete test for v9/!v9.
+ * sparc-opc.c (MASK_*): Use SPARC_OPCODE_ARCH_MASK.
+ (v6notlet): Define.
+ (brfc): Split into CBR and FBR for coprocessor/fp branches.
+ (brfcx): Renamed to FBRX.
+ (condfc): Renamed to CONDFC. Pass v6notlet to CBR (standard
+ coprocessor mnemonics are not supported on the sparclet).
+ (condf): Renamed to CONDF.
+ (SLCBCC2): Delete F_ALIAS flag.
+
+
+ * sparc-opc.c (sparc_opcodes): rd must be 0 for
+ mov foo,{%y,%psr,%wim,%tbr}. Support mov foo,%asrX.
+
+
+ * Makefile.in (config.status): Depend upon BFD VERSION file, so
+ that the shared library version number is set correctly.
+
+
+ * configure.in: Use AC_CHECK_TOOL to find ar and ranlib. From
+ * configure: Rebuild.
+
+
+ * z8kgen.c (internal, gas): Call xmalloc rather than unchecked
+ malloc.
+
+
+ * configure: Rebuild with autoconf 2.8.
+
+
+ * sparc-dis.c (print_insn_sparc): Handle 'O' operand char like 'r'.
+ * sparc-opc.c (sparc_opcodes): Use 'O' operand char for `neg reg'.
+
+
+ * configure.in: Don't set SHLIB or SHLINK to an empty string,
+ since they appear as targets in Makefile.in.
+ * configure: Rebuild.
+
+
+ * mpw-make.sed: Edit out shared library support bits.
+
+
+ * sparc-opc.c (v8,v6notv9): Add MASK_SPARCLET.
+ (sparc_opcode_archs): Add MASK_V8 to sparclet entry.
+ (sparc_opcodes): Add sparclet insns.
+ (sparclet_cpreg_table): New static local.
+ (sparc_{encode,decode}_sparclet_cpreg): New functions.
+ * sparc-dis.c (print_insn_sparc): Handle sparclet cpregs.
+
+
+ * i386-dis.c (index16): New static variable.
+ (putop): Print jecxz for 32 bit case, jcxz for 16 bit, not the
+ other way around.
+ (OP_indirE): Return result of OP_E.
+ (OP_E): Check for 16 bit addressing mode, and disassemble
+ correctly. Optimised 32 bit case a little. Don't print
+ "(base,index,scale)" when sib specifies only an offset.
+
+
+ * configure.in: Set and substitute SHLIB_DEP.
+ * configure: Rebuild.
+ * Makefile.in (SHLIB_DEP): New variable.
+ (LIBIBERTY_LISTS, BFD_LIST): New variables.
+ (stamp-piclist): Depend upon LIBIBERTY_LISTS and BFD_LIST. If
+ COMMON_SHLIB, add them to piclist with appropriate modifications.
+ ($(SHLIB)): Depend upon $(SHLIB_DEP). Don't check COMMON_SHLIB
+ here: just use piclist.
+
+
+ * sparc-dis.c (MASK_V9,V9_ONLY_P,V9_P): Define.
+ (print_insn_sparc): Rewrite v9/not-v9 tests.
+ (compare_opcodes): Likewise.
+ * sparc-opc.c (MASK_<ARCH>): Define.
+ (v6,v7,v8,sparclite,v9,v9a): Redefine.
+ (sparclet,v6notv9): Define.
+ (sparc_opcode_archs): Delete member `conflicts'. Add `supported'.
+ (sparc_opcodes): Delete F_NOTV9, use v6notv9 instead.
+
+
+ * configure.in: Call AC_PROG_CC before configure.host.
+ * configure: Rebuild.
+
+ * Makefile.in (SONAME): Remove leading ../bfd/ from $(SHLIB).
+
+
+ * i386-dis.c (onebyte_has_modrm): New static array.
+ (twobyte_has_modrm): New static array.
+ (print_insn_i386): Only fetch the mod/reg/rm byte if it is needed.
+
+
+ * Makefile.in ($(SHLINK)): Check ts against $(SHLIB), not
+ $(SHLINK).
+
+
+ * ppc-opc.c (PPC): Undef, so default defination on Windows NT
+ doesn't conflict.
+
+
+ * m68k-opc.c (m68k_opcodes): The bkpt instruction is supported on
+ m68010up, not just m68020up | cpu32.
+
+ * Makefile.in (SONAME): New variable.
+ ($(SHLINK)): Make a link to the transformed name, as well.
+ (stamp-tshlink): New target.
+ (install): Skip stamp-tshlink during install.
+
+
+ * configure.in: Call AC_ARG_PROGRAM.
+ * configure: Rebuild.
+ * Makefile.in (program_transform_name): New variable.
+ (install): Transform library name before installing it.
+
+
+ * i960-dis.c (mem): Add HX dcinva instruction.
+
+ Support for building as a shared library, based on patches from
+ * configure.in: Add AC_ARG_ENABLE for shared and commonbfdlib.
+ New substitutions: ALLLIBS, PICFLAG, SHLIB, SHLIB_CC,
+ SHLIB_CFLAGS, COMMON_SHLIB, SHLINK.
+ * configure: Rebuild.
+ * Makefile.in (ALLLIBS): New variable.
+ (PICFLAG, SHLIB, SHLIB_CC, SHLIB_CFLAGS): New variables.
+ (COMMON_SHLIB, SHLINK): New variables.
+ (.c.o): If PICFLAG is set, compile twice, once PIC, once normal.
+ (STAGESTUFF): Remove variable.
+ (all): Depend upon $(ALLLIBS) rather than $(TARGETLIB).
+ (stamp-piclist, piclist): New targets.
+ ($(SHLIB), $(SHLINK)): New targets.
+ ($(OFILES)): Depend upon stamp-picdir.
+ (disassemble.o): Build twice if PICFLAG is set.
+ (MOSTLYCLEAN): Add pic/*.o.
+ (clean): Remove $(SHLIB), $(SHLINK), piclist, and stamp-piclist.
+ (distclean): Remove pic and stamp-picdir.
+ (install): Install shared libraries.
+ (stamp-picdir): New target.
+
+
+ * sparc-dis.c (print_insn_sparc): Delete DISASM_RAW_INSN support.
+ Print unknown instruction as "unknown", rather than in hex.
+
+
+ * dis-buf.c: Include "sysdep.h" before "dis-asm.h".
+
+
+ * sparc-opc.c (sparc_opcode_archs): Mark v8/sparclite as conflicting.
+
+
+ * i386-dis.c (print_insn_i386): Only fetch the mod/reg/rm byte
+ when necessary. From Ulrich Drepper
+
+
+ * sparc-dis.c (print_insn_sparc): NUMOPCODES replaced with
+ sparc_num_opcodes. Update architecture enum values.
+ * sparc-opc.c (sparc_opcode_archs): Replaces architecture_pname.
+ (sparc_opcode_lookup_arch): New function.
+ (sparc_num_opcodes): Renamed from bfd_sparc_num_opcodes.
+ (sparc_opcodes): Add v9a shutdown insn.
+
+
+ * sparc-dis.c (print_insn_sparc): Renamed from print_insn.
+ If DISASM_RAW_INSN, print insn in hex. Handle v9a as opcode
+ architecture.
+ (print_insn_sparc64): Deleted.
+ * disassemble.c (disassembler, case bfd_arch_sparc): Always use
+ print_insn_sparc.
+
+ * sparc-opc.c (architecture_pname): Add v9a.
+
+
+ * alpha-opc.h (alpha_insn_set): VAX floating point opcode was
+ incorrectly defined as 0x16 when it should be 0x15.
+ (FLOAT_FORMAT_MASK): function code is 11 bits, not just 7 bits!
+ (alpha_insn_set): added cvtst and cvttq float ops. Also added
+ excb (exception barrier) which is defined in the Alpha
+ Architecture Handbook version 2.
+ * alpha-dis.c (print_insn_alpha): Fixed special-case decoding for
+ OPERATE_FORMAT_CODE type instructions. The bug caused mulq to be
+ disassembled as or, for example.
+
+
+ * mips-dis.c (print_insn_arg): Print cases 'i' and 'u' in hex.
+ (_print_insn_mips): Change i from int to unsigned int.
+
+
+ * ppc-opc.c (powerpc_opcodes): tlbi POWER opcode form different
+ from tlbie PowerPC opcode. Add PPC603 tlbld and tlbli.
+
+
+ * i386-dis.c: Added Pentium Pro instructions.
+
+
+ * ppc-opc.c (fsqrt{,.}): Duplicate for PowerPC in addition to
+ being for Power2.
+
+
+ * sh-opc.h (sh_nibble_type): Added REG_B.
+ (sh_arg_type): Added A_REG_B.
+ (sh_table): Added pref and bank reg versions of ldc, ldc.l, stc
+ and stc.l opcodes.
+ * sh-dis.c (print_insn_shx): Added cases for REG_B and A_REG_B.
+
+
+ * disassemble.c (disassembler): Use new bfd_big_endian macro.
+
+
+ * Makefile.in (distclean): Remove stamp-h. From Ronald
+
+
+ * alpha-dis.c (print_insn_alpha): fixed decoding of cpys
+ instruction.
+
+
+ * sh-opc.h (sh_arg_type): Added A_SSR and A_SPC.
+ (sh_table): Added many SH3 opcodes.
+ * sh-dis.c (print_insn_shx): Added cases for A_SSR and A_SPC.
+
+
+ * ppc-opc.c (subfc., subfco): Mark this PPCCOM, not PPC.
+ (subco,subco.): Mark this PPC, not PPCCOM.
+
+
+ * configure: Rebuild with autoconf 2.7.
+
+
+ * configure: Rebuild with autoconf 2.6.
+
+
+ * configure.in: Sort list of architectures. Accept but do nothing
+ for alliant, convex, pyramid, romp, and tahoe.
+
+
+ * a29k-dis.c (print_special): Change num to unsigned int.
+
+
+ * a29k-dis.c (print_insn): Cast insn24 to unsigned long when
+ shifting it.
+
+
+ * configure.in: Call AC_CHECK_PROG to find and cache AR.
+ * configure: Rebuilt.
+
+
+ * configure.in: Add case for bfd_i860_arch.
+ * configure: Rebuild.
+
+
+ * m68k-opc.c (m68k_opcodes): Correct fmoveml operands.
+ * m68k-dis.c (NEXTSINGLE): Change i to unsigned int.
+ (NEXTDOUBLE): Likewise.
+ (print_insn_m68k): Don't match fmoveml if there is more than one
+ register in the list.
+ (print_insn_arg): Handle a place of '8' for a type of 'L'.
+
+
+ * m68k-opc.c: Use #W rather than #w.
+ * m68k-dis.c (print_insn_arg): Handle new 'W' place.
+
+
+ * m68k-opc.c (m68k_opcode_aliases): Add dbfw as an alias for dbf,
+ and likewise for all the dbxx opcodes.
+
+
+ * arc-dis.c: Include elf-bfd.h rather than libelf.h.
+
+
+ * mips-opc.c: Added shorthand (V1) for INSN_4100 manifest. Added
+ the VR4100 specific instructions to the mips_opcodes structure.
+
+
+ * mpw-config.in, mpw-make.sed: Remove ugly workaround for
+ ugly Metrowerks bug in CW6, is fixed in CW7.
+
* ppc-opc.c (whole file): Add flags for common/any support.
* mips-opc.c: Change unaligned loads and stores with "t,A"
operands to use "t,A(b)".
-start-sanitize-sh3e
* sh-dis.c (print_insn_shx): Add F_FR0 support.
-end-sanitize-sh3e
* sh-dis.c (print_insn_shx): Change loop over op->arg[n] to iterate
* configure.in: Substitute HDEFINES.
* configure: Rebuild.
-start-sanitize-sh3e
* sh-opc.h (sh_arg_type): Add F_FR0.
(sh_table, case fmac): Add F_FR0 as first argument.
-end-sanitize-sh3e
* sh-opc.h (sh_opcode_info): Increase arg array size to 4.
Use them rather than looking through target Makefile fragments.
* configure: Rebuild.
-start-sanitize-sh3e
* sh-opc.h (ftrc): Change FPUL_N to FPUL_M.
-end-sanitize-sh3e
* sparc-opc.c (sparc_opcodes): Delete duplicate wr %y insn.
(sparc_{encode,decode}_prefetch): New functions.
* sparc-dis.c (print_insn): Handle '*' arg (prefetch function).
-start-sanitize-sh3e
* sh-opc.h: Add blank lines to improve readabililty of sh3e
instructions.
-end-sanitize-sh3e
* sh-dis.c: Correct comment on first line of file.
and likewise for the size variants. Add dbhs as an alias for
dbcc.
-start-sanitize-sh3e
* sh-opc.h (FP sts instructions): Update to match reality.
-end-sanitize-sh3e
* m68k-dis.c: (fpcr_names): Add % before all register names.
* m68k-opc.c (m68k_opcode_aliases): Add jsrl and jsrs as aliases
for jsr.
-start-sanitize-sh3e
* sh-dis.c (print_insn_shx): Handle new operand types F_REG_N,
* sh-opc.h (sh_arg_type): Add new operand types.
(sh_table): Add new opcodes from SH3E Floating Point ISA.
-end-sanitize-sh3e
* Makefile.in (distclean): Remove generated file config.h.
sparse_tabent.
(ea): Local static array scale_tab now const.
- start-sanitize-i960xl
- * i960-dis.c (reg): Added i960XL instructions to reg_init table.
+ * i960-dis.c (reg): Added i960JX instructions to reg_init table.
(REG_MAX): Updated.
- end-sanitize-i960xl
projects / binutils.git / blobdiff