Copyright 1986, 1987, 1988, 1989, 1990, 1991, 1993
Free Software Foundation, Inc.
-This file is part of GDB.
+ This file is part of GDB.
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2 of the License, or
-(at your option) any later version.
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
-You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software
-Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place - Suite 330,
+ Boston, MA 02111-1307, USA. */
/* g++ support is not yet included. */
init_extra_frame_info (fromleaf, fi)
extern void init_extra_frame_info ();
-#define IEEE_FLOAT
+#define IEEE_FLOAT (1)
/* Offset from address of function to start of its code.
Zero on most machines. */
/* Advance PC across any function entry prologue instructions
to reach some "real" code. */
-#define SKIP_PROLOGUE(frompc) \
- { (frompc) = skip_prologue (frompc); }
-extern CORE_ADDR skip_prologue ();
+extern CORE_ADDR m88k_skip_prologue (CORE_ADDR);
+#define SKIP_PROLOGUE(frompc) (m88k_skip_prologue (frompc))
/* The m88k kernel aligns all instructions on 4-byte boundaries. The
kernel also uses the least significant two bits for its own hocus
to realize that those two bits are not really a part of the address
of an instruction. Shrug. */
-#define ADDR_BITS_REMOVE(addr) ((addr) & ~3)
+extern CORE_ADDR m88k_addr_bits_remove (CORE_ADDR);
+#define ADDR_BITS_REMOVE(addr) m88k_addr_bits_remove (addr)
/* Immediately after a function call, return the saved pc.
Can't always go through the frames for this because on some machines
/* Stack grows downward. */
-#define INNER_THAN <
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
/* Sequence of bytes for breakpoint instruction. */
#define DECR_PC_AFTER_BREAK 0
-/* Nonzero if instruction at PC is a return instruction. */
-/* 'jmp r1' or 'jmp.n r1' is used to return from a subroutine. */
-
-#define ABOUT_TO_RETURN(pc) (read_memory_integer (pc, 2) == 0xF800)
-
/* Say how long (ordinary) registers are. This is a piece of bogosity
used in push_word and a few other places; REGISTER_RAW_SIZE is the
real way to know how big a register is. */
#define PC_REGNUM SXIP_REGNUM /* Program Counter */
#define NPC_REGNUM SNIP_REGNUM /* Next Program Counter */
-#define NNPC_REGNUM SFIP_REGNUM /* Next Next Program Counter */
+#define NNPC_REGNUM SFIP_REGNUM /* Next Next Program Counter */
-#define PSR_REGNUM 32 /* Processor Status Register */
+#define PSR_REGNUM 32 /* Processor Status Register */
#define FPSR_REGNUM 33 /* Floating Point Status Register */
#define FPCR_REGNUM 34 /* Floating Point Control Register */
#define XFP_REGNUM 38 /* First Extended Float Register */
#define FRAME_CHAIN(thisframe) \
frame_chain (thisframe)
-#define FRAMELESS_FUNCTION_INVOCATION(frame, fromleaf) \
- fromleaf = frameless_function_invocation (frame)
+#define FRAMELESS_FUNCTION_INVOCATION(frame) \
+ (frameless_function_invocation (frame))
/* Define other aspects of the stack frame. */
/* Return number of args passed to a frame.
Can return -1, meaning no way to tell. */
-#define FRAME_NUM_ARGS(numargs, fi) ((numargs) = -1)
+#define FRAME_NUM_ARGS(fi) (-1)
/* Return number of bytes at start of arglist that are not really args. */
nice information for GDB to have, but it is not strictly manditory if we
can live without the ability to look at values within (or backup to)
previous frames.
-*/
+ */
struct frame_saved_regs;
struct frame_info;
-void frame_find_saved_regs PARAMS((struct frame_info *fi,
- struct frame_saved_regs *fsr));
+void frame_find_saved_regs (struct frame_info *fi,
+ struct frame_saved_regs *fsr);
#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
frame_find_saved_regs (frame_info, &frame_saved_regs)
-
\f
+
#define POP_FRAME pop_frame ()
extern void pop_frame ();
#define CALL_DUMMY_LOCATION AFTER_TEXT_END
-extern void m88k_push_dummy_frame();
+extern void m88k_push_dummy_frame ();
#define PUSH_DUMMY_FRAME m88k_push_dummy_frame()
#define CALL_DUMMY { \
pc = text_end; \
}
-#define STACK_ALIGN(addr) (((addr)+7) & -8)
+/* Stack must be aligned on 64-bit boundaries when synthesizing
+ function calls. */
+
+#define STACK_ALIGN(addr) (((addr) + 7) & -8)
#define STORE_STRUCT_RETURN(addr, sp) \
write_register (SRA_REGNUM, (addr))
/* According to the MC88100 RISC Microprocessor User's Manual, section
6.4.3.1.2:
- ... can be made to return to a particular instruction by placing a
- valid instruction address in the SNIP and the next sequential
- instruction address in the SFIP (with V bits set and E bits clear).
- The rte resumes execution at the instruction pointed to by the
- SNIP, then the SFIP.
+ ... can be made to return to a particular instruction by placing a
+ valid instruction address in the SNIP and the next sequential
+ instruction address in the SFIP (with V bits set and E bits clear).
+ The rte resumes execution at the instruction pointed to by the
+ SNIP, then the SFIP.
The E bit is the least significant bit (bit 0). The V (valid) bit is
bit 1. This is why we logical or 2 into the values we are writing
(presumably) give it a totally bogus value.
-- Kevin Buettner
-*/
-
+ */
+
#define TARGET_WRITE_PC(val, pid) { \
write_register_pid(SXIP_REGNUM, (long) val, pid); \
write_register_pid(SNIP_REGNUM, (long) val | 2, pid); \